4th year project biomedical

8/10/2019 4th Year Project Biomedical

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A

PROJECT REPORT

ON

PATIENT MONITORING SYSTEM

Submitted in partial fulfillment of the

Requirements for the award of the degree of

Bachelor Of Technology

in

Bio-Medical Engineering

By

K. KRISHNA GANESH (07241A1115)

H.R. RANJAN (07241A1124)

Department Of Bio-Medical Engineering

GokarajuRangaraju Institute of Engineering and Technology

(Affiliated to Jawaharlal Nehru Technological University)

Hyderabad

2011


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Department of Bio-Medical Engineering

GokarajuRangaraju Institute of Engineering and Technology

(Affiliated to Jawaharlal Nehru Technological University)

Hyderabad

CERTIFICATE

This is to certify that the project entitled PATIENT MONITORING SYSTEM

has been submitted by

K.KRISHNA GANESH (07241A1115)

H.R.RANJAN (07241A1124)

For partial fulfillment of the requirements for the award of degree of

Bachelor of Technology in Bio-Medical Engineering from

Jawaharlal Nehru Technological University, Hyderabad.

The results embodied in this project have not been submitted to any otherUniversity or Institution for the award of any degree or diploma.

External Examiner Head of Department

Mrs. T.Padma

Professor & HOD

Dept of Bio-Medical Engineering


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DEPARTMNENT OF BIOMEDICAL ENGINEERING

CERTIFICATE

This is to certify that K. KRISHNA GANESH, H.R. RANJAN students of final year B.M.E (Bio-Medical

Engineering) of Gokaraju Rangaraju Institute Of Engineering And Technology, affiliated to Jawaharlal

Nehru Technological University have completed a project work titled PATIENT MONITORING SYSTEM

in the department of Bio-Medical Engineering at GRIET.

Project Guide: Project In charge:

SURESH, SWATHI DESIRAJU

Asst.Professer Asst.Professer

Dept of Bio-Medical Engg Dept of Bio-Medical Engg


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ACKNOWLEDGEMENT

There are many people who have helped us directly or indirectly in the successful

completion of our project. We would like to take this opportunity to thank one and all.

First of all we would like to express our deep sense of gratitude towards our project

Guide Suresh, Asst Professor Dept. of BME for always being available whenever we require her

guidance as well as for motivating us throughout the project work.

We are also grateful to the Mrs T.Padma, (Head of Dept.of BME for her valuable

guidance during our project. We would like to express our deep gratitude towards our teaching

and non-teaching staff for giving their valuable suggestions and co operation for doing our

project.

We are also deeply indebted to Dr. Jandhyala. N. Murthy, Principal, Gokaraju

Rangaraju institute of engineering and technology for providing necessary facilities during the

execution of this project.

We would like to thank all our friendsfor their help and constructive criticism during our project

period. Finally, we are very much indebted to our parents for their moral support and encouragement to

achieve higher goals. we have no words to express our gratitude and still we are very thankful to our

parents who have shown us this world and for every support they gave us.

Signature Signature

K. KRISHNA GANESH H.R. RANJAN

(07241A1115) (07241A1124)


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ABSTRACT :

Our project is a working model which incorporates sensors to measure parameters like body

temperature, heart beat rate, respiratory rate and ECG;. A micro-controller board is used for

analyzing the inputs from the patient and any abnormality felt by the patient causes the

monitoring system to give an alarm. Also all the process parameters within an interval selectable

by the user are recorded online. This is very useful for future analysis and review of patients

health condition. For more versatile medical applications, this project can be improvised, by

incorporating blood pressure monitoring systems, dental sensors and annunciation systems,thereby making it useful in hospitals as a very efficient and dedicated patient care system.


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CONTENTS

TITLE PAGE NO

1. BLOCK DIAGRAM 1

2. INTRODUCTION 2

3. CIRCUIT DIAGRAM 4

4. CIRCUIT DESCRIPTION 5

5. HARDWARE DETAILS 9

6. SOFTWARE DETAILS 51

7. OUTPUTS 68

8. FUTURE ENHANCEMENTS 72

9. CONCLUSION 74

10. BIBLIOGRAPHY 75


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BLOCK DIAGRAM


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INTRODUCTION

MEASUREMENT OF RESPIRATORY RATE:

Thermister is used for the measurement of body temperature and respiratory temperature. This

thermister is a passive transducer and its resistance depends on the beat being applied on it. We

have arranged the sensor in the potential divider circuit. This sensor exhibits a large change in

resistance with a change in body temperature. The respiratory rate is determined by holding the

sensor near the nose. The temperature sensor part is attached to the patient whose temperature

has to be measured, which changes the values and thus the corresponding change in the

temperature is displayed on the monitor graphically. Also all temperature measurements are

updated in the patients database. Here in our project we use bead temperature sensor.

SALINE MONITORING SYSTEM:

For saline monitoring the infrared emitter and detector are placed in a position such that thesaline bottle passes between them. They are placed near the nect of the saline bottle. As long as

the saline is present , the path of the infrared rays is blocked and the infrared detector is blocked

from collecting infrared rays from the emitter. Aand so the output will indicate normal saline

status. The software is written to give an audio alert when saline level falls below the safe level.


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CIRCUIT DIAGRAM


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CIRCUIT DESCRIPTION

Heart Beat Rate Sensor Cirtuit:

Monitoring the heart beat rate of the patient can be easily accomplished by analyzing the

ECG pulse . Here, the ECG pulse is amplified and the average time interval or the instantaneous

time interval between two successive R peaks is measured, from which the heart beat rate is

derived. But this method fails to indicate heart blocks immediately and so photo electric pulse

transducers are used.

The pulse rate monitoring method indicates a heart block immediately by sensing the

cessation of blood circulation in the limb terminals. This technique uses photoelectric

transducers which are easy to apply then the 3 ECG electrodes. Also the output signal amplitude

is large with better signal to noise ratio.

The finger probe used for pulse pick up consists of a Ga As infrared LED and a silicon

NPN phototransistor mounted in an enclosure that fits over the tip of the patients finger. The

peak spectral emission of the LED is at 0.94 mm with a 0.707 peak bandwidth of 0.04mm. The

silicon phototransistor is sensitive to radiation between 0.4 and 1.1.mm. Due to the narrow bond

of the spectrum involved the radiation heat output is minimized. The photo transistor is used as

an emitter follower configuration. The IR signal from the LED is transmitted through the finger

tip of the patients fingerand the conductivity of the phototransistor depends on the amount of

radiation reaching it with each contraction of the heart, blood is forced to the extremities and

amount of blood in finger increases. This alters the optical density and so the IR signal

transmission through the finger reduces, causing a correspondence variation in phototransistor

output. The phototransistor is connected as part of a voltage divider circuit, with 10K and 22

K carbon resistors and produces a voltage pulse that closely follows the heart beat rate . This

pulse output is given to the bit 4 of the port D of the microcontroller for signal processing.


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Measurement procedure

1. Attach the Pleth (finger/ear lobe clip) to either the fingertip or to the ear lobe.

2. Wait for a short while for the signal to stabilise. The subject should stayreasonably still

muscle movements will influence the signal. The red LEDon the Sensor housing will start to

flash in time with the heartbeat. If used onthe finger the subject may feel a throbbing sensation.

Note for EasySenseAdvanced and Logger users: if the red LED does notstart to flash, and the

LCD display on the EasySenseunit is blank, press any ofthe buttons on the top panel of the

EasySenseunit to wake it up.

3. Once a regular heart rate is detected, begin recording data.


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SALINE STATUS MONITORING CIRCUIT:

The saline water injection plays a key role in the treatment and recovery of many a patient that

requires constant monitoring. This condition can be fulfilled by using IR sensors which can

detect a drop in the saline below the quantity. By means of annunciation systems, the hospital

staff can be informed and an action of replacing the saline can be easily accomplished before the

bottle becomes empty. Also the usage of the GSM modem facilitates sending of saline status to

the doctor concerned for any further action required.

The circuit uses an IR emitter and an IR detector which are placed in a straight line with

the saline bottle in between, at the point representing the preset saline level. The presence of

saline water, in a full bottle, refracts the emitted radiation, thus generating no output at the IR

detector. When the saline level falls below the preset value; the emitted IR radiation causes a

photoelectric current from the detector. The detector output is an analog quantity which is made

to drive a switching NPN transistor BC107 to get a binary output from the collector of the

transistor. This digital output is fed to the pin 23 of the PIC micro controller, corresponding to

port bit 4. The signal is processed and the saline status is displayed on the screen. In case of the

saline becoming empty the annunciation systems are activated.

PATIENT CALL SWITCHES CIRCUIT:

The patient calling system consists of four switches when pressed gives display on the screen

and activates an audio alert indicating that a patient is calling. These switches are placed in the

vicinity of the patient to enable medical access in an emergency.

BODY RESPIRATORY RATECIRCUIT:

The rate measuring circuit uses a temperature sensor for measuring the respiration rate.A

thermistor is a ceramic semiconductor which exhibits a large change in resistance with a change

in its body temperature. The thermistors have much better sensitivity than RTDs and are

therefore better suited for precision temperature measurements. The availability of high


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resistance values allows the thermistors to be used with long extension leads since the lead

resistance or contact resistance effects can be greatly diminished. The non-linearity of the

thermistor resistance-temperature characteristics outs a practical limit on the temperature span

over which a thermistor can be operated in measurement or control circuit RTDs have lower

sensitivity and are more linear and can therefore be used in applications, where the temperature

spans are very wide. Thermistors has other important advantages over RTDs in that they are

available in smaller sizes, with faster response times, at lower costs and with greater resistance to

shock and vibration effects.

In this circuit wehave arranged thermistor in the form of potential divider when

thermistor is R1 and a potentiator is acting as a R2 which forms potential divider network and

produces an output from potential divider network which is given to analog input channel of themicro controller.

In general to obtain clear and constant output with respect to the input change, the sensor

must be low power consumer. If we draw a lowest current sensitivity the thermistor will improve

and provides better performance. Due to the above grounds we have constructed the thermistor

circuits to produce low milli volts which can be easily digitalized by the transistor. If not the

sensor will to drive large output voltage may cause self heating of the device. Self heating means

large current flows through the thermistor create heat on it without accepting the body

temperature.This voltage is given to the transistor so that number of ones is counted in the

microcontroller which is given as voltage from the transistor.


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HARDWARE DETAILS

Hardware used in the project are as follows:

1. Microcontroller-89s52

2. LCD Display

3. Photo Transistor

4. IR Emitter and Detector

5. LED

6. Switches

7. LM35D

8. Transistors

9. Resistors

10.Capacitors

11.Battery

12.Buzzer

13.Diodes


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MICRO CONTROLLER 89S52:

Definition

A Microcontroller is a single-chip microcomputer that contains all the componentssuch as the

CPU, RAM, some form of ROM, I/O ports, and timers.Unlike a generalpurpose computer, which

also includes all of these components, a microcontroller is designed for a very specific task to

control a particular system. Microcontrollers are sometimes calledembedded microcontrollers,

which just means that they are part of an embedded system. A microprocessor is a general-

purpose digital computer with central processing unit (CPU), which contains arithmetic and logic

unit (ALU), a program counter (PC), a stack pointer (SP), some working registers, a clock timing

circuit, and interrupts circuits. The main disadvantage of microprocessor is that it has no on-chip

memory. So we are going for micro controller since it has on-board

programmable ROM and I/O that can be programmed for various control functions

ATMEL 89S52

AT89S52 MICROCONTROLLER

The microcontroller development effort resulted in the 8051 architecture, which was first

introduced in 1980 and has gone on to be arguably the most popular micro controller architecture

available. The 8051 is a very complete micro controller with a large amount of built in control

store (ROM &EPROM) andRAM, enhanced I/O ports, and the ability to access external

memory. The maximum clock frequency with an 8051 micro controller can execute

instructions is 20MHZ. Microcontroller is a true computer on chip. The design incorporates

all of the features found in a microprocessor: CPU, ALU, PC, SP and registers.

It also has the other features needed to, make complete computer: ROM, RAM, parallel I/O,

serial I/O, counters and a clock circuit.The 89C51/89C52/89C54/89C58 contains a non-volatileFLASH program memory that is parallel programmable. For devices that are serial

programmable (In-System Programmable (ISP) and In-Application Programmable (IAP) with a

boot loader)All three families are Single-Chip 8-bit Microcontrollers manufactured in

advanced CMOS process and are Derivatives of the 80C51 microcontroller family.All the

devices have the same instruction set as the 80C51.


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Features

Compatible with MCS-51 Products

8K Bytes of In-System Programmable (ISP) Flash Memory

Endurance: 10,000 Write/Erase Cycles

4.0V to 5.5V Operating Range

Fully Static Operation: 0 Hz to 33 MHz

Three-level Program Memory Lock

256 x 8-bit Internal RAM

32 Programmable I/O Lines

Three 16-bit Timer/Counters

Eight Interrupt Sources

Full Duplex UART Serial Channel

Low-power Idle and Power-down Modes

Interrupt Recovery from Power-down Mode

Watchdog Timer

Dual Data Pointer


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Power-off Flag

Fast Programming Time

Flexible ISP Programming (Byte and Page Mode)

Green (Pb/Halide-free) Packaging Option

Description The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with

8K bytes of in-system programmable Flash memory. The device is manufactured using Atmels

high-density nonvolatile memory technology and is compatible with the indus-try-standard

80C51 instruction set and pinout. The on-chip Flash allows the program memory to be

reprogrammed in-system or by a conventional nonvolatile memory pro-grammer. By combining

a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel

AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective

solution to many embedded control applications. The AT89S52 provides the following standard

features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers,

three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port,

on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for

operation down to zero frequency and supports two software selectable power saving modes. The

Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt

system to continue functioning. The Power-down mode saves the RAM con-tents but freezes the

oscillator, disabling all other chip functions until the next interrupt or hardware reset.

The AT89s52 is a low power, high performance CMOS 8-bit micro computer with 8Kbytes of

flash programmable and erasable read onlymemory(PEROM).The device is

manufactured using Atmels high density nonvolatile memory technology and is

compatible with the industry standard 80c51 and 80C52 instruction set and pin out.

The on-chip flash allows the program memory to be reprogrammed in- system or by a


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conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU

with flash on a monolithic chip, the Atmel AT89s52 Is a powerful microcomputer

which provides a highly flexible and cost effective solution to many embedded

control applications. The main advantages of 89s52 over 8051 are

1. Software Compatibility

2. Program Compatibility

3. Rewritability

The 89s52 microcontroller has an excellent software compatability, i.e. the software used

can be applicable to any other microcontroller. The program written on this

microcontroller can be carried to any base. Program compatibility is the major advantage

in 89s52. The program can be used in any other advanced microcontroler. The programcan be reloaded and changed for nearly 1000 times.


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PIN DIAGRAM OF 89S52


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ARCHITECTURE OF 89S52


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The AT89s52 provides the following standard features: 8K bytes ofFlash,256 bytes of RAM, 32

I/O lines, three 16-bit timer/counters, a six-vectortwo-levelinterrupt architecture, a full-duplex

serial port, on-chip oscillator, andclock circuitry.In addition, the AT89s52 is designed with static

logic for operation down to zerofrequency and supports two software selectable power saving

modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and

interrupt system to continue functioning. The Power-down mode saves the RAM

contents but freezes the oscillator, disabling all other chip functions until the next

hardware reset.

PIN DESCRIPTION:

VCC :Supply voltage.

GND:Ground.

Port 0

Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink eight

TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs.

Port 0 can also be configured to be the multiplexed lower order address/data bus during accesses

to external program and data memory. In this mode, P0 has internalpullups.Port 0 also receives

the code bytes during Flash programming and outputs the code bytes during program

verification. External pullupsare required during program verification.

Port 1

Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can

sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the

inter-nal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being

pulled low will source current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1


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can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter

2 trigger input (P1.1/T2EX), respectively, as shown in the follow-ing table. Port 1 also receives

the low-order address bytes during Flash programming and verification.

Port 2




pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order

address byte during fetches from external program memory and dur-ing accesses to external data

memory that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong

internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit

addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2

also receives the high-order address bits and some control signals during Flash program-ming

and verification.

P1.0 T2 (external count input to Timer/Counter 2), clock-out

P1.1 T2EX (Timer/Counter 2 capture/reload trigger and direction control)

P1.5 MOSI (used for In-System Programming)

P1.6 MISO (used for In-System Programming)

P1.7 SCK (used for In-System Programming)


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Port 3




pulled low will source current (IIL) because of the pull-ups. Port 3 receives some control signals

for Flash programming and verification. Port 3 also serves the functions of various special

features of the AT89S52, as shown in the fol-lowing table.

RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets

the device. This pin drives high for 98 oscillator periods after the Watchdog times out. The

DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state

of bit DISRTO, the RESET HIGH out feature is enabled.

ALE/PROG Address Latch Enable (ALE) is an output pulse for latching the low byte of the

address during accesses to external memory. This pin is also the program pulse input (PROG)

during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the

oscillator frequency and may be used for external timing or clocking purposes. Note, however,that one ALE pulse is skipped dur-ing each access to external data memory. If desired, ALE

operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active

only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the

ALE-disable bit has no effect if the microcontroller is in external execution mode.

P3.0 RXD (serial input port)

P3.1 TXD (serial output port)

P3.2 INT0 (external interrupt 0)

P3.3 INT1 (external interrupt 1)


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P3.4 T0 (timer 0 external input)

P3.5 T1 (timer 1 external input)

P3.6 WR (external data memory write strobe)

P3.7 RD (external data memory read strobe)

PSEN Program Store Enable (PSEN) is the read strobe to external program memory.

When the AT89S52 is executing code from external program memory, PSEN is activated twice

each machine cycle, except that two PSEN activations are skipped during each access to exter-

nal data memory.

EA/VPP External Access Enable. EA must be strapped to GND in order to enable the

device to fetch code from external program memory locations starting at 0000H up to FFFFH.

Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA

should be strapped to VCC for internal program executions. This pin also receives the 12-volt

programming enable voltage (VPP) during Flash programming.

XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating

circuit.

XTAL2Output from the inverting oscillator amplifier.

Special Function Registers A map of the on-chip memory area called the Special Function

Register (SFR) space is shown in Table 5-1. Note that not all of the addresses are occupied, and

unoccupied addresses may not be imple-mented on the chip. Read accesses to these addresses

will in general return random data, and write accesses will have an indeterminate effect. User

software should not write 1s to these unlisted locations, since they may be used in future


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products to invoke new features. In that case, the reset or inactive values of the new bits will

always be 0. Timer 2 Registers: Control and status bits are contained in registers T2CON (shown

in Table 5- 2) and T2MOD (shown in Table 10-2) for Timer 2. The register pair (RCAP2H,

RCAP2L) are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-

reload mode. Interrupt Registers: The individual interrupt enable bits are in the IE register. Two

priorities can be set for each of the six interrupt sources in the IP register.

T2CONTimer/Counter 2 Control Register

TF2 Timer 2 overflow flag set by a Timer 2 overflow and must be cleared by software.

TF2 will not be set when either RCLK = 1 or TCLK = 1.

EXF2 Timer 2 external flag set when either a capture or reload is caused by a negative

transition on T2EX and EXEN2 = 1. When Timer 2 interrupt is enabled, EXF2 = 1 will cause the

CPU to vector to the Timer 2 interrupt routine. EXF2 must be cleared by software. EXF2 does

not cause an interrupt in up/down counter mode (DCEN = 1).

RCLK Receive clock enable. When set, causes the serial port to use Timer 2 overflow

pulses for its receive clock in serial port Modes 1 and 3. RCLK = 0 causes Timer 1 overflow to

be used for the receive clock.

TCLK Transmit clock enable. When set, causes the serial port to use Timer 2 overflow

pulses for its transmit clock in serial port Modes 1 and 3. TCLK = 0 causes Timer 1 overflows to

be used for the transmit clock.

EXEN2 Timer 2 external enable. When set, allows a capture or reload to occur as a result of anegative transition on T2EX if Timer 2 is not being used to clock the serial port. EXEN2 = 0

causes Timer 2 to ignore events at T2EX.

TR2 Start/Stop control for Timer 2. TR2 = 1 starts the timer.


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C/T2 Timer or counter select for Timer 2. C/T2 = 0 for timer function. C/T2 = 1 for external

event counter (falling edge triggered). CP/RL2 Capture/Reload select. CP/RL2 = 1 causes

captures to occur on negative transitions at T2EX if EXEN2 = 1.

CP/RL2 = 0 causes automatic reloads to occur when Timer 2 overflows or negative transitions

occur at T2EX when EXEN2 = 1. When either RCLK or TCLK = 1, this bit is ignored and the

timer is forced to auto-reload on Timer 2 overflow.

AUXR: Auxiliary Register

Dual Data Pointer Registers: To facilitate accessing both internal and external data memory, two

banks of 16-bit Data Pointer Registers are provided: DP0 at SFR address locations 82H-83H and

DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1. The user

should ALWAYS initialize the DPS bit to the appropriate value before accessing the respective

Data Pointer Register. Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON.4)

in the PCON SFR. POF is set to 1 during power up. It can be set and rest under software

control and is not affected by reset.

Memory Organization MCS-51 devices have a separate address space for Program and DataMemory. Up to 64K bytes each of external Program and Data Memory can be addressed.

Program MemoryIf the EA pin is connected to GND, all program fetches are directed to

external memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses

0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through

FFFFH are to external memory.

Data MemoryThe AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes

occupy a parallel address space to the Special Function Registers. This means that the upper 128

bytes have the same addresses as the SFR space but are physically separate from SFR space.

When an instruction accesses an internal location above address 7FH, the address mode used in

the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR


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space. Instructions which use direct addressing access the SFR space. For example, the following

direct addressing instruction accesses the SFR at location 0A0H (which is P2). MOV 0A0H,

#data Instructions that use indirect addressing access the upper 128 bytes of RAM. For example,

the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at

address 0A0H, rather than P2 (whose address is 0A0H). MOV @R0, #data Note that stack

operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available

as stack space.

Watchdog Timer (One-time Enabled with Reset-out) The WDT is intended as a recovery

method in situations where the CPU may be subjected to software upsets. The WDT consists of a

14-bit counter and the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to disable

from exiting reset. To enable the WDT, a user must write 01EH and 0E1H in sequence to the

WDTRST register (SFR location 0A6H). When the WDT is enabled, it will increment every

machine cycle while the oscillator is running. The WDT timeout period is dependent on the

external clock frequency. There is no way to disable the WDT except through reset (either

hardware reset or WDT overflow reset). When WDT over-flows, it will drive an output RESET

HIGH pulse at the RST pin.

Using the WDTTo enable the WDT, a user must write 01EH and 0E1H in sequence to theWDTRST register (SFR location 0A6H). When the WDT is enabled, the user needs to service it

by writing 01EH and 0E1H to WDTRST to avoid a WDT overflow. The 14-bit counter

overflows when it reaches 16383 (3FFFH), and this will reset the device. When the WDT is

enabled, it will increment every machine cycle while the oscillator is running. This means the

user must reset the WDT at least every 16383 machine cycles. To reset the WDT the user must

write 01EH and 0E1H to WDTRST. WDTRST is a write-only register. The WDT counter cannot

be read or written. When WDT overflows, it will generate an output RESET pulse at the RST

pin. The RESET pulse dura-tion is 98xTOSC, where TOSC = 1/FOSC. To make the best use of

the WDT, it should be serviced in those sections of code that will periodically be executed within

the time required to prevent a WDT reset.


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WDT During Power-down and Idle In Power-down mode the oscillator stops, which means the

WDT also stops. While in Power-down mode, the user does not need to service the WDT. There

are two methods of exiting Power-down mode: by a hardware reset or via a level-activated

external interrupt which is enabled prior to entering Power-down mode. When Power-down is

exited with hardware reset, servicing the WDT should occur as it normally does whenever the

AT89S52 is reset. Exiting Power-down with an interrupt is significantly different. The interrupt

is held low long enough for the oscillator to stabilize. When the interrupt is brought high, the

interrupt is serviced. To prevent the WDT from resetting the device while the interrupt pin is

held low, the WDT is not started until the interrupt is pulled high. It is suggested that the WDT

be reset during the interrupt service for the interrupt used to exit Power-down mode. To ensure

that the WDT does not overflow within a few states of exiting Power-down, it is best to reset the

WDT just before entering Power-down mode. Before going into the IDLE mode, the WDIDLE

bit in SFR AUXR is used to determine whether the WDT continues to count if enabled. The

WDT keeps counting during IDLE (WDIDLE bit = 0) as the default state. To prevent the WDT

from resetting the AT89S52 while in IDLE mode, the user should always set up a timer that will

periodically exit IDLE, service the WDT, and reenter IDLE mode. With WDIDLE bit enabled,

the WDT will stop to count in IDLE mode and resumes the count upon exit from IDLE.

UARTThe UART in the AT89S52 operates the same way as the UART in the AT89C51 andAT89C52. For further information on the UART operation, please click on the document link

below:

Timer 0 and 1Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer

1 in the AT89C51 and AT89C52. For further information on the timers operation, please click

on the document link below:

Timer 2 Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter.

The type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 5-2). Timer 2

has three operating modes: capture, auto-reload (up or down counting), and baud rate generator.

The modes are selected by bits in T2CON, as shown in Table 10-1. Timer 2 consists of two 8-bit

registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine

cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscil-


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lator frequency. In the Counter function, the register is incremented in response to a 1-to-0

transition at its corre-sponding external input pin, T2. In this function, the external input is

sampled during S5P2 of every machine cycle. When the samples show a high in one cycle and a

low in the next cycle, the count is incremented. The new count value appears in the register

during S3P1 of the cycle following the one in which the transition was detected. Since two

machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum

count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least once

before it changes, the level should be held for at least one full machine cycle.

Capture ModeIn the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2

= 0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit

can then be used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation,

but a 1-to-0 transi-tion at external input T2EX also causes the current value in TH2 and TL2 to

be captured into RCAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes

bit EXF2 in T2CON to be set. The EXF2 bit, like TF2, can generate an interrupt. The capture

mode is illus-trated in Figure 10-1.

Auto-reload (Up or Down Counter) Timer 2 can be programmed to count up or down when

configured in its 16-bit auto-reload mode. This feature is invoked by the DCEN (Down Counter

Enable) bit located in the SFR T2MOD (see Table 10-2). Upon reset, the DCEN bit is set to 0 so

that timer 2 will default to count up. When DCEN is set, Timer 2 can count up or down,

depending on the value of the T2EX pin.

T2MODTimer 2 Mode Control Register

Timer 2 automatically counting up when DCEN = 0. In this mode, two options are selected by

bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets the TF2 bit

upon overflow. The overflow also causes the timer registers to be reloaded with the 16-bit value

in RCAP2H and RCAP2L. The values in Timer in Capture ModeRCAP2H and RCAP2L are

preset by software. If EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by a

1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit. Both the TF2 and

EXF2 bits can generate an interrupt if enabled. Setting the DCEN bit enables Timer 2 to count up


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or down, as shown in Figure 10-2. In this mode, the T2EX pin controls the direction of the count.

A logic 1 at T2EX makes Timer 2 count up. The timer will overflow at 0FFFFH and set the TF2

bit. This overflow also causes the 16-bit value in RCAP2H and RCAP2L to be reloaded into the

timer registers, TH2 and TL2, respectively. A logic 0 at T2EX makes Timer 2 count down. The

timer underflows when TH2 and TL2 equal the values stored in RCAP2H and RCAP2L. The

underflow sets the TF2 bit and causes 0FFFFH to be reloaded into the timer registers. The EXF2

bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit of

resolution. In this operating mode, EXF2 does not flag an interrupt.

Baud Rate Generator Timer 2 is selected as the baud rate generator by setting TCLK and/or

RCLK in T2CON (Table 5-2). Note that the baud rates for transmit and receive can be different

if Timer 2 is used for the receiver or transmitter and Timer 1 is used for the other function.

Setting RCLK and/or TCLK puts Timer 2 into its baud rate generator mode, as shown in Figure

11-1. The baud rate generator mode is similar to the auto-reload mode, in that a rollover in TH2

causes the Timer 2 registers to be reloaded with the 16-bit value in registers RCAP2H and

RCAP2L, which are preset by software. The baud rates in Modes 1 and 3 are determined by

Timer 2s overflow rate according to the fol-lowing equation. The Timer can be configured for

either timer or counter operation. In most applications, it is con-figured for timer operation

(CP/T2 = 0). The timer operation is different for Timer 2 when it is used as a baud rate generator.

Normally, as a timer, it increments every machine cycle (at 1/12 the oscillator frequency).As a

baud rate generator, however, it increments every state time (at 1/2 the oscillator frequency). The

baud rate formula is given below. where (RCAP2H, RCAP2L) is the content of RCAP2H and

RCAP2L taken as a 16-bit unsigned integer. Timer 2 as a baud rate generator is shown in Figure

11-1. This figure is valid only if RCLK or TCLK = 1 in T2CON. Note that a rollover in TH2

does not set TF2 and will not generate an inter-rupt. Note too, that if EXEN2 is set, a 1-to-0

transition in T2EX will set EXF2 but will not cause a reload from (RCAP2H, RCAP2L) to (TH2,

TL2). Thus, when Timer 2 is in use as a baud rate generator, T2EX can be used as an extra

external interrupt. Note that when Timer 2 is running (TR2 = 1) as a timer in the baud rate

generator mode, TH2 or TL2 should not be read from or written to. Under these conditions, the

Timer is incremented every state time, and the results of a read or write may not be accurate. The

RCAP2 registers may be read but should not be written to, because a write might overlap a


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reload and cause write and/or reload errors. The timer should be turned off (clear TR2) before

accessing the Timer 2 or RCAP2 registers.

Programmable Clock Out A 50% duty cycle clock can be programmed to come out on

P1.0, as shown in Figure 12-1. This pin, besides being a regular I/O pin, has two alternate

functions. It can be programmed to input the external clock for Timer/Counter 2 or to output a

50% duty cycle clock ranging from 61 Hz to 4 MHz (for a 16-MHz operating frequency). To

configure the Timer/Counter 2 as a clock generator, bit C/T2 (T2CON.1) must be cleared and bit

T2OE (T2MOD.1) must be set. Bit TR2 (T2CON.2) starts and stops the timer. The clock-out

frequency depends on the oscillator frequency and the reload value of Timer 2 capture registers

(RCAP2H, RCAP2L), as shown in the following equation. In the clock-out mode, Timer 2 roll-

overs will not generate an interrupt. This behavior is similar to when Timer 2 is used as a baud-

rate generator. It is possible to use Timer 2 as a baud-rate gen-erator and a clock generator

simultaneously. Note, however, that the baud-rate and clock-out frequencies cannot be

determined independently from one another since they both use RCAP2H and RCAP2L.

Interrupts The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and

INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts

are all shown in Figure 13-1. Each of these interrupt sources can be individually enabled or

disabled by setting or clearing a bit in Special Function Register IE. IE also contains a global

disable bit, EA, which disables all interrupts at once. Note that Table 13-1 shows that bit position

IE.6 is unimplemented. User software should not write a 1 to this bit position, since it may be

used in future AT89 products. Timer 2 interrupt is generated by the logical OR of bits TF2 and

EXF2 in register T2CON. Nei-ther of these flags is cleared by hardware when the service routine

is vectored to. In fact, the service routine may have to determine whether it was TF2 or EXF2

that generated the interrupt, and that bit will have to be cleared in software. The Timer 0 and

Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The


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values are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at

S2P2 and is polled in the same cycle in which the timer overflows.

Oscillator Characteristics XTAL1 and XTAL2 are the input and output, respectively, of an

inverting amplifier that can be configured for use as an on-chip oscillator, as shown in Figure 16-

1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external

clock source, XTAL2 should be left unconnected while XTAL1 is driven, as shown in Figure 16-

2. There are no requirements on the duty cycle of the external clock signal, since the input to the

internal clock-ing circuitry is through a divide-by-two flip-flop, but minimum and maximum

voltage high and low time specifications must be observed.

Idle Mode In idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain

active. The mode is invoked by software. The content of the on-chip RAM and all the special

functions regis-ters remain unchanged during this mode. The idle mode can be terminated by any

enabled interrupt or by a hardware reset. Note that when idle mode is terminated by a hardware

reset, the device normally resumes pro-gram execution from where it left off, up to two machine

cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to

internal RAM in this event, but access to the port pins is not inhibited. To eliminate the

possibility of an unexpected write to a port pin when idle mode is terminated by a reset, the

instruction following the one that invokes idle mode should not write to a port pin or to external

memory.

Power-down Mode In the Power-down mode, the oscillator is stopped, and the instruction that

invokes Power-down is the last instruction executed. The on-chip RAM and Special Function

Registers retain their values until the Power-down mode is terminated. Exit from Power-down

mode can be initiated either by a hardware reset or by an enabled external interrupt. Reset

redefines the SFRs but does not change the on-chip RAM. The reset should not be activated

before VCC is restored to its normal operating level and must be held active long enough to

allow the oscillator to restart and stabilize.


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Programming the Flash Parallel Mode The AT89S52 is shipped with the on-chip Flash

memory array ready to be programmed. The programming interface needs a high-voltage (12-

volt) program enable signal and is compatible with conventional third-party Flash or EPROM

programmers. The AT89S52 code memory array is programmed byte-by-byte.

Programming Algorithm: Before programming the AT89S52, the address, data, and

control signals should be set up according to the Flash Programming Modes (Table 22-1) and

Figure 22-1 and Figure 22-2. To program the AT89S52, take the following steps: 1. Input the

desired memory location on the address lines. 2. Input the appropriate data byte on the data lines.

3. Activate the correct combination of control signals. 4. Raise EA/VPP to 12V. 5. Pulse

ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write cycle is

self-timed and typically takes no more than 50 s. Repeat steps 1 through 5, changing the

address and data for the entire array or until the end of the object file is reached.

Data Polling: The AT89S52 features Data Polling to indicate the end of a byte write cycle.

Dur-ing a write cycle, an attempted read of the last byte written will result in the complement of

the written data on P0.7. Once the write cycle has been completed, true data is valid on all

outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has

been initiated.

Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY

output signal. P3.0 is pulled low after ALE goes high during programming to indicate BUSY.

P3.0 is pulled high again when programming is done to indicate READY.

Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code

data can be read back via the address and data lines for verification. The status of the individ-ual

lock bits can be verified directly by reading them back. Reading the Signature Bytes: Thesignature bytes are read by the same procedure as a nor-mal verification of locations 000H,

100H, and 200H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned

are as follows. (000H) = 1EH indicates manufactured by Atmel (100H) = 52H indicates

AT89S52 (200H) = 06H Chip Erase: In the parallel programming mode, a chip erase operation is

initiated by using the proper combination of control signals and by pulsing ALE/PROG low for a


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duration of 200 ns - 500 ns. In the serial programming mode, a chip erase operation is initiated

by issuing the Chip Erase instruction. In this mode, chip erase is self-timed and takes about 500

ms. During chip erase, a serial read from any address location will return 00H at the data output.

Programming the Flash Serial Mode The Code memory array can be programmed using the

serial ISP interface while RST is pulled to VCC. The serial interface consists of pins SCK, MOSI

(input) and MISO (output). After RST is set high, the Programming Enable instruction needs to

be executed first before other operations can be executed. Before a reprogramming sequence can

occur, a Chip Erase operation is required. The Chip Erase operation turns the content of every

memory location in the Code array into FFH. Either an external system clock can be supplied at

pin XTAL1 or a crystal needs to be connected across pins XTAL1 and XTAL2. The maximum

serial clock (SCK) frequency should be less than 1/16 of the crystal frequency. With a 33 MHz

oscillator clock, the maximum SCK frequency is 2 MHz.

Serial Programming Algorithm To program and verify the AT89S52 in the serial programming

mode, the following sequence is recommended: 1. Power-up sequence: a. Apply power between

VCC and GND pins. b. Set RST pin to H. If a crystal is not connected across pins XTAL1 and

XTAL2, apply a 3 MHz to 33 MHz clock to XTAL1 pin and wait for at least 10 milliseconds. 2.

Enable serial programming by sending the Programming Enable serial instruction to pin

MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs to be less than the

CPU clock at XTAL1 divided by 16. 3. The Code array is programmed one byte at a time in

either the Byte or Page mode. The write cycle is self-timed and typically takes less than 0.5 ms at

5V. 4. Any memory location can be verified by using the Read instruction which returns the

content at the selected address at serial output MISO/P1.6. 5. At the end of a programming

session, RST can be set low to commence normal device operation. Power-off sequence (if

needed): 1. Set XTAL1 to L (if a crystal is not used). 2. Set RST to L. 3. Turn VCC power

off. Data Polling: The Data Polling feature is also available in the serial mode. In this mode,

during a write cycle an attempted read of the last byte written will result in the complement of

the MSB of the serial output byte on MISO.


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Serial Programming Instruction Set The Instruction Set for Serial Programming follows a 4-byte

protocol

Transistors as switches

Introduction

A key aspect of proper hacking is the use of transistors for switching things on and off. A

typicalexample is using a computers parallel port to turn some external device on. I used to do

this allthe time, but Im not an electrical engineer, and I dont claim to really remember anything

learned in the past about whats happening at the silicon level in a transistor. So every time useda transistor circuit in a project, I would promptly forget the proper configuration for doingit, and

everything I knew about which transistor type did what, and Ive have to look it all upagain next

time.I assembled this document as a quick reference for myself, to avoid this painful lookup in

thefuture notice I sayassembled; this is basically a google composite, and I didnt write

verymuch of it myself.Basically what I want to know when I look at this document is:

What transistor type do I need for my project?

What resistors do I need to use with this transistor?

How do I hook it up?


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Notation

First some notation about transistor types and schematics.

schematics like this :

Transistors usually appear on To keep emitter notation straight, you can think of a PNP's

emitter emitting electrons, and an NPN's emitter emitting holes (positive charge). The

arrow in a schematic is always the emitter. The collector then collects current carriers (holes

or electrons).

The direction of the arrow on the emitter distinguishes the NPN from the PNP transistor. If the

arrow points in, (Points iN) the transistor is a PNP. On the other hand if the arrow points out, the


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transistors can be used to switch ground to a device. In this case, I would make the following

connections:

Device power to whatever power source I want to use

Device ground to the collector on my NPN transistor

Transistor emitter to real ground

My switch whatever line I am able to control from my button or my computer or

whateverto transistor base

If I make those connections, then connecting the base to high voltage (a little bit higher than

ground) will switch ground to the device and start the current-a-flowing. This is intuitive to me,

since on the side of my computer or whatever, a logical 1 means yes, please let current pass.

Heres a schematic:


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Transistor asAmplifiers

Purpose

The aim of this experiment is to develop a bipolar transistor amplifier with a voltage gain of

minus 25. The amplifier must accept input signals from a source impedance of 1 k and providean undistorted output amplitude of 5 V when driving a 560 load. The bandwidth should extend

from below 100 Hz to above 1 MHz.

Introduction

An electrical signal can be amplified by using a device which allows a small current or voltage to

control the flow of a much larger current from a dc power source. Transistors are the basic

device providing control of this kind. There are two general types of transistors, bipolar and

field-effect. Very roughly, the difference between these two types is that for bipolar devices an

input current controls the large current flow through the device, while for field-effect transistors

an input voltage provides the control. In this experiment we will build a two-stage amplifier

using two bipolar transistors. In most practical applications it is better to use an op-amp as a

source of gain rather than to build an amplifier from discrete transistors. A good understanding

of transistor fundamentals is nevertheless essential. Because op-amps are built from transistors, a

detailed understanding of opampbehavior, particularly input and output characteristics, must be

based on an understanding of transistors. We will learn in Experiments #9 and #10 about logic

devices, which are the basic elements of computers and other digital devices. These integrated

circuits are also made from transistors, and so the behavior of logic devices depends upon the

behavior of transistors. In addition to the importance of transistors as components of op-amps,

logic circuits, and an enormous variety of other integrated circuits, single transistors are still

important in many applications. For experiments they are especially useful as interface devices

between integrated circuits and sensors, indicators, and other devices used to communicate with

the outside world. The three terminals of a bipolar transistor are called the emitter, base, and

collector (Figure 7.1). A small current into the base controls a large current flow from the

collector to the emitter. The current at the base is typically one hundredth of the collector-emitter

current. Moreover, the large current flow is almost independent of the voltage across the

transistor from collector to emitter. This makes it possible to obtain a large amplification of


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voltage by taking the output voltage from a resistor in series with the collector. We will begin by

constructing a common emitter amplifier, which operates on this principle.

A major fault of a single-stage common emitter amplifier is its high output impedance. This can

be cured by adding an emitter follower as a second stage. In this circuit the control signal is

again applied at the base, but the output is taken from the emitter. The emitter voltage precisely

follows the base voltage but more current is available from the emitter. The common emitter

stage and the emitter follower stage are by far the most common transistor circuit configurations.

Figure 7.1 Pin-out of 2N3904 and 1 k trimpot

Theory

CURRENT AMPLIFIER MODEL OF BIPOLAR TRANSISTOR

From the simplest point of view a bipolar transistor is a current amplifier. The current flowing

from collector to emitter is equal to the base current multiplied by a factor. An NPN transistor

operates with the collector voltage at least a few tenths of a volt above the emitter voltage, and

with a current flowing into the base. The base-emitter junction then acts like a forward-biased

diode with an 0.6 V drop: VB VE + 0.6V. Under these conditions, the collector current isproportional to the base current: IC = hFE IB. The constant of proportionality is called hFE

because it is one of the "hparameters," a set of numbers that give a complete description of the

small-signal properties of a transistor (see Bugg Section 17.4). It is important to keep in mind

that hFE is not really a constant. It depends on collector current (see H&H Fig. 2.78), and it

varies by 50% or more from device to


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Emitter follower stage Common emitter stage

Figure shows the two main transistor-based circuits we will consider. In the emitterfollowerstage

the output (emitter) voltage is simply related to the input (base) voltage by a diode drop of about

.6 eV. An ac signal of 1 volt amplitude on the input will therefore give an AC signal of 1 volt on

the output, i.e. the output just follows the input. As we will see later, the advantage of this

circuit is as a buffer due to a relatively high input and low output impedance. In the common

emitter stage of figure 7.2b, a 1 volt ac signal at the input will again cause a 1 volt ac signal at

the emitter. This will cause an ac current of 1volt/RE from the emitter to ground, and hence also

through Rc. Vout is therefore 15-Rc(1volt/RE) and we see that there is an ac voltage gain of

Rc/RE. Although we are only looking to amplify the AC signal, it is nonetheless very important

to set up proper dc bias conditions or quiescent points. The first step is to fix the dc voltage of

the base with a voltage divider (R1 and R2 in Figure 7.3). The emitter voltage will then be 0.6 V

less than the base voltage. With the emitter voltage known, the current flowing from the emitter

is determined by the emitter resistor: IE = VE/RE. For an emitter follower, the collector is

usually tied to the positive supply voltage VCC. The only difference between biasing the emitter


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follower and biasing the common emitter circuit is that the common emitter circuit always has a

collector resistor. The collector resistor does not change the base or emitter voltage, but the drop

across the collector resistor does determine the collector voltage: VC = VCCICRC.

Biased common emitter amplifier


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There are three subtleties to keep in mind when biasing common-emitter or emitter-follower

circuits. First of all, the base bias voltage must be fixed by a low enough impedance so that

changes in the base current do not alter the base voltage. This is essential because the base

current depends on hFE and so is not a well determined quantity. If the base voltage is

determined by a divider (as in Figure 7.3), the divider impedance will be low enough when:

R1R2 R1R2

R1 R2

As we will see in a moment, this equation just says that the impedance seen looking into the

divider (The Thevenin equivalent or R1||R2) should be much less that the impedance looking

into the base. Another point to keep in mind is that when you fix the quiescent point by choosing

the base divider ratio and the resistors RE and RC, you are also fixing the dc power dissipation in

the transistor: P = (VCVE) IE. Be careful that you do not exceed the maximum allowed power

dissipation Pmax. Finally, the quiescent point determines the voltages at which the output will

clip. For a common emitter stage the maximum output voltage will be close to the positive

supply voltage VCC. The minimum output voltage occurs when the transistor saturates, which

happens when the collector voltage is no longer at least a few tenths of a volt above the emitter

voltage. We usually try to design common emitter stages for symmetrical clipping, which means

that the output can swing equal amounts above and below the quiescent point. The voltage gainof the emitter follower stage is very close to unity. The common emitter stage, in contrast, can

have a large voltage gain:

A RC/RE

If we are interested in the ac gain, then RC and RE stand for the ac impedances attached to the

collector and emitter, which may be different from the dc resistances. In our circuit we use CE to

bypass part of the emitter resistor at the signal frequency.

INPUT AND OUTPUT IMPEDANCES

The input impedance is the same for both emitter followers and common emitter stages. The

input impedance looking into the base is


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rin hFE1R

In this expression R is whatever impedance is connected to the emitter. For a common emitter, R

would usually just be the emitter resistor, but for an emitter follower R might be the emitter

resistor in parallel with the input impedance of the next stage. If you want the input impedance of

the whole stage, rather than just that looking into the base, you will have to consider rin in

parallel with the base bias resistors. The output impedance of a common emitter stage is just

equal to the collector resistor. The output impedance looking into the emitter of an emitter

follower is given by

routR/hFE1

Now R stands for whatever impedance is connected to the base. For our two-stage amplifier

shown in Figure 7.5, the emitter-follower base is connected to the collector of a common emitter

stage, and so R is the output impedance of that stage, which is equal to RC.

EBERS-MOLL MODEL OF BIPOLAR TRANSISTOR

A slightly more detailed picture of the bipolar transistor is required to understand what happens

when the emitter resistor is very small. Instead of using the current amplifier model, one can take

the view that the collector current IC is controlled by the base-emitter voltage VBE. The

dependence of IC on VBE is definitely not linear, rather it is a very rapid exponential function.

The formula relating IC and VBE is called the Ebers-Moll equation, and it is discussed in H&H

For our purposes, the Ebers-Moll model only modifies our current amplifier model in one

important way. For small variations about the quiescent point, the transistor now acts as if it has

a small internal resistor re in series with the emitter


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re 25 1 mA/Ic)

The magnitude of the intrinsic emitter resistance re dependes on the collector current IC.

The presence of the intrinsic emitter resistance re modifies the above Equations (1)(4). In

Equations (1) and (2) we should substitute RE RE + re, and for Equation (3) we need to

substitute R R + re. Equation (4) is modified to read

rout R/hFE1) re .

The most important of these results is the modified Equation (2)

A RCRE re

which shows that the common emitter gain does not go to infinity when the external emitter

resistor goes to zero. Instead the gain goes to the finite value A =RC / re.

COMMON EMITTER AMPLIFIERVARIABLE GAIN

Connect the wiper of the 1.0 k trimpot RE through the bypass capacitor CE to ground. Verify

that

the quiescent point has not changed significantly. Observe the change in gain as you traverse the

full range of the trimpot using 10 kHz sine waves. Start with the contact at ground (bottom of

diagram) and move it up until CE bypasses all of RE. When approaching maximum gain turn

down the input amplitude (a long way) so that the output signals are still well shaped sine waves.

If the output is distorted the amplifier is not in its linear regime, and our formulas for the ac gain

are not correct. Compare the measured maximum gain with the value predicted in the homework


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for several output amplitudes going down by factors of two. Do theory and experiment tend to

converge as Vout tends to zero?

COMMON EMITTER AMPLIFIER: INPUT AND OUTPUT IMPEDANCE

Set the amplifier gain to25 for 10 kHz sine waves. What trimpot setting gives a gain of25?.

(To see where the trimpot is set, remove it from the circuit and measure the resistance from cw to

wiper or from ccw to wiper.)

Simulate the required source impedance by inserting a 1 k resistor in series with the input.

What fraction of the original output amplitude do you see? Is this as expected? Remove the 1 k

resistor before the next test so that you test only one thing at a time. Connect a 560 load from

the output to ground. What fraction of the original output do you now see? Is this as expected?

EMITTER FOLLOWER OUTPUT STAGE

In the emitter follower circuit, the input signal is applied to the base of the transistor, but the

output is taken from the emitter. The emitter follower has unit gain, i.e. the emitter "follows" the

base voltage. The input impedance is high and the output impedance is low. Ordinarily the

quiescent base voltage is determined by a bias circuit. In the present case the collector voltage

VC of the previous circuit already has a value suitable for biasing the follower, so a direct dc

connection can be made between the two circuits. Assemble the emitter follower circuit shown in

Figure 7.5. Do not connect the 560 load to the output yet. Carry out appropriate dc diagnostic

tests. This time we expect the collector to be at +15 V, the base to be at the collector voltage of


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the first stage, and the emitter to be about 0.6 V below the collector. Correct any problems before

moving on. Confirm that the voltage gain of the emitter follower is unity. Drive the complete

system with the function generator. Observe the ac amplitudes at the input of the emitter follower

and at the output. Measure the ac gain of the emitter follower stage. (Again you may need to add

a 220 k resistor to ground after Cout to keep the dc level at the scope input near ground.) You

may want to put the scope on ac coupling when you probe points with large dc offsets. Attach a

560 load from the output to ground. What fraction of the unloaded output do you now see?

Compare with your calculations.

TEMPERATURE SENSOR-LM35D:

The LM35 series are precision integrated-circuit temperature sensors, whose output voltage is

linearly proportional to the Celsius (Centigrade) temperature. The LM35 thus has an advantage

over linear temperature sensors calibrated in Kelvin, as the user is not required to subtract a

large constant voltage from its output to obtain convenient Centigrade scaling. The LM35 does

not require any external calibration or trimming to provide typical accuracies of 1/4C at room

temperature and 3/4C over a full -55 to +150C temperature range.

Low cost is assured by trimming and calibration at the wafer level. The LM35's low output

impedance, linear output, and precise inherent calibration make interfacing to readout or control

circuitry especially easy. It can be used with single power supplies, or with plus and minus

supplies. As it draws only 60 A from its supply, it has very low self-heating, less than 0.1C in

still air. The LM35 is rated to operate over a -55 to +150C temperature range, while theLM35C is rated for a -40 to +110C range (-10 with improved accuracy). The LM35 series is

available packaged in hermetic TO-46 transistor packages, while the LM35C, LM35CA, and

LM35D are also available in the plastic TO-92 transistor package. The LM35D is also available

in an 8-lead surface mount small outline package and a plastic TO-220 package.


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Features

Calibrated directly in Celsius (Centigrade) Linear + 10.0 mV/C scale factor 0.5C accuracy

guaranteeable (at +25C) Rated for full -55 to +150C range Suitable for remote applications

Low cost due to wafer-level trimming Operates from 4 to 30 volts Less than 60 A current drain

Low self-heating, 0.08C in still air Nonlinearity only 1/4C typical Low impedance output,

0.1 for 1 mA load Typical Applications DS005516-4 DS005516-3 FIGURE 1. Basic

Centigrade Temperature Sensor (+2C to +150C) Choose R1 = -VS/50 A V OUT = +1,500

mV at +150C = +250 mV at +25C = -550 mV at -55C FIGURE 2. Full-Range Centigrade

Temperature Sensor


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perpendicular to each other. With no actual liquid crystal between the polarizing filters, light

passing through the first filter would be blocked by the second (crossed) polarizer. In most of the

cases the liquid crystal has double refraction.[citation needed]

The surface of the electrodes that are in contact with the liquid crystal material are treated so as

to align the liquid crystal molecules in a particular direction. This treatment typically consists of

a thin polymer layer that is unidirectionally rubbed using, for example, a cloth. The direction of

the liquid crystal alignment is then defined by the direction of rubbing. Electrodes are made of a

transparent conductor called Indium Tin Oxide (ITO).

BUZZER:

A buzzeror beeperis an audio signaling device, which may be mechanical, electromechanical,

or electronic. Typical uses of buzzers and beepers include alarms, timers and confirmation of

user input such as a mouse click or keystroke.

A piezoelectric element may be driven by an oscillating electronic circuit or other audio signal

source. Sounds commonly used to indicate that a button has been pressed are a click, a ring or a

beep. Electronic buzzers find many applications in modern days.

RESET SWITCH:

It is used to reset the lcd display screen such that the new readings can be taken.


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LDR(LIGHT DEPENDENT RESISTOR):

A photoresistor or light dependent resistor or cadmium sulfide (CdS) cell is a resistor whose

resistance decreases with increasing incident light intensity. It can also be referred to as a

photoconductor.Aphotoresistor is made of a high resistance semiconductor. If light falling on the

device is of high enough frequency, photons absorbed by the semiconductor give bound

electrons enough energy to jump into the conduction band. The resulting free electron (and its

hole partner) conduct electricity, thereby lowering resistance.

A photoelectric device can be either intrinsic or extrinsic. An intrinsic semiconductor has its own

charge carriers and is not an efficient semiconductor, e.g. silicon. In intrinsic devices the only

available electrons are in the valence band, and hence the photon must have enough energy to

excite the electron across the entire bandgap. Extrinsic devices have impurities, also called

dopants, added whose ground state energy is closer to the conduction band; since the electrons

do not have as far to jump, lower energy photons (i.e., longer wavelengths and lower

frequencies) are sufficient to trigger the device. If a sample of silicon has some of its atoms

replaced by phosphorus atoms (impurities), there will be extra electrons available for conduction.

This is an example of an extrinsic semiconductor.

Photoresistors come in many different types. Inexpensive cadmium sulfide cells can be found in

many consumer items such as camera light meters, street lights, clock radios, alarms, and

outdoor clocks.

They are also used in some dynamic compressors together with a small incandescent lamp or

light emitting diode to control gain reduction.

Lead sulfide (PbS) and indium antimonide (InSb) LDRs (light dependent resistor) are used for

the mid infrared spectral region. Ge:Cu photoconductors are among the best far-infrared

detectors available, and are used for infrared astronomy and infrared spectroscopy.

Transducers are used for changing energy types.


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LED(LIGHT EMITTING DIODE):A light-emitting diode (LED) (pronounced /l i di/[1]) is a semiconductor light source. LEDs

are used as indicator lamps in many devices, and are increasingly used for lighting. Introduced as

a practical electronic component in 1962,[2] early LEDs emitted low-intensity red light, but

modern versions are available across the visible, ultraviolet and infrared wavelengths, with very

high brightness.When a light-emitting diode is forward biased (switched on), electrons are able

to recombine with holes within the device, releasing energy in the form of photons. This effect is

called electroluminescence and the color of the light (corresponding to the energy of the photon)

is determined by the energy gap of the semiconductor. An LED is usually small in area (less than

1 mm2), and integrated optical components are used to shape its radiation pattern and assist in

reflection.[3] LEDs present many advantages over incandescent light sources including lower

energy consumption, longer lifetime, improved robustness, smaller size, faster switching, and

greater durability and reliability. LEDs powerful enough for room lighting are relatively

expensive and require more precise current and heat management than compact fluorescent lamp

sources of comparable output.

Light-emitting diodes are used in applications as diverse as replacements for aviation lighting,

automotive lighting (particularly indicators) and in traffic signals. The compact size of LEDs has

allowed new text and video displays and sensors to be developed, while their high switching

rates are useful in advanced communications technology. Infrared LEDs are also used in the

remote control units of many commercial products including televisions, DVD players, and other


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domestic appliances.

PHOTO TRANSISTOR:NTE3037

Description:

BPW85 is a high speed and high sensitive silicon NPN epitaxial planar phototransistor in a

standard T1 ( 3 mm) plastic package. Due to its waterclear epoxy the device is sensitive to

visible and near infrared radiation. The viewing angle of 25_ makes it insensible to ambient

straylight.

Features

1.Fast response times

2. High photo sensitivity

3. Standard T1 ( 3 mm ) clear plastic package

4. Axial terminals

5. Angle of half sensitivity = 25_


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6. Suitable for visible and near infrared radiation

Applications

Detector in electronic control and drive circuits

SWITCHES:

Normal on and off switches are used for the purpose of calling system and when the patient

presses one of these switches which is connected to microcontroller and this makes the buzzer to

give the alarm sound and make a display on the lcd screen.


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Software details:

#include

voidlcdcmd(unsigned char);

voidlcddata(unsigned char);

void delay(void);

sfrldata=0x80;

sbit s0=P3^0;

sbit s1=P3^1;

sbit s2=P3^2;

sbit s3=P3^3;

sbit saline status=P3^4;

sbit heart rate=P2^7;

sbit respiration rate=P1^5;

sbitrs=P1^0;

sbitrw=P1^1;

sbit en=P1^2;

sbit buzz=P2^0;

void main()

{

unsignedint i=0;

unsigned char name[]="water.0";

unsigned char class[]=Emergency";


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unsigned char cmd[]={0x01,0x0e,0x06,0x80,0x38,0};

unsigned char stmt[]=need assistance";

unsigned char stmt1[]=saline empty";

unsigned char bt,sec,sec100,min,r,t1,t2;

voidinitializelcd();

void delay(n);

buzz=0;

while(1)

{

if(s0==0)

{

if(s0==0)

buzz=0;

delay();

buzz=1;

for(i=0;cmd[i]!=0;i++)

{

lcdcmd(cmd[i]);

}

lcdcmd(0x85);

for(i=0;name[i]!='0';i++)

{

lcddata(name[i]);


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}

}

if(s1==0)

{


{

lcdcmd(cmd[i]);

}

lcdcmd(0xC3);

for(i=0;class[i]!='0';i++)

{

lcddata(class[i]);

}

}

if(s2==0)

{


{

lcdcmd(cmd[i]);

}

for(i=56;i


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}

}

if(s3==0)

{


{

lcdcmd(cmd[i]);

}

lcdcmd(0x80);

for(i=0;stmt[i]!='0';i++)

{

lcddata(stmt[i]);

}

}

if(s4==0)

{


{

lcdcmd(cmd[i]);

}

lcdcmd(0x80);

for(i=0;stmt1[i]!='0';i++)

{


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lcddata(stmt1[i]);

}

}

}

}

voidlcdcmd(unsigned char a)

{

ldata=a;

delay();

rs=0;

rw=0;

en=1;

delay();

en=0;

return;

}

voidlcddata(unsigned char a)

{

ldata=a;

delay();

rs=1;

rw=0;

en=1;


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delay();

en=0;

return;

}

void delay()

{

unsignedint i=0,j=0;

for(i=0;i


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if(min>=1)

{

gotoxy(0,1);

delay(500);

bt=t1;

lcd_send_byte((bt/100)+48,1);

r=bt%100;

lcd_send_byte((r/10)+48,1);

lcd_send_byte((r%10)+48,1);

delay(500);

min=0;

}

}

}


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SOFTWARE EXECUTION:

Software execution part of our project is being done on the keil software and the dumping of the

program into the microcontroller is done with the help of micro flash software and the execution

of the program is done in the following steps:

STEP 1: Starting a new project as shown in the figure


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STEP2:Creating a new file and saving it as shown


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STEP3:Choosing the family of micro controller which in our case is ATMEL as shown


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STEP 4:Setting the frequency for the micro controller as shown which is 11.0592 hz in our

project.


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STEP 5:Now pasting the project program in the project and save as shown


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STEP 6:Now the saved program is add to the source group which is present in the new project


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STEP 7:Executing the saved program as shown


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STEP 8:After executing the program successfully it should be dumped into the micro

controller as shown in the figure


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STEP 9:Now after the micro flash software is opened then the successfully executed program

is loaded into it as shown.

The program will be stored in the form of hex file and this hex file is loaded into this software


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STEP 10:After the program is loaded then when the icon program is clicked then program will

get dumped into the micro controller and after getting dumped a message box will be displayed

with a message that the program is dumped successfully as shown


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OUTPUTS:

The outputs for the inputs are as follows:

Output on the kit


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OUTPUTS FOR PATIENT CALLING SYSTEM:

Output for 1stswitch

Output for 2nd

switch


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Output for 3rd

switch

OUTPUT FOR SALINE STATUS:


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The outputs for the parameters can be directly seen on the kit and the above other important

things like the patient calling system and the saline status are not only displayed on the lcd

display but also are connected to a buzzer which gives an alarm sound or a beep sound and warns

the hospital staff that the patient is in need of some help from the staff. So these are the outputs

which are achieved in our project.


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FUTURE ENHANCEMENTS

The human body scanning system could be made more sophisticated by incorporating

blood pressure and EEG sensors. The analog channel inputs AN4 and AN7 can be used and the

Port B can be programmed as an input port along with an additional ADC chip in the external

circuit.

Hospitablewide wireless capability would allows doctor to occur the patients

database using their word held computers.

The entire medical data acquisition could be made wireless and wearable. Such a

package would contain the circuiting for inputs from ECG sensors, EEG sensors, pressure

measurement and pulse rate transducers. This wearable module can transmit the data

continuously over a fiber optic link or through an internet digital radio. The received data can be

stored in separate memory and be processed by a microcontroller. This enhancement will enable

monitoring of patients to be more flexible and strain-free


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CONCLUSION:

Hence an attempt is made to design a device which not only acts as an alarm system but also

can measure the parameters of the body and the attempt made is successful.


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BIBLOGRAPHY

1. Handbook of Bio-Medical Instrumentation - R.S.Khandpur

2. Bio-Medical Instrumentation and measurements - Leslie Cromwell

- Fred. J. Wejnbell

- Erich . A. Pleiffer

3. Linear Integrated Circuits - Roy Chowdary

4. IBM PC Handbook - IBM Corporation

5. www.microchip.com

6.VISUAL BASIC---- Ground Up - Gary Cornel

4th year project biomedical

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