4.4 Bit Manipulation InstructionsShift instructions: SHL/SAL, SHR, SAR

Mnemonic Meaning Format Operation O D I T S Z A P CSHL SAL

Shift left SHL Dest, Count SAL Dest, Count

Shift (Dest) to left (Count) bit positions filling free positins at right with 0's

* * * ? * *

SHR Shift right logical

SHR Dest, Count Shift (Dest) to right (Count) bit positions filling free positins at left with 0's

* * * ? * *

SAR Shift right arithmetic

SAR Dest, Count Shift (Dest) to right (Count) bit positions filling free positins at left with sign bit's value

* * * ? * *

Destination CountRegister (B,W,D) 1Register (B,W,D) CLRegister (B,W,D) Immediate8Memory (B,W,D) 1Memory (B,W,D) CLMemory (B,W,D) Immediate8

Shift instructions: SHLD, SHRD Mnemonic Meaning Format Operation O D I T S Z A P CSHLD Shift left Double

precisionSHLD Dest, Source, Count

Shift (Dest) to left (Count) bit positions filling free positins at right with bits from (Source)

? * * ? * *

SHRD Shift right Double precision

SHRD Dest, Source, Count

Shift (Dest) to right (Count) bit positions filling free positins at left with bits from (Source)

? * * ? * *

Destination Source CountRegister (W,D) Register (W,D) CLRegister (W,D) Register (W,D) Immediate8Memory (W,D) Register (W,D) CLMemory (W,D) Register (W,D) Immediate8

Examples: initial value in AX= 0110111100000001B

SAL AX,1 AX=1101111000000010B0CF=0

SAR AX,4 AX=1111110111100000BCF=0

lost

Examples: CX=0BC3H; AX= 5678HSHRD AX,CX,4

CX=0BC3H; AX= 3567HCF=1

unchanged

4.4 Bit Manipulation InstructionsRotate instructions: ROL, ROR, RCL, RCR

Mnemonic Meaning Format Operation O D I T S Z A P CROL Rotate left ROL Dest, Count Rotate (Dest) to left (Count) bit positions ? *ROR Rotate right ROR Dest, Count Rotate (Dest) to right (Count) bit positions ? *RCL Rotate left

trough CarryRCL Dest, Count Rotate (Dest) to left (Count) bit positions

trough Carry bit? *

RCR Rotateright trough Carry

RCR Dest, Count Rotate (Dest) to right (Count) bit positions trough Carry bit

? *

Destination CountRegister (B,W,D) 1Register (B,W,D) CLRegister (B,W,D) Immediate8Memory (B,W,D) 1Memory (B,W,D) CLMemory (B,W,D) Immediate8

Examples: initial value in AX= 0110111100000001B

ROL AX,1 AX=1101111000000010BCF=0

ROR AX,4 AX=0010110111100000B

CF=0

Examples: initial value in AX= 0110111100000001B and CF=1

RCL AX,1 AX=1101111000000011B CF= 0

RCR AX,4 AX=0110110111100000B CF=0

4.5 Program Transfer InstructionsJMP

Mnemonic Meaning Format Operation O D I T S Z A P C

JMP Unconditional jump JMP Operand Transfer program execution to the address specified by the operand

Jump type Operand (86) Operand (386+)Short (relative) rel8 (-128…127)Near adr16 (IP, same segment) adr32 (EIP, same segment)Far adr16:16 (CS:IP) adr16:32 (CS:EIP)Near indirect Regptr16 (IP, same seg.) Regptr32 (EIP, same seg.)Near indirect Memptr16 (IP, same seg.) Memptr32 (EIP, same seg.)Far indirect Memptr16:16 (CS:IP) Memptr16:32 (CS:EIP)

Short jump address is computed adding the signed byte operand to the address of the first byte following the JMP instruction.

LOOP, LOOPE/LOOPZ, LOOPNE/LOOPNZMnemonic Meaning Format Operation O D I T S Z A P C

LOOP Loop (Count)-times LOOP Address Decrement (Count) and jump rel to Address if (Count)<>0

LOOPE LOOPZ

Loop (Count)-times if zero

LOOPE Address LOOPZ Address

Decrement (Count) and jump rel to Address if (Count)<>0 and ZF=1

LOOPNE LOOPNZ

Loop (Count)-times if not zero

LOOPNE Address LOOPNZ Address

Decrement (Count) and jump rel to Address if (Count)<>0 and ZF=0

Jump type Address Count (86) Count (386+)Short (relative) rel8 (-128…127) CX ECX (if Address has 32 bit attribute)

JCXZ, JECXZMnemonic Meaning Format Operation O D I T S Z A P C

JCXZ Jump if CX=0 JCXZ Address Jump if CX=0JCEXZ Jump if ECX=0 JECXZ Address Jump if ECX=0

Jump type AddressShort (relative) rel8 (-128…127)

4.5 Program Transfer InstructionsJcc

Mnemonic Meaning Format Operation O D I T S Z A P C

Jcc Relative jump if condition

Jcc Operand

Transfer program execution to the address specified by the operand

OperandRel8 (short)

Instruction Meaning Instruction Meaning Instruction Meaning Flags CodeJO Jump if overflow OF=1 0F 90JNO Jump if not overflow OF=0 0F 91JB Jump if below JNAE Jump if not above or equal JC Jump if carry CF=1 0F 92JAE Jump if above or equal JNB Jump if not below JNC Jump if not carry CF=1 0F 93JE Jump if equal JZ Jump if zero ZF=1 0F 94JNE Jump if not equal JNZ Jump if not zero ZF=0 0F 95JBE Jump if below or equal JNA Jump if not above CF=1 or ZF=1 0F 96JA Jump if above JNBE Jump if not below or equal CF=0 and ZF=0 0F 97JS Jump if sign SF=1 0F 98JNS Jump if not sign SF=0 0F 99JP Jump if parity JPE Jump if parity even PF=1 0F 9AJNP Jump if not parity JPO Jump if parity odd PF=0 0F 9BJL Jump if less JNGE Jump if not greater or equal SF<>OF 0F 9CJGE Jump if greater or equal JNL Jump if not less SF=OF 0F 9DJLE Jump if less or equal JNG Jump if not greater ZF=1 or SF<>OF 0F 9EJG Jump if greater JNLE Jump if not less or equal ZF=1 and SF<>OF 0F 9F

The terms “less” and “greater” are used for comparisons of signed integers.

The terms “above” and “below” are used for comparisons of unsigned integers.

Assembler directives specifying the begin and the end of a NEAR or FAR procedure (subroutine)

4.5 Program Transfer InstructionsCALL

Mnemonic Meaning Format Operation O D I T S Z A P C

CALL Subroutine call CALL Operand

Save return address on stack. Transfer program execution to the address specified by the operand.

Call type Operand (86) Saved on stack (86) Operand (386+) Saved on stack (386)Near adr16 (IP, same segment) IP adr32 (EIP, same segment) EIPFar adr16:16 (CS:IP) CS, IP adr16:32 (CS:EIP) CS, EIPNear indirect Regptr16 (IP, same seg.) IP Regptr32 (EIP, same seg.) EIPNear indirect Memptr16 (IP, same seg.) IP Memptr32 (EIP, same seg.) EIPFar indirect Memptr16:16 (CS:IP) CS, IP Memptr16:32 (CS:EIP) CS, EIP

RETMnemonic Meaning Format Operation

RET Return from subroutine

RET Recover from stack the address of the first instruction after corresponding CALL and load it in IP (or CS:IP) (no FLAG affected)

RET Return from subroutine

RET Op16 Like above, and (SP)<-(SP)+(Op16)

RET type

Loaded from stack (86)

Aditional bytes released on stack (86)

Loaded from stack (386+)

Aditional words released on stack (386+)

Near IP (Operand) EIP (Operand)Far CS:IP (Operand) CS:EIP (Operand)

…0100 CALL EXSUB0103 ADD AX, 1…0204 CALL EXSUB0207 ADD AX,2…0500 EXSUB PROC NEAR...0550 RET

EXSUB ENDPStack:

1FFE ??1FFF ??2000 ?? SP

Stack:1FFE 031FFF 012000 ??

SP

SP

SPStack:

1FFE 071FFF 022000 ?? SP

SP

SP

SP

Stack:1FFA ??1FFB ??1FFC ??1FFD ??1FFE ??1FFF ??2000 ??

Stack:1FFA 031FFB 011FFC 001FFD 011FFE 081FFF 412000 ??

4.5 Program Transfer InstructionsINT

Mnemonic Meaning Format Operation O D I T S Z A P C

INT ISR call INT Type8 Save Return address (CS:IP) and FLAGS on stack. Transfer program execution to the ISR of (Type8).

Saved on stack (86) ISR Address location in IPT

FLAGS, CS, IP 4*Type8

IRET,IRETDMnemonic Meaning Format Operation

IRET Return from ISR (Interrupt Service Routine)

IRET Recover from stack the FLAGS and the address of the first instruction after corresponding CALL and load it in IP (or CS:IP) (all FLAG affected)

IRETD Like above (386+)

IRETD Like above (386+)

…0100:00FF MOV AH, 2CH;0100:0101 INT 21H0100:0103 ADD AX, 1

…0726:16B4 ISR for INT 21...… IRET

Loaded from stack (86)IP, CS, FLAGS

4*21H=84H

…0000:0084 B40000:0085 16 0000:0086 260000:0087 07

FLAGS=4108H

IPT= Interrupt Pointer Table

INTO,BOUNDMnemonic Meaning Format Operation

INTO Interrupt on Overflow

INTO INT4 if OF is set

BOUND Check array index against bounds

BOUND Index, Range

INT5 if Index is out of Range

Index RangeReg16 Mem16&16Reg32 Mem32&32

4.5 Program Transfer InstructionsENTER, LEAVE

Mnemonic Meaning Format Operation O D I T S Z A P C

ENTER Enter a procedure ENTER Space16, Level8

Reserve a frame in stack of (Space) bytes

LEAVE Leave a procedure LEAVE Release the frame on stack.

If Level=0, BP is saved on stack,

…00F8 ??00F9 ??00FA ??00FB ??00FC ??00FD ??00FE ??00FF ??0100 ??

BP old value =1234HBP new value =00FEH SP intermediate value =00FEH

SP old value =0100H

SP final value =00F8H

…00F8 ??00F9 ??00FA ??00FB ??00FC ??00FD ??00FE 3400FF 120100 ?? SP

SP

SP

BP

Reserved memory space

ENTER 6,0

LEAVE

SP back to old value =0100H

SP is loaded with the content of BP,BP is popped from stack.=>values before ENTER restored.

Stack Frame

Frame pointer

BP is loaded with the content of SP,SP is decremented by Space16.

BP back to old value =1234H

4.6 Processor Control InstructionsMnemonic Meaning Format Operation O D I T S Z A P C

CLC Clear Carry flag CLC Clear Carry flag *STC Set Carry flag STC Set Carry flag *CMC Complement Carry flag CMC Complement Carry flag *CLD Clear Direction flag CLD Following string instructions

will autoincrement SI and DI *

STD Set Direction flag STD Following string instructions will autodecrement SI and DI

*

CLI Clear Interrupt enable flag

CLI Prevents microprocessor from responding to a hardware maskable INTR request. (NMI and software INT still available)

*

STI Set Interrupt enable flag STI Allows microprocessor to respond to a hardware maskable INTR request. A pending interrupt (which was requested while IF=0) will be acknoledge after next instruction folowing STI.

*

HLT Halt until interrupt or reset

HLT Stops program execution, places the microprocessor in a HALT state, until a hardware RESET, NMI or INTR. After ISR completion, the program execution is retaken with the instruction following HLT.

NOP No Operation NOP No OperationLOCK Lock Bus during next

InstructionLOCK Activate LOCK output of the

microprocessor. Next instruction cannot be interrupted.

LAHF Load AH from FLAGS LAHF Copy the lower byte of FLAGS register into AH

SAHF Store AH into FLAGS SAHF Copy AH into the lower byte of FLAGS register.

* * * * * * * * *