4/27/2015additional gates and decoders1 additional gates we’ve already seen all the basic boolean...

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06/16/22 Additional Gates and Decoders 1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates. There are a few additional gates that are often used in logic design. They are all equivalent to some combination of primitive gates. But they have some interesting properties in their own right.

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Page 1: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

04/18/23 Additional Gates and Decoders 1

Additional gates

• We’ve already seen all the basic Boolean operations and the associated primitive logic gates.

• There are a few additional gates that are often used in logic design.

– They are all equivalent to some combination of primitive gates.

– But they have some interesting properties in their own right.

Page 2: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

04/18/23 Additional Gates and Decoders 2

Additional Boolean operations

x y (xy)’

0 0 1

0 1 1

1 0 1

1 1 0

x y (x+y)’

0 0 1

0 1 0

1 0 0

1 1 0

NAND(NOT-AND)

NOR(NOT-OR)

XOR(eXclusive OR)

(xy)’ = x’ + y’

(x + y)’ = x’ y’ x y = x’y + xy’

Operation:

Expressions:

Truth table:

Logic gates:

x y xy

0 0 0

0 1 1

1 0 1

1 1 0

Page 3: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

04/18/23 Additional Gates and Decoders 3

NANDs are special!

• The NAND gate is universal: it can replace all other gates!

– NOT

– AND

– OR

(xx)’ = x’ [ because xx = x ]

((xy)’ (xy)’)’ = xy [ from NOT above ]

((xx)’ (yy)’)’ = (x’ y’)’ [ xx = x, and yy = y ]= x + y [ DeMorgan’s law ]

Page 4: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

04/18/23 Additional Gates and Decoders 4

Making NAND circuits

• The easiest way to make a NAND circuit is to start with a regular, primitive gate-based diagram.

• Two-level circuits are trivial to convert, so here is a slightly more complex random example.

Page 5: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

04/18/23 Additional Gates and Decoders 5

Converting to a NAND circuit

• Step 1: Convert all AND gates to NAND gates using AND-NOT symbols, and convert all OR gates to NAND gates using NOT-OR symbols.

Page 6: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

04/18/23 Additional Gates and Decoders 6

Converting to NAND, concluded

• Step 2: Make sure you added bubbles along lines in pairs ((x’)’ = x). If not, then either add inverters or complement the input variables.

Page 7: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

04/18/23 Additional Gates and Decoders 7

NOR gates

• The NOR operation is the dual of the NAND.

• NOR gates are also universal.

• We can convert arbitrary circuits to NOR diagrams by following a procedure similar to the one just shown:

– Step 1:Convert all OR gates to NOR gates (OR-NOT), and all AND gates to NOR gates (NOT-AND).

– Step 2:Make sure that you added bubbles along lines in pairs. If not, then either add inverters or complement input variables.

Page 8: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

04/18/23 Additional Gates and Decoders 8

XOR gates

• A two-input XOR gate outputs true when exactly one of its inputs is true:

• XOR corresponds more closely to typical English usage of “or,” as in “eat your vegetables or you won’t get any pudding.”

• Several fascinating properties of the XOR operation:

x y xy

0 0 0

0 1 1

1 0 1

1 1 0

x y = x’ y + x y’

x 0 = x x 1 = x’x x = 0 x x’ = 1

x (y z) = (x y) z [ Associative ]x y = y x [ Commutative ]

Page 9: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

04/18/23 Additional Gates and Decoders 9

More XOR tidbits

• The general XOR function is true when an odd number of its arguments are true.

• For example, we can use Boolean algebra to simplify a three-input XOR to the following expression and truth table.

• XOR is especially useful for building adders (as we’ll see on later) and error detection/correction circuits.

x (y z)= x (y’z + yz’) [ Definition of XOR ]= x’(y’z + yz’) + x(y’z + yz’)’ [ Definition of XOR ]= x’y’z + x’yz’ + x(y’z + yz’)’ [ Distributive ]= x’y’z + x’yz’ + x((y’z)’ (yz’)’) [ DeMorgan’s ]= x’y’z + x’yz’ + x((y + z’)(y’ + z)) [ DeMorgan’s ]= x’y’z + x’yz’ + x(yz + y’z’) [ Distributive ]= x’y’z + x’yz’ + xyz + xy’z’ [ Distributive ]

x y z xyz

0 0 0 00 0 1 10 1 0 10 1 1 01 0 0 11 0 1 01 1 0 01 1 1 1

Page 10: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

04/18/23 Additional Gates and Decoders 10

XNOR gates

• Finally, the complement of the XOR function is the XNOR function.

• A two-input XNOR gate is true when its inputs are equal:

x y (xy)’

0 0 1

0 1 0

1 0 0

1 1 1

(x y)’ = x’y’ + xy

Page 11: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

04/18/23 Additional Gates and Decoders 11

Design considerations, and where they come from

• Circuits made up of gates, that don’t have any feedback, are called combinatorial circuits

– No feedback: outputs are not connected to inputs

– If you change the inputs, and wait for a while, the correct outputs show up.

• Why? Capacitive loading:

– “fill up the water level” analogy.

• So, when such ckts are used in a computer, the time it takes to get stable outputs is important.

• For the same reason, a single output cannot drive too many inputs

– Will be too slow to “fill them up”

– May not have enough power

• So, the design criteria are:

– Propagation delay (how many gets in a sequence from in to out)

– Fan-out

– Fan-in (Number of inputs to a single gate)

Page 12: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 12

Prime implicants

• The challenge in using K-maps is selecting the right groups. If you don’t minimize the number of groups and maximize the size of each group:

– Your resulting expression will still be equivalent to the original one.

– But it won’t be a minimal sum of products.

• What’s a good approach to finding an actual MSP?

• First find all of the largest possible groupings of 1s.

– These are called the prime implicants.

– The final MSP will contain a subset of these prime implicants.

• Here is an example Karnaugh map with prime implicants marked:Y

1 1 0 0

1 1 0 0

0 1 1 0X

W0 0 1 1

Z

Page 13: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 13

Essential prime implicants

• If any group contains a minterm that is not also covered by another overlapping group, then that is an essential prime implicant.

• Essential prime implicants must appear in the MSP, since they contain minterms that no other terms include.

• Our example has just two essential prime implicants:

– The red group (w’y’) is essential, because of m0, m1 and m4.

– The green group (wx’y) is essential, because of m10.

Y

1 1 0 0

1 1 0 0

0 1 1 0X

W0 0 1 1

Z

Page 14: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 14

Covering the other minterms

• Finally pick as few other prime implicants as necessary to ensure that all the minterms are covered.

• After choosing the red and green rectangles in our example, there are just two minterms left to be covered, m13 and m15.

– These are both included in the blue prime implicant, wxz.

– The resulting MSP is w’y’ + wxz + wx’y.

• The black and yellow groups are not needed, since all the minterms are covered by the other three groups.

Y

1 1 0 0

1 1 0 0

0 1 1 0X

W0 0 1 1

Z

Page 15: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 15

Practice K-map 2

• Simplify for the following K-map:

Y

0 0 1 0

1 0 1 1

1 1 1 1X

W0 0 1 0

Z

Page 16: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 16

Solutions for practice K-map 2

• Simplify for the following K-map:

All prime implicants are circled.

Essential prime implicants are xz’, wx and yz.

The MSP is xz’ + wx + yz.(Including the group xy would be redundant.)

Y

0 0 1 0

1 0 1 1

1 1 1 1X

W0 0 1 0

Z

Page 17: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 17

I don’t care!

• You don’t always need all 2n input combinations in an n-variable function.– If you can guarantee that certain input combinations never occur.– If some outputs aren’t used in the rest of the circuit.

• We mark don’t-care outputs in truth tables and K-maps with Xs.

• Within a K-map, each X can be considered as either 0 or 1. You should pick the interpretation that allows for the most simplification.

x y z f (x,y,z)

0 0 0 00 0 1 10 1 0 X0 1 1 0

1 0 0 01 0 1 11 1 0 X1 1 1 1

Page 18: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 18

Example: Seven Segment DisplayA B C D e

0 0 0 0 0 1

1 0 0 0 1 0

2 0 0 1 0 1

3 0 0 1 1 0

4 0 1 0 0 0

5 0 1 0 1 0

6 0 1 1 0 1

7 0 1 1 1 0

8 1 0 0 0 1

9 1 0 0 1 0

X X

X X

X X

X X

X X

X X

Table for e

CDAB

00 01 11 10

00 1 0 0 1

01 0 0 0 1

11 X X X X

10 1 0 X X

CD’ + B’D’

Assumption: Input represents a legal digit (0-9)

Input: digit encoded as 4 bits: ABCDa

f

ge

b

c

d

Page 19: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 19

Example: Seven Segment DisplayA B C D a

0 0 0 0 0 1

1 0 0 0 1 0

2 0 0 1 0 1

3 0 0 1 1 1

4 0 1 0 0 0

5 0 1 0 1 1

6 0 1 1 0 1

7 0 1 1 1 1

8 1 0 0 0 1

9 1 0 0 1 1

X X

X X

X X

X X

X X

X X

a

f

ge

b

c

d

Table for a

CDAB

00 01 11 10

00 1 1 1

01 1 1 1

11 X X X X

10 1 1 X X

A + C + BD + B’D’

Page 20: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 20

Y

1 0 0 1

1 1 x 0

0 x 1 1 X

W 1 0 0 x

Z

Practice K-map 3

• Find a MSP for

f(w,x,y,z) = m(0,2,4,5,8,14,15), d(w,x,y,z) = m(7,10,13)

This notation means that input combinations wxyz = 0111, 1010 and 1101 (corresponding to minterms m7, m10 and m13) are unused.

Page 21: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 21

Y

1 0 0 1

1 1 x 0 X

W 0 x 1 1

1 0 0 x

Z

Solutions for practice K-map 3

• Find a MSP for:

f(w,x,y,z) = m(0,2,4,5,8,14,15), d(w,x,y,z) = m(7,10,13)

All prime implicants are circled. We can treat X’s as 1s if we want, so the red group includes two X’s, and the light blue group includes one X.

The only essential prime implicant is x’z’. The red group is not essential because the minterms in it also appear in other groups.

The MSP is x’z’ + wxy + w’xy’. It turns out the red group is redundant; we can cover all of the minterms in the map without it.

Page 22: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 22

Summary

• K-maps are an alternative to algebra for simplifying expressions.

– The result is a minimal sum of products, which leads to a minimal two-level circuit.

– It’s easy to handle don’t-care conditions.

– K-maps are really only good for manual simplification of small expressions... but that’s good enough for CS231!

• Things to keep in mind:

– Remember the correct order of minterms on the K-map.

– When grouping, you can wrap around all sides of the K-map, and your groups can overlap.

– Make as few rectangles as possible, but make each of them as large as possible. This leads to fewer, but simpler, product terms.

– There may be more than one valid solution.

Page 23: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 23

Basic circuit design

• The goal of circuit design is to build hardware that computes some given function.

• The basic idea is to write the function as a Boolean expression, and then convert that to a circuit.

Step 1:Figure out how many inputs and outputs you have.

Step 2:Make sure you have a description of the function, either as atruth table or a Boolean expression.

Step 3:Convert this into a simplified Boolean expression. (For this course,we’ll expect you to find MSPs, unless otherwise stated.)

Step 4:Build the circuit based on your simplified expression.

Page 24: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 24

Design example: Comparing 2-bit numbers

• Let’s design a circuit that compares two 2-bit numbers, A and B. The circuit should have three outputs:

– G (“Greater”) should be 1 only when A > B.

– E (“Equal”) should be 1 only when A = B.

– L (“Lesser”) should be 1 only when A < B.

• Make sure you understand the problem.

– Inputs A and B will be 00, 01, 10, or 11 (0, 1, 2 or 3 indecimal).

– For any inputs A and B, exactly one of the three outputs will be 1.

Page 25: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 25

Step 1: How many inputs and outputs?

• Two 2-bit numbers means a total of four inputs.

– We should name each of them.

– Let’s say the first number consists of digits A1 and A0 from left to right, and the second number is B1 and B0.

• The problem specifies three outputs: G, E and L.

• Here is a block diagram that shows the inputs and outputs explicitly.

• Now we just have to design the circuitry that goes into the box.

Page 26: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 26

Step 2: Functional specification

• For this problem, it’s probably easiest to start with a truth table. This way, we can explicitly show the relationship (>, =, <) between inputs.

• A four-input function has a sixteen-row truth table.

• It’s usually clearest to put the truth table rows in binary numeric order; in this case, from 0000 to 1111 for A1, A0, B1 and B0.

• Example: 01 < 10, so the sixth row of the truth table (corresponding to inputs A=01 and B=10) shows that output L=1, while G and E are both 0.

A1 A0 B1 B0 G E L

0 0 0 0 0 1 00 0 0 1 0 0 10 0 1 0 0 0 10 0 1 1 0 0 1

0 1 0 0 1 0 00 1 0 1 0 1 00 1 1 0 0 0 10 1 1 1 0 0 1

1 0 0 0 1 0 01 0 0 1 1 0 01 0 1 0 0 1 01 0 1 1 0 0 1

1 1 0 0 1 0 01 1 0 1 1 0 01 1 1 0 1 0 01 1 1 1 0 1 0

Page 27: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 27

Step 3: Simplified Boolean expressions

• Let’s use K-maps. There are three functions (each with the same inputs A1 A0 B1 B0), so we need three K-maps.

G(A1,A0,B1,B0) =

A1 A0 B0’ + A0 B1’ B0’ + A1 B1’

E(A1,A0,B1,B0) =A1’ A0’ B1’ B0’ +A1’ A0 B1’ B0 +A1 A0 B1 B0 +A1 A0’ B1 B0’

L(A1,A0,B1,B0) =A1’ A0’ B0 + A0’ B1 B0 +A1’ B1

B1

0 0 0 0

1 0 0 0

1 1 0 1A0

A11 1 0 0

B0

B1

1 0 0 0

0 1 0 0

0 0 1 0A0

A10 0 0 1

B0

B1

0 1 1 1

0 0 1 1

0 0 0 0A0

A10 0 1 0

B0

Page 28: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 28

Step 4: Drawing the circuits

G = A1 A0 B0’ + A0 B1’ B0’ + A1 B1’E = A1’ A0’ B1’ B0’ + A1’ A0 B1’ B0 + A1 A0 B1 B0 + A1 A0’ B1 B0’L = A1’ A0’ B0 + A0’ B1 B0 + A1’ B1

LogicWorks has gates with NOTs attached (small bubbles) for clearer diagrams.

Page 29: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 29

Testing this in LogicWorks

• Where do the inputs come from? Binary switches, in LogicWorks

• How do you view outputs? Use binary probes.

switches

probe

Page 30: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 30

Example wrap-up

• Data representations.

– We used three outputs, one for each possible scenario of the numbers being greater, equal or less than each other.

– This is sometimes called a “one out of three” code.

• K-map advantages and limitations.

– Our circuits are two-level implementations, which are relatively easy to draw and follow.

– But, E(A1,A0,B1,B0) couldn’t be simplified at all via K-maps. Can you do better using Boolean algebra?

• Extensibility.

– We used a brute-force approach, listing all possible inputs and outputs. This makes it difficult to extend our circuit to compare three-bit numbers, for instance.

– We’ll have a better solution after we talk about computer arithmetic.

Page 31: 4/27/2015Additional Gates and Decoders1 Additional gates We’ve already seen all the basic Boolean operations and the associated primitive logic gates

June 17, 2002 Basic circuit analysis and design 31

Summary

• Functions can be represented with expressions, truth tables or circuits. These are all equivalent, and we can arbitrarily transform between them.

• Circuit analysis involves finding an expression or truth table from a given logic diagram.

• Designing a circuit requires you to first find a (simplified) Boolean expression for the function you want to compute. You can then convert the expression into a circuit.

• Next time we’ll talk about some building blocks for making larger combinational circuits, and the role of abstraction in designing large systems.