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    Logic Gates

    Digital Logic andSoftware Principles

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    History and development

    Thebinary number systemwas refined byGottfried Wilhelm Leibniz(published in 1705) and he also established that by using the binary system, the principles

    of arithmetic and logic could be combined. In an 1886 letter,Charles Sanders Peirce

    described how logical operations could be carried out by electrical switching circuits.[7]

    Eventually,vacuum tubesreplaced relays for logic operations.Lee De Forest's modification,

    in 1907, of theFleming valvecan be used as AND logic gate.Ludwig Wittgenstein

    introduced a version of the 16-rowtruth tableas proposition 5.101 ofTractatus Logico-

    Philosophicus (1921).Walther Bothe, inventor of thecoincidence circuit, got part of the

    1954Nobel Prizein physics, for the first modern electronic AND gate in 1924.Konrad

    Zusedesigned and built electromechanical logic gates for his computerZ1(from 193538).Claude E. Shannon introduced the use of Boolean algebra in the analysis and design of

    switching circuits in 1937. Active research is taking place inmolecular logic gates.

    http://en.wikipedia.org/wiki/Binary_number_systemhttp://en.wikipedia.org/wiki/Binary_number_systemhttp://en.wikipedia.org/wiki/Binary_number_systemhttp://en.wikipedia.org/wiki/Gottfried_Wilhelm_Leibnizhttp://en.wikipedia.org/wiki/Gottfried_Wilhelm_Leibnizhttp://en.wikipedia.org/wiki/Gottfried_Wilhelm_Leibnizhttp://en.wikipedia.org/wiki/Charles_Sanders_Peircehttp://en.wikipedia.org/wiki/Charles_Sanders_Peircehttp://en.wikipedia.org/wiki/Charles_Sanders_Peircehttp://en.wikipedia.org/wiki/Logic_gate#cite_note-P2M-7http://en.wikipedia.org/wiki/Logic_gate#cite_note-P2M-7http://en.wikipedia.org/wiki/Logic_gate#cite_note-P2M-7http://en.wikipedia.org/wiki/Vacuum_tubehttp://en.wikipedia.org/wiki/Vacuum_tubehttp://en.wikipedia.org/wiki/Vacuum_tubehttp://en.wikipedia.org/wiki/Lee_De_Foresthttp://en.wikipedia.org/wiki/Lee_De_Foresthttp://en.wikipedia.org/wiki/Lee_De_Foresthttp://en.wikipedia.org/wiki/Vacuum_tubehttp://en.wikipedia.org/wiki/Vacuum_tubehttp://en.wikipedia.org/wiki/Vacuum_tubehttp://en.wikipedia.org/wiki/Ludwig_Wittgensteinhttp://en.wikipedia.org/wiki/Ludwig_Wittgensteinhttp://en.wikipedia.org/wiki/Ludwig_Wittgensteinhttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Tractatus_Logico-Philosophicushttp://en.wikipedia.org/wiki/Tractatus_Logico-Philosophicushttp://en.wikipedia.org/wiki/Tractatus_Logico-Philosophicushttp://en.wikipedia.org/wiki/Walther_Bothehttp://en.wikipedia.org/wiki/Walther_Bothehttp://en.wikipedia.org/wiki/Walther_Bothehttp://en.wikipedia.org/wiki/Coincidence_circuithttp://en.wikipedia.org/wiki/Coincidence_circuithttp://en.wikipedia.org/wiki/Coincidence_circuithttp://en.wikipedia.org/wiki/Nobel_Prizehttp://en.wikipedia.org/wiki/Nobel_Prizehttp://en.wikipedia.org/wiki/Nobel_Prizehttp://en.wikipedia.org/wiki/Konrad_Zusehttp://en.wikipedia.org/wiki/Konrad_Zusehttp://en.wikipedia.org/wiki/Konrad_Zusehttp://en.wikipedia.org/wiki/Konrad_Zusehttp://en.wikipedia.org/wiki/Z1_(computer)http://en.wikipedia.org/wiki/Z1_(computer)http://en.wikipedia.org/wiki/Z1_(computer)http://en.wikipedia.org/wiki/Claude_E._Shannonhttp://en.wikipedia.org/wiki/Molecular_logic_gatehttp://en.wikipedia.org/wiki/Molecular_logic_gatehttp://en.wikipedia.org/wiki/Molecular_logic_gatehttp://en.wikipedia.org/wiki/Molecular_logic_gatehttp://en.wikipedia.org/wiki/Molecular_logic_gatehttp://en.wikipedia.org/wiki/Molecular_logic_gatehttp://en.wikipedia.org/wiki/Claude_E._Shannonhttp://en.wikipedia.org/wiki/Z1_(computer)http://en.wikipedia.org/wiki/Z1_(computer)http://en.wikipedia.org/wiki/Konrad_Zusehttp://en.wikipedia.org/wiki/Konrad_Zusehttp://en.wikipedia.org/wiki/Konrad_Zusehttp://en.wikipedia.org/wiki/Nobel_Prizehttp://en.wikipedia.org/wiki/Nobel_Prizehttp://en.wikipedia.org/wiki/Coincidence_circuithttp://en.wikipedia.org/wiki/Coincidence_circuithttp://en.wikipedia.org/wiki/Walther_Bothehttp://en.wikipedia.org/wiki/Walther_Bothehttp://en.wikipedia.org/wiki/Tractatus_Logico-Philosophicushttp://en.wikipedia.org/wiki/Tractatus_Logico-Philosophicushttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Truth_tablehttp://en.wikipedia.org/wiki/Ludwig_Wittgensteinhttp://en.wikipedia.org/wiki/Ludwig_Wittgensteinhttp://en.wikipedia.org/wiki/Vacuum_tubehttp://en.wikipedia.org/wiki/Vacuum_tubehttp://en.wikipedia.org/wiki/Lee_De_Foresthttp://en.wikipedia.org/wiki/Lee_De_Foresthttp://en.wikipedia.org/wiki/Vacuum_tubehttp://en.wikipedia.org/wiki/Vacuum_tubehttp://en.wikipedia.org/wiki/Logic_gate#cite_note-P2M-7http://en.wikipedia.org/wiki/Charles_Sanders_Peircehttp://en.wikipedia.org/wiki/Charles_Sanders_Peircehttp://en.wikipedia.org/wiki/Gottfried_Wilhelm_Leibnizhttp://en.wikipedia.org/wiki/Binary_number_systemhttp://en.wikipedia.org/wiki/Binary_number_system
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    Logic

    Formal logic is a branch of mathematics

    that deals with true and false valuesinstead of numbers.

    In 1840s, George Boole developedmany Logic ideas.

    A logic gateperforms alogical operationon one or more logic inputs and produces asingle logic output.

    3

    http://en.wikipedia.org/wiki/Logical_operationhttp://en.wikipedia.org/wiki/Logical_operationhttp://en.wikipedia.org/wiki/Logical_operationhttp://en.wikipedia.org/wiki/Logical_operationhttp://en.wikipedia.org/wiki/Logical_operation
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    Introduction

    A logic gateis an idealized or physical device implementing a

    Boolean function; that is, it performs alogical operationon one or

    more logical inputs, and produces a single logical output. Depending

    on the context, the term may refer to an ideal logic gate, one

    that has for instance zerorise timeand unlimitedfan-out

    , or it may refer to a non-ideal physical device. Logic gates areprimarily implemented usingdiodesortransistorsacting as

    electronic switches, but can also be constructed using

    electromagneticrelays(relay logic),fluidic logic,pneumatic logic,

    optics,molecules, or evenmechanicalelements. With

    amplification, logic gates can be cascaded in the same way that

    Boolean functions can be composed, allowing the construction ofa physical model of all ofBoolean logic, and therefore, all of the

    algorithms andmathematicsthat can be described with Boolean

    logic.

    http://en.wikipedia.org/wiki/Boolean_functionhttp://en.wikipedia.org/wiki/Boolean_functionhttp://en.wikipedia.org/wiki/Logical_operationhttp://en.wikipedia.org/wiki/Logical_operationhttp://en.wikipedia.org/wiki/Logical_operationhttp://en.wikipedia.org/wiki/Rise_timehttp://en.wikipedia.org/wiki/Rise_timehttp://en.wikipedia.org/wiki/Rise_timehttp://en.wikipedia.org/wiki/Fan-outhttp://en.wikipedia.org/wiki/Fan-outhttp://en.wikipedia.org/wiki/Fan-outhttp://en.wikipedia.org/wiki/Diodehttp://en.wikipedia.org/wiki/Diodehttp://en.wikipedia.org/wiki/Diodehttp://en.wikipedia.org/wiki/Transistorhttp://en.wikipedia.org/wiki/Transistorhttp://en.wikipedia.org/wiki/Transistorhttp://en.wikipedia.org/wiki/Switch#Electronic_switcheshttp://en.wikipedia.org/wiki/Switch#Electronic_switcheshttp://en.wikipedia.org/wiki/Relayhttp://en.wikipedia.org/wiki/Relayhttp://en.wikipedia.org/wiki/Relayhttp://en.wikipedia.org/wiki/Relay_logichttp://en.wikipedia.org/wiki/Relay_logichttp://en.wikipedia.org/wiki/Relay_logichttp://en.wikipedia.org/wiki/Fluidic_logichttp://en.wikipedia.org/wiki/Fluidic_logichttp://en.wikipedia.org/wiki/Fluidic_logichttp://en.wikipedia.org/wiki/Pneumatics#Pneumatic_logichttp://en.wikipedia.org/wiki/Pneumatics#Pneumatic_logichttp://en.wikipedia.org/wiki/Opticshttp://en.wikipedia.org/wiki/Opticshttp://en.wikipedia.org/wiki/Opticshttp://en.wikipedia.org/wiki/Molecular_logic_gatehttp://en.wikipedia.org/wiki/Molecular_logic_gatehttp://en.wikipedia.org/wiki/Molecular_logic_gatehttp://en.wikipedia.org/wiki/Analytical_enginehttp://en.wikipedia.org/wiki/Analytical_enginehttp://en.wikipedia.org/wiki/Analytical_enginehttp://en.wikipedia.org/wiki/Boolean_logichttp://en.wikipedia.org/wiki/Boolean_logichttp://en.wikipedia.org/wiki/Boolean_logichttp://en.wikipedia.org/wiki/Mathematicshttp://en.wikipedia.org/wiki/Mathematicshttp://en.wikipedia.org/wiki/Mathematicshttp://en.wikipedia.org/wiki/Mathematicshttp://en.wikipedia.org/wiki/Mathematicshttp://en.wikipedia.org/wiki/Boolean_logichttp://en.wikipedia.org/wiki/Boolean_logichttp://en.wikipedia.org/wiki/Analytical_enginehttp://en.wikipedia.org/wiki/Molecular_logic_gatehttp://en.wikipedia.org/wiki/Molecular_logic_gatehttp://en.wikipedia.org/wiki/Opticshttp://en.wikipedia.org/wiki/Opticshttp://en.wikipedia.org/wiki/Opticshttp://en.wikipedia.org/wiki/Pneumatics#Pneumatic_logichttp://en.wikipedia.org/wiki/Pneumatics#Pneumatic_logichttp://en.wikipedia.org/wiki/Fluidic_logichttp://en.wikipedia.org/wiki/Fluidic_logichttp://en.wikipedia.org/wiki/Relay_logichttp://en.wikipedia.org/wiki/Relay_logichttp://en.wikipedia.org/wiki/Relayhttp://en.wikipedia.org/wiki/Relayhttp://en.wikipedia.org/wiki/Switch#Electronic_switcheshttp://en.wikipedia.org/wiki/Switch#Electronic_switcheshttp://en.wikipedia.org/wiki/Transistorhttp://en.wikipedia.org/wiki/Transistorhttp://en.wikipedia.org/wiki/Diodehttp://en.wikipedia.org/wiki/Diodehttp://en.wikipedia.org/wiki/Fan-outhttp://en.wikipedia.org/wiki/Rise_timehttp://en.wikipedia.org/wiki/Rise_timehttp://en.wikipedia.org/wiki/Logical_operationhttp://en.wikipedia.org/wiki/Logical_operationhttp://en.wikipedia.org/wiki/Boolean_functionhttp://en.wikipedia.org/wiki/Boolean_function
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    Logic Signals

    There are a number of different systems for representing binaryinformation in physical systems.

    A voltage signal with zero (0) corresponding to 0 volts and one (1)corresponding to five or three volts.

    A sinusoidal signal with zero corresponding to some frequency,and one corresponding to some other frequency.

    A current signal with zero corresponding to 4 milliamps and onecorresponding to 20 milliamps.

    And one last way is to use switches, OPEN for "0" and CLOSED for"1".

    ( And there are more ways !)

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    AND gatee.g. I get up ifit is 8-00 a.m. ANDit is a weekday he said if A = 8-00 a.m. B = weekday

    and Y = get up then he said you can write:

    BAY

    where the dot represents logical AND.

    He went on to say that if 1 represents TRUE

    and 0 represents FALSE

    then the function can be defined in a truth table.

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    Logic Gates

    Truth TableThe truth table has an entry for each possible combination of inputs.

    For n inputs there will be 2nentries 2 inputs = 4 entries.

    We can have more than two inputs in which

    case the only time we would have a 1 out is whenall the inputs are true.

    A B Y

    0 0 0

    0 1 0

    1 0 0

    1 1 1

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    Logic Gates

    SymbolThe symbol adopted for the AND function ( gate) is shown below

    American (MIL-STD-806) British (IEC 617:12)

    A

    A

    B

    B

    Y

    Y &

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    Logic Gates

    We can have more than two

    inputs in which case the only

    time we would have a 0 out iswhen all the inputs are false.

    American (MIL-STD-806) British (IEC 617:12)

    A B Y

    0 0 0

    0 1 1

    1 0 1

    1 1 1

    AA

    B

    B

    YY 1

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    Logic Gates

    NOT gatee.g. I turn on the heating ifit is NOThot

    if A = hot and Y = Heating on then:

    AY

    where the bar represents logical NOT.

    We can only have one input and the output is always the opposite sign.

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    Logic Gates

    American (MIL-STD-806)

    British (IEC 617:12)

    Exclusive OR EXOR gate

    A Y

    0 1

    1 0

    1

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    Logic Gates

    BAY

    Note that the normal OR includes the case where we have both inputs true. The EXOR does notinclude this case.

    For more than two inputs the gate is defined as:

    The output is TRUE if we have an odd number of inputs TRUE

    A B Y

    0 0 0

    0 1 1

    1 0 1

    1 1 0

    where the sign represents logical EXOR.

    The symbol adopted for the EXshown below

    American (MIL-STD-806)

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    Logic Gates

    Not AND NAND gate

    where the dot and

    bar representslogical NAND.

    BAY We can have morethan two inputs inwhich case the onlytime we would have a 0out is when all theinputs are true.

    American (MIL-STD-806) British (IEC 617:12)

    A

    B

    Y&

    A

    B

    Y

    Logic Gates

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    Logic Gates

    Not OR NOR gate

    where the + sign

    and bar representslogical NAND.

    We can have morethan two inputs inwhich case the onlytime we would have a 1out is when all theinputs are false.

    American (MIL-STD-806) British (IEC 617:12)

    BAY

    A A

    B

    B

    Y

    Y

    1

    Logic Gates

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    Logic Gates

    Universal Gates

    NAND and NOR gates are referred to as

    universal gates as the three basic gates can

    be constructed using either one of the two.

    This therefore implies that all logic circuits can

    be constructed using either of the gates.

    The notes show this process for NAND only but

    it can be shown for NOR also.

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    Logic Gates

    NOT using NANDs only

    The Truth Table is for a NAND gateIf we tie the inputs of a NAND together then welimit the possible input combinations to two, 1 1 and0 0. These are shown on the table now if the input is

    0 the output is 1 and vice versa a NOT gate

    A

    Y

    Logic Gates

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    Logic Gates

    AND using NANDs only

    As a NAND is simply an AND followed by a NOTgate (inverter) we can simply use a NANDfollowed by NOT.

    A

    B

    Y

    Note more than one NAND gate toproduce the desired AND gate.

    Logic Gates

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    Logic Gates

    OR using NANDs only

    A B BA

    This is our desired OR gate

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    Logic Gates

    OR using NANDs only

    A B BA A B

    0 0 0 1 1

    0 1 1 1 0

    1 0 1 0 1

    1 1 1 0 0

    If we now add NOT A and NOT Binto our table

    OR using NANDs only

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    Logic Gates

    A B BA A

    B BA

    0 0 0 1 1 1

    0 1 1 1 0 0

    1 0 1 0 1 0

    1 1 1 0 0 0

    If these are now ANDed together

    OR using NANDs only

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    Logic Gates

    A B BA A

    B

    BA

    BA

    0 0 0 1 1 1 0

    0 1 1 1 0 0 1

    1 0 1 0 1 0 1

    1 1 1 0 0 0 1

    Finally if we invert our result we see that the 3rdand 7thcolumn are

    identical. This means that if we invert the inputs then NAND then

    we will end up with the OR function.

    OR using NANDs onlyA

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    Logic Gates

    Let us examine the way in which logic gates can be used to

    realise logic circuits:

    Example

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    Logic Gates

    A drill (D) is to operate if we are in automatic (A) and the system (S)

    is running or if we are in manual (M) and a button (B) is pressed or

    if an override (O) input is not operated.

    The boolean (logic) expression for this can be written in the

    following way:

    OBMSAD

    This can be constructed in the following way:A

    S

    M

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    Logic Gates

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    Logic Gates

    At this point let us examine different logic integrated circuits (I.C.s) families which

    can be used to construct logic circuits.

    Logic Families

    Transistor-Transistor Logic(TTL) is a class of digital circuits built from bipolarjunction transistors (BJT), and resistors. It is called transistor-transistor logic

    because both the logic gating function (e.g. AND) and the amplifying function are

    performed by transistors (contrast this with RTL and DTL).

    Transistor Transistor Logic TTL prefix 74 e.g. 7400Quad 2-input NAND

    More Specifically MM74XXX00P

    MM Manufacturers codes

    e.g. SN Texas Instruments

    CD Harris Semiconductors

    DM Fairchild Semiconductors

    M SGS-Thomson Microelectronics

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    Logic Gates

    MC Motorola

    Transistor Transistor Logic TTL

    XXX variants

    e.g. L Low powerS Schottky high speed

    LS Low power Schottky

    ALS Advanced low power Schottky

    Voltage range Speed Power

    LS +5V 5% 10nS 2 mWALS +5V 5% 7nS 1 mW

    Transistor Transistor Logic TTL

    Prefix 54 not 74 is used for higher specifications( normally military )

    Temperature Voltage supply

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    Logic Gates

    range toleranceCommercial 74 0 - 70C 5 %

    families

    Military 54 families -55 - +125C 10 %

    Transistor Transistor Logic TTL

    Most TTL families

    An input is recognised as 1 if the input is >2VAn input is recognised as 0 if the input is < 0.8V

    Noise immunity is the difference = 1.2V

    A low output has a maximum output of 0.2V A high output has a minimum output of 3.3V

    Available TTL Gate Packages

    Quad 2-input gates

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    Logic Gates

    7400 quad 2-input NAND

    7403 quad 2-input NAND with open collector outputs

    7408quad 2-input AND

    7409quad 2-input AND with open collector outputs7432 quad 2-input OR

    7486 quad 2-input EX-OR

    74132 quad 2-input NAND with Schmitt trigger inputs

    7402 quad 2-input NOR

    Triple 3-input gates

    7410triple 3-input NAND7411 triple 3-input AND7412triple 3-input NAND with open collector outputs

    7427 triple 3-input NORDual 4-input gates

    7420dual 4-input NAND7421 dual 4-input AND

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    Logic Gates

    Others

    7430 8- input NAND gate

    Hex NOT gates

    7404hex NOT7405hex NOT with open collector outputs7414 hex NOT with Schmitt trigger inputs

    Complementary Metal Oxide Semiconductor Logic CMOS

    Number sequence originally from 4000 upwards but not the same as TTL

    Characteristics

    Delay 50nS Power 1 W Voltage 3-18V

    Input

    Logic 1 is recognised above 2/3 Supply

    Logic 0 is recognised below 1/3 Supply

    Output

    The minimum for logic 1 is Supply 0.01V

    The maximum for logic 0 0.01V

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    Logic Gates

    Available CMOS Gate Packages

    Quad 2-input gates

    4001 quad 2-input NOR

    4011 quad 2-input NAND

    4070quad 2-input EX-OR

    4071 quad 2-input OR

    4077 quad 2-input EX-NOR

    4081 quad 2-input AND

    4093 quad 2-input NAND with Schmitt trigger inputs

    CMOS Gate Packages

    Triple 3-input gates

    4023 triple 3-input NAND

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    Logic Gates

    4025 triple 3-input NOR 4073

    triple 3-input AND

    4075 triple 3-input ORDual 4-input gates

    4002 dual 4-input NOR

    4012 dual 4-input NAND

    4072 dual 4-input OR4082 dual 4-input AND

    4069 hex NOT (inverting buffer)

    Developments in TTL and CMOS

    Often there are different pin-outs in the two family

    types.

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    Logic Gates

    CMOS chips are available which are the same numbers

    due to the popularity of TTL.

    74HC High speed CMOS operating 2V to 6V

    74HCT High speed CMOS with TTL compatible

    supplies

    74ACT Advanced CMOS with TTL compatible levels

    and pin-outs

    74AC Advanced CMOS with CMOS compatible

    levels and TTL pin-outs

    Logic Problem.

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    Logic Gates

    Getting back to our example, we can see that we

    would require:

    2 x 2-input AND 7408 (4 x 2-input AND)

    4081 (4 x 2-input AND )

    1 x inverter (NOT) 7404 (6 x inverter)

    4069 (6 x inverter )1 x 3-input OR Not available?

    4075 (3 x 3-input OR )

    This is a total of 3 chips and we end up not using

    9 gates within the packages.

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    Logic Gates

    8 x 2-input NAND 2 x 7400

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    Logic Gates

    1x 3-input NAND 1 x 7410

    again 3 chips.

    BUTBy observation we can see that NANDs 2 and 3

    simply invert 1s output then invert it again.

    This means that they cancel each other outand can be removed.

    This is also true for NANDs 5 and 6 and

    NANDs 8 and 9, leaving us with

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    Logic Gates

    This requires:

    2x 2-input NAND 1 x 7400

    1 x 3-input NAND 1 x 7410

    With a little understanding of logic gates we

    can reduce the requirements to only one chip

    by using the fact that:

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    Logic Gates

    So we need:

    3 x 3-input NANDs 1 x 7410

    Note.

    Conversions from AND, OR, NOT to NAND only

    rarely produce a less complex circuit butnormally the complexity is similar. The

    advantage lies in the fact that NAND chips

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    Logic Gates

    are readily available and are inexpensive due

    to the number sold and that any gates left

    over can be used in other circuits as allcircuits use the same gate types.

    Logic Circuits TTL and CMOS

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    Logic Gates

    Complementary Metal Oxide Semiconductor CMOS NOR

    Transistor Transistor Logic (TTL) NAND Gate.

    R1 R2

    R3

    R4

    Q1Q2

    Q3

    Q4

    D

    F

    ab

    c

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    Logic Gates

    gate

    Output

    Input A

    Input B

    Vs+

    Q1

    Q2

    Q3

    Q4

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    Logic Gates

    This resource was created by the University of Wales Newport and released as an open educational resource

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    2009 University of Wales Newport

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