3 to 8 decoder using two 2 to 8 decoder

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  • 8/10/2019 3 to 8 Decoder Using Two 2 to 8 Decoder

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    Decoders and Encoders

    Lesson ObjectivesIn this lesson, we will learn abouto Decoderso Expansion of decoderso Combinational circuit implementation with decoderso Some examples of decoders

    o Encoderso Major limitations of encoders

    o riorit! encoderso Some examples of ecnoders

    Decoders"s its name indicates, a decoder is a circuit component that decodes an input code# $iven

    a binar! code of n%bits, a decoder will tell which code is this out of the & n possible codes'See (i)ure *'a++#

    0

    n Inputsn%to%2

    Decoder 2n-1

    ( i)ure *'a+ " t!pical decoder

    -hus, a decoder has n% inputs and &n

    outputs# Each of the &n

    outputs corresponds to one

    of the possible &n

    input combinations#

    n Inputsn%to%2n

    Decoder2 Outputs

    Enable

    (i)ure *'b+ " t!pical decoder

    (i)ure *'b+ shows the bloc. dia)ram o f a t!pical decoder, which has n input lines, and m

    output lines, where m is e/ual to &n# -he decoder is called n%to% m decoder# "part

    from this, there is also a sin)le line connected to the decoder called enable line# -heoperations of the enable line will be discussed in the flowin) text#

    1n

    n

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    o In )eneral, output i e/uals * if and onl! if the input binar! code has a value of

    i#

    o -hus, each output line e/uals * at onl! one input combination but is e/ual to 0 at

    all other combinations#

    o In other words, each decoder output corresponds to a minterm of the n input

    variables#

    o -hus, the decoder )enerates all of the &n

    minterms of n input variables#

    Example: 2-to-4 decodersLet us discuss the operation and combinational circuit desi)n of a decoder b! ta.in) thespecific example of a &%to%1 decoder# It contains two inputs denoted b! "* and "0 andfour outputs denoted b! D0, D*, D&, and D2 as shown in fi)ure "lso note that "* isthe MS3 while "0 is the LS3#

    D0

    4 "*"

    0

    D*

    4 "*"

    0"0

    D 4 " ""

    *& * 0

    D2

    4 "*"

    0

    (i)ure & " &% to %1 decoder without enable

    Decimal # Input Output

    A1 A0 D0 D1 D2 D30 0 0 1 0 0 0

    1 0 1 0 1 0 0

    2 1 0 0 0 1 0

    3 1 1 0 0 0 1

    -able * -ruth table for &%to %1 decoder

    "s we see in the truth table 'table *+, for each input combination, one output line is

    activa ted, that is, the output line correspondin) to the input combination becomes *,

    while other lines remain inactive# (or example, an input of 00 at the input will activateline D0# 0* at the input will activate line D*, and so on#

    &%to%1

    Decoder

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    o 5otice that, each output of the decoder is actuall! a minterm resultin) from acertain combination of the inputs, that is

    o D0 4"* "0, ' minterm m0+ which corresponds to input00 o D* 4"* "0, ' minterm m*+ which corresponds toinput 0* o D& 4"* "0, ' minterm m&+ which correspondsto input *0 o D2 4"* "0, ' minterm m2+ which

    corresponds to input **

    o -his is depicted in (i)ures & where we see that each input combination will

    inov.e the correspondin) output, where each output is minterm correspondin) tothe input combination#

    A1

    A0

    D0

    4 "*"

    0

    D*

    4 "*"

    0

    D&

    4 "*"

    0

    D2

    4 "*"

    0

    (i)ure 2 Implementation &%to %1 decoder

    -he circuit is implemented with "5D )ates, as shown in fi)ure 2# In this circuit we see

    that the lo)ic e/uation for D0 is "*6

    "06# D0 is "*

    6"0, and so on# -hese are in fact

    the minterms bein) implemented# -hus, each output of the decoder )enerates a mintermcorrespondin) to the input combination#

    The ena!le" input in decoders

    $enerall!, decoders have the 7enable8 input #-he enable input perroms no lo)ical

    operation, but is onl! responsible for ma.in) the decoder "C-I9E orI5"C-I9E# o If the enable 7E8

    o is :ero, then all outputs are :ero re)ardless of the input values#o is one, then the decoder performs its normal operation#

    (or example, consider the &%to%1 decoder with the enable input '(i)ure 1+# -he enableinput is onl! responsible for ma.in) the decoder active or inactive# If Enable E is :ero,then all outputs of the decoder will be :eros, re)ardless of the values of " * and "0#

    ;owever, if E is *, then the decoder will perform its normal operation, as is shown in the

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    truth table 'table &+# In this table we see that as lon) as E is :ero, the outputs D0 toD2 will remain :ero, no matter whatever value !ou provide at the inputs "* "0, depictedb! two don#

    "0 is the least si)nificant variable, while "& is the most si)nificant variable#

    -he three inputs are decoded into ei)ht outputs# -hat is, binar! values at the input form acombination, and based on this combination, the correspondin) output line is activated#

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    D04 "

    &"

    *"

    0

    D*4 "

    &"

    *"

    0

    D&4 "

    &"

    *"

    00

    "D

    24 "

    &"

    *"

    0

    D1 4 "&"*"0"D 4 " " "> & * 0D

    ?4 "

    &"

    *"

    0

    D@4 "

    &"

    *"

    0

    Enable

    (i)ure > " 2% to %A decoder with enable

    Each output represents one minterm #

    o (or example, for input combination "&"*"0 4 00*, output line D* e/uals * while

    all other output lines e/ual 0

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    (i)ure ? Implementation of a 2%to %A decoder without enable

    Decoder Expansion

    o It is possible to build lar)er decoders usin) two or more smaller ones#

    o (or example, a ?%to%?1 decoder can be desi)ned with four 1%to%*? decoders and one&%to%1 line decoder#

    Example Construct a 2%to%A decoder usin) two &%to%1 deocders withenable inputs#(i)ure @ shows how decoders with enable inputs can be connected to form a lar)erdecoder# -wo &%to%1 line decoders are combined to build a 2%to%A line decoder#

    o -he two least si)nifncat bits 'i#e# "* and "0+ are connected to both decoders

    o Most si)nifcant bit '"&+ is connected to the enable input of one decoder#o -he complement of most si)nificant bit '"&+ is connected to the enable of the

    other decoder#o =hen "& 4 0, upper decoder is enabled, while the lower is disabled# -hus, the

    outputs of the upper decoder correspond to minterms D0 throu)h D2#o =hen "& 4 *, upper decoder is disabled, while the lower is enabled# -hus, the

    outputs of the lower decoder correspond to minterms D1 throu)h D@#

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    (i)ur e @ Implementin) a 2%to %A decoder with two &%to %1 decoders

    Decoder desi+n ,ith AD +ates

    o Some decoders are constructed with 5"5D rather than "5D )ates#

    o In this case, all decoder outputs will be *

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    (i)ure A " & % to % 1 decoder with Enable constructed with 5"5D )ates#

    Decimal

    alue

    Ena!le Inputs Outputs

    E. A1 A0 D0. D1. D2. D3.

    1 $ $ 1 1 1 1

    0 0 0 0 0 1 1 11 0 0 1 1 0 1 1

    2 0 1 1 1 1 0 1

    3 0 1 1 1 1 1 0

    -able > -ruth table of & % to % 1 decoder with Enable usin) 5"5D )ates

    " &%to%1 line decoder with an enable input constructed with 5"5D )ates is shown in

    fi)ure A# -he circuit operates with complemented outputs and enable input E< is alsocomplemented to match the outputs of the 5"5D )ate decoder# -he decoder is enabled

    when E< is e/ual to :ero# "s indicated b! the truth table, onl! one output can be e/ual to

    :ero at an! )iven time, all other outputs bein) e/ual to one# -he output with the value of:ero represents the minterm selected b! inputs "* and "0# -he circuit is disabled when

    E< is e/ual to one, re)ardless of the values of the other two inputs# =hen the circuit is

    disabled, none of the outputs are e/ual to :ero, and none of the minterms are selected#-he correspondin) lo)ic e/uations are also )iven in table >#

    'om!inational circuit implementation usin+ decoder

    o "s .nown, a decoder provides the &n

    minterms of n input variables

    o Since an! boolean functions can be expressed as a sum of minterms, one can use adecoder to implement an! function of n variables#

    o In this case, the decoder is used to )enerate the &n

    minterms and an additional OB)ate is used to )enerate the sum of the re/uired minterms#

    o In this wa!, an! combinational circuit with n inputs and m outputs can be

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    implemented usin) an n%to%&n

    decoder in addition to m OB )ates#

    Bemember,

    that

    o -he function need not be simplified since the decoder implements a function usin)the minterms, not product terms#

    o "n! number of output functions can be implemented usin) a sin)le decoder,

    provided that all those outputs are functions of the same input variables#

    Example: Decoder Implementation o/ a ull Adder

    Let us loo. at the truth table 'table ?+ for the )iven problem# =e have two outputs, called

    S, which stands for sum, and C, which stands for carr!# 3oth sum and carr! are functions

    of , , and #

    Decimalalue

    Input Output

    $ '0 0 0 0 0 0

    1 0 0 1 1 0

    2 0 1 0 1 0

    3 0 1 1 0 1

    4 1 0 0 1 0

    ( 1 0 1 0 1

    ) 1 1 0 0 1

    * 1 1 1 1 1

    -able ? -ruth table of the (ull "dder

    o -he output functions S F C can be expressed in sum%of%minterms forms as

    follows

    o S ',,+ 4 m '*,&,1,@+

    o C ',,+ 4 m '2,>,?,@+

    Loo.in) at the truth table and the functions in sum of minterms form, we observe thatthere are three inputs, , , and that correspond to ei)ht minterms# -his implies that a

    2%to%A decoder is needed to implement this function# -his implementation is )iven in

    (i)ure G, where the sum S is implemented b! ta.in) minterms *, &, 1, and @ and the OB)ates forms the lo)ical sum of minterm for S# Similarl!, carr! C is implemented b!ta.in) lo)ical sum of minterms 2, >, ?, and @ from the same decoder#

    &0

    &*

    &&

    2%to%A 0

    Decoder *S

    &

    2

    1

    >C

    ?

    @

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    Encoders (i)ure G Decoder implementation of a (ull "ddero "n encoder performs the inverse operation of a decoder, as shown in (i)ure *0#o It has &

    ninputs, and n output lines#

    o Onl! one input can be lo)ic * at an! )iven time 'active input+# "ll other inputs mustbe 0

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    E0

    E*

    E&

    A Inputs E2E1

    E>

    E?

    E@

    %-to-3

    Encoder

    "03 Outputs

    "*

    "&

    (i)ure ** Octal % to % binar! encodero 5ote that not all input combinations are valid#o 9alid combinations are those which have exactl! one input e/ual to lo)ic * while all

    other inputs are lo)ic 0 E@

    o Li.ewise, "* 4 E& E2 E? E@, and similarl!o "& 4 E1 E> E? E@

    o -hus, the encoder can be implemented usin) three 1% input OB )ates#

    5a6or 7imitation o/ Encoderso Exactl! one input must be active at an! )iven time#o If the number of active inputs is less than one or more than one, the output will be

    incorrect#

    o (or example, if E2 4 E? 4 *, the output of the encoder "&"*"0 4 ***, whichimplies incorrect output#

    T,o 8ro!lems to 9esol e&

    *# If two or more inputs are active at the same time, what should the output be? "n output of all 0Js is )enerated in & cases

    o when all inputs are 0o when E0 is e/ual to *#

    How can this ambiguity be resolved?

    Solution To Problem 1:o Kse aPriority Encoder which produces the output correspondin) to the input with

    hi)her priorit!#

    o Inputs are assi)ned priorities accordin) to their subscript value e#)# hi)her subscriptinputs are assi)ned hi)her priorit!#

    o In the previous example, if E2 4 E? 4 *, the output correspondin) to E? willbe produced '"&"*"0 4 **0+ since E? has hi)her priorit! than E2#

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    Solution To Problem 2:o rovide one more output si)nal V to indicate validity of input data#o V 4 0 if none of the inputs e/uals *, otherwise it is *

    Example : 4-to-2 8riorit Encoders

    o Sixteen input combinationso -hree output variables "*, "0, and 9

    o 9 is needed to ta.e care of situation when all inputs are e/ual to :ero#

    Inputs Outputs

    E3 E2 E1 E0 A1 A0 InvalidInput0 0 0 0 $ $ 0

    0 0 0 1 0 0 1

    0 0 1 0 0 1 1

    0 0 1 1 0 1 10 1 0 0 1 0 1

    0 1 0 1 1 0 1

    0 1 1 0 1 0 1

    0 1 1 1 1 0 1

    1 0 0 0 1 1 1

    1 0 0 1 1 1 1

    1 0 1 0 1 1 1

    1 0 1 1 1 1 1

    1 1 0 0 1 1 1

    1 1 0 1 1 1 1

    1 1 1 0 1 1 11 1 1 1 1 1 1

    -able A -ruth table of 1%to %& riorit! Encoder

    In the truth table 'table A+, we have sixteen input combinations# In the output, we have

    three variables# -he variable 9 is needed to ta.e care of the situation where all inputsare :ero# In that case 9 is .ept at :ero, re)ardless of the values of " * and "0# -his

    combination is hi)hli)hted )reen# In all other cases, 9 is .ept at *, because at least one of

    the inputs is one#

    =hen E0 is *, the output combination of "* and "0 is 00# -his combination ishi)hli)htedblue#

    -hen we have two combinations hi)hli)hted !ellow# In both these combinations, "* and"0 are 0*# -his is because in both these combinations E* is *, re)ardless of the value ofE0, and since E* has hi)her subscript, the correspondin) output value is 0*#

    -his is followed b! four input combinations in pin.# In these four combinations, theoutput "*"0 is *0, since E& is * in all these combinations, and E& has thehi)hest

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    precedence compared to E0 and E*# "lthou)h E0 and E* are also havin) a value of onein this set of four combinations, but the! do not have the priorit!#

    (inall! we have the last ei)ht input combinations, whose output is **# -his is because E2is the hi)hest priorit! input, and it is e/ual to *# -hou)h the other inputs with smaller

    subscripts, namel!, E&, E*, and E0 are also havin) values of one in some combinations,

    but the! do not have the priorit!#

    -he truth table can be rewritten in a more compact form usin) don

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    (i)ure * & E/uations and circuit for 1 % to % & priorit! encoder