*Ethiopian Aviation Academy Aviation Maintenance Technician school (AMTS)

ADV-2Fundamentals of Digital Techniques

Total Time allotted (Hrs) Theory ---20Hr Practical ---12HrCourse Duration: 32Hrs Instructor: TSEGAZEAB H.

R. P. Jain, Modern Digital Electronics, 3rd Edition, 2003Walter A. Triebel, Integrated Digital Electronics, 2nd Edition, 1985Anil K. Maini, Wiley, Digital electronics principles, devices and applications ( from Internet www.esnips.com)Handout materials

References*

Course outlineLESSON1: Introduction to Digital ElectronicsLESSON 2: Number System. A. Binary, Octal, decimal, Hexadecimal Number System. B. Conversion between Decimal & Binary Numbers. C. Conversion between Octal & Binary Numbers. D. Conversion between Hexadecimal & Binary Numbers. E. Bits, Bytes, word & data organization. F. Signed number format

Course outlineLESSON 3: BINARY CODES & DIGITAL CODING A. Standard Numeric Codes B. Binary Coded Decimal(BCD) C. Excess-3 Code D. Gray Code & Excess-3 gray code E. Alphanumeric Codes: BCIDIC, ASCII, EBCIDIC F. Parity & the Parity bit in Codes

Course outlineLESSON 4: Basic Logic Gates A. The Logic Gate & Truth Table B. The AND, OR & NOT Gates C. The NAND & NOR Gates D. Exclusive-OR & Exclusive-NOR Gates

Course outlineLESSON 5: INTEGRATED LOGIC CIRCUITS A. Diode Logic (DL) & Diode Transistor Logic (DTL) B. Transistor-Transistor Logic (TTL) Schottky TTL C. Emitter Coupled Logic (ECL) D. Integrated Injection Logic (I2L) E. MOS Logics : NMOS, PMOS & CMOS Logic F. TTL Families Vs CMOS Families G. Tri-State Logic circuit

Course outlineH. IC Integration Scales a. Small Scale Integration (SSI) b. Medium Scale Integration (MSI) c. Large Scale Integration (LSI) I. IC Packaging : TO-5, Flat pack, dual-in-line package(DIP).

Course outlineLESSON 6: Boolean Rules & Equations A. Verification of Boolean Postulates & Theorems. B. Simplification of Boolean Equations C. Logic Function simplificationReview & Test :

COURSE OBJECTIVE After completion of this course you will beable to know about: Digital systems.Binary numbers and coding systems.Basic logic gates.Integrated logic circuits and their technology.IC packaging.Boolean rules, Boolean equations and simplifications .

AbstractModern aircraft is built with the latest technological innovation, and consists of complex electronic circuits.

If we take the communication, navigation, flight controls, and display devices it uses digital electronic circuits which are microprocessor controlled.

Abstract For example, Thrust management computer (TMC) controls the engine performance, Flight Management Computer (FMC) which generates flight control data, navigation calculations, and display information. The flight crew can use the FMCs data to manually or automatically fly the airplane.

AbstractThe Air Data Computer (ADC) generates pressure altitude, computed air speed, Mach number etc. There are so many digital circuits that control the airplanes operations.This course looks into the basics of digital circuit operations.

LESSON 1: INTRODUCTION There are two basic ways of representing the numerical values of the various physical quantities with which we constantly deal in our day-to-day lives.One of the ways, referred to as analog/ue, is to express the numerical value of the quantity as a continuous range of values between the two expected extreme values.Example: To may be given as: 65 C or 64.96 C or 64.958 C or even 64.9579 C Voltage as: 6.5 V or 6.49 V or 6.487 V or 6.4869V

INTRODUCTIONThe underlying concept in analog mode of representation is that variation in the numerical value of the quantity is continuous and could have any of the infinite theoretically possible values between the two extremes.Is that possible to store these infinite possible values using any machine?It is possible to represent continuous values between two extreme points using discrete values that can be handled using digital machines(Like computers).This representation of physical quantities using discrete time and discrete amplitude is called digital representation.

INTRODUCTIONAny physical quantity is inherently analogue.Therefore some process is required to handle the physical quantities in the form of digital representation.The process is called ANALOG TO DIGITAL CONVERSION(ADC):Sampling and holding (discretizing the time)Quantizing (discretizing the amplitude)Encoding ( representing sampled and quantized value using fixed length bit combination)

INTRODUCTIONDigital techniques and systems have the advantages of being relatively much easier to design and having higher accuracy, programmability, noise immunity, easier storage of data and ease of fabrication in integrated circuit form, leading to availability of more complex functions in a smaller size.

INTRODUCTION

Digital systems were introduced with the invention of the so called integrated circuits(IC). The development of ICs advanced digital technology with a great leap to the present days computer stage.As applied to aviation, modern aircrafts use computers which perform important duties thus changing the way aircrafts are designed, fly and maintained. Modern aircrafts such as Air bus 320 fly a complete fly-by-wire system, where the controls from the cockpit to the control surfaces are linked by electrical wiring and computer systems.

INTRODUCTION Some of the digital computers used on commercial and military aircrafts are the :Flight control computer (FCC)Flight management computer (FMC)Thrust management computer (TMC)Traffic and Collision Avoidance System (TCAS) Computer The Engine Indicating & Crew Alerting System (EICAS ) Computer, etc.

INTRODUCTION

LESSON 2: NUMBERING SYSTEM The study of number systems is important from the viewpoint of understanding how data is represented before it can be processed by any digital system including a digital computer.In digital system, the operation of circuitry, data and instructions are expressed using numbers.Compared to analog system that has varying quantities, the digital system contains two distinct states; the True and False or Hi and Lo or ON and OFF or 1 and 0.What is the need of a number in digital system?Ans: It is a language by which computers communicate with each other.

Binary numbersAll types of computers handle numbers represented by binary digits. A binary digit is a digit that can take on the values of 0 or 1. It does not take any other value. A binary digit in computers can represent electrical signals, magnetic and mechanical devices. The term binary digit is abbreviated as a bit.

Number systemFormed by selecting a set of symbols (digits) to represent a numerical value. Binary, octal and hexadecimal number systems are widely used.

Number System (contd)

The number of symbols in a number system is called the base or radix.1. Decimal number system Contains 10 symbols or digits (0,1,2,3,4,5,6,7,8,9), thus uses base 10. When writing numbers in decimal, the left-most digit is the most significant digit (MSD) and the right-most digit is the least significant digit (LSD). Eg. 34510 71.49210

Number System contdIn counting a given digit N in decimal, the maximum count is 10N-1. Eg. With two digits , the max. count is 102-1=99. 00,01---09,10,11,--19,20,21---99With N digits, we can count 10N different numbers including 0. Eg. With 3 decimal digits, we can count a total of (103) or 1000 different states from 000 to 999,.

Number system Contd2. Binary number systemUses symbols (0,1),and is base 2.In binary numbers, the left most bit is the most significant bit (MSB),and the right most bit is the least significant bit(LSB).Eg. (1101)2 (101.11)2

Number system Contd3. OctalSymbols (0,1,2,3,4,5,6,7), base 8 Eg. 3278 45.68 Note: Each octal number is represented by a group of 3-bits. E.g. 0= 000 , 1= 001, .. 7= 111 4. HexadecimalSymbols (0,1,2,. 9, A,B,C,D,E,F), base 16. Eg. A6916 Note: Each hexadecimal digit represents a group of 4-bits. E.g. 0 =0000, 1 = 0001, ..F= 1111.Many computers utilize the hexadecimal system rather than octal, to represent large binary numbers.

ConversionDecimal to binaryFor small decimal number to binary: Eg1. 13. .(Use binary positional weight as 8421 code) 13 = 8 +4 +0 +1 = 23+ 22+01+ 20 = 1 1 0 1 Eg2. 13.375 = 1101.011 The fractional part is obtained by repeated multiplication as shown on the next slide.

ConversionFractional PartsIt is converted by repeatedly multiplying by 2 and recording any carries into integer position. Eg. 0.375*2=0.750 carry =0 ----MSB 0.75*2 = 1.50 carry =1 0.50 *2 = 1.00 carry =1----LSB Thus ; 0.37510 = .0112

Conversion

For larger decimal number it is repeatedly divided by 2 and the reminders are used to form the binary digits. Eg. (163) 10 Remainder 2/163 2/811 LSB 2 /40 1 2 /200 2 /100 2 /5 0 2 /21 2 /10 01 MSB= (10100011) binary

ConversionWhat about the other way, Binary to decimal? Evaluate the decimal equivalent of the binary number: use positional weight starting from the binary point.1010, 11111, 100011 Use the expanded form for the conversion.E.g. 1010 = (1*23)+ 0 +(1*21) +0 (1*8) + (1*2) 8 + 2 10

ConversionBinary to octalSeparate the binary number into groups with 3 bits starting from the binary point for each side.The 0s can be added to complete the outside groups if needed.Replace each group of bits by their octal equivalent.Eg. Consider (101111011010) binary________________________________ 1 0 1 1 1 1 0 1 1 0 1 0 5 7 3 2 _________________________________

Conversion

Octal to BinaryThe numbers in each octal digit is replaced with its equivalent 3-bits binaryEg. Consider the octal number (6072), the equivalent binary number is ___________________________________ 6 0 7 21 0 0 0 0 1 1 1 0 1 0-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Conversion

Exercise:Express each of the following binarynumbers in octal form?10101102 1101011002 10101101.011012

Conversion

Binary to hexadecimalSeparate the binary number into groups with 4 bits starting from the binary point for both sides.Replace each group of bits by their hexadecimal equivalent.Eg. Consider the binary (10000.111) _________________________ 0 0 0 1 0 0 0 0 . 1 1 1 0 1 0 . E

Conversion

Hexadecimal to binaryThe numbers in each hex- digit is replaced with its equivalent 4-bits binary. Eg. Consider the hexadecimal number (A52), the equivalent binary number is ________________________________ A 5 2 1 0 1 0 0 1 0 1 0 0 1 0 ___________________________________________________

Conversion

Exercise:Convert the following binary numbers intotheir hexadecimal form?0001110111000101.1111Write the binary number for C1D16, and 2B016

Word, byte and data organizationElectronic systems handle information in a fixed-length group of binary bits, called Word.The number of bits in a word is known as its word length. E.g.. 4, 8, 16, 32, 64- bits are common lengths.In most applications, a word of data is processed in 8-bit pieces8 bit piece of a word is called one byte.

Signed number formatThe first digit, MSB, is used in most cases to identify the sign of a binary number. The remaining digits represent the magnitude of the number or data or information.E.g. MSB= 0, the number is positive. MSB = 1, the number is negative.MSB LSB 27 26 25 24 23 22 21 20 0 1 Data (information)

Signed number format0 = positive number1 = negative number

Find the sign & value of: 0 0100110 + 25+22+21 32 + 4 + 2 38

Signed number in 1s ComplementIn the 1s complement format, the positive numbers remain unchanged. The negative numbers are obtained by taking the 1s complement of the positive counterparts.The 1s complement of a binary number is obtained by complementing all its bits, i.e. by replacing 0s with 1s and 1s with 0s.For example, the 1s complement of (10010110)2 is (01101001)2.

Signed number in 2s ComplementIn the 2s complement representation of binary numbers, the MSB represents the sign, with a 0 used for a plus sign and a 1 used for a minus sign similar to that of 1s complement representation. The remaining bits are used for representing magnitude. Positive magnitudes are represented in the same way as in the case of sign-bit or 1s complement representation. Negative magnitudes are represented by the 2s complement of their positive counterparts.The 2s complement of (00001001)2 =+9 is, first take 1s complement and add 1 to the LSB: (11110111)2= -9

2s complementIn general, 2s complement notation can be used to perform addition when the expected result of addition lies in the range from 2n1 to +(2n1 1), n being the number of bits used to represent the numbers.As an example, eight-bit 2s complement arithmetic can not be used to perform addition if the result of addition lies outside the range from 128 to +127.

2s complementExample 3.2Find out whether 16-bit 2s complement arithmetic can be used to add 14,276 and 18,490.

Review questionsGive the next three numbers in each of the following hex sequences:(a) 4A5, 4A6, 4A7, 4A8, (b) B998, B999, 2. Assume a radix-32 arbitrary number system with 09 and AV as its basic digits. Express the mixed binary number (110101.001)2 in this arbitrary number system. 3. Do the following conversions:(a) eight-bit 2s complement representation of (23)10;(b) The decimal equivalent of (00010111)2 represented in 2s complement form4. What do you understand by the 1s and 2s complements of a binary number? What will be the range of decimal numbers that can be represented using a 16-bit 2s complement format?

LESSON 3: Binary codes and digital codingThe binary coding system, called the straight binary code discussed in the previous topics, becomes very cumbersome to handle when used to represent larger decimal numbers. To overcome this shortcomings different binary codes have been used.Standard numeric codesare codes used to represent numerical information in modern digital equipment. It deals with weighted and un-weighted codes. Code groupings are generally in one of the two categories.Weighted codes codes such as the weighted binary, octal, hex and BCD.Un weighted codes the bits do not have numerical weights. Eg. Excess-3 code.

ContSome of the more popular codes areBinary coded decimal (BCD / 8421)Excess-3 Code (XS-3)Gray CodeExcess-3 Gray Code (XS-3 Gray)Alpha numeric codes Binary coded decimal code: is the most widely used code in digital circuitry. It is abbreviated as BCD code ( 8421 code). It is also possible to have 4221 BCD and 5421 BCD codes but they are not frequently used.

BCD/8421It is a weighted code & uses the decimal numbers 0 through 9.Each decimal digit is expressed as a corresponding 4-bit binary number.Thus 4 bits are the minimum needed to represent 09. E.g. 1000 0100 BCD = 8 4 decimal.

Example 2.1How many bits would be required to encode decimal numbers 0 to 9999 in straight binary and BCD codes? What would be the BCD equivalent of decimal 27 in 16-bit representation?SolutionTotal number of decimals to be represented=10000=104 =213.29. Therefore, the number of bits required for straight binary encoding=14. The number of bits required for BCD encoding=16. The BCD equivalent of 27 in 16-bit representation=0000000000100111.

Excess-3 codeXs-3 code is un-weighted codeFormed by adding three to the each decimal digit in ordinary BCD codeXS-3 code = BCD+ 3E.g. 01110101 XS-3 = 4 2 decimalThe decimal equivalent of excess-3 number 01010110.10001010 would be 23.57ExerciseFind (a) the excess-3 equivalent of (237.75)10 and (b) the decimal equivalent of the excess-3 number 110010100011.01110101.Answer: A) 010101101010.10101000 B) (970.42)10

Gray code and XS-3 gray codeGray codeThe binary word is selected so that just 1 bit changes logic level when going from number to next consecutive number.Owing to this feature, the maximum error that can creep into a system using the binary Gray code to encode data is much less than the worst-case error encountered in the case of straight binary encoding.

Binary to Gray Code Conversion1. Begin with the most significant bit (MSB) of the binary number. The MSB of the Gray code equivalent is the same as the MSB of the given binary number.2. The second most significant bit, adjacent to the MSB, in the Gray code number is obtained by adding the MSB and the second MSB of the binary number and ignoring the carry, if any. That is, if the MSB and the bit adjacent to it are both 1, then the corresponding Gray code bit would be a 0.3. The third most significant bit, adjacent to the second MSB, in the Gray code number is obtained by adding the second MSB and the third MSB in the binary number and ignoring the carry, if any.4. The process continues until we obtain the LSB of the Gray code number by the addition of the LSB and the next higher adjacent bit of the binary number.

Gray code to Binary conversionA given Gray code number can be converted into its binary equivalent by going through the following steps:1. Begin with the most significant bit (MSB). The MSB of the binary number is the same as the MSB of the Gray code number.2. The bit next to the MSB (the second MSB) in the binary number is obtained by adding the MSB in the binary number to the second MSB in the Gray code number and disregarding the carry, if any.3. The third MSB in the binary number is obtained by adding the second MSB in the binary number to the third MSB in the Gray code number. Again, carry, if any, is to be ignored.4. The process continues until we obtain the LSB of the binary number.

Gray codeExample 2.4Find (a) the Gray code equivalent of decimal 13 and (b) the binary equivalent of Gray code number 1111.

Alphanumeric CodesTypes of alphanumeric codes commonly used in most digital equipment are:BCD interchange code (BCDIC) American Standard Code for Information Interchange (ASCII) Extended BCD Interchange Code (EBCDIC)

BCDIC code

ASCII code

ASCII control character

EBCDIC code control characters

Data RepresentationMost digital systems use the binary number system, because many simple physical systems are most easily described by two state levels (0 and 1).For example, the two states may represent on and off, a punched hole or the absence of a hole in paper tape or a card, or a mark and space in communication transmission. In electronic systems, state levels are physically represented by voltages. A typical choice isState 1 = 5 VState 0 = 0 V

Data representation (contd)

Since it is unrealistic to obtain exact voltage values, a more practical choice is a range of values. E.g. State 0 = 0.0 to 0.4V state 1 = 2.4 to 5.0 V Therefore any size of information can be represented in combination of 1s and 0s.

Parity bitIt is common practice to identify the number of ones or zeros in a given binary word specially for error detection purposes.If the number of ones in the binary word to be transmitted or processed is even, the parity is called even parity otherwise it is called odd parity. Parity bit is added to a word to be transmitted for error correction purpose later at the receiver. This bit can be either even parity bit i.e. a bit added to make the total string of bits even or odd parity bit to make the total string of bits odd.Mostly EX-OR or EX-NOR gates are used to generate the parity bits.

LESSON 4: LOGIC GATESAre digital circuits that haveOne, Two or more logical inputMost of the time Single outputThe output state depends on the logic state of one or several input signals.Basic logic gates perform - Binary operation - Manipulates binary numbers

In a logic gate circuitThe input and output signals can only take on one of two logic levels.These logic levels are indicated by binary 1 and 0. There are Voltage and current mode logic.A logic circuit can be described in truth table, graphical representation of the relationship between input and output logic levels.

Positive and negative logicsPositive LogicHigher voltage means true(logic 1) while a lower voltage means false(logic 0). Negative Logic Lower voltage means true (1) and higher voltage means false (0).

Truth TableA truth table lists all possible combinations of input binary variables and the corresponding outputs of a logic system.The logic system output can be found from the logical expression, often referred to as the Boolean expression, that relates the output with the inputs of that logic system.When the number of input binary variables is only one, then there are only two possible inputs, i.e. 0 and 1. If the number of inputs is two, there can be four possible input combinations, i.e. 00, 01, 10 and 11.

Truth Table

The seven common logic gatesAND gateOR gateNOT gateNAND gateNOR gateEX-OR gateEX-NOR gate

Logic gatesThe basic logic gates are:NOT, AND, ORThe Universal (derived) logic gates are:NAND, NORThe combination of the basic and derived gates are:EX-OR, EX-NOR

OR gateProduces a logic 1 output when at least one input is at a logic level 1.Can be represented by switches connected in parallel. NB: It can have 3,or 4, or 5 inputs

The truth table and equivalent gate circuit (an inverted-output NOR gate) are shown here:

OR gate

AND gateThe output will be at a 1 logic level only when all inputs are1. The same as binary multiplication. Modeled by switches connected in series NB: It can have 3,or 4, or 5 inputs

The truth table and equivalent gate circuit (an inverted-output NAND gate) are shown here:

NOT GateIt is often called inverter It can only have one inputThe output is always opposite of the input logic level.

The gate shown here with the single transistor is known as an inverter, or NOT gate, because it outputs the exact opposite digital signal as what is input. For convenience, gate circuits are generally represented by their own symbols rather than by their constituent transistors and resistors. The following is the symbol for an inverter:

An alternative symbol for an inverter is shown here:

NAND Gate Combines the AND and NOT operations The inputs are first ANDed and then the result is inverted. The output will be 0 only when all inputs are 1. What is the switch model of this gate?

Collecting and tabulating these results into a truth table, we see that the pattern matches that of the NAND gate:

NOR gateCombines the OR and NOT gates. The output will be 0 only when any input is at level 1The inputs are first ORed and then inverted.What will be the switch model of this gate?

This circuit's truth table, then, is equivalent to that of the NOR gate:

LOGIC Equivalences Logic Symbol / Equivalent gate / Boolean Equations(from Dmorgans law)

Basic logic gates AND, OR, NOT operation performed by a NAND gate (universal gate)

Basic logic operation AND, OR, & NOT con be performed by using the NOR gate (universal gate)

EX-OR gateProduces a logic 1 output only when the two inputs are at different logic levelsAlways has two inputsUsed to realize binary bit additionY = AB = AB+ABWhat is the switch model of this gate?

Exclusive-OR gates output a "high" (1) logic level if the inputs are at different logic levels, either 0 and 1 or 1 and 0. Conversely, they output a "low" (0) logic level if the inputs are at the same logic levels. The Exclusive-OR (sometimes called XOR) gate has both a symbol and a truth table pattern that is unique:

Ex-NOR gate Inverse of the EX-OR gateProduces a logic 1 only when the inputs are at the same logic level.Y = (AB) = AB+AB What is the switch model of this gate?

The Exclusive-NOR gate

Finally, our last gate for analysis is the Exclusive-NOR gate, otherwise known as the XNOR gate. It is equivalent to an Exclusive-OR gate with an inverted output. The truth table for this gate is exactly opposite as for the Exclusive-OR gate:

Inhibit(disable) gateThere are many situations in digital circuit design where the passage of a logic signal needs to be either enabled or inhibited depending upon certain other control inputs.INHIBIT here means that the gate produces a certain fixed logic level at the output irrespective of changes in the input logic level.

Inhibit gateAs an illustration, if one of the inputs of a four-input NOR gate is permanently tied to logic 1 level, then the output will always be at logic 0 level irrespective of the logic status of other inputs. This gate will behave as a NOR gate only when this control input is at logic 0 level.

Schmitt gatesThe logic gates discussed so far have a single-input threshold voltage level. This threshold is the same for both LOW-to-HIGH and HIGH-to-LOW output transitions.This threshold voltage lies somewhere between the highest LOW voltage level and the lowest HIGH voltage level guaranteed by the manufacturer of the device.These logic gates can produce an erratic output when fed with a slow varying input as shown below.

Conventional gate

Schmitt gateA possible solution to the above problem for slowly varying inputs lies in having two different threshold voltage levels, one for LOW-to-HIGH transition and the other for HIGH-to-LOW transition, by introducing some positive feedback in the internal gate circuitry, a phenomenon called hysteresis.These types of gates are called Schmitt gates.

Schmitt Inverter gate

Other types of gatesBuffer and transceivers are tri-state logic gates used for transmission of data from the input to the output based on the status of enabling inputs.Buffers are used to drive circuits that need drive current or to create delay depending on the need.Transceivers are bidirectional buffers.Buffers and transceivers can be inverting or non-inverting.This means that the buffer can be used to increase the number of logic gate inputs to which the output of a given logic gate can be connected.

Other gates

Review Questions1. How do you distinguish between positive and negative logic systems? Prove that an OR gate in a positive logic system is an AND gate in a negative logic system.2. Give brief statements that would help one remember the truth table of AND, NAND, OR, NOR, EX-OR and EX-NOR logic gate functions, irrespective of the number of inputs used.3. Why are NAND and NOR gates called universal gates? Justify your answer with the help of examples.4. What are Schmitt gates? How does a Schmitt gate overcome the problem of occurrence of an erratic output for slow varying input transitions?5. Draw the circuit symbol and the associated truth table for the following:(a) a tristate noninverting buffer with an active HIGH ENABLE input;(b) a tristate inverting buffer with an active LOW ENABLE input;

LESSON 5: INTEGRATED LOGIC CIRCUITSAn IC is a miniature electronic module of components and conductors manufactured as a single unit, (a single chip of silicon semiconductor material). Components such as diodes, transistors and resistors are manufactured in the semiconductor chip.It is a digital circuit built into a small package.It enabled electronic devices to become miniature in size and less expensive.

Level of IntegrationBased on the complexity of digital circuits, ICs are categorized into four. Small scale ICs (SSI)Medium Scale ICs (MSI)Large Scale ICs (LSI)Very Large Scale ICs (VLSI)

SSIIs the simplest digital circuit.Has less than 12 gates(less than 100 transistors) on a chip.Contains the basic logic and switching circuits.AND, OR, NOT, NAND, NOR, BUFFER, XOR, FLIP-FLOP, MULTIVIBRATOR.

MSIContains circuits with a complexity of from 12 to 100 SSI (100 3,000 transistors) on a chip.E.g. Decoders, Address generators, Multiplexers, Data latch, Counters, Shift Registers. For example, a digital decoder circuit can be made from 8 NOT gates and 10 NAND gates. This will have a total of 18 SSI circuits to put the decoder into the MSI category.

LSI and VLSILSI has 100 to 1000 gates(3,000 -100,000 transistors) on a chip.It contains a complete digital sub-system. The complexity of an LSI device exceeds the equivalent of 100 SSI circuits. Three of the most commonly used LSI circuits are the: Read only memory (ROM), Random access memory (RAM), and Arithmetic logic unit (ALU).VLSI: 1000 or more gates(100,000 - 1,000,000 transistors) on a chip - Forms a complete digital systemULSI : more than 1 million transistors on a chip

Digital logic technologiesThe process by which semiconductor circuits are made is called a Technology.The technologies can be grouped into two general categories.

Bipolar technology

MOS technologies

Digital logic technologies

Performance of logic devicesThe electrical performance (characteristic parameters) of different technologies can be characterized by:Logic levels, voltage and current values assigned to binary 1 and binary 0 states. Refer manufacturers data book for min and max acceptable voltage/current values.Propagation delay, the amount of time that it takes for the output of a digital circuit to respond to the input level change. It is a measure of speed of operation.(does it exactly mean speed of the processor?)Power dissipation, how much power a circuit consumes when it operates. High power high electrical energy consumption Power = Vcc.Icc , where ICC is average of low level and high level supply current and VCC is the supply voltage.

Voltage and current logic levels

Propagation delay

Actual propagation delay

PerformanceNoise immunity: How sensitive the circuit is to environmental noise. (such as automobile, or noisy environment). Devises with low noise immunity can not be used.Fan out: indicates how many of a load can be connected to the output of a digital circuit. Eg. A fan out of 10 10 separate gate inputs can be attached to the output of a logic circuit and still maintain proper operation.

Fan in and Fan outFan out: refers to how many gates can be supplied by output of a gate.Fan out depends on the output impedance of the gate. Fan in: refers to the number of inputs on the gate.

Total Fan out =4FAN OUT = 2

PerformanceFan Out:It is a common occurrence in logic circuits that the output of one logic gate feeds the inputs of several others. It is not practical to drive the inputs of an unlimited number of logic gates from the output of a single logic gate. This is limited by the current-sourcing capability of the output when the output of the logic gate is HIGH and by the current-sinking capability of the output when it is LOW, and also by the requirement of the inputs of the logic gates being fed in the two states.

Fan OutThus, the number of logic gate inputs that can be driven from the output of a single logic gate will be IOH/IIH in the logic HIGH state and IOL/IIL in the logic LOW state. The smaller of these two ratios is taken as the FAN OUT of the gate.Where IOH and IIH are maximum out put HIGH state sourcing and maximum input HIGH state sinking currents respectively.

Fan OutAnd IOL and IIL are maximum output LOW state sinking and maximum LOW state input sourcing currents of the gate respectively.Therefore, The number of logic gate inputs(sometimes number of gates) that can be driven from the output of a single logic gate without causing any false output is called fan-out.

Fan Out

FAN IN AND FAN OUT

7400 ELECTRICAL CHARACTERISTICS

Noise marginSince VIL(max.) is greater than VOL(max.), the LOW output state can therefore tolerate a positive voltage spike equal to VIL(max.) VOL(max.) and still be a legal LOW input. Similarly, VOH(min.) is greater than VIH (min.), and the HIGH output state can tolerate a negative voltage spike equal to VOH(min.) VIH (min.) and still be a legal HIGH input. Here, VIL(max.) VOL(max.) and VOH(min.) VIH (min.) are respectively known as the LOW-level and HIGH-level noise margin.If the two values are different, the noise margin is taken as the lower of the two.

Noise margin

INPUT/OUTPUT AND FANOUT CHACTERISTICS OF BOPOOLAR TECHS

Technology Comparison (Logic family)There are a variety of circuit configurations or more appropriately various approaches used to produce different types of digital integrated circuit. Each such fundamental approach is called a logic family. The most popular are:BipolarBetter in speed and reliability.MOSBetter in power consumption and noise immunity.

Bipolar Technologies Older and mature compared to MOS. Types of bipolar technologies:Diode Logic (DL)Resistor- Transistor logic(RTL)Diode Transistor Logic (DTL)Transistor-Transistor Logic (TTL)Emitter Coupled Logic(ECL) or Current mode logic(CML)Integrated injection Logic (I2L) Schottky TTL

RTLBasic RTL NOR gateIts problem is that the resistors are big enough and it is difficult to manufacture a chip with smaller size.

Diode logic (DL)Constructed with only resistors and diodesNo amplification takes place, thus makes each driven gate a heavy load on the driving gate.Diode logic has excellent switching characteristics, good isolation among inputs, a small input capacitance, and some noise.Adding an amplifier stage to the diode logic circuit yield the basic diode transistor logic.

Diode OR Gate

DTLHas an amplifier stage added to the diode logic circuit.Diode-Transistor NAND Gate schematic diagram

DTL

TTLConstructed with only resistors and transistorsTransistors are the active switching element.Transistor saturation reduced the operating speed.TTL ICs identification numbers begin with 74, commercial temperature range of 0 to 700C.54, military temperature range of -55 to 1250C.What is the advantage of TTL over DTL?Increased fan out because of amplification.

TTL circuit examples(Simplified) Basic TTL Circuit

TTL CircuitsTTL NAND gate circuit

Schottky TTLA standard TTL with a barrier diode(schottky diode) between the base and collector leads of the transistor.The diode acts as a clamp and prevent the transistor from saturation.Has faster operating speed compared to standard TTL.

Schottky transistor

Schottky TTL

ECLThe fastest logic device.Is current mode logic (CML). Is high power consuming device.Has very complex circuitry.Is the most expensive.Is based on a bipolar transistor current switching circuit similar to the analog differential amplifier Permits only simple logic functions to be manufactured.Note: Both ECL and Schottky TTL are non-saturating circuits.

ECL1. It is a non-saturating logic. That is, the transistors in this logic are always operated in the active region of their output characteristics. They are never driven to either cut-off or saturation, which means that logic LOW and HIGH states correspond to different states of conduction of various bipolar transistors.2. The logic swing, that is, the difference in the voltage levels corresponding to logic LOW and HIGH states, is kept small (typically 0.85 V), with the result that the output capacitance needs to be charged and discharged by a relatively much smaller voltage differential.

ECL3. The circuit currents are relatively high and the output impedance is low, with the result that the output capacitance can be charged and discharged quickly.

Other TTL familiesThe low-power TTL is a low-power variant of the standard TTL where lower power dissipation is achieved at the expense of reduced speed of operation by increasing the resistors used.The High-power High speed TTL is achieved by the reducing the resistors used and Darlington configuration at the output. The Schottky TTL offers a speed that is about twice that offered by the high-power TTL for the same power consumption.

Other TTL familiesThe Low power schottky is similar to schottky TTL except the resistors are increased in value in proportional manner to decrease the power consumption with out much affecting the speed.Both ALS-TTL and AS-TTL offer an improvement in speedpower product respectively over LS-TTL and S-TTL by a factor of 4.

TTL Families 74xx Standard TTLH74HxxHigh-speedL74LxxLow-powerS74SxxSchottkyLS74LSxxlow-power schottkyAS74ASxxAdvanced SchottkyALS74ALSxxAdvanced Low-power schottky.NB. The Xs are device identification numbers.

Exercise

MOS TechnologiesUse field effect transistors (FETs).Characterized by simple device structure, small size (high density) and ease of fabrication. Types of MOS technologies:PMOS, P-channel MOSFET logic circuitryNMOS, N-channel MOSFET logic circuitryCMOS, Complementary symmetry MOS logic circuitry.

MOS Technologies comparisonNMOS speed is twice that of PMOS.CMOS high speed, better noise immunity, and low power consumption.CMOS draws negligible power during standby.CMOS are used for battery operated equipments.

NMOS circuit example/inverter

NMOS NOT operationThis is an NMOS Enhancement type transistor. When positive voltage is given at the gate, the n-channel is created and the transistor is conducting. At this time the source and drain terminals are almost connected through the channel.When the input is HIGH the transistor is conducting and the output is forced to ground giving a logic LOW.

NMOS NAND gate

NMOS NAND operationWhen both inputs are HIGH, both lower transistors are conducting and the output is taken to ground giving logic LOW.In any other case either one of the bottom transistors are open letting the output to be derived to Vdd giving a logic HIGH at the output.This is the operation of NAND gate.

NMOS NOR Gate

NMOS NOR operationWhen both inputs are LOW, the bottom transistors are open and the output is derived to Vdd(HIGH) otherwise the output is LOW.These is using NMOS transistors but it is also possible to design using PMOS and CMOS transistors.

CMOS INVERTER example

CMOS Inverter operationThis types of transistor symbols are enhancement type transistors and it is visible that NMOS and PMOS transistors are used simultaneously.When the input is HIGH, the NMOS transistor is conducting while the PMOS transistor is open, therefore, the output is derived to ground through the NMOS bottom transistor.In the other case the operation of the transistors output status will be the reverse.

CMOS NAND gate

CMOS NAND operationSimilarly, when both inputs are HIGH, the NMOS transistors are conducting and the PMOS transistors are cut-off and the output is derived to ground giving LOW output. In other cases the output will be derived to Vdd giving HIGH output.

CMOS NAND

CMOS NOR gate

CMOS NOR operationWhen both inputs are HIGH the PMOS upper transistors will be conducting and it drives the output to Vdd. In all other cases at least one of the NMOS transistors will be conducting and it drives the output to ground.It is then possible to design any type of logical operation using these basic gates.

CMOS FamiliesC74Cxx CMOS versions of TTLHC74HCxx High-speed CMOSHCT74HCTxx High-speed CMOS,TTL compatible.AC74ACxxxxx Advanced CMOSACT74ACTxxxx Advanced CMOS, TTL-compatible

Integrated Injection Logic (I2L)Is a bipolar logic simple to fabricate.Used in LSI packages.Requires less chip space than MOS.Speed is approximately speed of TTL.I2L has a unified advantage of TTL and CMOS.

I2L logic

I2L INVERTER logic operationWhen the input A is HIGH the current from transistor Q3 will saturate transistor Q1 and the collector voltage of Q1 will be approximately 50-100mV that is LOW output.When input A is low the transistor Q1 will be cut-off and the current from Q4 will be saturating Q2, driving the BE voltage of Q2 to 0.7V which is actually HIGH voltage for this case.

Out put Logic configurationThe output state of any gate can be configured to be Totem pole output, open collector/drain output, tri-state output configuration. All the configurations discussed so far are Totem pole output configuration.In Totem pole output configuration the pull up transistor is internally embedded in the IC manufacturing and external hard wiring of more than one output is not possible.Disadvantage of the totem-pole configuration is different switch-off and switch-on time of the two output transistors which may create more current be drawn from Vcc when both transistors are on.

Open collector/drain confIn these types of TTL open collector or MOS open drain configuration the output pull up transistor is not internally embedded and external pull up resistor is used if the gate is required to operate.It is possible to externally hard wire open collector/drain gates.

Open drain output Cont

Tri state LogicTwo voltage levels of digital circuits have been considered up to now.Tri state logic (TSL) has a 3rd state called a high impedance state, and is used in bus organized computers Tri-state Inverter: Enabled state circuit acts as logic inverter. Disabled high impedance state out put terminal acts as if it were disconnected (a virtual open circuit ).

Tri state device

Tri state bufferOperates exactly like the Tri-state logic(TSL), but does not produce inversion in the enabled state.

Tri-state Inverter

Conclusion of Logic familyLogic families that are still in widespread use include TTL, CMOS, ECL, NMOS and Bi-CMOS.The PMOS and I2L logic families, which were mainly intended for use in custom large-scale integrated (LSI) circuit devices, have also been rendered more or less obsolete, with the NMOS logic family replacing them for LSI and VLSI applications.

IC PackagingThere are three popular IC packaging:TO5 : : Is not popular : Advantage; heat dissipation : Uses bipolar transistors for amplificationFlat pack : Is designed for high density packaging, thus uses ceramic material that can withstand high temperature Dual-in-line Package (DIP): Is the most widely used form of IC packaging: Has an advantage of easy mounting:Is available in various sizes, from 8-pin package (min.DIP) to a 40, 48, 64 - pin packages.

IC Packaging

Most SSI circuits are housed in 8, 14 or 16-pin dual in-line packages.LSI circuits are housed in 24, 28 and 40-pin packages.Temperature ranges Military grade ICs operate from -550c to +1250c. Commercial or industrial grade is 00c to 700c Manufacturers data sheet has to be observed

IC chip, connected to Header

FLAT IC package

The dual in-line package, DIP

DIP IC package

Review questions1. Why are logic gates with open collector or open drain outputs? What are the major advantages and disadvantages of such devices?2. What do you understand by the term logic family? What is the significance of the logic family with reference to digital integrated circuits (ICs)?3. Briefly describe propagation delay, power dissipation, speedpower product, fan-out and noise margin parameters, with particular reference to their significance as regards the suitability of the logic family for a given application.4. Compare the standard TTL, low-power Schottky TTL and Schottky TTL on the basis of speed, power dissipation and fan-out capability.5. What is the totem-pole output configuration? What are its advantages?6. With the help of relevant circuit schematics, briefly describe the operation of CMOS NAND and NOR gates

LESSON 6 : BOOLEAN RULES & BOOLEAN EQUATION Boolean variablesThe input and output terminals of a logic gate are marked with Boolean variables and equations are written using Boolean operators. Boolean operatorsThe AND(.), OR(+), and NOT(-) functions are considered to be Boolean operators.- Boolean equationBoolean variables at the input are connected with Boolean operators.

Application of Boolean theoremTo generate input-output relationships in digital circuits from the truth table.

To simplify long /complex Boolean expressions. To develop equivalent logics.

Boolean equationIf A,B,Care inputs and F the output ,then F=A.B is called Boolean product F=A+B is called Boolean sumLaws of complementation 1st Law: If A=0 A=1 If A=1 A=0 2nd Law : A.A =0 3rd Law : A+A =1Law of double complementation : If A is the input complementing it twice gives A .

LawsCommutative laws For OR function : A+B =B+A For AND function: A.B = B.AAssociative laws: OR function: A+(B+C) = C+(A+B) AND function: A.(B.C) = C.(A.B)Distributive laws: 1st law ; A.(B+C) =(A.B) + (A.C) 2ND LAW ; A+(B.C) = (A+B).(A+C)

Dual TheoremThe dual of a given logic expression is found by replacing all + operators by . and vice versa and taking the literals as they are.The dual and the original logic expression may not be equivalent in their logical value.Ex: Y= AB +BA The dual is Y= (A+B).(B+A)

Laws of tautology1st law: A.A =A i.e. if A =1 , 1 and 1 =1 if A =0 , 0 and 0 =0 2nd law: A+A =A ; if A=1 : 1 or 1= 1 if A=0 : 0 or 0= 0. Thus the following theorems exist. A+0=A and, A.1=A A+1=1 A.0=0 A+A=A A.A=A A+A=1 A.A=0Note : A variable has only two possible values(0 or 1).

Theorems Involving two and three variables 1. A+AB=A 2. A(A+B)=A 3. AB+AB=A 4. (A+B) (A+B) =A 5. A +AB =A+B 6. A(A+B)= AB 7. A+BC =(A+B)(A+C) 8. AB+AC = (A+C)(A+B) 9. A(B+C) =AB+ACExample: Prove that equation 5 is correct. Solution :compare the truth tables of A+AB and A+B.

Demorgans theoremIs used to minimize logic expressions.

Boolean Postulates

Boolean Theorems

Boolean Theorems

Boolean Expression and Truth tableIt is best approach to simplify Boolean expressions using truth table.The truth table shows the relationship between the possible input conditions and the output.Any digital statement can be converted to truth table and the simplified Boolean expression can be derived from the table.

Truth tableThe expression for the output Y can be derived either using SOP(sum-of-product) or POS(product-of-sum) expressions.

Truth tableThe first expression is the POS and the second one is SOP expression for the table given above.The most common and the simpler one is the SOP expression.Further simplification can be carried out using the Boolean laws.

Karnaugh Map methodThe most popular and powerful method of simplifying Boolean equations is using the Karnaugh method.An n-variable Karnaugh map has 2n squares, and each possible input is allotted a square. In the case of a minterm(SOP) Karnaugh map, 1 is placed in all those squares for which the output is 1, and 0 is placed in all those squares for which the output is 0. 0s are omitted for simplicity. An X is placed in squares corresponding to dont care conditions. In the case of a maxterm(POS) Karnaugh map, a 1 is placed in all those squares for which the output is 0, and a 0 is placed for input entries corresponding to a 1 output. Again, 0s are omitted for simplicity, and an X is placed in squares corresponding to dont care conditions.

Karnaugh Map methodHaving drawn the Karnaugh map, the next step is to form groups of 1s as per the following guidelines:1. Each square containing a 1 must be considered at least once, although it can be considered as often as desired.2. The objective should be to account for all the marked squares in the minimum number of groups.3. The number of squares in a group must always be a power of 2, i.e. groups can have 1, 2, 4 8, 16,squares.4. Each group should be as large as possible, which means that a square should not be accounted for by itself if it can be accounted for by a group of two squares; a group of two squares should not be made if the involved squares can be included in a group of four squares and so on.5. Dont care entries can be used in accounting for all of 1-squares to make optimum groups. They are marked X in the corresponding squares. It is, however, not necessary to account for all dont care entries. Only such entries that can be used to advantage should be used.

Karnaugh Map

Karnaugh Map

Karnaugh Map

Minterm grouping

Exercise EXERCISE: Given the following table, simplify the Boolean expression using Karnaugh Map SOP method.

ContSOLUTION: Take the Karnaugh mapping from the table and group minterms in such a way to simplify the expression.Start from maximum possible grouping i.e. 8 minterm grouping if possible, 4 minterm grouping if possible, then 2 minterm grouping if possible finally individual minterm grouping.

ContLook for the literal that is common in all the squares shown in the 8 minterm grouping.The literal that is common is C thenThe final expression will be Y= CIt is possible to take other lower minterm groupings but still it will not be the simplified one.

ExerciseEX1:

Review QuestionsWrite both sum-of-products and product-of-sums Boolean expressions for (a) a two-input AND gate, (b) a two-input NAND-gate, (c) a two-input EX-OR gate and (d) a two-input NOR gate from their respective truth tables.

Review questions

THE END THANKS Remember that it is up to youto change every piece ofinformation in to your ownasset. Tsega-Zeab

*Give them a Jolt: Identify how many animals they can see in the puzzle given:**4 bit piece of a word is called one Nibble.*SolutionThe addition of decimal numbers 14,276 and 18,490 would yield 32,766. 16-bit 2s complement arithmetic has a range of 215 to +(215 1), i.e. 32,768 to +32,767. The expected result is inside the allowable range. Therefore, 16-bit arithmetic can be used to add the given numbers.

*1. ANS:(a) 4A9, 4AA, 4AB; (b) B99A, B99B, B99C2. ANS:1L.43. ANS: (a) 11101001; (b) +234. **8*The advantage of TTL over DTL is the amplification which increases the fan out of the gate by increasing the current to be sourced and sank using transistor rather than diode.**The advantages of schottky diode(Barrier diode):- Low turn on voltage - Fast recovery time - Low junction capacitance

***Advantage of Totem-pole configuration is higher speed because of lower out put impedance which in turn minimizes the charging/discharging time of the outputs for high and low.**