1 Presentation Title

Barbados PBarbados Power Sower Sequenceequence

• EE team member: Jack CH Chang, Jia Chuang, Paul Hsu

• EE Lead:Vernon Ho

2 Presentation Title

Barbados Block Diagram

7in1CONN

BCM 4401KQLG

AT93C46

ODD Bay

MIC IN

PCI Express/USB2.0

+1.5VSUS

Bluetooth

MAX4411ETP

TAPA6017

Silicon Image SII3811(MARVELL 8040)

SATAIDE

Project code:91.4C401.001PCB P/N :04242REVISION :SD

38

(10/100Mb)

ExpressCardSLOT

Power Switch

UNBUFFEREDDDR2 SODIMMSocket

100MHz

HOST BUS400/533MHz4.3GB/s

IntelICH6-M

DDRII 400/533MHz

PCI/PCI BRIDGE

LPC I/F

ACPI 1.1

ATA 66/100

AC97 2.2/AZALIA

ETHERNET

USB 2.0 (2+2+2+2)

MAX8734A

INPUTS OUTPUTS

PWR_SRC

System DC/DC

PWR_SRC

MAX8743

BATT+PWR_SRC

MAX1909Battery Charger

+5VSUS

+3VSRC

Dothan: 1.6BGHz/1.73GHz1.87GHz/2AGHz/2.1GHz Celeron:1.4GHz/1.5GHz/1.6GHz

VCC_CORE

CPU DC/DCISL6217

PWR_SRC

+1.05VRUN

14.1" WXGA

KBCSMSC LPC47354

Clock Generator

DDR Memory I/F

INTEGRATED GRAHPICS

LVDS, CRT I/F

AGTL+ CPU I/F

GM(915)Alviso

Intel Mobile CPU

LVDS

RJ45CONN

BIOSMX29LV008BBTC-90G

MDC

OP AMPLINE OUT

STAC 9200Azalia CODEC

AZALIA

USB

2.0

USB*4

Modem

Barbados Block Diagram

PWR_SRC+1.8VSUS

TI 51116DDR2 DC/DC

System DC/DC

Touch PadInt. KB

SMBus

Thermal Sensor

EMC6N300

TV OUTS-VIDEO

200-PIN DDR2 SODIMM

UNBUFFEREDDDR2 SODIMMSocket

CRT PortRGB CRT

RJ11CONN

PCB LAYER

L1:TOP

L2:Signal

L3:GND

L5:Signal

L4:Signal

L6:VCC

L7:GND

L8:BOT

+0.9VSUS_DDR2VREF

40

39

41

42

802.11a/b/gMini-PCIPCI Bus / 33MHz

Richo 832

ATMEL

1.5

DMI I/F

HDD

Primary IDE

ICS954226/CV140PAG

SATA

13947in1

25

24

15

43

14

12

11

3

16,17,18,19

6,7,8,9

4,5

26

32

32

32

34

29,3031

20

20

28

22

23

22,23

43

43

27

33

21

20

21

26

27+0.9VRUN

OP AMPINT.SPKR

MAC III

13941394CONN

7in1

3 Presentation Title

Please link to >>>>>>

Power on sequence block diagram

DB1 power sequence

4 Presentation Title

How can we know Macallen3 is working? 1) Use probe to touch the DBG2 pin 2 ( DEBUG_OUT ) without inserting AC adapter. 2) As for oscilloscope, set up Trigger Mode : Normal. 3) Final step that have to insert AC adapter but do

not press Power Button. 4) Eventually, we should have 4 set of pulses as

below.

5 Presentation Title

Good Signal From Macallen

6 Presentation Title

Procedure Of Checking Macallen Pulses

a) If we couldn’t have such pulses from Macallen3.

b) Please go back to check the signal step by step. +3.3VRTC +3VALW DEBUG_OUT X3( PIN 1, 2, XTAL ). c) There are several circuit portion listed below.

7 Presentation Title

Macallen3 need VCCRTC Power

VCCRTC_CON VCCRTC_D

12

C586SC1U10V3KX

12

C600SCD1U25V3KX

C593SC1U25V-U

12

R51410KR2

12

C596SC1U10V3KX

1 2R5201KR2PWR

1

GND2

MH1MH1

MH2MH2

RTC1

BAT-CON2-U-GP 22.70031.001

IN1GND2OUT3

5/3#4

SHDN#5

U53

MAX1615EUK-GP

PWR_SRC

VCCRTC

+3_3VRTC

21D30CH751H-40PT

21D29

CH751H-40PT

Page 29

8 Presentation Title

Macallen3 receive ACAV_IN

9 Presentation Title

Macallen3 output ALWON

10 Presentation Title

Macallen3 Reset and Start Working

Reset Macallen

See Page 30

11 Presentation Title

Macallen3 Output Pulses

12 Presentation Title

Procedure Of Checking No Power Issues

• First Case: No +3VALW and +5VALW power a) Firstly, check if Charger U5 pin6 ACAV_IN drive

high? b) Check U13 pin 20 V+ get 19.5V? +3VALW and

+5VALW power use LDO to generate. b) Check if ALWON is high?(3.3V signal) See page 42 and 39.

13 Presentation Title

Procedure Of Checking No Power Issues

• Symptom : 3 LED light turn on entirely First Case: a) Firstly, you can jump to check VCC_CORE power

plane. b) Does CPU power comes up? c) If doesn’t . Please go back to check with the power sequence from beginning as +5VSUS/+3VSUS +1.8VSUS_PG SUSPWROK RUN_ON +1.05VRUN_PWRGD RUNPWROK . d) These action will check which power plane have no

power up.

14 Presentation Title

Procedure Of Checking No Power IssuesSecond Case:a) Assumed that CPU voltage can attain 0.9 Volt above.b) We may prove that the rest of power plane before VCC_CORE power plane would be fine.c) Afterward, please check with PLT_RST1# GTL_CPURST# . d) If PLT_RST1# still can’t exist, we can check the

following signal RESET_OUT( From Macallen3) IMVP_PWROK.

ICH_PWROKe) If GTL_CPURST# can’t driven high, go back to check

the PLT_RST1#.f) In addition, we can check whether reference

voltage( 2/3 Vcc_IO ) for GMCH correct or not, that is, H_VREF ( R108 pin 2)

15 Presentation Title

Procedure Of Checking No Power Issues

1) If both PLT_RST1# and GTL_CPURST# driven high.

We’ll keep tracking the next signal which connect between CPU and GMCH, that

is, GTL_ADS#. ( Fig.1 ). 2) We can assume that CPU may failure if we

can’t get these pulses in Fig.1. 3) Another case is only show up one pulse in

Fig.1 that we can suspect the failure in U32 ( Bios Rom ) or CPU NG.

16 Presentation Title

Fig.1 ( GTL_ADS# )

18 GTL_ADS# CPU to NB Test pad only .

GTL_ADS# is the “first signal” generated by CPU ,

17 Presentation Title

LPC_LFRAME# WAVEFORM COME OUT AFTER GTL_ADS# PRODUCED BY CPU

18 Presentation Title

CPU access BIOS data flow

N/B S/B KBCCPU

VCC VCCVCCVCCClock ClockClockClock

GTL_CPURST# Reset Reset

GTL_ADS# DMI LPC_LFRAME#

GTL_TRDY# DMI

GTL_D#(63:0)

LAD(3:0)

BIOS

VCC

A(19:0)

KBC_D(7:0)

19 Presentation Title

Barbados Power Sequence Waveform

Please reference to Proto-1.0 board power sequence.

Proto-1 power on sequence

20 Presentation Title

Keyboard LEDs Error code

Please see attached file=> LEDs Error

Code

Power Event log:

power event log.txt