1 digital logic design week 3 logic gates (not, and, or, nand, nor, xor, xnor) applications of...
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Digital Logic Design
Week 3
Logic gates (NOT, AND, OR, NAND, NOR, XOR, XNOR)
Applications of Binary Codes (MOTIVATION)(ASCII and UNICODE codes, Seven-segment Display Code, Gray code-rotation counter, Error Detection and Correction code)
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Logic gates
Logic gates– NOT gate– AND gate– OR gate– NAND gate– NOR gate– Exclusive-OR (XOR) and exclusive-NOR (XNOR) gates
Fixed-function logic & programmable logic
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True only if all input conditions are true
True only if one or more input conditions are true
Indicates the opposite condition
Basic logic operations and symbols
True/false conditions are represented by voltages:HIGH = true LOW = false
X
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NOT gate
also known as an inverter
performs inversion or complementation• HIGH ↔ LOW• 1 ↔ 0
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NOT gate Truth Table
A X = A’
0 1
1 0
A truth table shows the output corresponding to each possible input
Three equivalent ways to write the NOT condition:X = NOT A
X = A’
A X
A X
We’ll use truth tables extensively in the course
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Timing diagram
A
X
A X
Application: A group of inverters can be used to form the 1’s complement of a binary number:
Binary number
1’s complement
1 0 0 0 1 1 0 1
0 1 1 1 0 0 1 0
NOT gate
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AND gate
Produces a HIGH output when all inputs are HIGH; otherwise, the output is LOW
A
B
X
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Truth table for a 2-input AND gate
AND operation is sometimes shown with a dot between the variables, but it may be implied (no dot):
AND operation is written as X = A·B or X = AB
InputsA B X
Output
0 00 11 01 1
00 01
AND gateA
B
X
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AND gates have 2 or more inputs
Write the truth table for a 3-input AND gate
#inputs = n #input combinations (= #rows in truth table) = 2n
2 inputs → 22 = 4 input combinations 3 inputs → 23 = 8 input combinations 4 inputs → 24 = 16 input combinations
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Timing diagram
AND gateA
B
X
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AND gate
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OR gate
Produces a HIGH output if any input is HIGH; if all inputs are LOW, the output is LOW
A
B
X
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Truth table for a 2-input OR gate
The OR operation is shown with a plus sign (+) between the variables:
OR operation is written as X = A + B
InputsA B X
Output
0 00 11 01 1
01 11
OR gateA
B
X
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OR gates have 2 or more inputs
Write the truth table for a 3-input OR gate
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OR gate
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NAND gate
NAND = NOT-AND
Truth table for a 2-input NAND gate
NAND operation is written as or
InputsA B X
Output
0 00 11 01 1
11 10
BA X BA X
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NOR gate
NOR = NOT-OR
Truth table for a 2-input NOR gate
NOR operation is written as or
InputsA B X
Output
0 00 11 01 1
10 00
BA X BA X
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Name the mystery gate #1
?
Alarm to be activated if any door/window is open
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Name the mystery gate #2
?
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????
Name the mystery gate #3
Want green light ON if both tanks are at least 25% full
Level sensor output is HIGH if tank is at least 25% full
Light turns on if this signal is
LOW
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XOR gate 2-input exclusive-OR (XOR) gate produces a HIGH
output if the inputs are at opposite logic levels– one HIGH & one LOW
Truth table for a 2-input XOR gateInputsA B X
Output
0 00 11 01 1
01 10
B A X XOR operation is written 3-input XOR defined:
– extends to N-input XOR
CBACB A CB A X
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XNOR gate 2-input exclusive-NOR (XNOR) gate produces a HIGH
output if the inputs are at same logic levels– both HIGH, or both LOW
Truth table for a 2-input XNOR gateInputsA B X
Output
0 00 11 01 1
10 01
BA X XNOR operation is written
A
B
X
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Summary of logic gates
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1. The binary number 100011010100011011112 expressed in hexadecimal is:
(a) AD46716
(b) 8C46F16
(c) 8D46F16
(d) AE46F16
2. Convert the decimal number 28410 to hexadecimal
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3. Express the decimal number 246910 in binary-coded decimal.
4. A communication system transmits 9-bit blocks of information using an even parity scheme. The following byte of information is to be transmitted: 01110101
Calculate the value of the parity bit to be attached to this byte.
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5. For the set of input waveforms shown below, draw the timing diagram showing the output X in relation to the inputs.
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6. By examination of the timing diagram below, identify the type of 3-input gate which generates the output X.
?
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7. A 2-input gate with inputs A and B generates output X shown in the timing diagram below. The gate is:
(a) an OR gate(b) an AND gate(c) a NOR gate(d) a NAND gate
A
X
B
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9. The truth table for a 2-input NOR gate is:
© 2008 Pearson Education
0 00 11 01 1
InputsA B X
Output
0 00 11 01 1
InputsA B X
Output
0 00 11 01 1
InputsA B X
Output
InputsA B X
Output
0 00 11 01 1
a. b.
c. d.
0110
00 01
10 00
01 11
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10. Compute the 2’s complement of 011011002
11.The decimal number +12210 is expressed in 8-bit 2’s complement form as:
(a) 01111010(b) 11111010(c) 01000101(d) 10000101
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12. Write −3410 as a binary number in 8-bit 2’s complement form
13. Convert each of the following decimal numbers to 8-bit 2’s complement form, and add them: −52 and 25.
Check your answer by converting the result back to decimal.
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14. Convert the hexadecimal number 6B16 to octal (base-8)
15. Perform the following addition of hexadecimal numbers: DF16 + AC16