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CDA 4630/5636: Embedded Systems

Introduction

Course Requirements

Grading Criteria

Course Policies

Textbook

Embedded Systems Basics

Course OutlineCDA 4630/CDA 5636 – Spring 2016 Copyright © 2016 Prabhat Mishra

Instructor: Dr. Prabhat MishraAssociate Professor, CISE

http://www.cise.ufl.edu/~prabhat Room: CSE 568 Email: prabhat@cise.ufl.edu Phone: 352 505 1880 Office hours: Wednesday 1:55 – 3:50 PM

Brief HistorySince 2004 at University of Florida.Held positions in Texas Instruments, Intel,

Motorola (Freescale), Synopsys, and … Published four books, 100+ research articles, …

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Embedded SystemsTwo types of computing

Desktop – produced millions/yearEmbedded – billions/year

Non-Embedded SystemsPCs, servers, and notebooks

Embedded Systems – the future of computing! Automobiles, entertainment, communication, aviation,

handheld devices, medical, ….

Embedded SystemsAutomobiles

Handheld

Medical

AirplanesMilitary

Entertainment

Why should I take this course?To understand a new area

Intersection of architecture, OS and compilers Includes software and hardware (digital + analog) Covers a wide variety of optimization objectives

area, power, performance, energy, temperature

To pursue research in this fieldInterdisciplinary – many job openings …

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OS

Architecture

Compiler

Subject Areas

Reconfigurable

Embedded

Real-Time

Computing Paradigms

Analog/Digital

Hardware

Software

Domains

LecturesCourse Page

http://www.cise.ufl.edu/class/cda5636sp15/ Visit regularly for updates and announcements

Lectures Mon, Wed and Fri 10:40 – 11:30 AM NEB 102

Class participation – 5% of overall score On campus students are expected to attend

classes and actively participate in discussions.

Please be on time

eLearning website will be used for assignments https://lss.at.ufl.edu

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Course Requirements No graduate levels courses necessary

Required Courses CDA 3101 - Computer Organization

Good programming knowledge in C, C++ or Java

Necessary to do well in the course projects

Each project can be approximately 500 lines of code. Therefore, you should be comfortable designing and debugging large programs.

Please check with the instructor if you do not have the required pre-requisites

When to consider dropping it?Subjective tests

You are not interested in learning!

Like to collaborate in individual assignments!

You do not have the required background Courses: computer organization and programming

The name “software” or “hardware” scares you

Need a specific grade in this course to graduate but not willing to put the required effort

Objective testDo not score at least 50% in the test (will be

provided) 9

Grading Criteria Homeworks – 15%

Two HWs for CDA4630 and three for CDA5636

Projects – 20% Two projects for CDA4630 and three for CDA5636

Two Exams Midterm – 25% Comprehensive Final – 35%

Participation – 5%Grading will be on the curve

Separate curves for CDA 4630 and CDA 5636 top 15-20% A, next 15-20% A-, …

How do I get an “A” grade?Make sure you are in top 15-20% (overall 90+)

How to be in top 15-20% ?Make sure you have the required background

Attend every lecture and actively participate in discussions

Come prepared for the next lectureMake sure you understood the previous lectures completely

Use both TA and instructor office hours effectivelyUse office hour for technical discussions (not for “re-grading only”)

Solve homeworks and projects on your own

Another perspective:

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Lectures + HWs + Projects Read Materials + Understand Examples Discussions+ …AB+B A-B-

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Course PoliciesNo grades for late submissions.Complete homeworks/projects on your own.

“Zero Tolerance” policy towards cheating

Exams are closed book/notes.Crib sheet allowed -- hand-written notesCalculator (cell phone not allowed)

Re-grading requests within a week.One week from when it is available (posted in eLearning).

Attendance, Cell Phones, …http://www.cise.ufl.edu/class/cda5636sp16/

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Tentative Schedule Assigned Due

Homework 1: Jan 27 Feb 03 (11:30 PM)

Project 1: Feb 03 Feb 17 (11:30 PM)

Homework 2: Feb 17 Feb 24 (11:30 PM)

Midterm: Mar 14 10:40 – 11:30 PM in NEB 102

EDGE students can take the midterm between Mar 23 – 24

Homework 3: Feb 24 Mar 09 (11:30 PM)

Project 2: Mar 09 Mar 30 (11:30 PM)

Project 3: Mar 30 Apr 13 (11:30 PM)

Final: Apr 28 12:30 – 2:30 PM in NEB 102

EDGE students can take the final between Apr 28 – 29 so that exam reaches the instructor by Apr 30, 4:00 PM (EST)

Textbook No required textbooks

Materials will be from various books (approx. coverage ) P. Marwedel, Embedded System Design (40%) W. Wolf, High Performance Embedded Computing (15%) F. Vahid and T. Givargis, Embedded System Design (10%) M. Chen …, System-Level Validation, (10%) W. Wang …, Dynamic Reconfiguration in Real-Time Systems (10%)Various sources (15%)

If you want to buy, try one of the first two books

ReferencesConferences/Journals

DAC, ICCAD, …, ACM TODAES/TECS, IEEE TCAD/TVLSI Web Resources: www.embedded.com, www.eet.com, …

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MotivationMotivation Examples

Block Diagram

Characteristics

Major Challenges Low Power Design Complexity Verification Complexity Time-to-Market Security and Reliability

Design Automation Opportunities

Example: Digital Camera

Components of Embedded Systems

Analog Digital Analog

Memory

Coprocessors

Controllers

Converters

Processor

Interface

Software(Application Programs)

ASIC

Components of Embedded Systems Analog Components

Sensors, Actuators, …

Digital Components Processor, Coprocessors, Memories, Buses Controllers, Application Specific Hardwares

Converters Analog-to-Digital (A2D), D2A, …

Software Operating systems Middleware Applications (MPEG-x, GSM-kernel, …)

Example: BMW 745i

2, 000, 000 LOC

Windows CE OS

53 8-bit P

11 32-bit P

7 16-bit P

Multiple Networks

Buggy!

© 2006 Elsevier

Electronic Devices in Automobiles

Lee [Lee02b] © 2002 IEEE

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MotivationMotivation Examples

Block Diagram

Characteristics

Major Challenges Low Power Design Complexity Verification Complexity Time-to-Market Security and Reliability

Design Automation Opportunities

Simplified Block Diagram

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Analog DigitalConverter

Embedded Computing (Processors, Memories, …)

Display

ActuatorsSensors

Digital AnalogConverter

Environment

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MotivationMotivation Examples

Block Diagram

Characteristics

Major Challenges Low Power Design Complexity Verification Complexity Time-to-Market Security and Reliability

Design Automation Opportunities

Characteristics Application Specific

Applications are known a priori Optimize for cost, area, power, and performance

Digital Signal Processing Signals are represented digitally

Reactive Reacts to changes in the system’s environment

Real-time Compute certain tasks before deadline

Distributed, Networked, …

Characteristics Reliability

Probability of system working correctly provided that is was working at t=0

Maintainability Probability of system working correctly d time

units after error occurred.

Safety Not harmful for user

Security Confidential and authentic communication

Traditional Design ChallengesLow cost

Light weight

Reliability

Low power

Portable

Complexity

Ease of use

Security

Digital/analog requirements

Shrinking time-to-market

Short product lifetime

Real-time processing

Inherent concurrency

HW/SW co-design

Network friendly

Reliability

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MotivationMotivation Examples

Block Diagram

Characteristics

Major Challenges Low Power Design Complexity Verification Complexity Time-to-Market Security and Reliability

Design Automation Opportunities

Reducing Energy Consumption

[www.transmeta.com]

Pentium Crusoe

Running the same multimedia application.

Infrared Cameras (FLIR) can be used to detect thermal distribution.

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MotivationMotivation Examples

Block Diagram

Characteristics

Major Challenges Low Power Design Complexity Verification Complexity Time-to-Market Security and Reliability

Design Automation Opportunities

Design Complexity

Exponential Growth – doubling of transistors every couple of years

1,000,000,000

Nu

mb

er

of

Tra

nsi

sto

rs

100,000,000

10,000,000

1,000,000

100,000

10,000

10001970 1975 1980 1985 1990 1995 2000 2005

4004 8008

8080

8086

286

386

486

Pentium 4

Pentium II

Pentium

Pentium III

NVIDIA NV30 GPU

Sony Graphic SynthesizerNVIDIA NV40

Intel

Intel

Intel

Intel

Intel

Intel

Intel

Intel

IntelIntel

Intel

Sony Graphic Synthesizer

IBM Power4

NVIDIA NV25 GPU

NVIDIA NV20 GPU

AMD Athlon XP

Intel Centrino

NVIDIA NV35 GPU

ATI Radeon X800

Motorola G4

Design Complexity

Use of Silicon Power

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Technology and Demand

Technology Demand

#of transistors are doubling every 2 years

Communication, multimedia, entertainment, networking

Exponential growth of design complexity verification complexity

Who wants to be a Millionaire You double your investment everyday

Starting investment - one cent.

How long it takes to become a millionairea) 20 days

b) 27 days

c) 37 days

d) 365 days

e) Lifetime ++

Who wants to be a Millionaire You double your investment everyday

Starting investment - one cent. How long it takes to become a millionaire

a) 20 days One million centsb) 27 days Millionairec) 37 days Billionaire

Doubling transistors every 18 months This growth rate is hard to imagine, most people

underestimate

Believe it or not Each of us have more than a million ancestors in

last 20 generations.

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MotivationMotivation Examples

Block Diagram

Characteristics

Major Challenges Low Power Design Complexity Verification Complexity Time-to-Market Security and Reliability

Design Automation Opportunities

North America Re-spin Statistics

1st

Sili

con

Suc

cess

100%

1999 2002 2004

48%44% 39%

Source: 2002 Collett International Research and Synopsys

North America Re-spin Statistics

1st

Sili

con

Suc

cess

100%

1999 2002 2004

48%44% 39%

Source: 2002 Collett International Research and Synopsys

71% SOC re-spins are due to logic bugs

2000 2007 1000B

100M

200 2001 10B

10M

Functional Validation of SOC Designs

Source: Synopsys

Trillions

Billions

20000? 2014

100M

Logic Gates

Sim

ulat

ion

Vec

tors

Eng

inee

r Y

ears

20 1995

1M

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MotivationMotivation Examples

Block Diagram

Characteristics

Major Challenges Low Power Design Complexity Verification Complexity Time-to-Market Security and Reliability

Design Automation Opportunities

Time-to-MarketTime required to develop a

product to the point it can be sold to customers

Market windowPeriod during which the product

would have highest sales

Average time-to-market constraint is about 8 months

Delays can be costly

Rev

enu

es (

$)

Time (months)

Losses due to Delayed Market EntrySimplified revenue model

Product life = 2W, peak at WRevenue = area of the triangleLoss = difference between on-time and delayed triangle

areas (shaded region)

On-time Delayedentry entry

Peak revenue

Peak revenue from delayed entry

Market rise Market fall

W 2W

Time

D

On-time

Delayed

Rev

enu

es (

$)

Area = 1/2 * base * height On-time = 1/2 * 2W * W Delayed = 1/2 * (2W-D)*(W-D)

Percentage revenue loss = (D(3W-D)/2W2)*100%

Try some examples1. Lifetime 2W=52 wks, delay D=4 wks

Loss = (4*(3*26 –4)/2*262) = 22%

2. Lifetime 2W=52 wks, delay D=10 wks Loss = (10*(3*26 –10)/2*262) = 50%

Design Productivity Gap

1981 leading edge chip required 100 man-months10,000 transistors / 100 transistors/month

2002 leading edge chip requires 30K man-months150,000,000 / 5000 transistors/month

Designer cost increase from $1M to $300M

10,000

1,000

100

10

1

0.1

0.01

0.001

Logic transistors per chip

(in millions)

100,000

10,000

1000

100

10

1

0.1

0.01

Productivity(K) Trans./Staff-Mo.

1981

1983

1985

1987

1989

1991

1993

1995

1997

1999

2001

2003

2005

2007

2009

IC capacity

Productivity

Gap

Mythical Man-Month In theory, adding designers to team reduces project completion time In reality, productivity per designer decreases due to team

management complexity and communication overhead In the software community, known as “the mythical man-month”

(Brooks 1975)At some point, can actually lengthen project completion time!

10 20 30 400

10000

20000

30000

40000

50000

60000

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24

19

1615

1618

23

Team

Individual

Months until completion

Number of designers

1M transistors, one designer=5000 trans/month

Each additional designer reduces for 100 trans/month

So 2 designers produce 4900 trans/month each

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MotivationMotivation Examples

Block Diagram

Characteristics

Major Challenges Low Power Design Complexity Verification Complexity Time-to-Market Security and Reliability

Design Automation Opportunities

Attacks on Embedded Systems

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Remote Software Attacks(Worm, Virus, Trojans)

Irreversible Hardware Attacks(Tampering)

Reversible ActiveProximity-based Attacks

(Fault injection)

Promity-based Passive Hardware Attacks(Power or EM analysis)

Turbo Code

RAM

uP

AES

Security and ReliabilityReliable system design creates systems that work

even in the face of internal or external errors.Design errors, manufacturing defects, radiation hazards, …

To ensure security, countermeasures are required for various types of malicious attacks. power attack, network attack, trojans, virus, …

Safety-critical systems need to dynamically detect errors or security attacks and repair/mitigate them.

Avizienis et al. [Avi04] © 2006 Elsevier

Challenges versus Trade-offsMulticore architectures ensures performance growth

without creating power disasterOne core with frequency 2 GHzTwo cores with 1 GHz frequency (each)

Same performance Two 1 GHz cores require half power/energy

– Power freq2

– 1GHz core needs one-fourth power compared to 2GHz core.

Creates reliability concerns! Assume that one core has mean-time-to-failure (MTTF) of 5 years

a system with 64 cores has MTTF approximately one month!

Design complexity and reduced time-to-market needs integration of components from other companies. Creates opportunity for malicious attacks

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MotivationMotivation Examples

Block Diagram

Characteristics

Major Challenges Low Power Design Complexity Verification Complexity Time-to-Market Security and Reliability

Course Outline

Course Overview

ConceptSpecification

HW/SWPartitioning

Hardware Components

Software Components

Estimation -Exploration

Hardware

Software

Synthesis

Compilation

Validation and Evaluation

Course OutlineIntroduction

Modeling and Specification

Embedded Systems Architecture

Real-Time Scheduling and OS

Compilation for Embedded Applications

Hardware-Software Co-Design

Control Systems

Recent Research DirectionsCode compression, design space exploration,

functional verification, dynamic reconfiguration 52