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08.06.20 14:50 CSCI 150 Introduction to Digital and Computer System Design Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2)

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Page 1: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

08.06.20 14:50

CSCI 150 Introduction to Digital and Computer

System Design Lecture 2: Combinational Logical Circuits IV

Jetic Gū2020 Summer Semester (S2)

Page 2: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Overview

• Focus: Boolean Algebra

• Architecture: Combinatory Logical Circuits

• Textbook v4: Ch2 2.4, 2.5; v5: Ch2 2.4, 2.5

• Core Ideas:

1. Boolean Algebra III: K-Map

Page 3: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Boolean Algebra I&II• AND, OR, NOT Operators and Gates

• Simple digital circuit implementation

• Algebraic manipulation using Binary Identities

• Standard Forms

• Minterm & Maxterm

• Sum of Products & Product of Sums

Review

P0 Review

Page 4: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Boolean Algebra III: K-Map

Summary

P1 Optimisation

Cost Criteria;Map and Map Manipulation

Page 5: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

K-Map

• Karnaugh Map, or just K-Map

• For optimising 2-4 variable boolean expressions

• Skip: 5,6 variable K-Maps can also be drawn but are not very intuitive to use

Concep

t

P1 Optimisation

Page 6: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Two Variable Maps

Concep

t

P1 Optimisation

2-4 / Two-Level Circuit Optimization 63

than sum- of- products and product- of- sums, the gate- input count must be deter-mined directly from the implementation.

Regardless of the cost criteria used, we see later that the simplest expression is not necessarily unique. It is sometimes possible to !nd two or more expressions that satisfy the cost criterion applied. In that case, either solution is satisfactory from the cost standpoint.

Map Structures

We will consider maps for two, three, and four variables as shown in Figure"2-12. The number of squares in each map is equal to the number of minterms in the corre-sponding function. In our discussion of minterms, we de!ned a minterm mi to go with the row of the truth table with i in binary as the variable values. This use of i to

(a) (b)

0

1

0 1Y

X

X Y X Y

X YX Y

(c) (d)

ZX

ZX

0

6 4

13

57

2

X Z

02

8 10

1 3911

(f)(e)

00

01

00 01YZ

WX

Y

Z

W

11 10

11

10

X

X Z

0 1

2 3 X

Y

0

1

0 1Y

X

Y

X

Z

0 1 3 2

4 5 7 6

YZ

X

0

00 01 11 10

1

1 3 2

4 5 7 6

8 9 1011

12 13 1415

0

FIGURE!2-12Map Structures

M02_MANO0637_05_SE_C02.indd 63 23/01/15 1:47 PM

• Number of squares in each map is equal to the number of minterms for the same number of variables, light blue digit above is the index (of minterm)

• Two squares are adjacent if they only differ in one variable

• Binary value inside at each position indicates the truth table value for that term

Page 7: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Three Variable Maps

Concep

t

P1 Optimisation

• Number of squares in each map is equal to the number of minterms for the same number of variables, light blue digit above is the index (of minterm)

• Two squares are adjacent if they only differ in one variable

• Binary value inside at each position indicates the truth table value for that term

2-4 / Two-Level Circuit Optimization 63

than sum- of- products and product- of- sums, the gate- input count must be deter-mined directly from the implementation.

Regardless of the cost criteria used, we see later that the simplest expression is not necessarily unique. It is sometimes possible to !nd two or more expressions that satisfy the cost criterion applied. In that case, either solution is satisfactory from the cost standpoint.

Map Structures

We will consider maps for two, three, and four variables as shown in Figure"2-12. The number of squares in each map is equal to the number of minterms in the corre-sponding function. In our discussion of minterms, we de!ned a minterm mi to go with the row of the truth table with i in binary as the variable values. This use of i to

(a) (b)

0

1

0 1Y

X

X Y X Y

X YX Y

(c) (d)

ZX

ZX

0

6 4

13

57

2

X Z

02

8 10

1 3911

(f)(e)

00

01

00 01YZ

WX

Y

Z

W

11 10

11

10

X

X Z

0 1

2 3 X

Y

0

1

0 1Y

X

Y

X

Z

0 1 3 2

4 5 7 6

YZ

X

0

00 01 11 10

1

1 3 2

4 5 7 6

8 9 1011

12 13 1415

0

FIGURE!2-12Map Structures

M02_MANO0637_05_SE_C02.indd 63 23/01/15 1:47 PM

Page 8: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Four Variable Maps

Concep

t

P1 Optimisation

2-4 / Two-Level Circuit Optimization 63

than sum- of- products and product- of- sums, the gate- input count must be deter-mined directly from the implementation.

Regardless of the cost criteria used, we see later that the simplest expression is not necessarily unique. It is sometimes possible to !nd two or more expressions that satisfy the cost criterion applied. In that case, either solution is satisfactory from the cost standpoint.

Map Structures

We will consider maps for two, three, and four variables as shown in Figure"2-12. The number of squares in each map is equal to the number of minterms in the corre-sponding function. In our discussion of minterms, we de!ned a minterm mi to go with the row of the truth table with i in binary as the variable values. This use of i to

(a) (b)

0

1

0 1Y

X

X Y X Y

X YX Y

(c) (d)

ZX

ZX

0

6 4

13

57

2

X Z

02

8 10

1 3911

(f)(e)

00

01

00 01YZ

WX

Y

Z

W

11 10

11

10

X

X Z

0 1

2 3 X

Y

0

1

0 1Y

X

Y

X

Z

0 1 3 2

4 5 7 6

YZ

X

0

00 01 11 10

1

1 3 2

4 5 7 6

8 9 1011

12 13 1415

0

FIGURE!2-12Map Structures

M02_MANO0637_05_SE_C02.indd 63 23/01/15 1:47 PM

• Number of squares in each map is equal to the number of minterms for the same number of variables, light blue digit above is the index (of minterm)

• Two squares are adjacent if they only differ in one variable

• Binary value inside at each position indicates the truth table value for that term

Page 9: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Two Variable Maps Optimisation

Concep

t

P1 Optimisation

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

2-4 / Two-Level Circuit Optimization 63

than sum- of- products and product- of- sums, the gate- input count must be deter-mined directly from the implementation.

Regardless of the cost criteria used, we see later that the simplest expression is not necessarily unique. It is sometimes possible to !nd two or more expressions that satisfy the cost criterion applied. In that case, either solution is satisfactory from the cost standpoint.

Map Structures

We will consider maps for two, three, and four variables as shown in Figure"2-12. The number of squares in each map is equal to the number of minterms in the corre-sponding function. In our discussion of minterms, we de!ned a minterm mi to go with the row of the truth table with i in binary as the variable values. This use of i to

(a) (b)

0

1

0 1Y

X

X Y X Y

X YX Y

(c) (d)

ZX

ZX

0

6 4

13

57

2

X Z

02

8 10

1 3911

(f)(e)

00

01

00 01YZ

WX

Y

Z

W

11 10

11

10

X

X Z

0 1

2 3 X

Y

0

1

0 1Y

X

Y

X

Z

0 1 3 2

4 5 7 6

YZ

X

0

00 01 11 10

1

1 3 2

4 5 7 6

8 9 1011

12 13 1415

0

FIGURE!2-12Map Structures

M02_MANO0637_05_SE_C02.indd 63 23/01/15 1:47 PM

Truth Table

X Y F0 0 0

0 1 1

1 0 0

1 1 1

0

1

1

0

Page 10: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Two Variable Maps Optimisation

Demo

P1 Optimisation

2-4 / Two-Level Circuit Optimization 63

than sum- of- products and product- of- sums, the gate- input count must be deter-mined directly from the implementation.

Regardless of the cost criteria used, we see later that the simplest expression is not necessarily unique. It is sometimes possible to !nd two or more expressions that satisfy the cost criterion applied. In that case, either solution is satisfactory from the cost standpoint.

Map Structures

We will consider maps for two, three, and four variables as shown in Figure"2-12. The number of squares in each map is equal to the number of minterms in the corre-sponding function. In our discussion of minterms, we de!ned a minterm mi to go with the row of the truth table with i in binary as the variable values. This use of i to

(a) (b)

0

1

0 1Y

X

X Y X Y

X YX Y

(c) (d)

ZX

ZX

0

6 4

13

57

2

X Z

02

8 10

1 3911

(f)(e)

00

01

00 01YZ

WX

Y

Z

W

11 10

11

10

X

X Z

0 1

2 3 X

Y

0

1

0 1Y

X

Y

X

Z

0 1 3 2

4 5 7 6

YZ

X

0

00 01 11 10

1

1 3 2

4 5 7 6

8 9 1011

12 13 1415

0

FIGURE!2-12Map Structures

M02_MANO0637_05_SE_C02.indd 63 23/01/15 1:47 PM

Truth Table

X Y F0 0 1

0 1 1

1 0 0

1 1 1

1

1

1

0 X + Y

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Page 11: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Three Variable Maps Optimisation

Concep

t

P1 Optimisation

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

F(X, Y, Z) = Σm(0,1,2,3,4,5)

1

1

1

1

1 1

= X + Y

Page 12: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Three Variable Maps Optimisation

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Demo

P1 Optimisation

F(X, Y, Z) = Σm(0,2,4,5,6)

1

1 11

1

= XY + Z

Page 13: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Three Variable Maps Optimisation

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Exerci

se

P1 Optimisation

F(X, Y, Z) = Σm(1,3,4,5,6)

1

1 11

1

= XZ + XY + XZ

Page 14: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Four Variable Maps Optimisation

Exerci

se

P1 Optimisation

F(W, X, Y, Z) = Σm(0,1,2,4,5,6,8,9,10,12,13)

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

2-4 / Two-Level Circuit Optimization 63

than sum- of- products and product- of- sums, the gate- input count must be deter-mined directly from the implementation.

Regardless of the cost criteria used, we see later that the simplest expression is not necessarily unique. It is sometimes possible to !nd two or more expressions that satisfy the cost criterion applied. In that case, either solution is satisfactory from the cost standpoint.

Map Structures

We will consider maps for two, three, and four variables as shown in Figure"2-12. The number of squares in each map is equal to the number of minterms in the corre-sponding function. In our discussion of minterms, we de!ned a minterm mi to go with the row of the truth table with i in binary as the variable values. This use of i to

(a) (b)

0

1

0 1Y

X

X Y X Y

X YX Y

(c) (d)

ZX

ZX

0

6 4

13

57

2

X Z

02

8 10

1 3911

(f)(e)

00

01

00 01YZ

WX

Y

Z

W

11 10

11

10

X

X Z

0 1

2 3 X

Y

0

1

0 1Y

X

Y

X

Z

0 1 3 2

4 5 7 6

YZ

X

0

00 01 11 10

1

1 3 2

4 5 7 6

8 9 1011

12 13 1415

0

FIGURE!2-12Map Structures

M02_MANO0637_05_SE_C02.indd 63 23/01/15 1:47 PM

1

1

1

1

11

1

1

1 1

1

= Y + XZ + WZ

Page 15: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Four Variable Maps Optimisation

Exerci

se

P1 Optimisation

F(W, X, Y, Z) = WYZ + WZ + XY + YZ + WXZ

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

2-4 / Two-Level Circuit Optimization 63

than sum- of- products and product- of- sums, the gate- input count must be deter-mined directly from the implementation.

Regardless of the cost criteria used, we see later that the simplest expression is not necessarily unique. It is sometimes possible to !nd two or more expressions that satisfy the cost criterion applied. In that case, either solution is satisfactory from the cost standpoint.

Map Structures

We will consider maps for two, three, and four variables as shown in Figure"2-12. The number of squares in each map is equal to the number of minterms in the corre-sponding function. In our discussion of minterms, we de!ned a minterm mi to go with the row of the truth table with i in binary as the variable values. This use of i to

(a) (b)

0

1

0 1Y

X

X Y X Y

X YX Y

(c) (d)

ZX

ZX

0

6 4

13

57

2

X Z

02

8 10

1 3911

(f)(e)

00

01

00 01YZ

WX

Y

Z

W

11 10

11

10

X

X Z

0 1

2 3 X

Y

0

1

0 1Y

X

Y

X

Z

0 1 3 2

4 5 7 6

YZ

X

0

00 01 11 10

1

1 3 2

4 5 7 6

8 9 1011

12 13 1415

0

FIGURE!2-12Map Structures

M02_MANO0637_05_SE_C02.indd 63 23/01/15 1:47 PM

1

1

1 1

11

1 1

1

1

1

Page 16: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Don’t Care Condition

• Sometimes we don’t care what the output is when the inputs are in certain combinations

Concep

t

P1 Optimisation

2-4 / Two-Level Circuit Optimization 63

than sum- of- products and product- of- sums, the gate- input count must be deter-mined directly from the implementation.

Regardless of the cost criteria used, we see later that the simplest expression is not necessarily unique. It is sometimes possible to !nd two or more expressions that satisfy the cost criterion applied. In that case, either solution is satisfactory from the cost standpoint.

Map Structures

We will consider maps for two, three, and four variables as shown in Figure"2-12. The number of squares in each map is equal to the number of minterms in the corre-sponding function. In our discussion of minterms, we de!ned a minterm mi to go with the row of the truth table with i in binary as the variable values. This use of i to

(a) (b)

0

1

0 1Y

X

X Y X Y

X YX Y

(c) (d)

ZX

ZX

0

6 4

13

57

2

X Z

02

8 10

1 3911

(f)(e)

00

01

00 01YZ

WX

Y

Z

W

11 10

11

10

X

X Z

0 1

2 3 X

Y

0

1

0 1Y

X

Y

X

Z

0 1 3 2

4 5 7 6

YZ

X

0

00 01 11 10

1

1 3 2

4 5 7 6

8 9 1011

12 13 1415

0

FIGURE!2-12Map Structures

M02_MANO0637_05_SE_C02.indd 63 23/01/15 1:47 PM

1 1

1 X

1

11

1

Page 17: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Don’t Care Condition

Demo

P1 Optimisation

2-4 / Two-Level Circuit Optimization 63

than sum- of- products and product- of- sums, the gate- input count must be deter-mined directly from the implementation.

Regardless of the cost criteria used, we see later that the simplest expression is not necessarily unique. It is sometimes possible to !nd two or more expressions that satisfy the cost criterion applied. In that case, either solution is satisfactory from the cost standpoint.

Map Structures

We will consider maps for two, three, and four variables as shown in Figure"2-12. The number of squares in each map is equal to the number of minterms in the corre-sponding function. In our discussion of minterms, we de!ned a minterm mi to go with the row of the truth table with i in binary as the variable values. This use of i to

(a) (b)

0

1

0 1Y

X

X Y X Y

X YX Y

(c) (d)

ZX

ZX

0

6 4

13

57

2

X Z

02

8 10

1 3911

(f)(e)

00

01

00 01YZ

WX

Y

Z

W

11 10

11

10

X

X Z

0 1

2 3 X

Y

0

1

0 1Y

X

Y

X

Z

0 1 3 2

4 5 7 6

YZ

X

0

00 01 11 10

1

1 3 2

4 5 7 6

8 9 1011

12 13 1415

0

FIGURE!2-12Map Structures

M02_MANO0637_05_SE_C02.indd 63 23/01/15 1:47 PM

1

1

• Sometimes we don’t care what the output is when the inputs are in certain combinations

X

1

1

1X X

F = YZ + WX

Page 18: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Don’t Care Condition

Demo

P1 Optimisation

2-4 / Two-Level Circuit Optimization 63

than sum- of- products and product- of- sums, the gate- input count must be deter-mined directly from the implementation.

Regardless of the cost criteria used, we see later that the simplest expression is not necessarily unique. It is sometimes possible to !nd two or more expressions that satisfy the cost criterion applied. In that case, either solution is satisfactory from the cost standpoint.

Map Structures

We will consider maps for two, three, and four variables as shown in Figure"2-12. The number of squares in each map is equal to the number of minterms in the corre-sponding function. In our discussion of minterms, we de!ned a minterm mi to go with the row of the truth table with i in binary as the variable values. This use of i to

(a) (b)

0

1

0 1Y

X

X Y X Y

X YX Y

(c) (d)

ZX

ZX

0

6 4

13

57

2

X Z

02

8 10

1 3911

(f)(e)

00

01

00 01YZ

WX

Y

Z

W

11 10

11

10

X

X Z

0 1

2 3 X

Y

0

1

0 1Y

X

Y

X

Z

0 1 3 2

4 5 7 6

YZ

X

0

00 01 11 10

1

1 3 2

4 5 7 6

8 9 1011

12 13 1415

0

FIGURE!2-12Map Structures

M02_MANO0637_05_SE_C02.indd 63 23/01/15 1:47 PM

1

1

• Sometimes we don’t care what the output is when the inputs are in certain combinations

X

1

1

1X X

F = YZ + WZ

Page 19: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Summary

• Boolean Algebra III: K-Map

• Two Variable K-Map

• Three Variable K-Map

• Four Variable K-Map

• Don’t care optimisation

Review

P1 Optimisation

Page 20: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Exercises

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Exerci

se

P1 Optimisation

F(X, Y, Z) = Σm(0,2,6,7)

Page 21: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Exercises

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Exerci

se

P1 Optimisation

F(X, Y, Z) = Σm(0,2,6,7)

1 1

1 1

Page 22: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Exercises

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Exerci

se

P1 Optimisation

F(X, Y, Z) = Σm(0,2,6,7)

1 1

1 1

Page 23: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Exercises

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Exerci

se

P1 Optimisation

F(X, Y, Z) = Σm(0,1,2,4)

Page 24: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Exercises

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Exerci

se

P1 Optimisation

F(X, Y, Z) = Σm(0,1,2,4)

1 1 1

1

Page 25: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Exercises

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Exerci

se

P1 Optimisation

F(X, Y, Z) = Σm(0,1,2,4)

1 1 1

1

Page 26: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Exercises

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Exerci

se

P1 Optimisation

F(X, Y, Z) = Σm(0,2,3,4,6)

Page 27: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Exercises

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Exerci

se

P1 Optimisation

F(X, Y, Z) = Σm(0,2,3,4,6)

1 1 1

1 1

Page 28: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Exercises

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Exerci

se

P1 Optimisation

F(X, Y, Z) = Σm(0,2,3,4,6)

1 1 1

1 1

Page 29: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Exercises

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Exerci

se

P1 Optimisation

F(X, Y, Z) = Σm(0,2,3,4,5,7)

Page 30: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Exercises

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Exerci

se

P1 Optimisation

F(X, Y, Z) = Σm(0,2,3,4,5,7)

1 1 1

1 1 1

Page 31: #04-2020-1002-107 Lecture2 Combinational Logical …...2020/06/04  · Lecture 2: Combinational Logical Circuits IV Jetic Gū 2020 Summer Semester (S2) Overview • Focus: Boolean

Exercises

• Step 1: Enter the values

• Step 2: Identify the set of largest rectangles in which all values are 1, covering all 1s

• Step 3: Read off the selected rectangles. If rectangle has odd length edges (excluding 1), split

Exerci

se

P1 Optimisation

F(X, Y, Z) = Σm(0,2,3,4,5,7)

1 1 1

1 1 1