zrs rev : a01 · 2014. 1. 7. · ps2 page 22,23,24,25 page 10,11,12,13,14,15 pcie bus 1394 conn....

62
5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date: Sheet of LA-2881P 2.0 Cover Sheet 1 62 Tuesday, December 13, 2005 Compal Electronics, Inc. ZRS uFCPGA Yonah 12/13/2005 REV : 2.0 Yonah Schematics with Capture CIS and Function Field REV : A01 DELL CONFIDENTIAL/PROPRIETARY PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. Config. TABLE Project Config. @ : Nopop Component 3@ : ZRS with discrete Used Only 1@ : ZUMA Used Only 2@ : Riker Used Only 4@ : ZUMA & Zanzibar Used Only with BCM4401E w/o Docking and Smart card 5@ : Rikers & Suva Used Only with BCM5752/Docking/Smart Card ZUMA 1@ + 4@ +7@ Zanzibar 3@ + 4@ + 7@ Rikers 2@ + 3@ + 5@ + 7@ Suva 3@ + 5@ + 6@ 6@ : Suva Used Only 7@ : Rikers/Zanzibar/ZUMA Used Only

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Page 1: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Cover Sheet

1 62Tuesday, December 13, 2005

Compal Electronics, Inc.

ZRS

uFCPGA Yonah12/13/2005REV : 2.0

Yonah Schematics with Capture CIS and Function Field

REV : A01

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Config. TABLE

Project Config.

@ : Nopop Component

3@ : ZRS with discrete Used Only

1@ : ZUMA Used Only2@ : Riker Used Only

4@ : ZUMA & Zanzibar Used Only with BCM4401E w/o Docking and Smart card 5@ : Rikers & Suva Used Only with BCM5752/Docking/Smart Card

ZUMA 1@ + 4@ +7@

Zanzibar 3@ + 4@ + 7@

Rikers 2@ + 3@ + 5@ + 7@

Suva 3@ + 5@ + 6@

6@ : Suva Used Only7@ : Rikers/Zanzibar/ZUMA Used Only

Page 2: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Block Diagram

2 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

page 26HDD

Super I/O

PCI BUS

DDRII-SODIMM X2

Yonah

page 26

GMCH-M

ATA100

page 7,8,9

page 39

LPC BUS

page 17,18

page 19

page 20

Fan Control

& TV-OUT

uFCPGA CPU

IDSEL:AD17(PIRQA/B#,GNT#2,REQ#2)

MEC5004

VGA CONN.

IMVP6 VCORE3 Phase

page 6

LPC to X-BUS

page 16

HA#(3..31)

Calistoga

page 48

PCI-E 16X

Clock Generator

HD#(0..63)

USBPORT 6

USBPORT 7

DC IN

CK410M+

USBPORT 0

page 33

Int.KBD

BANK 0, 1, 2, 3

USBPORT 1

DMI

CDROM

CHARGER

ICH7-M

3.3V 33MHz

USBPORT 2

USBPORT 3

CRT CONN. System Bus

USBPORT 4

652 BGA

SPI

Memory Card &1394 ControllerRICOH R5C832

USBPORT 5

Block Diagram

VGABoard

1.5V100MHz

1466 FC-BGA

Azalia

page 43

page 49

RJ45 withGigaMagnetic

LOMBCM5752

page 32

page 31

BATT IN/+2.5Vpage 44

SMBus

LED Controller PAC9532

page 41

SMBus

Rikers Used Only

USB2.0

page 16

Multi-media

Media/Touch Pad

Board

page 34

MINICard

ExpressCard

page 34

ECE5018

page 37

SATA3.3V or 5V SATA

page 27STAC9200

Azalia CODEC

48MHz / 480Mb

5 in 1 CONN.page33

+3.3V_ALWST M25P80

GUARDIAN IIEMC4000

Thermal

+3.3V_SUS

page 37

533 / 667 MHz

1.8V 533 / 667 MHz

page 47

1.8V / 0.9V

1.5V/1.05V(+VCCP)page 46

page39

GPIO

MemoryBUS(DDRII)

Touch Padpage 39

page 29

MDC

AMP &

page 28

Phone Jack Subwooferpage 29

PS2

page 22,23,24,25

page 10,11,12,13,14,15

PCIe BUS

1394 CONN.page33

page 30

page 38

Compal confidential

page 34

Smart CardOZ77C6

3.3V 33MHz

DockingBuffer

page 35

DockingPort

page 36

Intel 945PM/945GM

Intel 82801GBM

IO PORT

Slot

CONN.

3.3V/5V/15Vpage 45

USB2

Ext. USB

Ext. USB

Ext. USB

Ext. USB

Ext. USB

Ext. USB

SIO ECE5018

Dock

USB

USB1USB3

USB0

USB5

Bluetooth USB4

page 28

LOM4401E

page 31

Page 3: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Index and Config.

3 62Tuesday, December 13, 2005

Compal Electronics, Inc.

PIRQ

+1.05V_VCCP

PM TABLE

PCI DEVICE IDSEL

S0

PCI TABLE

S3

+3.3V_SUS+5V_SUS

+5V_ALW

S1

S5 S4/AC don't exist

+1.8V_RUN

+VCC_CORE

REQ#/GNT#

+5V_RUN

ON

powerplane

+3.3V_RUN

S5 S4/AC

+3.3V_ALWState

+1.8V_SUS

OFF

ON

ON

ON

ON

ON

ON ON

ON

OFF

OFF

OFF

OFFOFF

+0.9V_DDR_VTT

LAN

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

JUSB_S (Ext Side Top)

JUSB_S (Ext Side Bottom)

JUSB_R (Ext Back Right Bottom)

JUSB_R (Ext Back Right Top)

JUSB_L (Ext Back Left Top)

JUSB_L (Ext Back Left Bottom)

2

3

1

4

USB PORT#

0

Description

6

5

SUPER I/O ECE5018

7 DOCKING

ICH7-M

SMART CARD

MINI CARD WLAN

EXPRESS CARD

BLUE TOOTH

2

3

1

4

0

ICH7-M

ECE5018

MINI CARD WLAN

GIGA LAN

No

EXPRESS CARD

PCI EXPRESS

Lane 1

DESTINATION

Lane 2

Lane 3

Lane 4

+15V_SUS

+3.3V_SRC

+2.5V_RUN

Dock

REQ#3/GNT#3AD16 IRQB

AD24 REQ#0/GNT#0 IRQA

R5C832 AD17 REQ#2/GNT#2 IRQC,D

SIO

Page 4: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Power Rail

4 62Tuesday, December 13, 2005

Compal Electronics, Inc.

+3.3V_ALW

+5V_SUS

BATTERY

+PWR_SRC

ADAPTER

+VCC_CORER

UN

_ON

SU

S_O

N

+5V_HDD +5V_MOD +5V_RUN +VDDA

+1.5V_RUN

+15V_SUS

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Charger

PJP20

PJP19( Option )

AUD

IO_A

VD

D_O

N

L31(Option)

+3.3V_SRC+3.3V_SUS

SUS_ON

RUN_ON+3.3V_RUN

SI3456(Q22)

HD

DC

_EN

#

SI3456(Q24)

MO

DC

_EN

#

SI4810(Q61)

RU

N_O

N 793475(U12)

( Option )

PL8 & PD8

+3.3V_LAN

REGCTL_PNP12

REGCTL_PNP25

+1.2V_1.8V_LAN

+2.5V_LAN

MMJT9435T1G( Q102 )

BCP69( Q103 )

ISL6220(PU8)

ENAB_3VLAN

ISL6227(PU5)

RU

NP

WR

OK

+1.05V_VCCP

MAX8632(PU6)

+1.8V_SUS +0.9V_DDR_VTT

RU

N_O

N

RU

N_O

N

SU

SP

WR

OK

_5V

5752 Only

+3.3V_ALW

ALWON+5V_ALW

ALWON

+2.5V_RUNGuardian II

Page 5: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

SMBUS TOPOLOGY

5 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

+3.3V_SUS

2N7002

CHARGER

2N7002

+3.3V_RUN

8

7

5

6

7

8

SMBUS Address [D2]

SMBUS Address [5E]

2.2K 2.2K 2.2K 2.2K

Express Card

SMBUS Address [TBD]

8 7

MINI WLAN Card

3032

SMBUS Address [TBD]

CLK_SCLK

CLK_SDATA

+3.3V_ALW

2.2K 2.2K

B22

C22

17

16

CLK GEN.

Macallan IV

ICH7-M

DAT_SMB

39

40

+3.3V_ALW

CLK_SMB

GUARDIAN

ICH_SMBDATA +3.3V_SUS

ICH_SMBCLK

PBAT_SMBCLK

PBAT_SMBDAT +3V_ALWBATTERYCONN

5752MLOM

C8C7

SMBUS Address [C8]

100

100

SMBUS Address [16]

SMBUS Address [12]

3

4

9

10

DiscreteGraphic SMBUS Address [98]

SBAT_SMBDAT111

112

+3.3V_ALW

+3.3V_ALW

SMBUS Address [58]5

6SBAT_SMBCLKInverterLVDS connector

2.2K 2.2K

10K 10K

SMBUS Address [C4, 72, 70, 48]

DOCK_SMB_CLK

+5V_ALW

10

+5V_ALW

DOCK

9

DOCK_SMB_DATSIO

195

SMBUS Address [A0]

DIMMB

DIMMA

SMBUS Address [A4]

197

197

195

10

8

LED PWM22

23SMBUS Address [C0]

+3.3V_ALW

2.2K 2.2K

Page 6: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CPU_ITP#

CLK_CPU_ITP

CLK_CPU_ITP#

CPU_ITP

H_STP_CPU#

CLK_MCH_BCLK#MCH_BCLK#

CPU_BCLK

CLK_CPU_BCLK#CPU_BCLK#

CLK_CPU_BCLK

+CK_VDD_A

CLK_XTAL_IN

CLK_CPU_BCLK#

CLK_CPU_BCLK

CLK_MCH_BCLK

CLK_MCH_BCLK#

CLK_CPU_ITP#

CLK_PCIE_LOM

CLK_MCH_3GPLL

CLK_MCH_3GPLL#

CLK_PCIE_SATA#

CLK_PCIE_SATA

CLK_PCIE_ICH#

CLK_PCIE_ICH

ICH_SMBDATA

ICH_SMBCLK

CLK_SDATA

CLK_SCLK

+CK_VDD_A

CPU_MCH_BSEL1

FSC

CLK_ICH_48M

CLK_SIO_14M

DOT96

CLK_ENABLE#

CLKIREF

CLK_SDATA

CLK_SCLK

PCI_SIO

PCI_DOCKCLK_PCI_DOCK

CLK_PCI_PCCARD

CLK_PCIE_VGA

CLK_MCH_BCLKMCH_BCLK

SATA_CLKREQ#

CLK_3GPLLREQ#

CLK_CPU_ITP

FSA

PCI_PCCARD

H_STP_PCI#

CLK_PCIE_VGA#

CLK_SMCARD_48M

CLK_PCI_ICH PCI_ICH

PCIE_VGA CLK_PCIE_VGA

CLK_PCIE_VGA#PCIE_VGA#

DREF_SSCLK

DREF_SSCLK#

DOT96_SSC

DOT96_SSC#

DREF_SSCLK

DREF_SSCLK#

MCH_DREFCLK

DOT96#MCH_DREFCLK#

CLK_PCIE_SATA#

CLK_PCIE_SATAPCIE_SATA

PCIE_SATA#

CLK_PCIE_ICH

CLK_PCIE_ICH#

PCIE_ICH

PCIE_ICH#

CLK_MCH_3GPLL

CLK_MCH_3GPLL#

MCH_3GPLL

MCH_3GPLL#

CLK_PCIE_LOM

CLK_PCIE_LOM#

PCIE_LOM

PCIE_LOM#

PCIE_MINI

PCIE_MINI#

CLK_PCIE_MINI

CLK_PCIE_MINI#

CLK_PCIE_MINI

CLK_PCIE_MINI#

MCH_DREFCLK#

MCH_DREFCLK

PCIE_EXPCARD CLK_PCIE_EXPCARD

PCIE_EXPCARD# CLK_PCIE_EXPCARD#

CLK_PCIE_EXPCARD

CLK_PCIE_EXPCARD#

+CK_VDD_48

+CK_VDD_REF

+CK_VDD_48

+CK_VDD_REF

MINICLK_REQ#

CLK_XTAL_OUT

CPU_MCH_BSEL0FSA

CLK_PCI_LAN

CARD_CLK_REQ#

CLK_PCIE_LOM#

PCI_LOM

CLK_PCI_5018

CLKREF

CLK_PCI_LAN_LPC

PCI_SIO

CLK_ICH_14M

CLK_PCI_5004

+CK_VDD_MAIN

+CK_VDD_MAIN2

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

H_STP_PCI# <23>

CLK_MCH_BCLK# <10>

CLK_MCH_BCLK <10>

CLK_CPU_BCLK# <7>

CLK_CPU_BCLK <7>

CLK_CPU_ITP <7>

CLK_CPU_ITP# <7>

ICH_SMBCLK<23,30,34>

ICH_SMBDATA<23,30,34> CLK_SDATA <17,18>

CLK_SCLK <17,18>

CLK_ICH_48M<23>

CLK_ICH_14M<23>

CLK_SIO_14M<37>

CLK_PCI_5018<37>

CLK_PCI_LAN_LPC<30>

CLK_PCI_DOCK<36>

CLK_PCI_PCCARD<33>

H_STP_CPU# <23>

CLK_PCI_5004<38>

CLK_SMCARD_48M<34>

CLK_PCI_ICH<21>

CLK_PCIE_VGA# <19>

CLK_PCIE_VGA <19>

DREF_SSCLK <10>

DREF_SSCLK# <10>

MCH_DREFCLK<10>

MCH_DREFCLK#<10>

CLK_PCIE_SATA <22>

CLK_PCIE_SATA# <22>

CLK_PCIE_ICH# <23>

CLK_PCIE_ICH <23>

CLK_MCH_3GPLL <10>

CLK_MCH_3GPLL# <10>

CLK_PCIE_LOM# <30>

CLK_PCIE_LOM <30>

CLK_PCIE_MINI <34>

CLK_PCIE_MINI# <34>

CLK_PCIE_EXPCARD <34>

CLK_PCIE_EXPCARD# <34>

SATA_CLKREQ# <23>

CLK_3GPLLREQ# <10>

CARD_CLK_REQ# <34>

MINICLK_REQ# <34>

CPU_MCH_BSEL1<8,10>

CPU_MCH_BSEL2<8,10>

CLK_ENABLE#<48>

CPU_MCH_BSEL0<8,10,12>

CLK_PCI_LAN<31>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Clock Generator

6 62Tuesday, December 13, 2005

Compal Electronics, Inc.

Table : ICS954305AK

1

*

CLKSEL2 CLKSEL0CLKSEL1FSC FSB FSA CPU

MHzSRCMHz

PCIMHz

266

133

200

166

333

100

400

100

100

100

100

100

100

100

33.3

33.3

33.3

33.3

33.3

33.3

33.3

0 0 0

00

0

0

0

00

0

0

1

1

1 1

1

1

1

1 1

1

1

CPU_BSEL CPU_BSEL2(FSC) CPU_BSEL1(FSB)

133

166

0

0

0

1

Place near each pinW>40 mil

Place near CK410+

DELL CONFIDENTIAL/PROPRIETARY

Reserve

FCTSEL1(PIN34) PIN44 PIN47 PIN48

0

1

DOT96T DOT96C 96/100M_T 96/100M_C

27M_out 27M SSout SRCT0 SRCC0

PIN43

Place crystal within500 mils of CK410M

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Trace length between R255.2, R222.2 and R579.2 =< 50 milsTrace length between R176.2, R175.2 =< 50 milsTrace length between R191.2, R190.2 =< 50 mils

Layout Notes:

31

G S2N7002

2

D

Solder Thermal Pad to GND. Add Min. 4 vias.

R589 10K_0402_5%~D

1 2

R224 33_0402_5%~D

1 2

R175 15_0402_5%~D

1 2

R282 33_0402_5%~D5@1 2

C504

0.1U_0402_16V4Z~D

1

2

U16

ICS954305EKLFT_MLF72~D

VDDSRC1VDDSRC49

VDDSRC65

VDDPCI30VDDPCI36

VDD4840

VDDCPU12

VDDREF18

USB_48MHz/FSLA41

FSLB/TEST_MODE45

XOUT19

XIN20

GNDPCI31

PCICLK232

REF0/FSLC/TEST_SEL23

SMBDAT17

SMBCLK16

ITP_EN/PCICLK_F037

IREF9

CPU_STOP# 24

CPUT1 11

CPUC1 10

CPUT_ITP/SRCT10 6

PCICLK333

PCICLK4/FCTSEL134

CPUC0 13

CPUT0 14

PCI_STOP# 25

GNDA 8

VDDA 7

GNDPCI35

CPUC_ITP/SRCC10 5

GNDREF21

GNDCPU15

GNDSRC4

GND4842

GNDSRC68

DOTT_96MHz/27MHz43

DOTC_96MHz/27MHz44

Vtt_PwrGd#/PD39

REF122 SRCT7 66

SRCC7 67

SRCT8 70

SRCC8 69

SRCT9 3

SRCC9 2

SRCC1 51

LCD100/96/SRC0_T 47

SRCT2 52

SRCT4 58

SRCT1 50

CLKREQ4# 57

SRCC2 53

SRCC5 61

SRCC4 59

SRCT5 60

LCD100/96/SRC0_C 48

SRCC3 56

SRCT3 55

SRCT6 63

SRCC6 64

CLKREQ6# 62

CLKREQ8# 71

CLKREQ9# 72

CLKREQ1# 46

CLKREQ5# 29

CLKREQ3# 28

CLKREQ2# 26

CLKREQ7# 38

VDDSRC54

PCICLK127

THRM_PAD73

THRM_PAD76

THRM_PAD74THRM_PAD75

R176 15_0402_5%~D

1 2

C499

10U_0805_10V4Z~D

1

2

R291 49.9_0402_1%~D

1 2

R271 49.9_0402_1%~D

1 2

R287 49.9_0402_1%~D

1 2

R5821_0603_5%~D 1 2

R292 49.9_0402_1%~D

1 2

R204

10K_0402_5%~D3@

12

C534

10U_0805_10V4Z~D

R5562.2_0603_5%~D 1 2

R285 33_0402_5%~D3@1 2

L48

BLM21PG600SN1D_0805~D

1 2

R248 33_0402_5%~D

1 2

R5852.2_0603_5%~D

1 2

R236 33_0402_5%~D1@1 2

R289 49.9_0402_1%~D

1 2

R180 10K_0402_5%~D

1 2

R281 33_0402_5%~D

1 2

R590 10K_0402_5%~D

1 2

R241 33_0402_5%~D1@1 2

R232

2.2K_0402_5%

~D

12

C532

4.7U_0805_10V4Z~D

1

2

C520

0.1U_0402_16V4Z~D

1

2

R563 475_0603_1%~D

1 2

R255 33_0402_5%~D

1 2

R239 33_0402_5%~D

1 2

R284 33_0402_5%~D3@1 2

C528

0.047U_0402_10V7K~D

1

2

R258 49.9_0402_1%~D

1 2

R566 10K_0402_5%~D 1 2

C6990.1U_0402_16V4Z~D

1

2

R293 49.9_0402_1%~D5@1 2

R230 49.9_0402_1%~D

12

R265 49.9_0402_1%~D

1 2

R233

2.2K_0402_5%

~D

12

R273 49.9_0402_1%~D

1 2

R247 49.9_0402_1%~D

12

R202 33_0402_5%~D

12

R295 49.9_0402_1%~D3@1 2

C512

0.1U_0402_16V4Z~D

1

2

R279 33_0402_5%~D

1 2

C23627P_0402_50V8J~D

1 2

R264 33_0402_5%~D 1 2

R260 33_0402_5%~D

1 2

R254 49.9_0402_1%~D

12

R278 33_0402_5%~D

1 2

R277 33_0402_5%~D

1 2

C508

4.7U_0805_10V4Z~D

1

2

R259 49.9_0402_1%~D

12

G

D S

Q522N7002_SOT23~D

2

1 3

C531

0.1U_0402_16V4Z~D

1

2

R201 33_0402_5%~D

12

R579 8.2K_0402_5%~D

1 2

R257 33_0402_5%~D 1 2

R206 15_0402_5%~D4@1 2

Y1

14.31818MHz_20P_1BX14318CC1A~D

12

C509

0.1U_0402_16V4Z~D

1

2

R203

10K_0402_5%~D1@

12

R588 8.2K_0402_5%~D 12

R222 15_0402_5%~D

1 2

R575

10K_0402_5%~D@

12

R283 33_0402_5%~D5@1 2

R228 33_0402_5%~D1@1 2

R252 33_0402_5%~D1@1 2

R223 49.9_0402_1%~D

12

R242 49.9_0402_1%~D1@1 2

R205 15_0402_5%~D

1 2

R290 49.9_0402_1%~D

1 2

C525

0.047U_0402_10V7K~D

1

2

R199 220_0402_5%~D 12

C511

0.047U_0402_10V7K~D

1

2

R200 33_0402_5%~D

12

R280 33_0402_5%~D

1 2

R191 15_0402_5%~D

1 2

G

D S

Q512N7002_SOT23~D

2

1 3

R213 15_0402_5%~D

1 2

L51

BLM21PG600SN1D_0805~D

1 2

R237 49.9_0402_1%~D1@1 2

R578

10K_0402_5%~D

12

R294 49.9_0402_1%~D5@1 2

R288 49.9_0402_1%~D

1 2

C23227P_0402_50V8J~D

1 2

R190 15_0402_5%~D

1 2

R231 33_0402_5%~D

1 2

R547 10K_0402_5%~D

1 2

R296 49.9_0402_1%~D3@1 2

C506

0.1U_0402_16V4Z~D

1

2

R272 33_0402_5%~D

1 2

R229 49.9_0402_1%~D1@1 2

R253 49.9_0402_1%~D1@1 2

R238 49.9_0402_1%~D

12

R270 33_0402_5%~D

1 2

C530

0.1U_0402_16V4Z~D

1

2

R276 33_0402_5%~D

1 2

Page 7: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ITP_TDO

ITP_TMS

ITP_TDI

ITP_TRST#

ITP_TCK

ITP_DBRESET#

H_THERMTRIP#

H_RESET#

H_IGNNE#

H_DSTBP#1

H_D#63

H_D#37

H_D#17

H_PWRGOOD

H_RS#1

H_A#19

H_A#16

H_STPCLK#

H_FERR#

H_D#61

H_D#59

H_D#49

H_D#43

H_D#40

H_D#8

H_D#4

H_D#2

ITP_BPM#3

H_IERR#

H_DRDY#

H_BR0#

H_A#7

H_A#4

H_DINV#3

H_D#58

H_D#13

H_INIT#

H_DSTBN#3

H_D#30

H_D#20

CPU_PROCHOT#

H_RESET#

H_ADS#

H_REQ#2

H_A#30

H_A#24

H_A#18H_A#17

H_DSTBP#2

H_DSTBN#2

H_DINV#0

H_D#57

H_D#28

H_D#19H_A#21

H_DINV#1

H_D#60

H_D#52

H_D#50

H_D#23

H_D#18

H_D#15

H_D#10

ITP_TRST#

H_DPWR#

H_DPSLP#

H_TRDY#

H_A#29

H_A#11

H_DSTBP#0

H_DSTBN#1

H_D#22

H_D#6

ITP_DBRESET#

ITP_BPM#2

H_RS#0

H_HITM#

H_A#15

H_DPRSTP#

TEST2

H_RS#2

H_HIT#

CLK_CPU_BCLK#

H_D#51

H_D#41

H_D#34

H_D#24

ITP_BPM#5

H_A#27

H_A#20

H_SMI#

H_INTR

H_D#54

H_D#38

H_D#29

H_D#21

H_D#7

H_DBSY#

H_REQ#3

H_REQ#1

H_A#9

H_THERMTRIP#

H_NMI

H_D#56

H_D#42

H_D#26

H_D#5

H_D#3

ITP_BPM#4

H_A#22

H_D#53

H_D#32

H_D#14

H_CPUSLP#

ITP_BPM#1ITP_BPM#0

H_A#5

H_D#48

H_D#45

ITP_TDO

H_BNR#

H_A#26H_A#25

H_A#10

H_DINV#2

H_D#62

H_D#44

H_D#31

H_D#25

H_D#12

H_ADSTB#1

H_REQ#4

H_A#28

H_A#14

H_A#6

H_DSTBN#0

H_D#47

H_D#39

H_D#35

H_D#33

H_D#16

H_D#11

H_D#1H_D#0

ITP_TMS

ITP_TCK

H_DEFER#

CLK_CPU_BCLK

H_ADSTB#0

H_A#31

H_D#36

ITP_TDI H_A20M#

H_DSTBP#3

H_D#55

H_D#46

H_D#27

H_D#9

TEST1

H_LOCK#

H_BPRI#

H_REQ#0

H_A#23

H_A#13H_A#12

H_A#8

H_A#3

ITP_TDIITP_TMS

ITP_TCK

ITP_TRST#

ITP_TDO

ITP_BPM#0

ITP_BPM#1

ITP_BPM#2

ITP_BPM#4

ITP_BPM#5

ITP_DBRESET#

ITP_TCK

ITP_BPM#3

CLK_CPU_ITP#CLK_CPU_ITP

H_RESET#

H_THERMDAH_THERMDC

ITP_BPM#5

+1.05V_VCCP

+1.05V_VCCP

+3.3V_SUS

+1.05V_VCCP

+1.05V_VCCP

+1.05V_VCCP

+1.05V_VCCP

H_THERMTRIP#<16>

H_ADS#<10>

H_REQ#0<10>

H_A#[3..31]<10>

H_BPRI#<10>H_BNR#<10>

CLK_CPU_BCLK#<6>

H_DEFER#<10>

H_HITM#<10>

H_BR0#<10>

CLK_CPU_BCLK<6>

H_HIT#<10>

H_D#[0..63] <10>

H_DPSLP#<22>

H_RESET#<10>

H_DRDY#<10>

H_TRDY#<10>

H_RS#0<10>

H_ADSTB#0<10>

H_DSTBN#1 <10>

H_ADSTB#1<10>

H_DSTBN#0 <10>

H_DINV#0 <10>

H_DINV#2 <10>

H_DBSY#<10>

H_DINV#1 <10>

H_LOCK#<10>

H_DINV#3 <10>

ITP_DBRESET#<23,38>

H_PWRGOOD<22>H_CPUSLP#<10,22>

H_DPWR#<10>H_DPRSTP#<22,48>

CPU_PROCHOT#<37>

H_RS#1<10>H_RS#2<10>

H_DSTBN#3 <10>H_DSTBN#2 <10>

H_DSTBP#1 <10>H_DSTBP#0 <10>

H_DSTBP#2 <10>

H_REQ#1<10>H_REQ#2<10>H_REQ#3<10>H_REQ#4<10>

H_IGNNE# <22>

H_A20M# <22>

H_NMI <22>

H_SMI# <22>

H_DSTBP#3 <10>

H_INTR <22>H_INIT# <22>

H_STPCLK# <22>

CLK_CPU_ITP#<6>CLK_CPU_ITP<6>

H_THERMDA<16>

H_THERMDC<16>

H_FERR# <22>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Yonah Processor(1/2)

7 62Tuesday, December 13, 2005

Compal Electronics, Inc.

This shall place near CPU

Place near JITP

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

H_THERMDA, H_THERMDC routing together,Trace width / Spacing = 10 / 10 mil

Populate R718 for Yonah B0 and forward.

Notes: Can be nopop on X00 board.

C20

2200P_0402_50V7K~D@

1

2

R732680_0402_5%~D

C695

0.1U_0402_16V4Z~D

@

1

2

R729150_0402_5%~D 1 2

R715

56_0402_5%~D

1 2

R718 51_0402_5%~D 1 2

R73554.9_0402_1%~D@

R72156_0402_5%~D 1 2

R714

1K_0402_5%~D@1 2

R576

75_0402_5%~D

12

R73339_0402_5%~D

C697

0.1U_0402_16V4Z~D

@

1

2

R734150_0402_5%~D

R73127_0402_5%~D

R72351_0402_5%~D

R72622.6_0402_1%~D

1 2

JITP

MOLEX_52435-2891_28P~D@

TDI1 TMS2 TRST#3 NC14 TCK5 NC26 TDO7 BCLKN8 BCLKP9 GND010 FBO11 RESET#12 BPM5#13

BPM4#15

BPM3#17

BPM2#19

BPM1#21

BPM0#23 DBA#24 DBR#25 VTAP26 VTT027 VTT128

GND114

GND216

GND318

GND420

GND522

GN

D6

29G

ND

730

ADDR GROUP

CONTROL

HOST CLK

MISC

DATA GROUP

THERMALDIODE

LEGACY CPU

YONAHJCPUA

TYCO_1-1674770-2_Yonah~D

A3#J4A4#L4A5#M3A6#K5A7#M1A8#N2A9#J1A10#N3A11#P5A12#P2A13#L1A14#P4A15#P1A16#R1A17#Y2A18#U5A19#R3A20#W6A21#U4A22#Y5A23#U2A24#R4A25#T5A26#T3A27#W3A28#W5A29#Y4A30#W2A31#Y1

REQ0#K3REQ1#H2REQ2#K2REQ3#J3REQ4#L5

ADSTB0#L2ADSTB1#V4

BCLK0A22BCLK1A21

ADS#H1BNR#E2BPRI#G5BR0#F1DEFER#H5DRDY#F21HIT#G6HITM#E4IERR#D20LOCK#H4RESET#B1

RS0#F3RS1#F4RS2#G3TRDY#G2

BPM0#AD4BPM1#AD3BPM2#AD1BPM3#AC4

DBR#C20DBSY#E1DPSLP#B5

DPWR#D24PRDY#AC2PREQ#AC1PROCHOT#D21

PWRGOODD6SLP#D7TCKAC5TDIAA6TDOAB3TEST1C26TEST2D25TMSAB5TRST#AB6

THERMDAA24THERMDCA25THERMTRIP#C7

D0# E22D1# F24D2# E26D3# H22D4# F23D5# G25D6# E25D7# E23D8# K24D9# G24

D10# J24D11# J23D12# H26D13# F26D14# K22D15# H25D16# N22D17# K25D18# P26D19# R23D20# L25D21# L22D22# L23D23# M23D24# P25D25# P22D26# P23D27# T24D28# R24D29# L26D30# T25D31# N24D32# AA23D33# AB24D34# V24D35# V26D36# W25D37# U23D38# U25D39# U22D40# AB25D41# W22D42# Y23D43# AA26D44# Y26D45# Y22D46# AC26D47# AA24D48# AC22D49# AC23D50# AB22D51# AA21D52# AB21D53# AC25D54# AD20D55# AE22D56# AF23D57# AD24D58# AE21D59# AD21D60# AE25D61# AF25D62# AF22D63# AF26

DINV0# J26DINV1# M26DINV2# V23DINV3# AC20

DSTBN0# H23DSTBN1# M24DSTBN2# W24DSTBN3# AD23DSTBP0# G22DSTBP1# N25DSTBP2# Y25DSTBP3# AE24

A20M# A6FERR# A5

IGNNE# C4INIT# B3

LINT0 C6LINT1 B4

STPCLK# D5SMI# A3

DPRSTP#E5

R73051_0402_5%~D

R72522.6_0402_1%~D

1 2

Page 8: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

COMP0

COMP3

COMP1COMP2

VSSSENSEVCCSENSE

CPU_MCH_BSEL2CPU_MCH_BSEL1

H_PSI#

VID0VID1VID2VID3VID4VID5VID6

CPU_MCH_BSEL0

VSSSENSE

VCCSENSE

+1.05V_VCCP

+VCC_CORE

+1.05V_VCCP

V_CPU_GTLREF

+1.5V_RUN

+VCC_CORE

V_CPU_GTLREF

+VCC_CORE

H_PSI#<48>

VID0<48>VID1<48>VID2<48>VID3<48>VID4<48>VID5<48>VID6<48>

VCCSENSE<48>VSSSENSE<48>

CPU_MCH_BSEL0<6,10,12>CPU_MCH_BSEL1<6,10>CPU_MCH_BSEL2<6,10>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Yonah Processor(2/2)

8 62Tuesday, December 13, 2005

Compal Electronics, Inc.

Resistor placed within0.5" of CPU pin.Traceshould be at least 25mils away from anyother toggling signal.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Length match within 25 mils

CPU_BSEL CPU_BSEL2 CPU_BSEL1

133

166

0 0

0 1

CPU_BSEL0

1

1

Layout close CPU PIN AD260.5 inch (max)

Layout Note:COMP0,2 connect with Z0=27.4 ohm, make trace length shorter than 0.5".COMP1,3 connect with Z0=55.5 ohm, make trace length shorter than 0.5".

Place R719 and R722 near CPU

Route VCCSENSE and VSSSENSE trace at27.4 ohms, 50 mils spacing and 1 inch (max)

Close to pin B26

POWER, GROUNG, RESERVED SIGNALS AND NC

YONAH

JCPUB

TYCO_1-1674770-2_Yonah~D

PSI#AE6

GTLREFAD26

VCCSENSEAF7

VCCAB26

VCCAB20VCCAA20VCCAF20VCCAE20VCCAB18VCCAB17VCCAA18VCCAA17VCCAD18VCCAD17VCCAC18VCCAC17VCCAF18VCCAF17

RSVDT22

RSVDV3RSVDB2RSVDC3

VSS AB26VSS AA25VSS AD25VSS AE26VSS AB23VSS AC24VSS AF24VSS AE23VSS AA22VSS AD22VSS AC21VSS AF21VSS AB19VSS AA19VSS AD19VSS AC19VSS AF19VSS AE19VSS AB16VSS AA16VSS AD16VSS AC16VSS AF16VSS AE16VSS AB13VSS AA14VSS AD13VSS AC14VSS AF13VSS AE14VSS AB11VSS AA11VSS AD11VSS AC11VSS AF11VSS AE11VSS AB8VSS AA8VSS AD8VSS AC8VSS AF8VSS AE8VSS AA5VSS AD5VSS AC6VSS AF6VSS AB4VSS AC3VSS AF3VSS AE4VSS AB1VSS AA2VSS AD2VSS AE1VSS B6VSS C5VSS F5VSS E6VSS H6VSS J5VSS M5VSS L6VSS P6VSS R5VSS V5VSS U6VSS Y6VSS A4VSS D4VSS E3VSS H3VSS G4VSS K4VSS L3VSS P3VSS N4VSS T4VSS U3VSS Y3VSS W4VSS D1VSS C2VSS F2VSS G1RSVDB25

VSSSENSEAE7

VCCPK6VCCPJ6VCCPM6VCCPN6VCCPT6VCCPR6VCCPK21VCCPJ21VCCPM21VCCPN21VCCPT21VCCPR21VCCPV21VCCPW21VCCPV6VCCPG21

VID0AD6VID1AF5VID2AE5VID3AF4VID4AE3VID5AF2VID6AE2

BSEL0B22BSEL1B23BSEL2C21

COMP0R26COMP1U26COMP2U1COMP3V1

RSVDC23RSVDC24RSVDAA1RSVDAA4RSVDAB2RSVDAA3RSVDM4RSVDN5RSVDT2

RSVDD2RSVDF6RSVDD3RSVDC1RSVDAF1RSVDD22

VCCE7

R727

27.4_0402_1%~D

12

R728

54.9_0402_1%~D

12

R722

100_0402_1%~D

1 2 C21

10U_0805_10V4Z~D

1

2

R15

27.4_0402_1%~D

12

R719

100_0402_1%~D

1 2

C19

0.01U_0402_16V7K~D

1

2

R16

54.9_0402_1%~D

12

POWER, GROUND

YONAH

JCPUC

TYCO_1-1674770-2_Yonah~D

VCCAE18VCCAE17VCCAB15VCCAA15VCCAD15VCCAC15VCCAF15VCCAE15VCCAB14VCCAA13VCCAD14VCCAC13VCCAF14VCCAE13VCCAB12VCCAA12VCCAD12VCCAC12VCCAF12VCCAE12VCCAB10VCCAB9VCCAA10VCCAA9VCCAD10VCCAD9VCCAC10VCCAC9VCCAF10VCCAF9VCCAE10VCCAE9VCCAB7VCCAA7VCCAD7VCCAC7VCCB20VCCA20VCCF20VCCE20VCCB18VCCB17VCCA18VCCA17VCCD18VCCD17VCCC18VCCC17VCCF18VCCF17VCCE18VCCE17VCCB15VCCA15VCCD15VCCC15VCCF15VCCE15

VSS K1VSS J2VSS M2VSS N1VSS T1VSS R2VSS V2VSS W1VSS A26VSS D26VSS C25VSS F25VSS B24VSS A23VSS D23VSS E24VSS B21VSS C22VSS F22VSS E21VSS B19VSS A19VSS D19VSS C19VSS F19VSS E19VSS B16VSS A16VSS D16VSS C16VSS F16VSS E16VSS B13VSS A14VSS D13VSS C14VSS F13VSS E14VSS B11VSS A11VSS D11VSS C11VSS F11VSS E11VSS B8VSS A8VSS D8VSS C8VSS F8VSS E8VSS G26VSS K26VSS J25VSS M25VSS N26VSS T26VSS R25VSS V25VSS W26VSS H24VSS G23VSS K23VSS L24VSS P24VSS N23VSS T23VSS U24VSS Y24VSS W23VSS H21VSS J22VSS M22VSS L21VSS P21VSS R22VSS V22VSS U21VSS Y21

VCCB14VCCA13VCCD14VCCC13VCCF14VCCE13VCCB12VCCA12VCCD12VCCC12VCCF12VCCE12VCCB10VCCB9VCCA10VCCA9VCCD10VCCD9VCCC10VCCC9VCCF10VCCF9VCCE10VCCE9VCCB7

VCCF7 VCCA7

R716

1K_0402_1%~D

12

R717

2K_0402_1%~D

12

Page 9: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.05V_VCCP

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

CPU Bypass

9 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Place these insidesocket cavity on L8(North sideSecondary)

10uF 0805 X6S

ESR <= 1.5m ohm

High Frequence Decoupling

North Side Secondary

Near VCORE regulator

CRB was 270uF

Place these insidesocket cavity on L8(North sideSecondary)

South Side Secondary

Place these insidesocket cavity on L8(North sideSecondary)

Place these insidesocket cavity on L8(North sideSecondary)

Place these insidesocket cavity on L8(North sideSecondary)

6mOhmPS CAP

6mOhmPS CAP

6mOhmPS CAP

6mOhmPS CAP

6mOhmPS CAP

6mOhmPS CAP

+C657

330U_D2E_2.5VM~D@

1

2

C668

10U_0805_4VAM~D

1

2

C16

10U_0805_4VAM~D

1

2

C691

0.1U_0402_10V7K~D

1

2

C689

10U_0805_4VAM~D

1

2

C688

10U_0805_4VAM~D

1

2

C15

10U_0805_4VAM~D

1

2

C687

10U_0805_4VAM~D

1

2

C690

0.1U_0402_10V7K~D

1

2

C17

10U_0805_4VAM~D

1

2

C669

10U_0805_4VAM~D

1

2

C670

10U_0805_4VAM~D

1

2

C661

0.1U_0402_10V7K~D

1

2

C11

10U_0805_4VAM~D

1

2

C686

10U_0805_4VAM~D

1

2

C659

0.1U_0402_10V7K~D

1

2

+

C676

330U_D

_2VM_R

6~D@

1

2

+

C666

330U_D

_2VM_R

6~D

1

2

C5

10U_0805_4VAM~D

1

2

C682

10U_0805_4VAM~D

1

2

C672

10U_0805_4VAM~D

1

2

C4

10U_0805_4VAM~D

1

2

C674

10U_0805_4VAM~D

1

2

C658

10U_0805_4VAM~D

1

2

C664

10U_0805_4VAM~D

1

2

C18

10U_0805_4VAM~D

1

2

C673

10U_0805_4VAM~D

1

2

C681

10U_0805_4VAM~D

1

2

C692

0.1U_0402_10V7K~D

1

2

+

C667

330U_D

_2VM_R

6~D

@

1

2

C660

0.1U_0402_10V7K~D

1

2

C662

10U_0805_4VAM~D

1

2

C663

10U_0805_4VAM~D

1

2

C675

10U_0805_4VAM~D

1

2

+

C685

330U_D

_2VM_R

6~D

1

2

C10

10U_0805_4VAM~D

1

2

+

C665

330U_D

_2VM_R

6~D

1

2

C677

10U_0805_4VAM~D

1

2

C678

10U_0805_4VAM~D

1

2

+

C683

330U_D

_2VM_R

6~D

1

2

C13

10U_0805_4VAM~D

1

2

C8

10U_0805_4VAM~D

1

2

C671

10U_0805_4VAM~D

1

2

C12

10U_0805_4VAM~D

1

2

C7

10U_0805_4VAM~D

1

2

Page 10: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

THERMTRIP_MCH#

PM_EXTTS#0

PM_EXTTS#1_R

+0.9V_DDR_REF

H_VREF

H_VREF H_SWNG0 H_SWNG1

MCH_DREFCLK

DREF_SSCLK

DREF_SSCLK#

MCH_DREFCLK#

DPRSLPVR PM_EXTTS#1_R

+0.9V_DDR_REF

CFG15

DDR_CS2_DIMMB#

M_ODT0

M_CLK_DDR#3

M_CLK_DDR#1

H_HIT#

H_DEFER#

H_A#26

H_A#24

H_D#62

H_D#49

H_D#1

PLTRST1_R#

MCH_DREFCLK

CFG20

M_CLK_DDR#2

DMI_MRX_ITX_P0

H_BNR#

H_HITM#

H_DPWR#H_TRDY#

H_DSTBN#3

H_A#16

H_A#12

H_YSCOMP

H_D#43

H_D#13

CFG16

M_CLK_DDR3

DMI_MRX_ITX_P1

H_D#19

H_D#10

DDR_CS1_DIMMA#

DMI_MTX_IRX_N2

H_DINV#0

H_A#14

H_SWNG0

H_D#61H_D#60

H_D#32

MCH_ICH_SYNC#

CLK_MCH_3GPLL

CFG14

CFG9

CFG5

M_ODT2

M_OCDOCMP1

DMI_MRX_ITX_N1

H_DSTBP#2

CLK_MCH_BCLK

H_A#20

H_A#8

H_D#55

H_D#18

H_D#0

MCH_DREFCLK#

CLK_MCH_3GPLL#

DDR_CKE3_DIMMB

M_CLK_DDR0

DMI_MTX_IRX_N0

H_RESET#

H_DSTBP#3

H_ADSTB#0

H_A#7

H_D#59

H_D#33

H_D#28

DDR_CKE1_DIMMA

SMRCOMPN

DMI_MRX_ITX_N0

H_DINV#2

H_A#3

H_D#45

H_D#25

H_D#15H_D#14

H_D#2

CFG6

DDR_CS0_DIMMA#

H_DSTBN#1

H_RS#1

H_REQ#4

H_A#13

H_SWNG1

H_XRCOMP

H_D#11

H_D#3

CFG11

CFG4

DDR_CS3_DIMMB#

H_DSTBP#0

H_ADSTB#1

H_REQ#3H_REQ#2

H_A#30

H_A#19

H_D#58

H_D#41

H_D#36

H_D#22

H_D#16

H_D#6

THERMTRIP_MCH#PM_EXTTS#1_RPM_EXTTS#0

DREF_SSCLKDREF_SSCLK#

M_CLK_DDR2

DMI_MTX_IRX_P2

H_LOCK#

H_RS#2

H_REQ#1

H_A#10

H_D#63

H_D#44

H_D#42

H_D#35H_D#34

H_D#27

H_D#12CFG12

CPU_MCH_BSEL2

M_OCDOCMP0

M_CLK_DDR1

DMI_MTX_IRX_P1

H_RS#0

H_REQ#0

H_A#6

H_D#57

H_D#54

H_D#50

H_D#46

H_D#26

CPU_MCH_BSEL0

CFG8

SMRCOMPP

M_ODT1

H_DSTBN#2

H_DSTBN#0

H_A#21

H_A#17

H_D#31

PM_BMBUSY#

CFG18

CFG13

DMI_MTX_IRX_P3

DMI_MRX_ITX_N3

H_DSTBP#1

H_A#31

H_A#5

H_D#48

H_D#40

H_D#38

H_D#29

H_D#17

CFG10

DDR_CKE0_DIMMA

DMI_MTX_IRX_P0

DMI_MRX_ITX_N2

H_BPRI#

H_DINV#3

CLK_MCH_BCLK#

H_A#25

H_A#23

H_A#18

H_A#4

H_YRCOMP

H_D#53H_D#52

H_D#39

H_D#37

H_D#30

H_D#7

H_D#5

CLK_3GPLLREQ#

CFG19

CFG7

CFG3

CPU_MCH_BSEL1

M_CLK_DDR#0

DMI_MRX_ITX_P2

H_BR0#

H_ADS#

H_DINV#1

H_A#27

H_A#11

H_D#51

H_D#47

H_D#9H_D#8

ICH_PWRGD

CFG17

M_ODT3

DMI_MTX_IRX_N3

H_DBSY#

H_A#9

H_D#23

DDR_CKE2_DIMMB

DMI_MTX_IRX_N1

DMI_MRX_ITX_P3

H_CPUSLP#

H_DRDY#

H_A#29H_A#28

H_A#22

H_A#15

H_XSCOMP

H_D#56

H_D#24

H_D#21H_D#20

H_D#4

+1.05V_VCCP

+1.05V_VCCP+1.05V_VCCP+1.05V_VCCP

+3.3V_RUN

+1.8V_SUS

+1.05V_VCCP

+1.5V_RUN

H_A#[3..31] <7>

H_ADSTB#1 <7>H_ADSTB#0 <7>

H_TRDY# <7>

H_HIT# <7>H_LOCK# <7>

H_DEFER# <7>

H_BPRI# <7>

H_BR0# <7>

H_RESET# <7>

H_DPWR# <7>H_DRDY# <7>

H_DBSY# <7>

CLK_MCH_BCLK# <6>CLK_MCH_BCLK <6>

H_BNR# <7>

H_ADS# <7>

H_DINV#1 <7>H_DINV#0 <7>

H_DINV#2 <7>H_DINV#3 <7>

H_CPUSLP# <7,22>

CFG12 <12>

CPU_MCH_BSEL1 <6,8>

CLK_MCH_3GPLL# <6>

M_ODT0<18>

CFG7 <12>

PLTRST1#<21,23,30>

CLK_MCH_3GPLL <6>

M_ODT3<17>

CFG9 <12>

CFG19 <12>

MCH_ICH_SYNC#<21>

M_ODT2<17>

CPU_MCH_BSEL0 <6,8,12>

CFG16 <12>

THERMTRIP_MCH#<16>

CFG5 <12>

CPU_MCH_BSEL2 <6,8>

CFG20 <12>

CFG13 <12>

+0.9V_DDR_REF<17,18,47>

M_ODT1<18>

CFG18 <12>

H_HITM# <7>

CFG11 <12>

DMI_MTX_IRX_P1<23>

DMI_MRX_ITX_P0<23>

M_CLK_DDR#3<17>

DMI_MTX_IRX_N1<23>

DMI_MRX_ITX_N3<23>

DMI_MTX_IRX_P0<23>

DDR_CS2_DIMMB#<17>

M_CLK_DDR#0<18>

DMI_MTX_IRX_N0<23>

DMI_MRX_ITX_N2<23>

DDR_CS1_DIMMA#<18>

DMI_MTX_IRX_N3<23>

M_CLK_DDR1<18>

M_CLK_DDR3<17>

DMI_MRX_ITX_P3<23>

DMI_MRX_ITX_N1<23>

DMI_MRX_ITX_P2<23>

DDR_CS0_DIMMA#<18>

DMI_MRX_ITX_N0<23>

DDR_CKE1_DIMMA<18>

DMI_MTX_IRX_P3<23>

DDR_CKE2_DIMMB<17>

DDR_CS3_DIMMB#<17>

DMI_MTX_IRX_P2<23>

DMI_MRX_ITX_P1<23>

M_CLK_DDR#2<17>

DDR_CKE3_DIMMB<17>

M_CLK_DDR0<18>

DDR_CKE0_DIMMA<18>

DMI_MTX_IRX_N2<23>

M_CLK_DDR#1<18>

M_CLK_DDR2<17>

PM_BMBUSY#<23>

H_D#[0..63]<7>

H_RS#1 <7>H_RS#2 <7>

H_RS#0 <7>

H_DSTBN#1 <7>H_DSTBN#0 <7>

H_DSTBN#3 <7>H_DSTBN#2 <7>

H_DSTBP#1 <7>H_DSTBP#0 <7>

H_DSTBP#3 <7>H_DSTBP#2 <7>

H_REQ#0 <7>H_REQ#1 <7>H_REQ#2 <7>H_REQ#3 <7>H_REQ#4 <7>

PM_EXTTS#0<18>

DREF_SSCLK# <6>

MCH_DREFCLK <6>MCH_DREFCLK# <6>

DREF_SSCLK <6>

CLK_3GPLLREQ# <6>

ICH_PWRGD<23,40>

CFG6 <12>

CFG10 <12>

DPRSLPVR<23,48>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Calistoga(1 of 6)

10 62Tuesday, December 13, 2005

Compal Electronics, Inc.

Layout Note:H_XRCOMP & H_YRCOMP / H_SWNG0 &H_SWNG1 trace width and spacing is 10/20

Place Close ToAK1 and AK41

Note : CFG3:17 hasinternal pullup,CFG18:19 hasinternal pulldown

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Description at page12ZUMA use 945GM ( P/N: SA0000059GL )ZRS use 945PM ( P/N: SA00000KDBL)

Pop R92/R96/R114/R115 for discrete only

These connection for UMA only

R115 0_0402_5%~D3@1 2

HOST

U6A

CALISTOGA A3_FCBGA1466~D

HD0#F1HD1#J1HD2#H1HD3#J6HD4#H3HD5#K2HD6#G1HD7#G2HD8#K9HD9#K1HD10#K7HD11#J8HD12#H4HD13#J3HD14#K11HD15#G4HD16#T10HD17#W11HD18#T3HD19#U7HD20#U9HD21#U11HD22#T11HD23#W9HD24#T1HD25#T8HD26#T4HD27#W7HD28#U5HD29#T9HD30#W6HD31#T5HD32#AB7HD33#AA9HD34#W4HD35#W3HD36#Y3HD37#Y7HD38#W5HD39#Y10HD40#AB8HD41#W2HD42#AA4HD43#AA7HD44#AA2HD45#AA6HD46#AA10HD47#Y8HD48#AA1HD49#AB4HD50#AC9HD51#AB11HD52#AC11HD53#AB3HD54#AC2HD55#AD1HD56#AD9HD57#AC1HD58#AD7HD59#AC6HD60#AB5HD61#AD10HD62#AD4HD63#AC8

HVREF1K13HXRCOMPE1HXSCOMPE2HYRCOMPY1HYSCOMPU1HXSWINGE4HYSWINGW1

HA3# H9HA4# C9HA5# E11HA6# G11HA7# F11HA8# G12HA9# F9

HA10# H11HA11# J12HA12# G14HA13# D9HA14# J14HA15# H13HA16# J15HA17# F14HA18# D12HA19# A11HA20# C11HA21# A12HA22# A13HA23# E13HA24# G13HA25# F12HA26# B12HA27# B14HA28# C12HA29# A14HA30# C14HA31# D14

HREQ#0 D8HREQ#1 G8HREQ#2 B8HREQ#3 F8HREQ#4 A8

HADSTB#0 B9HADSTB#1 C13

HRS0# B4HRS1# E6HRS2# D6

HCLKN AG1HCLKP AG2

HDINV#0 J7HDINV#1 W8HDINV#2 U3HDINV#3 AB10

HDSTBN#0 K4HDSTBN#1 T7HDSTBN#2 Y5HDSTBN#3 AC4HDSTBP#0 K3HDSTBP#1 T6HDSTBP#2 AA5HDSTBP#3 AC5

HCPURST# B7HADS# E8

HTRDY# E7HDPWR# J9HDRDY# H8

HDEFER# C3HHITM# D4

HHIT# D3HLOCK# B3

HBREQ0# C7HBNR# C6HBPRI# F6

HDBSY# A7HCPUSLP# E3

HVREF0J13 R625 100_0402_1%~D 12

R623

10K_0402_5%~D@

12

R59

24.9_0402_1%~D

12

R60

54.9_0402_1%~D

12

R700

221_0402_1%~D

12

R6830_0402_5%~D

R55

221_0402_1%~D

12

R643

10K_0402_5%~D

12

R56

54.9_0402_1%~D

12

T25

C623

0.1U_0402_16V4Z~D

1

2

C58

0.1U_0402_16V4Z~D

1

2

C7020.1U_0402_16V4Z~D

1

2

R92 0_0402_5%~D3@1 2

T17

T19

T21

T22

R61

24.9_0402_1%~D

12

C634

0.1U_0402_16V4Z~D

1

2

R684

100_0402_1%~D

12

T20

R681 80.6_0402_1%~D

1 2

DM

ID

DR

MU

XING

CFG

PM

CLK

NC

RES

ERVE

D

U6B

CALISTOGA A3_FCBGA1466~D

DMIRXN0AE35DMIRXN1AF39DMIRXN2AG35DMIRXN3AH39

DMIRXP0AC35DMIRXP1AE39DMIRXP2AF35DMIRXP3AG39

DMITXN0AE37DMITXN1AF41DMITXN2AG37DMITXN3AH41

DMITXP0AC37DMITXP1AE41DMITXP2AF37DMITXP3AG41

SM_CK0AY35SM_CK1AR1SM_CK2AW7SM_CK3AW40

SM_CK0#AW35SM_CK1#AT1SM_CK2#AY7SM_CK3#AY40

SM_OCDCOMP0AL20SM_OCDCOMP1AF10

SM_ODT0BA13SM_ODT1BA12SM_ODT2AY20SM_ODT3AU21

SM_RCOMPNAV9SM_RCOMPPAT9

SM_VREF0AK1SM_VREF1AK41

SM_CKE0AU20SM_CKE1AT20SM_CKE2BA29SM_CKE3AY29

SM_CS0#AW13SM_CS1#AW12SM_CS2#AY21SM_CS3#AW21

CFG16 G18

CFG1 K18CFG2 J18CFG3 F18CFG4 E15CFG5 F15CFG6 E18CFG7 D19CFG8 D16CFG9 G16

CFG10 E16CFG11 D15CFG12 G15CFG13 K15CFG14 C15CFG15 H16

CFG0 K16

CFG17 H15CFG18 J25CFG19 K27CFG20 J26

G_CLKP AG33G_CLKN AF33

D_REF_CLKN A27D_REF_CLKP A26

D_REF_SSCLKN C40D_REF_SSCLKP D41

NC0 A3NC1 A39NC2 A4NC3 A40NC4 AW1NC5 AW41NC6 AY1NC7 BA1NC8 BA2NC9 BA3

NC10 BA39NC11 BA40NC12 BA41NC13 C1NC14 AY41NC15 B2NC16 B41NC17 C41NC18 D1

PM_BMBUSY#G28PM_EXTTS0#F25PM_EXTTS1#H26PM_THERMTRIP#G6PWROKAH33RSTIN#AH34

RESERVED1 T32RESERVED2 R32RESERVED3 F3RESERVED4 F7RESERVED5 AG11RESERVED6 AF11RESERVED7 H7RESERVED8 J19RESERVED9 A41

RESERVED10 A34RESERVED11 D28RESERVED12 D27RESERVED13 A35

ICH_SYNC#K28

CLK_REQ# H32

R690

75_0402_5%~D

1 2

T16

R695

100_0402_1%~D

12

C146

0.1U_0402_16V4Z~D

1

2

R114 0_0402_5%~D3@1 2

T24

R687 80.6_0402_1%~D 1 2

R689

200_0402_1%~D

12

R96 0_0402_5%~D3@1 2

R58

100_0402_1%~D

12

Page 11: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_D11

DDR_B_D57

DDR_B_D46

DDR_B_D7

DDR_B_D0

DDR_B_D44

DDR_B_D40

DDR_B_D30

DDR_B_D27

DDR_B_D15

DDR_B_D3

DDR_B_D35

DDR_B_D25

DDR_B_D23

DDR_B_D49

DDR_B_D37

DDR_B_D19

DDR_B_D48DDR_B_D47

DDR_B_D36

DDR_B_D18

DDR_B_D8

DDR_B_D62

DDR_B_D60

DDR_B_D9

DDR_B_D2

DDR_B_D52

DDR_B_D50

DDR_B_D22

DDR_B_D56

DDR_B_D51

DDR_B_D39

DDR_B_D28

DDR_B_D17

DDR_B_D45

DDR_B_D6

DDR_B_D61

DDR_B_D58

DDR_B_D1

DDR_B_D54

DDR_B_D41

DDR_B_D31

DDR_B_D12

DDR_B_D5

DDR_B_D38

DDR_B_D32

DDR_B_D20

DDR_B_D16

DDR_B_D14

DDR_B_D33

DDR_B_D63

DDR_B_D59

DDR_B_D42

DDR_B_D55

DDR_B_D53

DDR_B_D43

DDR_B_D29

DDR_B_D26

DDR_B_D13

DDR_B_D4

DDR_B_BS2

DDR_B_D34

DDR_B_D24

DDR_B_D21

DDR_B_D10

DDR_B_CAS#

DDR_B_WE#DDR_B_RAS#

SB_RCVENIN#

DDR_B_DQS7

DDR_B_MA9

DDR_B_MA0

DDR_B_MA7

DDR_B_DQS0

DDR_B_DM3

DDR_B_DQS1

DDR_B_DM1

DDR_B_DQS5

DDR_B_DM0

DDR_B_MA2

DDR_B_MA13

DDR_B_DM5

DDR_B_BS1

DDR_B_MA4

DDR_B_DM6

DDR_B_DQS4

DDR_B_MA5

DDR_B_MA3

DDR_B_MA11

DDR_B_BS0

DDR_B_MA6

DDR_B_DQS3

DDR_B_MA8

DDR_B_MA10

DDR_B_DM7

DDR_B_MA12

DDR_B_DM4

DDR_B_MA1

DDR_B_DQS2

DDR_B_DQS6

DDR_B_DM2

DDR_B_DQS#1

DDR_B_DQS#3

DDR_B_DQS#0

DDR_B_DQS#7

DDR_B_DQS#5DDR_B_DQS#4

DDR_B_DQS#6

DDR_B_DQS#2

SB_RCVENOUT#

DDR_A_D48

DDR_A_D43

DDR_A_D3

DDR_A_DM6

DDR_A_MA1

DDR_A_MA9

DDR_A_D51

DDR_A_D18

DDR_A_D0

DDR_A_D40

SA_RCVENOUT#

DDR_A_DQS5

DDR_A_DM3

DDR_A_MA10

DDR_A_D52

DDR_A_D33

DDR_A_D23

DDR_A_D16

DDR_A_D9

DDR_A_DQS2

DDR_A_DQS4

DDR_A_MA5

DDR_A_MA2

DDR_A_D35

DDR_A_D39

DDR_A_DQS#3DDR_A_DQS#2

DDR_A_D46

DDR_A_RAS#

DDR_A_D50

DDR_A_DM1

DDR_A_D45

DDR_A_D32

DDR_A_D20

DDR_A_D53

DDR_A_DQS#6

DDR_A_D58SA_RCVENIN#

DDR_A_D54

DDR_A_DQS#7

DDR_A_DM7

DDR_A_WE#

DDR_A_D31

DDR_A_DQS3

DDR_A_DQS#1

DDR_A_DM4

DDR_A_D57

DDR_A_D25

DDR_A_MA7

DDR_A_D44

DDR_A_D41

DDR_A_D2

DDR_A_D4

DDR_A_MA8

DDR_A_D13

DDR_A_D26

DDR_A_BS0

DDR_A_D11

DDR_A_D47

DDR_A_CAS#

DDR_A_D22

DDR_A_D7

DDR_A_D5

DDR_A_DM2

DDR_A_MA0

DDR_A_D56

DDR_A_BS1

DDR_A_D42

DDR_A_D8

DDR_A_DQS1

DDR_A_D27

DDR_A_D19

DDR_A_DQS#0

DDR_A_MA11

DDR_A_DQS#5

DDR_A_D30DDR_A_D29

DDR_A_D49

DDR_A_D21

DDR_A_DQS7

DDR_A_MA4

DDR_A_D28

DDR_A_D55

DDR_A_D34

DDR_A_BS2

DDR_A_D24

DDR_A_D15

DDR_A_D10

DDR_A_MA13

DDR_A_D17

DDR_A_DM0

DDR_A_D1

DDR_A_D36

DDR_A_D38

DDR_A_DQS6

DDR_A_MA6

DDR_A_DM5

DDR_A_MA3

DDR_A_D14

DDR_A_DQS0

DDR_A_D12

DDR_A_DQS#4

DDR_A_D37

DDR_A_D59

DDR_A_MA12

DDR_A_D62

DDR_A_D6

DDR_A_D60DDR_A_D61

DDR_A_D63

DDR_B_D[0..63] <17>DDR_A_D[0..63] <18>

DDR_B_BS2<17>

DDR_B_DQS[0..7]<17>

DDR_B_CAS#<17>DDR_B_RAS#<17>

DDR_B_MA[0..13]<17>

DDR_B_DQS#[0..7]<17>

DDR_B_WE#<17>

DDR_B_DM[0..7]<17>

DDR_B_BS0<17>DDR_B_BS1<17>

DDR_A_WE#<18>

DDR_A_BS0<18>

DDR_A_DQS#[0..7]<18>

DDR_A_BS1<18>

DDR_A_MA[0..13]<18>

DDR_A_BS2<18>

DDR_A_RAS#<18>

DDR_A_DQS[0..7]<18>

DDR_A_CAS#<18>

DDR_A_DM[0..7]<18>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Calistogo(2 of 6)

11 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Add a VIAAdd a VIA

T13

DDR SYS MEMORY A

U6D

CALISTOGA A3_FCBGA1466~D

SA_DQ0 AJ35SA_DQ1 AJ34SA_DQ2 AM31SA_DQ3 AM33SA_DQ4 AJ36SA_DQ5 AK35SA_DQ6 AJ32SA_DQ7 AH31SA_DQ8 AN35SA_DQ9 AP33

SA_DQ10 AR31SA_DQ11 AP31SA_DQ12 AN38SA_DQ13 AM36SA_DQ14 AM34SA_DQ15 AN33SA_DQ16 AK26SA_DQ17 AL27SA_DQ18 AM26SA_DQ19 AN24SA_DQ20 AK28SA_DQ21 AL28SA_DQ22 AM24SA_DQ23 AP26SA_DQ24 AP23SA_DQ25 AL22SA_DQ26 AP21SA_DQ27 AN20SA_DQ28 AL23SA_DQ29 AP24SA_DQ30 AP20SA_DQ31 AT21SA_DQ32 AR12SA_DQ33 AR14SA_DQ34 AP13SA_DQ35 AP12SA_DQ36 AT13SA_DQ37 AT12SA_DQ38 AL14SA_DQ39 AL12SA_DQ40 AK9SA_DQ41 AN7SA_DQ42 AK8SA_DQ43 AK7SA_DQ44 AP9SA_DQ45 AN9SA_DQ46 AT5SA_DQ47 AL5SA_DQ48 AY2SA_DQ49 AW2SA_DQ50 AP1SA_DQ51 AN2SA_DQ52 AV2SA_DQ53 AT3SA_DQ54 AN1SA_DQ55 AL2SA_DQ56 AG7SA_DQ57 AF9SA_DQ58 AG4SA_DQ59 AF6SA_DQ60 AG9SA_DQ61 AH6SA_DQ62 AF4SA_DQ63 AF8

SA_BS0AU12SA_BS1AV14SA_BS2BA20

SA_CAS#AY13SA_RAS#AW14SA_WE#AY14SA_RCVENIN#AK23SA_RCVENOUT#AK24

SA_DM0AJ33SA_DM1AM35SA_DM2AL26SA_DM3AN22SA_DM4AM14SA_DM5AL9SA_DM6AR3SA_DM7AH4

SA_DQS0AK33SA_DQS1AT33SA_DQS2AN28SA_DQS3AM22SA_DQS4AN12SA_DQS5AN8SA_DQS6AP3SA_DQS7AG5

SA_DQS0#AK32SA_DQS1#AU33SA_DQS2#AN27SA_DQS3#AM21SA_DQS4#AM12SA_DQS5#AL8SA_DQS6#AN3SA_DQS7#AH5

SA_MA0AY16SA_MA1AU14SA_MA2AW16SA_MA3BA16SA_MA4BA17SA_MA5AU16SA_MA6AV17SA_MA7AU17SA_MA8AW17SA_MA9AT16SA_MA10AU13SA_MA11AT17SA_MA12AV20SA_MA13AV12

T18T15T14

DDR SYS MEMORY B

U6E

CALISTOGA A3_FCBGA1466~D

SB_DQ0 AK39SB_DQ1 AJ37SB_DQ2 AP39SB_DQ3 AR41SB_DQ4 AJ38SB_DQ5 AK38SB_DQ6 AN41SB_DQ7 AP41SB_DQ8 AT40SB_DQ9 AV41

SB_DQ10 AU38SB_DQ11 AV38SB_DQ12 AP38SB_DQ13 AR40SB_DQ14 AW38SB_DQ15 AY38SB_DQ16 BA38SB_DQ17 AV36SB_DQ18 AR36SB_DQ19 AP36SB_DQ20 BA36SB_DQ21 AU36SB_DQ22 AP35SB_DQ23 AP34SB_DQ24 AY33SB_DQ25 BA33SB_DQ26 AT31SB_DQ27 AU29SB_DQ28 AU31SB_DQ29 AW31SB_DQ30 AV29SB_DQ31 AW29SB_DQ32 AM19SB_DQ33 AL19SB_DQ34 AP14SB_DQ35 AN14SB_DQ36 AN17SB_DQ37 AM16SB_DQ38 AP15SB_DQ39 AL15SB_DQ40 AJ11SB_DQ41 AH10SB_DQ42 AJ9SB_DQ43 AN10SB_DQ44 AK13SB_DQ45 AH11SB_DQ46 AK10SB_DQ47 AJ8SB_DQ48 BA10SB_DQ49 AW10SB_DQ50 BA4SB_DQ51 AW4SB_DQ52 AY10SB_DQ53 AY9SB_DQ54 AW5SB_DQ55 AY5SB_DQ56 AV4SB_DQ57 AR5SB_DQ58 AK4SB_DQ59 AK3SB_DQ60 AT4SB_DQ61 AK5SB_DQ62 AJ5SB_DQ63 AJ3

SB_BS0AT24SB_BS1AV23SB_BS2AY28

SB_CAS#AR24SB_RAS#AU23SB_WE#AR27SB_RCVENIN#AK16SB_RCVENOUT#AK18

SB_DM0AK36SB_DM1AR38SB_DM2AT36SB_DM3BA31SB_DM4AL17SB_DM5AH8SB_DM6BA5SB_DM7AN4

SB_DQS0AM39SB_DQS1AT39SB_DQS2AU35SB_DQS3AR29SB_DQS4AR16SB_DQS5AR10SB_DQS6AR7SB_DQS7AN5

SB_DQS0#AM40SB_DQS1#AU39SB_DQS2#AT35SB_DQS3#AP29SB_DQS4#AP16SB_DQS5#AT10SB_DQS6#AT7SB_DQS7#AP5

SB_MA0AY23SB_MA1AW24SB_MA2AY24SB_MA3AR28SB_MA4AT27SB_MA5AT28SB_MA6AU27SB_MA7AV28SB_MA8AV27SB_MA9AW27SB_MA10AV24SB_MA11BA27SB_MA12AY27SB_MA13AR23

Page 12: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PEG_MRX_GTX_N9

PEG_MRX_GTX_P10

PEG_MRX_GTX_N3

PEG_MRX_GTX_P7

PEG_MRX_GTX_P4

PEG_MRX_GTX_N2

PEG_MRX_GTX_N8

PEG_MRX_GTX_P15

PEG_MRX_GTX_N5

PEG_MRX_GTX_N15

PEG_MRX_GTX_P6

PEG_MRX_GTX_P3

PEG_MRX_GTX_N14

PEG_MRX_GTX_N12

PEG_MRX_GTX_P14

PEG_MRX_GTX_P1

PEG_MRX_GTX_N1

PEG_MRX_GTX_P2

PEG_MRX_GTX_N11

PEG_MRX_GTX_P9

PEG_MRX_GTX_N6

PEG_MRX_GTX_N0

PEG_MRX_GTX_P13

PEG_MRX_GTX_N13

PEG_MRX_GTX_P0

PEG_MRX_GTX_N4

PEG_MRX_GTX_N7

PEG_MRX_GTX_P8

PEG_MRX_GTX_P11

PEG_MRX_GTX_P5

PEG_MRX_GTX_N10

PEG_MRX_GTX_P12

PEGCOMP

LCD_ACLK+LCD_ACLK-

LCD_BCLK-LCD_BCLK+

PANEL_BKEN

L_IBGENVDD

LCTLA_CLKLCTLB_DATA

LDDC_DATALDDC_CLK

LCD_A0+LCD_A1+LCD_A2+

LCD_A2-

LCD_B1+LCD_B0+

LCD_A1-LCD_A0-

LCD_B2-LCD_B1-

LCD_B2+

LCD_B0-

TV_C_NB

TV_CVBS_NB

TVIREF

TV_Y_NB

G_CLK_DDC2G_DAT_DDC2

RED_NB

BLU_NB

GRN_NB

CRT_IREF

SDVO_CTRLDATASDVO_CTRLCLK

TV_IRTN

TV_CVBS_NB

TV_Y_NB

TV_C_NB

TVIREF

VSYNC_NB

HSYNC_NB

BLU_NB

CRT_RGB#

GRN_NB

RED_NB

CRT_IREF

PEG_MTX_GRX_C_N15

PEG_MTX_GRX_C_N11

PEG_MTX_GRX_C_N6

PEG_MTX_GRX_C_N10

PEG_MTX_GRX_C_N0

PEG_MTX_GRX_C_N2PEG_MTX_GRX_C_N1

PEG_MTX_GRX_C_N4PEG_MTX_GRX_C_N3

PEG_MTX_GRX_C_N8

PEG_MTX_GRX_C_N12

PEG_MTX_GRX_C_N9

PEG_MTX_GRX_C_N14

PEG_MTX_GRX_C_N7

PEG_MTX_GRX_C_N5

PEG_MTX_GRX_C_N13

BIA_PWM_MCH

HSYNC_NBVSYNC_NB

G_CLK_DDC2 CLK_DDC2_NB

DAT_DDC2_NBG_DAT_DDC2

PEG_MRX_GTX_N[0..15]

PEG_MRX_GTX_P[0..15]

PEG_MTX_GRX_C_N[0..15]

PEG_MTX_GRX_C_P[0..15]

LVREF

TV_IRTN

LCTLA_CLK

LCTLB_DATA

RED_NB

BLU_NB

GRN_NB

CRT_RGB#PEG_MTX_GRX_C_P6PEG_MTX_GRX_C_P5

PEG_MTX_GRX_C_P2

PEG_MTX_GRX_C_P10

PEG_MTX_GRX_C_P12

PEG_MTX_GRX_C_P9

PEG_MTX_GRX_C_P3

PEG_MTX_GRX_C_P13

PEG_MTX_GRX_C_P15

PEG_MTX_GRX_C_P8

PEG_MTX_GRX_C_P0

PEG_MTX_GRX_C_P11

PEG_MTX_GRX_C_P7

PEG_MTX_GRX_C_P14

PEG_MTX_GRX_C_P1

PEG_MTX_GRX_C_P4

+3.3V_RUN

+1.05V_VCCP+1.5V_RUN_PCIE

+3.3V_RUN

+1.5V_RUN+1.05V_VCCP

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

CFG5<10>

CFG7<10>

CFG18<10>

CFG19<10>

CFG9<10>

CFG20<10>

CPU_MCH_BSEL0<6,8,10>

CFG12<10>

CFG13<10>

CFG16<10>

CFG11<10>

PEG_MRX_GTX_N[0..15] <19>

PEG_MRX_GTX_P[0..15] <19>

PEG_MTX_GRX_C_P[0..15] <19>

LCD_B2-<20>LCD_B1-<20>LCD_B0-<20>

LCD_B2+<20>LCD_B1+<20>LCD_B0+<20>

LCD_A2-<20>LCD_A1-<20>LCD_A0-<20>

LCD_A2+<20>LCD_A1+<20>LCD_A0+<20>

LCD_BCLK-<20>LCD_BCLK+<20>LCD_ACLK-<20>LCD_ACLK+<20>

PANEL_BKEN<20>

ENVDD<20>

TV_C_NB<20>TV_Y_NB<20>

TV_CVBS_NB<20>

BLU_NB<20>

GRN_NB<20>

RED_NB<20>

HSYNC_NB<20>VSYNC_NB<20>

LDDC_DATA <20>

LDDC_CLK <20>

SDVO_CTRLCLK<19>

PEG_MTX_GRX_C_N[0..15] <19>

SDVO_CTRLDATA<19>

DAT_DDC2_NB <20>

CLK_DDC2_NB <20>

CFG6<10>

CFG10<10>

BIA_PWM<19,20,38>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Calistoga(3 of 6)

12 62Tuesday, December 13, 2005

Compal Electronics, Inc.

CFG[18:19] have internal pulldown

*

*

*

(VCC Select)

*

**

Low = DMI x 2

CFG7

High = DMI x 4

CFG6

Low = DT/Transportable CPUHigh = Mobile CPU

CFG[13:12]

CFG[3:17] have internal pullup

Low = NormalOperation (Default):Lane number in Order

01 = XOR Mode Enabled10 = All Z Mode Enabled11 = Normal Operation

High = Reverse Lane

Low = 1.05V (Default)High = 1.5V

High = EnabledLow = Disabled

Low = Reverse LaneCFG9

High = Normal Operation *

(DMI Lane Reversal)

SDVO_CTRLDATALow = No SDVO Device Present

High = SDVO Device Present

(Default)

(Default) *

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Strap Pin Table

CFG20(PCIE/SDVO select) High = PCIE/SDVO are

operating simu.

Low = Only PCIE or SDVO isoperational. *

CFG11

(FSB Dynamic ODT)CFG16

CFG18

CFG19

(Default)

00 = Reserved

Close to U6.J20

Close to U6.J22

Trace CRT_IREF should be atleast 20 miles away from anyother toggling signal.

CFG5

CFG10Low = ReservedHigh = Mobility *

*High = CalistogaLow = Moby Dick

Low = Calistoga *High = Reserved

No connection for discrete

Connect to +1.5V_RUN for discrete

No connection for discrete

Connect to GND for discrete

Connect to +1.05V for discrete

NOTE: For A Platform That Support BothIntegrated and Down Video Solution, ATranslation Circuit Could Be Needed AtLDDC_CLK and LDDC_DATA signals.

NO CONNECT FOR DISCRETENOTE: 1@ is for UMA Implemetation. 3@ is for Discrete Implementation.

Note :CFG3:17 hasinternal pullup,CFG18:19 hasinternal pulldown

R637 10K_0402_5%~D1@1 2

R622

2.2K_0402_5%

~D1@

12

R626 1K_0402_5%~D@1 2

R674

0_0402_5%~D

1@ 1

2

R661 0_0402_5%~D3@12

R628 1K_0402_5%~D@ 1 2

R83 0_0402_5%~D3@12

R668 2.2K_0402_5%~D@1 2

R77 0_0402_5%~D3@12

R672 2.2K_0402_5%~D@1 2

R653

2.2K_0402_5%~D1@

12

R649 0_0402_5%~D3@12

R639 10K_0402_5%~D1@1 2

R85

150_0402_1%~D

1@

12

R650 0_0402_5%~D3@12

R677 2.2K_0402_5%~D@1 2

R656 0_0402_5%~D3@12

R644 0_0402_5%~D3@12

R652 150_0402_1%~D1@1 2

R654 0_0402_5%~D3@12

R629 1.5K_0402_1%~D1@12

R112 0_0402_5%~D1@ 12

R80

150_0402_1%~D

1@

12

R11324.9_0402_1%~D

1 2

R645 0_0402_5%~D3@12

R678 2.2K_0402_5%~D@1 2

R641

2.2K_0402_5%

~D1@

12

R662 0_0402_5%~D1@ 12

R667 2.2K_0402_5%~D@1 2

R651 0_0402_5%~D3@12

R86

150_0402_1%~D

1@

12

R647

255_0402_1%~D1@

12

LVDS

TV

CR

T

PCI-EXPRESS GRAPHICS

U6C

CALISTOGA A3_FCBGA1466~D

SDVOCTRL_CLKH28 SDVOCTRL_DATAH27

LA_DATA0B37LA_DATA1B34LA_DATA2A36

LVREFHC33LVREFLC32

TVDAC_AA16TVDAC_BC18TVDAC_CA19

TV_IREFJ20

TV_IRTNAB16TV_IRTNBB18TV_IRTNCB19

DDCCLKC26DDCDATAC25

LA_DATA#0C37LA_DATA#1B35LA_DATA#2A37

LB_DATA0F30LB_DATA1D29LB_DATA2F28

LB_DATA#0G30LB_DATA#1D30LB_DATA#2F29

LA_CLKA32LA_CLK#A33LB_CLKE26LB_CLK#E27

LBKLT_CTLD32LBKLT_ENJ30LCTLA_CLKH30LCTLB_DATAH29LDDC_CLKG26LDDC_DATAG25LVDD_ENF32LIBGB38LVBGC35

VSYNCH23HSYNCG23BLUEE23BLUE#D23GREENC22GREEN#B22REDA21RED#B21

CRT_IREFJ22

EXP_COMPI D40EXP_COMPO D38

EXP_RXN0 F34EXP_RXN1 G38EXP_RXN2 H34EXP_RXN3 J38EXP_RXN4 L34EXP_RXN5 M38EXP_RXN6 N34EXP_RXN7 P38EXP_RXN8 R34EXP_RXN9 T38

EXP_RXN10 V34EXP_RXN11 W38EXP_RXN12 Y34EXP_RXN13 AA38EXP_RXN14 AB34EXP_RXN15 AC38

EXP_RXP0 D34EXP_RXP1 F38EXP_RXP2 G34EXP_RXP3 H38EXP_RXP4 J34EXP_RXP5 L38EXP_RXP6 M34EXP_RXP7 N38EXP_RXP8 P34EXP_RXP9 R38

EXP_RXP10 T34EXP_RXP11 V38EXP_RXP12 W34EXP_RXP13 Y38EXP_RXP14 AA34EXP_RXP15 AB38

EXP_TXN0 F36EXP_TXN1 G40EXP_TXN2 H36EXP_TXN3 J40EXP_TXN4 L36EXP_TXN5 M40EXP_TXN6 N36EXP_TXN7 P40EXP_TXN8 R36EXP_TXN9 T40

EXP_TXN10 V36EXP_TXN11 W40EXP_TXN12 Y36EXP_TXN13 AA40EXP_TXN14 AB36EXP_TXN15 AC40

EXP_TXP0 D36EXP_TXP1 F40EXP_TXP2 G36EXP_TXP3 H40EXP_TXP4 J36EXP_TXP5 L40EXP_TXP6 M36EXP_TXP7 N40EXP_TXP8 P36EXP_TXP9 R40

EXP_TXP10 T36EXP_TXP11 V40EXP_TXP12 W36EXP_TXP13 Y40EXP_TXP14 AA36EXP_TXP15 AB40

TV_DCONSEL1J29TV_DCONSEL0K30

R657 150_0402_1%~D1@1 2

G

DS

Q96

BSS138_SOT23~D1@

2

13

R648

4.99K_0402_1%~D

1@

12

R646 150_0402_1%~D1@1 2

R635 0_0402_5%~D1@ 12

C705

0.1U_0402_16V4Z~D1@

12

R669 0_0402_5%~D3@ 12

R627 1K_0402_5%~D@1 2

R655

2.2K_0402_5%~D1@

12

R673 1K_0402_5%~D@1 2

R79 2.2K_0402_5%~D@1 2

R688 2.2K_0402_5%~D@1 2

R82 0_0402_5%~D3@12

G

DS Q97

BSS138_SOT23~D1@

2

13

U49

74AHC1G08GW_SOT353-5~D1@

IN1 1

IN2 2G3

O4

P5

R686 2.2K_0402_5%~D@1 2

R664 2.2K_0402_5%~D@ 1 2

Page 13: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

U6_AB1

U6_A6

U6_D2

VSSA_TVBG

+3VR

UN

_ATV

+3GPLL_R

+2.5V_CRTDAC

+2.5V_CRTDAC

VCCD_LVDS

VSSA_TVBG

+1.5V_RUN_HPLL

+1.5V_RUN_DPLLB

+1.5V_RUN

+1.5V_RUN_DPLLA

+1.5V_RUN

+1.5V_RUN+1.5V_RUN

+1.5V_RUN_MPLL

+1.05V_VCCP

+1.5V_RUN

+1.5V_RUN

+1.5V_RUN_DPLLB+1.5V_RUN_DPLLA

+1.5V_RUN

+1.5V_RUN_MPLL

+3.3V_RUN

+1.5V_RUN_HPLL

+1.5V_RUN_3GPLL

+1.5V_RUN

+3.3V_RUN

+2.5V_RUN

+1.5V_RUN_QTVDAC

+3VRUN_TVDACA

+3VRUN_TVDACC

+3V_TVDAC

+3VRUN_ATVBG

+3.3V_RUN

+1.5V_RUN

VCCA_LVDS

+2.5V_RUN

+1.05V_VCCP

+1.5V_RUN

+3VRUN_ATVBG

+3VRUN_TVDACA

+1.5V_RUN

+1.5V_RUN

+1.5V_RUN

+1.5V_RUN_PCIE

+2.5V_RUN

+2.5V_RUN

+2.5V_RUN

+1.05V_VCCP +1.5V_RUN

+1.5V_RUN_3GPLL+1.5V_RUN

+1.5V_RUN

VCCA_LVDS

VCCTX_LVDS

+3VRUN_TVDACB

+3VRUN_TVDACB

+3VRUN_TVDACC

+2.5V_RUN

+1.5V_RUN_TVDAC

+1.5V_RUN_TVDAC+1.5V_RUN +1.5V_RUN_QTVDAC

VCCTX_LVDS+2.5V_RUN

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Calistoga(4 of 6)

13 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

40mA Max.

45mA Max.45mA Max.

40mA Max.

Should be placed on same side. No Vias.

W=30 mils

CRB 270uF

Route VSSACRTDAC gnd from GMCH todecoupling cap ground lead and thenconnect to the gnd plane.

CRTDAC: Route caps within250mil of GMCH. Route FBwithin 3" of Calistoga

Route VSSA_TVBG GND from GMCH todecoupling cap ground lead and thenconnect to the GND plane.

C630, C617, C611, C627,C703, C704, C707 replace by 0 ohm 0805 resistor

close pin A38

Note : C588, C564 No stuff for Ext. VGA. Stuff for Int. VGA.

L54, L53 use 0_0805_5% resistorfor Int. VGA as Travis.

CRT DAC Voltge Follower Circuit - 700mV TV DAC Voltge Follower Circuit - 700mV

close pin A6

close pin D2/AB1

NOTE: Populate D4, R54, D2 and R52 for UMA Implemetation.

NOTE: Follow Intel Layout Guideline toplace 4.7uF, 10uF, 22uF,0.1uF and 22nF within 250 mils from Calistoga.

FB

Route +2.5V_RUN from GMCH pinG41 todecoupling cap(C567)<200mil to the edge

0.1uF should be placed < 200 mils within its pins

close pin B30/C30/A30

NOTE: 1@ is for UMA Implemetation. 3@ is for Discrete Implementation.

+3V_TVDAC

Refer to the latest Intel layout check list for Calistoga de-couping capacitors layout placement4.7uF, 10uF and 22uF should be placed < 500 mils within its pins0.1uF should be placed < 200 mils within its pins22nF should be placed within its pins

10uF should be placed in cavity

C612

0.1U_0402_16V4Z~D

1@

1

2

C645

22U_0805_6.3VAM~D

1

2

R6340_0402_5%~D1@

12

+ C588

470U_D2_2.5VM~D1@

1

2

R900_0402_5%~D3@

12

D2

MMBD4148-7-F_SOT23-3~D1@

1

3

2

R6360_0603_5%~D3@

C567

0.1U_0402_16V4Z~D

1

2

R6590_0402_5%~D3@

12

D4

MMBD4148-7-F_SOT23-3~D1@

1

3

2

C581

0.22U_0402_10V4Z~D

1

2

C568

0.1U_0402_16V4Z~D

1

2

R6420_0603_5%~D1@

R6330_0402_5%~D3@

12

C61122n_0805_25V

1@

1 2

3C

6210.1U

_0402_16V4Z~D1@

1

2

L55BLM18PG181SN1_0603~D

1 2

C609

0.022U_0402_16V7K~D

1@

1

2

C590

0.1U_0402_16V4Z~D

1

2

C646

22U_0805_6.3VAM~D

1

2

C708

22U_0805_6.3VAM~D3@

1

2

R76

0_0603_5%~D 1@

12

C703

22n_0805_25V1@

1 2

3

C613

4.7U_0603_6.3V6M

~D

@

1

2

C565

10U_0805_4VAM

~D

1

2

L52BLM21PG600SN1D_0805~D

12

L60

BLM18AG121SN1D_0603~D 12

C580

0.1U_0402_16V4Z~D

1

2

C61722n_0805_25V

1@

1 2

3

P O W E R

U6H

CALISTOGA A3_FCBGA1466~D

VCC_SYNC H22

VCCTX_LVDS0 B30VCCTX_LVDS1 C30

VCC3G0 AB41VCC3G1 AJ41VCC3G2 L41VCC3G3 N41VCC3G4 R41VCC3G5 V41VCC3G6 Y41

VCCA_3GBG G41VSSA_3GBG H41

VCCA_3GPLL AC33

VCCTX_LVDS2 A30

VCCA_LVDS A38VSSA_LVDS B39

VCCA_MPLL AF2

VCCA_TVBG H20VSSA_TVBG G20

VCCA_TVDACA0 E19VCCA_TVDACA1 F19VCCA_TVDACB0 C20VCCA_TVDACB1 D20VCCA_TVDACC0 E20VCCA_TVDACC1 F20

VCCAUX1 AF31VCCAUX2 AE31VCCAUX3 AC31VCCAUX4 AL30VCCAUX5 AK30VCCAUX6 AJ30VCCAUX7 AH30VCCAUX8 AG30VCCAUX9 AF30

VCCAUX10 AE30VCCAUX11 AD30VCCAUX12 AC30VCCAUX13 AG29VCCAUX14 AF29VCCAUX15 AE29VCCAUX16 AD29VCCAUX17 AC29VCCAUX18 AG28VCCAUX19 AF28VCCAUX20 AE28

VTT0AC14VTT1AB14VTT2W14VTT3V14VTT4T14VTT5R14VTT6P14VTT7N14VTT8M14VTT9L14VTT10AD13VTT11AC13VTT12AB13VTT13AA13VTT14Y13VTT15W13VTT16V13VTT17U13VTT18T13VTT19R13VTT20N13VTT21M13VTT22L13VTT23AB12VTT24AA12VTT25Y12VTT26W12VTT27V12VTT28U12VTT29T12VTT30R12VTT31P12VTT32N12VTT33M12VTT34L12VTT35R11VTT36P11VTT37N11VTT38M11VTT39R10VTT40P10VTT41N10VTT42M10VTT43P9VTT44N9VTT45M9VTT46R8VTT47P8VTT48N8VTT49M8VTT50P7VTT51N7VTT52M7VTT53R6VTT54P6VTT55M6VTT56A6VTT57R5

VTT59N5VTT60M5VTT61P4VTT62N4VTT63M4VTT64R3VTT65P3VTT66N3VTT67M3VTT68R2VTT69P2VTT70M2VTT71D2VTT72AB1VTT73R1VTT74P1VTT75N1VTT76M1

VCCA_CRTDAC0 E21VCCA_CRTDAC1 F21VSSA_CRTDAC2 G21

VCCA_DPLLA B26VCCA_DPLLB C39

VCCA_HPLL AF1

VCCD_HMPLL0 AH1VCCD_HMPLL1 AH2

VCCD_LVDS0 A28VCCD_LVDS1 B28VCCD_LVDS2 C28

VCCD_TVDAC D21VCCDQ_TVDAC H19

VCCHV0 A23VCCHV1 B23 VCCHV2 B25

VCCAUX21 AH22VCCAUX22 AJ21VCCAUX23 AH21VCCAUX24 AJ20VCCAUX25 AH20VCCAUX26 AH19VCCAUX27 P19VCCAUX28 P16VCCAUX29 AH15VCCAUX30 P15VCCAUX31 AH14

VCCAUX32AG14VCCAUX33AF14VCCAUX34AE14VCCAUX35Y14VCCAUX36AF13VCCAUX37AE13VCCAUX38AF12VCCAUX39AE12VCCAUX40AD12

VCCAUX0 AK31

VTT58P5

C603

0.022U_0402_16V7K~D

1@1

2

R6700_0402_5%~D3@

12

R6660_0402_5%~D3@

12

+

C147

220U_D

2_4VM~D

1

2

C597

10U_0805_6.3V6M

~D

1

2

C579

0.1U_0402_16V4Z~D

1@

1

2

R6800_0402_5%~D3@

12

C70722n_0805_25V

1@

1 2

3

R52

10_0603_5%~D1@

1 2C

11710U

_0805_4VAM~D

1@

1

2

+ C564

470U_D2_2.5VM~D1@

1

2R6240.5_0805_1%~D

1 2

R890_0402_5%~D1@

12

+

C649

220U_D

2_4VM~D

1

2

R54

10_0603_5%~D1@

1 2

R6600_0402_5%~D3@

1 2

L54

10U_CK2125 100M-T_20%_0805~D

12

C70422n_0805_25V

1@

1 2

3C615

0.1U_0402_16V4Z~D

1@

1

2

C626

4.7U_0603_6.3V6M

~D

1

2

C571

0.01U_0402_16V7K~D

1@

1

2

C148

10U_0805_4VAM

~D

1

2

C99

0.1U_0402_16V4Z~D1@

1

2 C616

0.1U_0402_16V4Z~D

1@

1

2

L53

10U_CK2125 100M-T_20%_0805~D

12

C610

0.1U_0402_16V4Z~D

1

2

R6760_0402_5%~D3@

12

C600

0.022U_0402_16V7K~D

1@

1

2

C639

0.1U_0402_16V4Z~D

1

2

C105

0.1U_0402_16V4Z~D

1

2

C587

0.01U_0402_16V7K~D

1@

1

2

C604

0.1U_0402_16V4Z~D

1@

1

2

L7BLM18PG181SN1_0603~D1@

1 2

C605

10U_0805_6.3V6M

~D1@

1

2

C59

0.47U_0402_10V4Z~D

1

2

C629

0.1U_0402_16V4Z~D1@1

2

C570

0.1U_0402_16V4Z~D

1

2

R6400_0603_5%~D3@

C62

40.

1U_0

402_

16V4

Z~D

1

2

R6380_0603_5%~D1@

C149

10U_0805_4VAM

~D

1

2

C129

4.7U_0603_6.3V6M

~D1@

1

2

L8

BLM21PG600SN1D_0805~D

12

C572

0.1U_0402_16V4Z~D

1@

1

2

R6580_0402_5%~D3@

1 2

L59

BLM18AG121SN1D_0603~D 12

C62722n_0805_25V

1@

1 2

3

C633

0.47U_0402_10V4Z~D

1

2

C607

2.2U_0603_6.3V6K~D

1

2

L56BLM18PG181SN1_0603~D1@

1 2

C638

0.1U_0402_16V4Z~D

1

2

C641

0.22U_0402_10V4Z~D

1

2

C63022n_0805_25V

1@

1 2

3

Page 14: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCCSM_LF4

VCCSM_LF2

VCCSM_LF5

VCCSM_LF1

+1.05V_VCCP

+1.5V_RUN+1.05V_VCCP

+1.8V_SUS+1.05V_VCCP

+1.8V_SUS

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Calistoga(5 of 6)

14 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

CRB 270uF

Place near U6.BA15

Place near U6.AT41 & AM41

Place near U6.AV1 & AJ1

Place near U6.BA23

C628

10U_0805_4VAM

~D

1

2

C608

0.47U_0402_10V4Z~D

1

2

C593

0.22U_0402_10V4Z~D

1

2

+

C648

220U_D

2_4VM~D

1

2

C640

0.47U_0402_10V4Z~D

1

2

C594

10U_0805_4VAM

~D

1

2

+

C54

220U_D

2_4VM~D

1

2

C576

0.47U_0402_10V4Z~D

1

2

C606

0.22U_0402_10V4Z~D

1

2

P O

W E

R

U6F

CALISTOGA A3_FCBGA1466~D

VCC_NCTF1AC27VCC_NCTF2AB27VCC_NCTF3AA27VCC_NCTF4Y27VCC_NCTF5W27VCC_NCTF6V27VCC_NCTF7U27

VCCAUX_NCTF52 Y15

VCC_NCTF9R27VCC_NCTF10AD26VCC_NCTF11AC26VCC_NCTF12AB26VCC_NCTF13AA26VCC_NCTF14Y26VCC_NCTF15W26VCC_NCTF16V26VCC_NCTF17U26VCC_NCTF18T26VCC_NCTF19R26VCC_NCTF20AD25VCC_NCTF21AC25VCC_NCTF22AB25VCC_NCTF23AA25VCC_NCTF24Y25VCC_NCTF25W25

VCCAUX_NCTF53 W15

VCC_NCTF27U25VCC_NCTF28T25VCC_NCTF29R25VCC_NCTF30AD24VCC_NCTF31AC24VCC_NCTF32AB24VCC_NCTF33AA24VCC_NCTF34Y24VCC_NCTF35W24VCC_NCTF36V24

VCCAUX_NCTF54 V15

VCC_NCTF38T24VCC_NCTF39R24VCC_NCTF40AD23VCC_NCTF41V23VCC_NCTF42U23VCC_NCTF43T23VCC_NCTF44R23VCC_NCTF45AD22VCC_NCTF46V22VCC_NCTF47U22VCC_NCTF48T22VCC_NCTF49R22VCC_NCTF50AD21VCC_NCTF51V21VCC_NCTF52U21VCC_NCTF53T21VCC_NCTF54R21VCC_NCTF55AD20VCC_NCTF56V20VCC_NCTF57U20VCC_NCTF58T20

VCCAUX_NCTF55 U15

VCC_NCTF60AD19VCC_NCTF61V19VCC_NCTF62U19VCC_NCTF63T19VCC_NCTF64AD18VCC_NCTF65AC18VCC_NCTF66AB18VCC_NCTF67AA18VCC_NCTF68Y18VCC_NCTF69W18VCC_NCTF70V18VCC_NCTF71U18VCC_NCTF72T18

VCC_NCTF0AD27 VCCAUX_NCTF0 AG27VCCAUX_NCTF1 AF27VCCAUX_NCTF2 AG26VCCAUX_NCTF3 AF26VCCAUX_NCTF4 AG25VCCAUX_NCTF5 AF25VCCAUX_NCTF6 AG24VCCAUX_NCTF7 AF24VCCAUX_NCTF8 AG23VCCAUX_NCTF9 AF23

VCCAUX_NCTF10 AG22VCCAUX_NCTF11 AF22VCCAUX_NCTF12 AG21VCCAUX_NCTF13 AF21VCCAUX_NCTF14 AG20VCCAUX_NCTF15 AF20VCCAUX_NCTF16 AG19VCCAUX_NCTF17 AF19VCCAUX_NCTF18 R19VCCAUX_NCTF19 AG18VCCAUX_NCTF20 AF18VCCAUX_NCTF21 R18VCCAUX_NCTF22 AG17VCCAUX_NCTF23 AF17VCCAUX_NCTF24 AE17VCCAUX_NCTF25 AD17VCCAUX_NCTF26 AB17VCCAUX_NCTF27 AA17VCCAUX_NCTF28 W17VCCAUX_NCTF29 V17VCCAUX_NCTF30 T17VCCAUX_NCTF31 R17VCCAUX_NCTF32 AG16VCCAUX_NCTF33 AF16VCCAUX_NCTF34 AE16VCCAUX_NCTF35 AD16VCCAUX_NCTF36 AC16VCCAUX_NCTF37 AB16VCCAUX_NCTF38 AA16VCCAUX_NCTF39 Y16VCCAUX_NCTF40 W16VCCAUX_NCTF41 V16VCCAUX_NCTF42 U16VCCAUX_NCTF43 T16VCCAUX_NCTF44 R16VCCAUX_NCTF45 AG15VCCAUX_NCTF46 AF15VCCAUX_NCTF47 AE15VCCAUX_NCTF48 AD15VCCAUX_NCTF49 AC15VCCAUX_NCTF50 AB15

VSS_NCTF0 AE27

VCCAUX_NCTF51 AA15

VSS_NCTF1 AE26

VCC_NCTF59R20

VCCAUX_NCTF56 T15

VSS_NCTF2 AE25VSS_NCTF3 AE24VSS_NCTF4 AE23VSS_NCTF5 AE22VSS_NCTF6 AE21VSS_NCTF7 AE20VSS_NCTF8 AE19VSS_NCTF9 AE18

VSS_NCTF10 AC17VSS_NCTF11 Y17VSS_NCTF12 U17

VCC_NCTF26V25

VCCAUX_NCTF57 R15

VCC_NCTF37U24

VCC_NCTF8T27

VCC100M19VCC101L19VCC102N18VCC103M18VCC104L18VCC105P17VCC106N17VCC107M17VCC108N16VCC109M16VCC110L16

VCC_SM100 AR6VCC_SM101 AP6VCC_SM102 AN6VCC_SM103 AL6VCC_SM104 AK6VCC_SM105 AJ6VCC_SM106 AV1VCC_SM107 AJ1

C614

0.1U_0402_16V4Z~D

1

2

C589

0.22U_0402_10V4Z~D

1

2

P O W E R

U6G

CALISTOGA A3_FCBGA1466~D

VCC0AA33VCC1W33VCC2P33VCC3N33VCC4L33VCC5J33VCC6AA32VCC7Y32VCC8W32VCC9V32VCC10P32VCC11N32VCC12M32VCC13L32VCC14J32VCC15AA31VCC16W31VCC17V31VCC18T31VCC19R31VCC20P31VCC21N31VCC22M31VCC23AA30VCC24Y30VCC25W30VCC26V30VCC27U30VCC28T30VCC29R30VCC30P30VCC31N30VCC32M30VCC33L30VCC34AA29VCC35Y29VCC36W29VCC37V29VCC38U29VCC39R29VCC40P29VCC41M29VCC42L29VCC43AB28VCC44AA28VCC45Y28

VCC_SM5 AY34VCC_SM6 AW34VCC_SM7 AV34VCC_SM8 AU34VCC_SM9 AT34

VCC_SM10 AR34VCC_SM11 BA30VCC_SM12 AY30VCC_SM13 AW30VCC_SM14 AV30VCC_SM15 AU30VCC_SM16 AT30VCC_SM17 AR30VCC_SM18 AP30VCC_SM19 AN30VCC_SM20 AM30VCC_SM21 AM29VCC_SM22 AL29VCC_SM23 AK29VCC_SM24 AJ29VCC_SM25 AH29VCC_SM26 AJ28VCC_SM27 AH28VCC_SM28 AJ27VCC_SM29 AH27VCC_SM30 BA26VCC_SM31 AY26VCC_SM32 AW26VCC_SM33 AV26VCC_SM34 AU26VCC_SM35 AT26VCC_SM36 AR26VCC_SM37 AJ26VCC_SM38 AH26VCC_SM39 AJ25VCC_SM40 AH25VCC_SM41 AJ24VCC_SM42 AH24VCC_SM43 BA23VCC_SM44 AJ23VCC_SM45 BA22VCC_SM46 AY22VCC_SM47 AW22VCC_SM48 AV22VCC_SM49 AU22VCC_SM50 AT22VCC_SM51 AR22VCC_SM52 AP22VCC_SM53 AK22VCC_SM54 AJ22VCC_SM55 AK21VCC_SM56 AK20VCC_SM57 BA19VCC_SM58 AY19VCC_SM59 AW19VCC_SM60 AV19VCC_SM61 AU19VCC_SM62 AT19VCC_SM63 AR19VCC_SM64 AP19VCC_SM65 AK19VCC_SM66 AJ19VCC_SM67 AJ18VCC_SM68 AJ17VCC_SM69 AH17VCC_SM70 AJ16VCC_SM71 AH16VCC_SM72 BA15

VCC_SM3 AU40VCC_SM4 BA34

VCC_SM73 AY15VCC_SM74 AW15VCC_SM75 AV15VCC_SM76 AU15VCC_SM77 AT15VCC_SM78 AR15VCC_SM79 AJ15VCC_SM80 AJ14VCC_SM81 AJ13VCC_SM82 AH13VCC_SM83 AK12VCC_SM84 AJ12VCC_SM85 AH12VCC_SM86 AG12VCC_SM87 AK11VCC_SM88 BA8VCC_SM89 AY8VCC_SM90 AW8VCC_SM91 AV8VCC_SM92 AT8VCC_SM93 AR8VCC_SM94 AP8VCC_SM95 BA6VCC_SM96 AY6VCC_SM97 AW6VCC_SM98 AV6VCC_SM99 AT6

VCC_SM1 AT41VCC_SM0 AU41

VCC_SM2 AM41

VCC46V28VCC47U28VCC48T28VCC49R28VCC50P28VCC51N28VCC52M28VCC53L28VCC54P27VCC55N27VCC56M27VCC57L27VCC58P26VCC59N26VCC60L26VCC61N25VCC62M25VCC63L25VCC64P24VCC65N24VCC66M24VCC67AB23VCC68AA23VCC69Y23VCC70P23VCC71N23VCC72M23VCC73L23VCC74AC22VCC75AB22VCC76Y22VCC77W22VCC78P22VCC79N22VCC80M22VCC81L22VCC82AC21VCC83AA21VCC84W21VCC85N21VCC86M21VCC87L21VCC88AC20VCC89AB20VCC90Y20VCC91W20VCC92P20VCC93N20VCC94M20VCC95L20VCC96AB19VCC97AA19VCC98Y19VCC99N19

C599

0.1U_0402_16V4Z~D

1

2

+

C130

330U_D

2E_2.5VM

~D@

1

2

C584

0.47U_0402_10V4Z~D

1

2

C601

1U_0603_10V4Z~D

1

2

C637

0.47U_0402_10V4Z~D

1

2

C566

0.47U_0402_10V4Z~D

1

2

C598

0.47U_0402_10V4Z~D

1

2

C631

0.1U_0402_16V4Z~D

1

2

C87

10U_0805_4VAM

~D

1

2

C622

0.1U_0402_16V4Z~D

1

2C

5690.47U

_0402_10V4Z~D

1

2

C102

10U_0805_4VAM

~D

1

2

Page 15: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Calistoga(6 of 6)

15 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

P O W E R

U6J

CALISTOGA A3_FCBGA1466~D

VSS200AN21VSS201AL21VSS202AB21VSS203Y21VSS204P21VSS205K21VSS206J21VSS207H21VSS208C21VSS209AW20VSS210AR20VSS211AM20VSS212AA20VSS213K20VSS214B20VSS215A20VSS216AN19VSS217AC19VSS218W19VSS219K19VSS220G19VSS221C19VSS222AH18VSS223P18VSS224H18VSS225D18VSS226A18VSS227AY17VSS228AR17VSS229AP17VSS230AM17VSS231AK17VSS232AV16VSS233AN16VSS234AL16VSS235J16VSS236F16VSS237C16VSS238AN15VSS239AM15VSS240AK15VSS241N15VSS242M15VSS243L15VSS244B15VSS245A15VSS246BA14VSS247AT14VSS248AK14VSS249AD14VSS250AA14VSS251U14VSS252K14VSS253H14VSS254E14VSS255AV13VSS256AR13VSS257AN13VSS258AM13VSS259AL13VSS260AG13VSS261P13VSS262F13

VSS266AC12VSS267K12VSS268H12VSS269E12VSS270AD11VSS271AA11VSS272Y11VSS273J11VSS274D11VSS275B11VSS276AV10VSS277AP10VSS278AL10VSS279AJ10

VSS265D13VSS264B13VSS263AY12

VSS285 AW9VSS286 AR9VSS287 AH9VSS288 AB9VSS289 Y9VSS290 R9VSS292 G9VSS291 E9VSS293 A9VSS294 AG8VSS295 AD8VSS296 AA8VSS297 U8VSS298 K8VSS299 C8VSS300 BA7VSS301 AV7VSS302 AP7VSS303 AL7VSS304 AJ7VSS305 AH7VSS306 AF7VSS307 AC7VSS308 R7VSS309 G7VSS310 D7VSS311 AG6VSS312 AD6VSS313 AB6VSS314 Y6

VSS317 K6VSS318 H6VSS319 B6VSS320 AV5VSS321 AF5VSS322 AD5VSS323 AY4VSS324 AR4VSS325 AP4VSS326 AL4VSS327 AJ4VSS328 Y4VSS329 U4VSS330 R4VSS331 J4VSS332 F4VSS333 C4VSS334 AY3VSS335 AW3VSS336 AV3VSS337 AL3

VSS341 AD3

VSS345 AT2VSS346 AR2VSS347 AP2VSS348 AK2

VSS351 AB2VSS352 Y2VSS353 U2VSS354 T2VSS355 N2VSS356 J2VSS357 H2

VSS359 C2VSS360 AL1

VSS358 F2

VSS349 AJ2VSS350 AD2

VSS344 G3VSS343 AA3VSS342 AC3

VSS340 AF3

VSS338 AH3

VSS280 AG10VSS281 AC10VSS282 W10VSS283 U10VSS284 BA9

VSS315 U6VSS316 N6

VSS339 AG3

P O W E R

U6I

CALISTOGA A3_FCBGA1466~D

VSS0AC41VSS1AA41VSS2W41VSS3T41VSS4P41VSS5M41VSS6J41VSS7F41VSS8AV40VSS9AP40VSS10AN40VSS11AK40

VSS13AH40VSS14AG40VSS15AF40VSS16AE40VSS17B40VSS18AY39VSS19AW39

VSS21AR39VSS22AN39

VSS24AC39VSS25AB39VSS26AA39VSS27Y39VSS28W39VSS29V39VSS30T39VSS31R39VSS32P39VSS33N39VSS34M39VSS35L39VSS36J39VSS37H39

VSS20AV39

VSS23AJ39

VSS12AJ40

VSS38G39

VSS40D39VSS41AT38VSS42AM38VSS43AH38VSS44AG38VSS45AF38VSS46AE38VSS47C38VSS48AK37VSS49AH37VSS50AB37VSS51AA37VSS52Y37VSS53W37VSS54V37VSS55T37VSS56R37VSS57P37VSS58N37VSS59M37VSS60L37VSS61J37VSS62H37VSS63G37VSS64F37VSS65D37VSS66AY36VSS67AW36VSS68AN36VSS69AH36VSS70AG36VSS71AF36VSS72AE36VSS73AC36VSS74C36VSS75B36VSS76BA35VSS77AV35VSS78AR35VSS79AH35VSS80AB35VSS81AA35VSS82Y35VSS83W35VSS84V35VSS85T35VSS86R35VSS87P35VSS88N35VSS89M35VSS90L35VSS91J35VSS92H35VSS93G35VSS94F35VSS95D35VSS96AN34VSS97AK34VSS98AG34VSS99AF34

VSS39F39

VSS100 AE34VSS101 AC34VSS102 C34VSS103 AW33VSS104 AV33VSS105 AR33VSS106 AE33VSS107 AB33VSS108 Y33VSS109 V33VSS110 T33VSS111 R33VSS112 M33VSS113 H33VSS114 G33VSS115 F33VSS116 D33VSS117 B33VSS118 AH32VSS119 AG32VSS120 AF32VSS121 AE32VSS122 AC32VSS123 AB32VSS124 G32VSS125 B32VSS126 AY31VSS127 AV31VSS128 AN31VSS129 AJ31VSS130 AG31VSS131 AB31VSS132 Y31VSS133 AB30VSS134 E30VSS135 AT29VSS136 AN29VSS137 AB29VSS138 T29VSS139 N29VSS140 K29VSS141 G29VSS142 E29VSS143 C29VSS144 B29VSS145 A29VSS146 BA28VSS147 AW28VSS148 AU28VSS149 AP28VSS150 AM28VSS151 AD28VSS152 AC28VSS153 W28VSS154 J28VSS155 E28VSS156 AP27VSS157 AM27VSS158 AK27VSS159 J27VSS160 G27VSS161 F27VSS162 C27VSS163 B27VSS164 AN26VSS165 M26VSS166 K26VSS167 F26VSS168 D26VSS169 AK25VSS170 P25VSS171 K25VSS172 H25VSS173 E25VSS174 D25VSS175 A25VSS176 BA24VSS177 AU24VSS178 AL24VSS179 AW23VSS180 AT23VSS181 AN23VSS182 AM23VSS183 AH23VSS184 AC23VSS185 W23VSS186 K23VSS187 J23VSS188 F23VSS189 C23VSS190 AA22VSS191 K22VSS192 G22VSS193 F22VSS194 E22VSS195 D22VSS196 A22VSS197 BA21VSS198 AV21VSS199 AR21

Page 16: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FAN1_VOUT

FAN2_ON

THERMATRIP_VGA#

FAN2_VFB

REM_DIODE1_PREM_DIODE1_N

THERMATRIP2#

+3VSUS_THRM

DAT_SMBCLK_SMB

THERMATRIP1#

LDO_SET

REM_DIODE3_NREM_DIODE3_P

FAN1_VOUT

THERMATRIP_VGA#

THERMATRIP1# THERMATRIP2#

FAN2_5V

ATF_INT#

+3V_LDOIN

FAN2_PWM

LDO_SET

VCP2VCP1

FAN2_PWM FAN2VREF

+3.3V_SUS+3.3V_SUS

+1.05V_VCCP

+3.3V_RUN

+1.05V_VCCP

+15V_SUS

+5V_RUN

+3.3V_RUN

+3.3V_ALW

+3.3V_SUS

+3.3V_RUN

+RTC_CELL

+3.3V_SUS

+3.3V_SUS

+2.5V_RUN

+5V_RUN

+RTC_CELL

+3.3V_RUN

+2.5V_RUN

+5V_SUS

+5V_SUS+5V_SUS

+5V_SUS

+15V_SUS

THERMTRIP_MCH#<10>H_THERMTRIP#<7>

FAN2_TACH <38>

FAN1_TACH <38>

OTBMP#<19>

ATF_INT# <38>

THERMTRIP_SIO <37>

DAT_SMB<38>CLK_SMB<38>

H_THERMDA<7>

H_THERMDC<7>

SUSPWROK<23,40>

POWER_SW#<38,39>

ICH_PWRGD#<40>

ACAV_IN <19,38,49>

THERM_STP# <45>

2.5V_RUN_PWRGD <40>

5V_CAL_SIO# <37>

5V_CAL_SIO2# <37>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Thermal sensor and Fan

16 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

1

E 3

2222 SYMBOL(SOT23-NEW)

2

C

B

FAN2

FAN2 Control and Tachometer

Note: +3.3V_RUN leakage issue from ATI M22

Place under CPU

FAN1

FAN1 Control and Tachometer

Place C28 as close to theGuardian pins as possible.

REM_DIODE3_N, REM_DIODE3_P routing together.Trace width / Spacing = 10 / 10 mil

Place near the bottom SODIMM

SMBUS ADDRESS : 2F

Place C37 as close to theGuardian pins as possible

Place C39 as close to theGuardian pins as possible

"Solder thermal pad to plane. Add 9 ground vias to pad."Notes:

Voltage margining circuit for LDO output. For Vmargin, stuff Ra=31.5K and Rb=30K. Rb=1K for production

Ra

Rb

This unused thermistor circuit islocated near the ICH7

This unused thermistor circuit is located near DIMM A slot

JFAN1

MOLEX_53398-0371~D

112233

C37

2200P_0402_50V7K~D

1

2

R712 1K_0402_5%~D

1 2C7012200P_0402_50V7K~D@

1

2

C635

2200P_0402_50V7K~D@

1

2

U35B

LM358DR2G_SOIC8~D3@

P8

IN+5

IN-6 G4

O 7

R73910KB_0603_1%_TSM1A103F34D3R~D@

12

EB

C

Q13PMBT3904_SOT23~D

2

31

R74310K_0402_5%~D@

12

R705

0_1210_5%~D

1 2

R272.2K_0402_5%~D

1 2

S

GD Q86

SI3456BDV-T1_TSOP6~D3@3

624

51

R450

10K_0402_5%~D3@

12

C31

2200P_0402_50V7K~D

1

2

C39

2200P_0402_50V7K~D

1

2

R7412.21K_0603_1%~D@

12

R2449.9_0603_1%~D

1 2

R702 10K_0402_5%~D@12

C34

0.1U_0402_16V4Z~D

1

2

C26

10U_0805_10V4Z~D

1

2

EB

C

Q14PMBT3904_SOT23~D

2

31

C698

1000P_0402_50V7K~D@

1

2

C38

0.1U_0402_16V4Z~D

1

2

C694

22U_1206_10V4Z~D

1

2

C352

1000P_0402_50V7K~D@

1

2

G

D

S

Q1032N7002_SOT23~D

@

2

13

EB

CQ17PMBT3904_SOT23~D

2

31

U2

EMC4000_C_QFN40~D

SMDATA7SMBCLK8

LDO_SHDN#_ADDR23

DP235DN234

+3V_SUS12VSUS_PWRGD21

+RTC_PWR3V18

+3V_PWROK#13

POWER_SW#38

THERMTRIP1#14

THERMTRIP2#15

THERMTRIP3#16

VSET39HW_LOCK#29VSS9

ATF_INT# 17

VCP 3

LDO_POK 31

DN1 36DP1 37

THERMTRIP_SIO 30THERM_STP# 4

INTRUDER# 22

DP31DN32

VDD_5V 5

FAN_OUT6

GPIO110GPIO211GPIO319GPIO420

LDO_SET 24

LDO_OUT 25

LDO_IN 26

LDO_OUT 27

LDO_IN 28

GPIO532

FAN_DAC33

VCP 40

Thermal41

R23

41.2K_0603_1%~D

12

R709 8.2K_0402_5%~D 1 2

C651

1U_0603_10V4Z~D

1

2

R74010K_0402_5%~D@

12

C51

0.1U_0402_16V4Z~D@

1

2

R703

1K_0603_5%~D

12

JFAN2

MOLEX_53398-0371~D3@

112233

C400

22U_1206_10V4Z~D

3@

1

2

C408

0.1U_0603_50V4Z~D

3@

1

2

R450_0402_5%~D@1 2

C32

0.1U_0402_16V4Z~D

1

2

R252.2K_0402_5%~D

1 2

R31

8.2K_0402_5%~D

12

R74210KB_0603_1%_TSM1A103F34D3R~D@

12

R50 7.5K_0402_5%~D 1 2

C27

0.1U_0402_16V4Z~D

1

2

D15

RB751V_SOD323~D3@

21

C7002200P_0402_50V7K~D@

1

2

C43

0.1U_0402_16V4Z~D

1

2

EB

C

Q98PMBT3904_SOT23~D

2

31

R490

120K_0402_5%~D3@

1 2

R51 1K_0402_5%~D

1 2

G

D

S

Q1022N7002_SOT23~D

@

2

13

C14

2200P_0402_50V7K~D@

1

2

R7382.21K_0603_1%~D@

12

C48

0.1U_0402_16V4Z~D

1

2

C28

2200P_0402_50V7K~D

1

2

C402

1000P_0402_50V7K~D@

1

2

R21

147K_0402_1%~D

12

C50

10U_0805_10V4Z~D

1

2

C410 2200P_0402_50V7K~D3@1 2

C650

0.1U_0402_16V4Z~D@

1

2

R488 78.7K_0402_1%~D3@12

U35A

LM358DR2G_SOIC8~D3@

P8

IN+3

IN-2 G4

O 1

R48

10K_0402_5%~D

12

D21

RB751V_SOD323~D@

21

C4120.22U_0603_10V7K~D3@

1

2

R737

31.6K_0603_1%

@

12

R49

1K_0402_5%~D

1

2

R736

10K_0402_5%~D

12

R44

2.2K_0402_5%~D

1 2

R35

8.2K_0402_5%~D

12

C696

1000P_0402_50V7K~D@

1

2

EB

C

Q7PMBT3904_SOT23~D

2

31

R489120K_0402_5%~D3@

12

Page 17: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_BS2

DDR_CKE2_DIMMB

DDR_B_BS0DDR_B_MA10

DDR_B_D63

DDR_B_D55

DDR_B_MA7

DDR_B_D53

DDR_B_WE#

DDR_B_MA1

DDR_B_DM6

DDR_B_D38

DDR_B_D33

DDR_CS2_DIMMB#

DDR_B_MA6

DDR_CKE3_DIMMB

DDR_B_D28

DDR_B_D59

DDR_B_DM7

DDR_B_D30

DDR_B_DM3

DDR_B_D11

DDR_B_DM1

DDR_B_DQS1

DDR_B_D5

M_CLK_DDR2

DDR_B_DQS5DDR_B_DQS#5

DDR_B_D32

DDR_B_D17

DDR_B_MA10

DDR_B_MA8

DDR_B_D25

DDR_B_D16

DDR_B_D10

DDR_B_D45

DDR_B_D20

CLK_SCLK

DDR_B_D36

DDR_B_D7

DDR_B_DQS#7

DDR_B_D52

DDR_B_D54

DDR_B_MA5

DDR_B_D19

DDR_B_DM0

DDR_B_D51

DDR_B_MA4

DDR_B_D40

DDR_B_D0

DDR_B_DQS#1

DDR_B_D9

DDR_B_MA13

DDR_B_DQS#3

DDR_B_D22

DDR_B_DQS6

DDR_B_D13

DDR_B_D14

DDR_B_D48

DDR_B_D35

DDR_B_MA12

DDR_B_D24

DDR_B_DQS#2

DDR_B_D4

DDR_B_D43

DDR_B_DQS#0

+0.9V_DDR_REF

DDR_B_D62

M_CLK_DDR#2

DDR_B_MA0

DDR_B_D49

DDR_B_CAS#

DDR_B_D3

DDR_B_DQS7

DDR_B_D39

DDR_B_D29

DDR_B_DQS3

DDR_B_DQS#6

DDR_B_DM5

DDR_B_DQS4

DDR_B_D37

DDR_B_DQS2

DDR_B_D2

DDR_B_D47

DDR_B_RAS#

DDR_B_MA11

DDR_B_D41

M_ODT3

DDR_B_MA9

DDR_B_D15

DDR_B_D46

DDR_B_D56DDR_B_D61

DDR_B_MA2

CLK_SDATA

DDR_B_D50

DDR_CS3_DIMMB#

M_CLK_DDR#3

DDR_B_D8

DDR_B_D42

DDR_B_DM4

DDR_B_D27

DDR_B_D26

DDR_B_DM2

DDR_B_D58

DDR_B_D57

DDR_B_D34

DDR_B_DQS#4

DDR_CKE2_DIMMB

DDR_B_D6DDR_B_DQS0

DDR_B_D1

DDR_B_D44

M_ODT2

DDR_B_BS1DDR_B_BS0

DDR_B_MA3

DDR_B_BS2

DDR_B_D31

DDR_B_D23

DDR_B_D21

M_CLK_DDR3

DDR_B_D12

DDR_B_D18

DDR_B_D60

DDR_B_MA0DDR_B_BS1

DDR_CKE3_DIMMB

DDR_B_MA1DDR_B_MA3

DDR_B_MA5DDR_B_MA8DDR_B_MA9DDR_B_MA12

M_ODT3DDR_CS3_DIMMB#DDR_B_CAS#DDR_B_WE#

DDR_B_MA4

DDR_B_MA6

DDR_B_MA2

DDR_B_MA7DDR_B_MA11

M_ODT2DDR_B_MA13

DDR_CS2_DIMMB#DDR_B_RAS#

PM_EXTTS#0_R

+0.9V_DDR_VTT

+0.9V_DDR_VTT

+1.8V_SUS

+3.3V_RUN

+3.3V_RUN

+1.8V_SUS +1.8V_SUS

M_CLK_DDR2 <10>M_CLK_DDR#2 <10>

DDR_B_D[0..63]<11>

DDR_B_DQS[0..7]<11>

DDR_B_MA[0..13]<11>

DDR_B_DM[0..7]<11>

DDR_B_DQS#[0..7]<11>

DDR_CKE3_DIMMB <10>

M_CLK_DDR#3 <10>

DDR_B_RAS# <11>

DDR_CS3_DIMMB#<10>

DDR_CKE2_DIMMB<10>

DDR_B_BS0<11>

CLK_SDATA<6,18>

DDR_B_BS2<11>

M_ODT2 <10>

DDR_CS2_DIMMB# <10>

+0.9V_DDR_REF <10,18,47>

DDR_B_BS1 <11>

DDR_B_CAS#<11>

M_ODT3<10>

CLK_SCLK<6,18>

DDR_B_WE#<11>

M_CLK_DDR3 <10>

PM_EXTTS#0_R <18>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

DDRII-SODIMM SLOT-B

17 62Tuesday, December 13, 2005

Compal Electronics, Inc.

Layout Note:Place these resistorclosely JDIMB,alltrace length<750 mil

Layout Note:Place these resistorclosely JDIMB,alltrace lengthMax=1.3"

Layout Note:Place near JDIMB

Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DIMMBSTANDARD

C172

2.2U_0603_6.3V6K~D

1

2

R66

100K_0402_5%~D

12

C114

0.1U_0402_16V4Z~D

1

2

C592

0.1U_0402_16V4Z~D

1

2

RP3

56_1206_8P4R_5%~D

1 82 73 64 5

C118

0.1U_0402_16V4Z~D

1

2

C169

0.1U_0402_16V4Z~D

1

2

C131

0.1U_0402_16V4Z~D

1

2

R108 56_0402_5%~D

1 2

C583

0.1U_0402_16V4Z~D

1

2

C143

2.2U_0603_6.3V6K~D

1

2

RP1

56_1206_8P4R_5%~D

1 82 73 64 5

C108

2.2U_0603_6.3V6K~D

1

2

C120

2.2U_0603_6.3V6K~D

1

2

C55

2.2U_0603_6.3V6K~D

1

2

C138

0.1U_0402_16V4Z~D

1

2

R106 56_0402_5%~D

1 2

C61

0.1U_0402_16V4Z~D

1

2

C128

0.1U_0402_16V4Z~D

1

2

C575

0.1U_0402_16V4Z~D

1

2

C140

0.1U_0402_16V4Z~D

1

2

C136

0.1U_0402_16V4Z~D

1

2

R63

10K_0402_5%~D

1 2

C578

0.1U_0402_16V4Z~D

1

2

RP5

56_1206_8P4R_5%~D

1 82 73 64 5

RP10

56_1206_8P4R_5%~D

1 82 73 64 5

C125

0.1U_0402_16V4Z~D

1

2

C123

0.1U_0402_16V4Z~D

1

2

C586

0.1U_0402_16V4Z~D

1

2

C596

0.1U_0402_16V4Z~D

1

2

C132

2.2U_0603_6.3V6K~D

1

2

RP12

56_1206_8P4R_5%~D

1 82 73 64 5

JDIMB

FOX_AS0A426-M2S-TR~D

VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39

VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18

DQ12 20DQ13 22

VSS 24DM1 26VSS 28CK0 30

CK0# 32VSS 34

DQ14 36DQ15 38

VSS 40

VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199

VSS 42DQ20 44DQ21 46

VSS 48NC 50

DM2 52VSS 54

DQ22 56DQ23 58

VSS 60DQ28 62DQ29 64

VSS 66DQS3# 68

DQS3 70VSS 72

DQ30 74DQ31 76

VSS 78NC/CKE1 80

VDD 82NC/A15 84NC/A14 86

VDD 88A11 90

A7 92A6 94

VDD 96A4 98A2 100A0 102

VDD 104BA1 106

RAS# 108S0# 110

VDD 112ODT0 114

NC/A13 116VDD 118

NC 120VSS 122

DQ36 124DQ37 126

VSS 128DM4 130VSS 132

DQ38 134DQ39 136

VSS 138DQ44 140DQ45 142

VSS 144DQS5# 146

DQS5 148VSS 150

DQ46 152DQ47 154

VSS 156DQ52 158DQ53 160

VSS 162CK1 164

CK1# 166VSS 168DM6 170VSS 172

DQ54 174DQ55 176

VSS 178DQ60 180DQ61 182

VSS 184DQS7# 186

DQS7 188VSS 190

DQ62 192DQ63 194

VSS 196SAO 198SA1 200

RP14

56_1206_8P4R_5%~D

1 82 73 64 5

C113

2.2U_0603_6.3V6K~D

1

2

C110

0.1U_0402_16V4Z~D

1

2

C121

0.1U_0402_16V4Z~D

1

2

Page 18: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+0.9V_DDR_REF

DDR_CKE1_DIMMA

M_CLK_DDR0

M_CLK_DDR1

M_CLK_DDR#0

M_CLK_DDR#1

DDR_CKE1_DIMMA

DDR_CS0_DIMMA#

CLK_SCLK

DDR_A_MA1

DDR_A_MA10

DDR_A_MA3

DDR_A_MA9 DDR_A_MA7DDR_A_MA12

DDR_A_MA5

DDR_A_WE#

DDR_A_D8

DDR_A_D3

DDR_A_D14

DDR_A_D1DDR_A_D0

DDR_A_D2

DDR_A_D11

DDR_A_D28

DDR_A_D17

DDR_A_D22

DDR_A_D16

DDR_A_D18

DDR_A_D10

DDR_A_D24

DDR_A_D44

DDR_A_D27

DDR_A_D33

DDR_A_D37

DDR_A_D34

DDR_A_D26

DDR_A_D36

DDR_A_D57

DDR_A_D43DDR_A_D41

DDR_A_D50

DDR_A_D48

DDR_A_D51

DDR_A_D49

DDR_A_D42

DDR_A_D59DDR_A_D58

DDR_A_D56

DDR_A_DQS1

DDR_A_DQS0

DDR_A_DQS2

DDR_A_DM3

DDR_A_DM1

DDR_A_DM2

DDR_A_DQS4

DDR_A_DQS6

DDR_A_DQS7

CLK_SDATA

DDR_CKE0_DIMMA

DDR_A_MA8

DDR_CS1_DIMMA#

DDR_A_MA11

DDR_A_MA2DDR_A_MA0

DDR_A_MA4

DDR_A_MA6

DDR_A_CAS#

DDR_A_BS1DDR_A_RAS#

DDR_A_D6

DDR_A_D4

DDR_A_D5

DDR_A_D7

DDR_A_D15

DDR_A_D21

DDR_A_D9

DDR_A_D20

DDR_A_D19

DDR_A_D13DDR_A_D12

DDR_A_D29

DDR_A_D31DDR_A_D30

DDR_A_D32DDR_A_D35

DDR_A_D23

DDR_A_D39

DDR_A_D25

DDR_A_D38

DDR_A_D46

DDR_A_D40

DDR_A_D55

DDR_A_D53

DDR_A_D47

DDR_A_D52

DDR_A_D45

DDR_A_D60

DDR_A_D63

DDR_A_D61

DDR_A_D62

DDR_A_D54

DDR_A_DM6

DDR_A_DM4

DDR_A_DM5

DDR_A_DM7

DDR_A_DM0

DDR_A_MA13

DDR_A_DQS5

DDR_A_BS0

DDR_A_BS2

DDR_A_DQS#0

DDR_A_DQS#1

DDR_A_DQS#2

DDR_A_DQS3DDR_A_DQS#3

DDR_A_DQS#4

DDR_A_DQS#5

DDR_A_DQS#6

DDR_A_DQS#7

DDR_A_MA1

DDR_A_CAS#

DDR_A_MA3

M_ODT1DDR_CS1_DIMMA#

M_ODT0

M_ODT1

DDR_A_WE#

DDR_A_MA5

DDR_A_BS0

DDR_A_MA8

DDR_A_MA10

DDR_A_RAS#DDR_CS0_DIMMA#DDR_A_MA9

DDR_A_MA12

DDR_A_BS2

DDR_CKE0_DIMMA

DDR_A_MA6DDR_A_MA7DDR_A_MA11

DDR_A_MA2DDR_A_MA4

M_ODT0DDR_A_MA13

DDR_A_BS1DDR_A_MA0

PM_EXTTS#0_R

+1.8V_SUS +1.8V_SUS

+0.9V_DDR_VTT

+3.3V_RUN

+0.9V_DDR_VTT

+1.8V_SUS

DDR_A_D[0..63]<11>

DDR_A_DQS[0..7]<11>

DDR_A_MA[0..13]<11>

DDR_A_DM[0..7]<11>

M_CLK_DDR0 <10>M_CLK_DDR#0 <10>

CLK_SDATA<6,17>

DDR_CKE1_DIMMA <10>

DDR_CS0_DIMMA# <10>

CLK_SCLK<6,17>

DDR_CKE0_DIMMA<10>

DDR_CS1_DIMMA#<10>

DDR_A_DQS#[0..7]<11>

M_ODT0 <10>

M_ODT1<10>

DDR_A_WE#<11>

DDR_A_CAS#<11>

DDR_A_BS0<11>

DDR_A_BS2<11>

+0.9V_DDR_REF <10,17,47>

DDR_A_RAS# <11>DDR_A_BS1 <11>

M_CLK_DDR#1 <10>M_CLK_DDR1 <10>

PM_EXTTS#0 <10>

PM_EXTTS#0_R <17>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

DDRII-SODIMM SLOT-A

18 62Tuesday, December 13, 2005

Compal Electronics, Inc.

Layout Note:Place these resistorclosely JDIMA,alltrace lengthMax=1.3"

Layout Note:Place near JDIMA

Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT

Layout Note:Place these resistorclosely JDIMA,alltrace length<750 mil

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DIMMAREVERSE

C591

0.1U_0402_16V4Z~D

1

2

C116

0.1U_0402_16V4Z~D

1

2

C173

2.2U_0603_6.3V6K~D

1

2

R65

100K_0402_5%~D

12

RP9

56_1206_8P4R_5%~D

1 82 73 64 5

C122

0.1U_0402_16V4Z~D

1

2

C141

0.1U_0402_16V4Z~D

1

2

RP2

56_1206_8P4R_5%~D

1 82 73 64 5

C135

0.1U_0402_16V4Z~D

1

2

C133

2.2U_0603_6.3V6K~D

1

2

C57

0.1U_0402_16V4Z~D

1

2

C585

0.1U_0402_16V4Z~D

1

2

R632 56_0402_5%~D 1 2

C602

2.2U_0603_6.3V6K~D

1

2

C142

0.1U_0402_16V4Z~D

1

2

RP4

56_1206_8P4R_5%~D

1 82 73 64 5

C582

0.1U_0402_16V4Z~D

1

2

JDIMA

FOX_AS0A426-M2R-TR~D

VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39

VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199

VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18

DQ12 20DQ13 22

VSS 24DM1 26VSS 28CK0 30

CK0# 32VSS 34

DQ14 36DQ15 38

VSS 40

VSS 42DQ20 44DQ21 46

VSS 48NC 50

DM2 52VSS 54

DQ22 56DQ23 58

VSS 60DQ28 62DQ29 64

VSS 66DQS3# 68

DQS3 70VSS 72

DQ30 74DQ31 76

VSS 78NC/CKE1 80

VDD 82NC/A15 84NC/A14 86

VDD 88A11 90

A7 92A6 94

VDD 96A4 98A2 100A0 102

VDD 104BA1 106

RAS# 108S0# 110

VDD 112ODT0 114

NC/A13 116VDD 118

NC 120VSS 122

DQ36 124DQ37 126

VSS 128DM4 130VSS 132

DQ38 134DQ39 136

VSS 138DQ44 140DQ45 142

VSS 144DQS5# 146

DQS5 148VSS 150

DQ46 152DQ47 154

VSS 156DQ52 158DQ53 160

VSS 162CK1 164

CK1# 166VSS 168DM6 170VSS 172

DQ54 174DQ55 176

VSS 178DQ60 180DQ61 182

VSS 184DQS7# 186

DQS7 188VSS 190

DQ62 192DQ63 194

VSS 196SAO 198SA1 200

C574

0.1U_0402_16V4Z~D

1

2

C53

2.2U_0603_6.3V6K~D

1

2

R630 56_0402_5%~D 1 2

C109

2.2U_0603_6.3V6K~D

1

2

RP11

56_1206_8P4R_5%~D

1 82 73 64 5

C139

0.1U_0402_16V4Z~D

1

2

C145

2.2U_0603_6.3V6K~D

1

2

C126

0.1U_0402_16V4Z~D

1

2

R118

0_0402_5%~D

1 2

C595

0.1U_0402_16V4Z~D

1

2

C577

0.1U_0402_16V4Z~D

1

2

C573

0.1U_0402_16V4Z~D

1

2

RP6

56_1206_8P4R_5%~D

1 82 73 64 5

C111

0.1U_0402_16V4Z~D

1

2

C119

2.2U_0603_6.3V6K~D

1

2

C127

0.1U_0402_16V4Z~D

1

2

C170

0.1U_0402_16V4Z~D

1

2

RP13

56_1206_8P4R_5%~D

1 82 73 64 5

R62

100K_0402_5%~D

12

C106

0.1U_0402_16V4Z~D

1

2

Page 19: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PE

G_P

WR

ON

#

RUN_ON

PEG_MTX_GRX_C_N2

PEG_MTX_GRX_C_P13

PEG_MTX_GRX_C_P6

PEG_MTX_GRX_C_P5

PEG_MTX_GRX_C_N14

PEG_MTX_GRX_C_N13

PEG_MTX_GRX_C_N6

PEG_MTX_GRX_C_N1

PEG_MTX_GRX_C_P9

PEG_MTX_GRX_C_N8

PEG_MTX_GRX_C_P3

PEG_MTX_GRX_C_N12

PEG_MTX_GRX_C_N10

PEG_MTX_GRX_C_N9

PEG_MTX_GRX_C_N4

PEG_MTX_GRX_C_N15

PEG_MTX_GRX_C_P7

PEG_MTX_GRX_C_P0

PEG_MTX_GRX_C_N11

PEG_MTX_GRX_C_P12

PEG_MTX_GRX_C_P10

PEG_MTX_GRX_C_N0

PEG_MTX_GRX_C_N3

PEG_MTX_GRX_C_P15

PEG_MTX_GRX_C_P1

PEG_MTX_GRX_C_N5

PEG_MTX_GRX_C_P2

PEG_MTX_GRX_C_P11

PEG_MTX_GRX_C_P4

PEG_MTX_GRX_C_N7

PEG_MTX_GRX_C_P14

DVI_SDAT_L

DVI_DETECT

SIO_GFX_PWR

PEG_MTX_GRX_C_P14

PEG_MTX_GRX_C_P7

PEG_MTX_GRX_C_P9

PEG_MTX_GRX_C_P2

PEG_MTX_GRX_C_P5

PEG_MTX_GRX_C_P11

PEG_MTX_GRX_C_P0

PEG_MTX_GRX_C_P3

PEG_MTX_GRX_C_P6

PEG_MTX_GRX_C_P8

PEG_MTX_GRX_C_P10

PEG_MTX_GRX_C_P12

PEG_MTX_GRX_C_P1

PEG_MTX_GRX_C_P8

PEG_MTX_GRX_C_P4

PEG_MTX_GRX_C_P13

PEG_MTX_GRX_C_P15

PEG_MRX_GTX_P14

PEG_MRX_GTX_N7

PEG_MRX_GTX_P11

PEG_MRX_GTX_N9

PEG_MRX_GTX_P6

PLTRST_DELAY#

DVI_DETECT_L

CLK_DDC2_VGA

HSYNC_VGAVSYNC_VGA

PEG_MTX_GRX_N12

PEG_MRX_GTX_N10

PEG_MRX_GTX_P8

PEG_MRX_GTX_P0

PEG_MRX_GTX_P13

PEG_MRX_GTX_N6

CLK_PCIE_VGA#

SBAT_SMBCLK_R

DVI2_TX2-

DVI_SCLK

DVI_TX0+DVI_TX0-

PEG_MRX_GTX_N5

GRN_VGA

PEG_MTX_GRX_P14

PEG_MTX_GRX_N11

DVI_TX1+

DVI2_TX1-

PEG_MRX_GTX_P15

PEG_MRX_GTX_N6

PEG_MRX_GTX_P6

DVI_SDAT

DVI_TX1-

DVI_TX2+

PEG_MRX_GTX_P12

PEG_MRX_GTX_P4

PEG_MRX_GTX_P0

PEG_MTX_GRX_N13

PEG_MTX_GRX_N4

PEG_MRX_GTX_P5

DVI_CLK+

PEG_MRX_GTX_P14

PEG_MRX_GTX_N11

PEG_MRX_GTX_P7

PEG_MRX_GTX_N1

PEG_MTX_GRX_N14

DVI2_TX0+

PEG_MRX_GTX_N15

OTBMP#

PEG_MRX_GTX_P9

PEG_MRX_GTX_N8

BLU_VGA

PEG_MTX_GRX_N15

PEG_MTX_GRX_P2

PEG_MRX_GTX_N3

PEG_MRX_GTX_P10

PEG_MRX_GTX_N11

PEG_MRX_GTX_N9

PEG_MRX_GTX_P15

PEG_MRX_GTX_N14

PEG_MRX_GTX_N7

PEG_MRX_GTX_P2

PEG_MRX_GTX_N0

TV_CVBS_VGA

PEG_MTX_GRX_P15

PEG_MTX_GRX_N10

DVI_TX0-

PEG_MRX_GTX_N12

PEG_MRX_GTX_P10

RED_VGA

PEG_MRX_GTX_N4

PEG_MRX_GTX_P11PEG_MTX_GRX_P13

PEG_MTX_GRX_N3

PEG_MRX_GTX_P2

PEG_MRX_GTX_P7

DVI_TX1+

PEG_MRX_GTX_N15

PEG_MRX_GTX_P13

DAT_DDC2_VGA

SBAT_SMBDAT_R

PEG_MTX_GRX_P12

PEG_MTX_GRX_N9

PEG_MTX_GRX_N8

PEG_MRX_GTX_N13

PEG_MRX_GTX_N2

PEG_MRX_GTX_N5

DVI_DETECT

DVI_TX2-

PEG_MRX_GTX_N3PEG_MRX_GTX_P3

TV_C_VGA

PEG_MTX_GRX_P6

PEG_MRX_GTX_N8

PEG_MRX_GTX_N13

CLK_PCIE_VGA

TV_Y_VGA

PEG_MTX_GRX_P1

PEG_MTX_GRX_N0

DVI2_CLK+

PEG_MTX_GRX_P9

PEG_MTX_GRX_N6

PEG_MTX_GRX_P4

DVI2_TX1+

PEG_MRX_GTX_N1

PEG_MRX_GTX_P1

PEG_MRX_GTX_P9

PEG_MRX_GTX_P12

DVI_DETECT_L

DVI_SDAT

FPBACK_EN

PEG_MRX_GTX_P8

PEG_MTX_GRX_P11

PEG_MTX_GRX_P7

PEG_MTX_GRX_N5

PEG_MTX_GRX_N1

PEG_MTX_GRX_P0

DVI_TX0+

DVI2_TX0-

PEG_MRX_GTX_P5

PEG_MRX_GTX_N2

PEG_MTX_GRX_P8

PEG_MTX_GRX_P5

DVI2_CLK-

PEG_MRX_GTX_N0

PEG_MRX_GTX_N14

DVI_SCLK_L

PEG_MRX_GTX_N12

PEG_MRX_GTX_N4

PEG_MRX_GTX_P1

DVI_SCLK_L

PEG_MTX_GRX_N7

PEG_MTX_GRX_N2

PEG_MRX_GTX_P3PEG_MRX_GTX_P4

GFX_PWR_LIMIT

DVI_CLK-

DVI_SCLK

PEG_MRX_GTX_N10

DVI_SDAT_L

RUNPWROK

PEG_MTX_GRX_P10

PEG_MTX_GRX_P3

DVI2_TX2+

DVI_CLK+DVI_CLK-

DVI_TX1-

DVI_TX2+DVI_TX2-

BIA_PWMBIA_PWM_VGA

YPRPB_DET#

SBAT_SMBCLK_R

SBAT_SMBDAT_R

PEG_MTX_GRX_C_N10

PEG_MTX_GRX_C_N8

PEG_MTX_GRX_C_N5

PEG_MTX_GRX_C_N14

PEG_MTX_GRX_C_N6

PEG_MTX_GRX_C_N9

PEG_MTX_GRX_C_N1PEG_MTX_GRX_C_N0

PEG_MTX_GRX_C_N15

PEG_MTX_GRX_C_N3PEG_MTX_GRX_C_N2

PEG_MTX_GRX_C_N12

PEG_MTX_GRX_C_N7

PEG_MTX_GRX_C_N11

PEG_MTX_GRX_C_N13

PEG_MTX_GRX_C_N4

PEG_MTX_GRX_C_P[0..15]

PEG_MTX_GRX_C_N[0..15]

PEG_MRX_GTX_P[0..15]

PEG_MRX_GTX_N[0..15]

GP

WR

_SR

C_O

N

+5V_ALW

+15V_SUS+5V_RUN

+3.3V_RUN

+2.5V_RUN

+3.3V_SUS

+5V_RUN

+5V_RUN

+5V_RUN

+3.3V_RUN

+3.3V_RUN

+GFX_PWR_SRC

+GFX_PWR_SRC

+GFX_PWR_SRC+3.3V_RUN

+PWR_SRC

RUN_ON<38,40,45,46,47>

RED_VGA <20>

PLTRST_DELAY# <23>

VSYNC_VGA <20>

GRN_VGA <20>

CLK_PCIE_VGA# <6>

TV_CVBS_VGA <20>

CLK_PCIE_VGA <6>

CLK_DDC2_VGA <20>

RUNPWROK<37,38,40,48>

PEG_MRX_GTX_P[0..15] <12>

TV_C_VGA <20>

DAT_DDC2_VGA <20>

OTBMP# <16>

BLU_VGA <20>

TV_Y_VGA <20>

HSYNC_VGA <20>

PEG_MTX_GRX_C_P[0..15]<12>

PEG_MTX_GRX_C_N[0..15]<12>

ACAV_IN <16,38,49>

PEG_MRX_GTX_N[0..15] <12>

DVI_SCLK_L <36>DVI_SDAT_L <36>

DVI_DETECT_L <36>

BIA_PWM <12,20,38>

SBAT_SMBDAT <20,38>

SBAT_SMBCLK <20,38>

SDVO_CTRLCLK <12>

SDVO_CTRLDATA <12>

DVI2_TX0+<36>DVI2_TX0-<36>

DVI2_TX1+<36>DVI2_TX1-<36>

DVI2_TX2+<36>DVI2_TX2-<36>

DVI2_CLK+<36>DVI2_CLK-<36>

FPBACK_EN <20,37>

SIO_GFX_PWR <37>

YPRPB_DET# <20,37>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

VGA and DVI connector

19 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

PEG_MTX_GRX_C_P[0..15]、PEG_MTX_GRX_C_N[0..15]PEG_MRX_GTX_P[0..15] PEG_MRX_GTX_N[0、 、 ..15]

are PCI-E for external GFx in ZRS.

PEG_MTX_GRX_C_P[0..3] PEG_MTX_GR、 X_C_N[0..3]、PEG_MRX_GTX_P1 PEG、 _MRX_GTX_N1 are SDVO for DVI transmitter in ZUMA.

C195 0.1U_0402_16V4Z~D3@1 2

C175 0.1U_0402_16V4Z~D 1 2

C209

0.047U_0402_16V4Z~D

1

2

R144 0_0402_5%~D1@1 2

C206 0.1U_0402_16V4Z~D3@1 2

R617

100K_0402_5%~D

12

R158 0_0402_5%~D3@ 1 2

C555

0.1U_0603_50V4Z~D

1

2

C201 0.1U_0402_16V4Z~D3@1 2

R163100K_0402_5%~D

1 2

G

DS

Q222N7002_SOT23~D

2

13

C89

10U_0805_10V4Z~D

1

2

C181 0.1U_0402_16V4Z~D3@1 2

R615

100K_0402_5%~D

12

C542

0.1U_0603_50V4Z~D

1

2

C561

0.1U_0603_50V4Z~D

3@1

2

R157 0_0402_5%~D3@1 2

C193 0.1U_0402_16V4Z~D 1 2

C192 0.1U_0402_16V4Z~D 1 2

R145 0_0402_5%~D1@1 2

C189 0.1U_0402_16V4Z~D3@1 2

C184 0.1U_0402_16V4Z~D3@1 2

C203 0.1U_0402_16V4Z~D3@1 2

D25

RB500V_SOD323~D

2 1

C178 0.1U_0402_16V4Z~D 1 2

C185 0.1U_0402_16V4Z~D3@1 2

R164

10K_0402_5%~D

12

G

D

S

Q932N7002_SOT23~D

2

13

C207

0.047U_0402_16V4Z~D

1

2

C186 0.1U_0402_16V4Z~D3@1 2

C194 0.1U_0402_16V4Z~D 1 2

C549

10U_1206_25V6M

~D

@

1

2

U13

74AHC1G08GW_SOT353-5~D3@

IN1 1

IN2 2G3

O4

P5

C560

0.1U_0603_50V4Z~D

3@1

2

C183 0.1U_0402_16V4Z~D3@1 2

G

DS

Q232N7002_SOT23~D

2

13

C197 0.1U_0402_16V4Z~D3@1 2

C553

0.1U_0603_50V4Z~D

3@

1

2C550

0.1U_0603_50V4Z~D

3@

1

2

C208

0.047U_0402_16V4Z~D

1

2

EB

C

Q43PMBT3904_SOT23~D

2

31

C205 0.1U_0402_16V4Z~D3@1 2

C103

220P_0402_50V7K~D

1

2

C188 0.1U_0402_16V4Z~D3@1 2

C182 0.1U_0402_16V4Z~D3@1 2

C551

0.1U_0603_50V4Z~D

3@

1

2

C198 0.1U_0402_16V4Z~D3@1 2

C552

0.1U_0603_50V4Z~D

3@1

2

C176 0.1U_0402_16V4Z~D 1 2

C199 0.1U_0402_16V4Z~D3@1 2

R93

5.6K_0402_5%

~D

12

R155 0_0402_5%~D3@1 2

C190 0.1U_0402_16V4Z~D3@1 2

JVGA

JAE_WB3M200VD1~D

1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151535355555757595961616363656567676969717173737575777779798181838385858787898991919393959597979999101101103103105105107107109109111111113113115115117117119119121121123123125125127127129129131131133133135135137137139139141141143143145145147147149149151151153153155155157157159159161161163163165165167167169169171171173173175175177177179179181181183183185185187187189189191191193193195195197197199199201201

2 24 46 68 8

10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 5254 5456 5658 5860 6062 6264 6466 6668 6870 7072 7274 7476 7678 7880 8082 8284 8486 8688 8890 9092 9294 9496 9698 98

100 100102 102104 104106 106108 108110 110112 112114 114116 116118 118120 120122 122124 124126 126128 128130 130132 132134 134136 136138 138140 140142 142144 144146 146148 148150 150152 152154 154156 156158 158160 160162 162164 164166 166168 168170 170172 172174 174176 176178 178180 180182 182184 184186 186188 188190 190192 192194 194196 196198 198200 200202 202

203203 204 204205205 206 206

C191 0.1U_0402_16V4Z~D 1 2

R94

5.6K_0402_5%

~D

12

L6

BLM31AJ260SN1L~D

12

JDVI

JAE_DV2R024NDA~D

DATA2#1DATA22SHIELD243DATA4#4DATA45DDCCLK6DDCDATA7DATA1#9DATA110SHIELD1311DATA3#12CRT_VSYNC8

G126

DATA3 13VCC5 14GND5 15

HPDET 16DATA0# 17

DATA0 18SHIELD5 19DATA5# 20

DATA5 21SHIELDCLK 22

CLK 23CLK# 24

G2 25G327 G4 28G529 G6 30NC131 NC2 32

C177 0.1U_0402_16V4Z~D 1 2

C196 0.1U_0402_16V4Z~D3@1 2

C200 0.1U_0402_16V4Z~D3@1 2

C187 0.1U_0402_16V4Z~D3@1 2

R88

100K_0402_5%~D

1 2

R1600_0402_5%~D@

1 2

C202 0.1U_0402_16V4Z~D3@1 2

C180 0.1U_0402_16V4Z~D3@1 2

Q92FDS4435_NL_SO8~D

4

78

65

123

C179 0.1U_0402_16V4Z~D3@1 2

C94

0.1U_0402_16V4Z~D

1

2

C2240.1U_0402_16V4Z~D3@

12

C104

220P_0402_50V7K~D

1

2

C204 0.1U_0402_16V4Z~D3@1 2

Page 20: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SP_DIF_D

SVIDEO_Y

SPDIF_SHDN

SPDIF

SP_DIF

BLUE

GREEN

CLK_DDC2

LCD_A2-

LCD_A0+

LCD_A1-LCD_A1+

LCD_A2+

LCD_ACLK-

LCD_A0-

LCD_ACLK+

LCD_BCLK+

LCD_B0-LCD_B0+

LCD_B1+

LCD_BCLK-

LCD_B2-

LCD_TST

LDDC_CLKLDDC_DATA

SBAT_SMBDATSBAT_SMBCLK

BACKLITEON

LAMP_STAT#

LAMP_D_STAT#

SVIDEO_CVBS

SP_DIFB

LCD_B2+

BACKLITEON

LCD_B1-

FPBACK_EN

PANEL_BKEN

ENVDD

+LCDVDD

TV_CVBS

TV_C

TV_CVBS

TV_C DAT_DDC2

BLUE

GREEN

RED

RED

VSYNC

SPDIF_DOCKSPDIF

HSYNC

TV_Y

TV_Y

DAT_DDC2G

CLK_DDC2

CLK_DDC2DAT_DDC2

R

BJVGA_HS

M_ID2#JVGA_VS

HSYNC

VSYNC

SP_DIF_C

SVIDEO_C

+3.3V_RUN

+5V_RUN

+CRT_VCC

+5V_RUN

+CRT_VCC

+3.3V_RUN

+3.3V_RUN

+LCDVDD

+GFX_PWR_SRC

+5V_ALW

+3.3V_RUN

+15V_SUS

+15V_SUS +3.3V_RUN

+LCDVDD

+LCDVDD

+5V_RUN

+CRT_VCC

+3.3V_RUN

SPDIF_SHDN <26,37>

SPDIF<26>

SBAT_SMBDAT <19,38>SBAT_SMBCLK <19,38>

LCD_TST <23>

LDDC_CLK <12>LDDC_DATA <12>

LCD_A0+ <12>LCD_A0- <12>

LCD_A1- <12>

LCD_A2- <12>

LCD_A1+ <12>

LCD_ACLK- <12>

LCD_A2+ <12>

LCD_ACLK+ <12>

LCD_B0+ <12>LCD_B0- <12>

LCD_B2- <12>

LCD_B1+ <12>

LCD_BCLK- <12>LCD_BCLK+ <12>

BIA_PWM <12,19,38>

LAMP_STAT# <23>

FPBACK_EN<19,37>

PANEL_BKEN<12>

LCD_B2+ <12>

LCD_B1- <12>

ENVDD<12>

TV_C_NB<12>

TV_C_VGA<19>

TV_CVBS_NB<12>

TV_CVBS_VGA<19>

TV_Y_VGA<19>

TV_Y_NB<12>

VSYNC_VGA<19>

VSYNC_NB<12>

HSYNC_VGA<19>

HSYNC_NB<12>

DAT_DDC2_VGA<19>

DAT_DDC2_NB<12>

CLK_DDC2_VGA<19>

BLU_VGA<19>

GRN_VGA<19>

RED_VGA<19>

CLK_DDC2_NB<12>

BLU_NB<12>

GRN_NB<12>

RED_NB<12>

RED<36>

GREEN<36>

BLUE<36>

CLK_DDC2<36>DAT_DDC2<36>

SPDIF_DOCK <36>SPDIF<26>

TV_C<36>

TV_CVBS<36>

TV_Y<36>

VSYNC_DOCK <36>

HSYNC_DOCK <36>

YPRPB_DET# <19,37>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Interval LVDS, TV_OUT and CRT connector

20 62Tuesday, December 13, 2005

Compal Electronics, Inc.

CLOSE TO JSVID

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

M'07 inverter support - Populate R152, R133, Depop U10, C706.D'05 inverter support - Populate U10, C706. Depop R152, R133.

M'07 inverter support - Depop D7.D'05 inverter support - Populate D7.

To place the 0-ohm strapping optionsfor HSYNC and VSYNC (R67, R68, R57,R64) close to the buffers (U4 , U5) tominimize the stub lengths.

POPULATE R387 WHEN COMPONENT VIDEO IS ENABLED.DE-POPULATE R397 WHEN COMPONENT VIDEO IS ENABLED.

Place R755 near U4 and R756 near U5.

C413,C414,C416,C417,C421,C422 pop82pF and L43,L44,L45 pop 1.8uH for UMA

D11DA204U_SOT323~D@

2 31

C24

10P_0402_50V8J~D

@

1

2

JLVDS

IPEX_20330-044E-11F~D1@

TXUCLKUT- 44

GND1 42

TXUOUT2+ 40

TXUOUT1- 38

GND3 36

TXUOUT0+ 34

TXLCLKOUT- 32

GND5 30

TXLOUT2+ 28

TXLOUT1- 26

GND7 24

TXLOUT0+ 22

PANEL_I2C_DAT 19GND9 18

GND10 16

LCDVDD2 14

LCDPWR_SRC 12

LCDPWR_SRC 10

+5V_ALWF 3

PBAT_SMBCLK 6

GND13 4

FPBACK 8

TXUCLKUT+ 43

TXUOUT2- 41

GND2 39

TXUOUT1+ 37

TXUOUT0- 35

GND4 33

TXLCLKOUT+ 31

TXLOUT2- 29

GND6 27

TXLOUT1+ 25

TXLOUT0- 23

GND8 21PANEL_I2C_CLK 20

VEDID 17

LCDVDD1 15

PNL_SLFTST 13

LCDPWR_SRC 11

GND11 9

LAMP_START 2

PBAT_SMBDAT 5

GND12 7

GND14 1

MGND145MGND246MGND347MGND448MGND549MGND650MGND751MGND856MGND957MGND1054MGND1155

C413

47P_0402_50V8J~D

1

2

R131

100K_0402_5%~D1@

12

C5480.1U_0603_50V4Z~D1@

1

2

U5

SN74AHCT1G125GW_SC70-5~D

A2 Y 4

P5

G3

OE#

1

C709 22P_0402_50V8J~D@

R73 0_0402_5%~D1@ 12

R152

0_0402_5%~D1@

1 2

R18

2.2K_0402_5%

~D

12

L3BLM18BB600SN1D_0603~D

1 2

R419

220_0603_1%~D

12

C22

22P_0402_50V8J~D

@

1

2

D17RB500V_SOD323~D

21

R81 0_0402_5%~D3@12

R594 0_0402_5%~D3@12

R87 0_0402_5%~D3@12

R38

1K_0402_5%~D

1 2

R84 0_0402_5%~D1@ 12

C33

22P_0402_50V8J~D

1

2

C541

0.1U_0402_16V4Z~D1@

1

2

R42

39_0402_5%~D

1 2

S

GD

Q91SI3456BDV-T1-E3_TSOP6~D

1@

3

6

24 5

1

D7RB751V_SOD323~D@

21

U4

SN74AHCT1G125GW_SC70-5~D

A2 Y 4

P5

G3

OE#

1

L450.47UH_CIL10NR47KNC_10%_0603~D

1 2

U10

74AHC1G08GW_SOT353-5~D@

IN11

IN22 G3

O 4

P5

R95 0_0402_5%~D3@12

L2BLM18BB600SN1D_0603~D

1 2

R64 0_0402_5%~D3@12

R417

110_0603_1%~D

12

R165

100K_0402_5%~D1@

12

C42247P_0402_50V8J~D

1

2

C416

47P_0402_50V8J~D

1

2

R497

150_0402_1% 1

2

R57 0_0402_5%~D1@ 1 2

R503

150_0402_1% 1

2

C25

10P_0402_50V8J~D

@

1

2C

656

33P_0402_50V8J~D

@

1

2

R133 0_0402_5%~D1@1 2

R3970_0805_5%~D1@

12

R602

10K_0402_5%~D

12

JCRT

FOX_DZ11A91-ND201-7F~D

611

17

1228

1339

144

1015

5

1819

L440.47UH_CIL10NR47KNC_10%_0603~D

1 2

C711

22P_0402_50V8J~D@

G

D

SQ44

2N7002_SO

T23~D1@

2

13

R166

100K_0402_5%~D1@

12

R713 0_0402_5%~D@1 2

R107 0_0402_5%~D1@ 12

R98 0_0402_5%~D3@12

C41747P_0402_50V8J~D

1

2

C304

300P_1808_3000V8K~D@

1

2

L430.47UH_CIL10NR47KNC_10%_0603~D

1 2

R32

1K_0402_5%~D

@

12

D18DA204U_SOT323~D@

2 31

C318

0.1U_0402_16V4Z~D 1

2

R605

470_0402_5%~D1@

12

R41

39_0402_5%~D

1 2

JSVID

FOX_MH11777-BUR6-7F~D

246

35

1

98

7

C710

22P_0402_50V8J~D@

C655

0.01U_0402_16V7K~D

1

2C

321

0.1U_0402_16V4Z~D

1

2

R504

150_0402_1% 1

2

C545

0.1U_0402_16V4Z~D

1@ 1

2

C654

0.1U_0402_16V4Z~D

1

2

C539

0.1U_0402_16V4Z~D1@

1

2

C41447P_0402_50V8J~D

1

2

R91 0_0402_5%~D1@ 1 2

D12DA204U_SOT323~D@

2 31

R755

0_0402_5%~D

R595 0_0402_5%~D3@12

D19DA204U_SOT323~D@

2 31

R172

100K_0402_5%~D

1@

12

R26

150_0402_1%

12

C40

22P_0402_50V8J~D

1

2

C54

00.

1U_0

402_

16V4

Z~D

1@

1

2

R416

0_0805_5%~D

1 2

R75 0_0402_5%~D3@12

R68 0_0402_5%~D3@12

C23

22P_0402_50V8J~D

@

1

2

L5BLM18AG121SN1D_0603~D

1 2

C319

0.01U_0402_16V7K~D

12

C30

22P_0402_50V8J~D

@

1

2

R105 0_0402_5%~D1@ 12

R43

2.2K_0402_5%

~D

12

R17

150_0402_1%

12

R97 0_0402_5%~D1@ 1 2

R104 0_0402_5%~D1@ 12

R22

150_0402_1%

12

Q42

DTC124EKA_SC59~D1@

I2

O1

G3

R7560_0402_5%~D

C54

70.

1U_0

402_

16V4

Z~D

1@

1

2

C421

47P_0402_50V8J~D

1

2

L1BLM18BB600SN1D_0603~D

1 2

R593 0_0402_5%~D3@12

D20DA204U_SOT323~D@

2 31

L4BLM18AG121SN1D_0603~D

1 2

U28SN74AHCT1G125GW_SC70-5~D

A2 Y 4

P5

G3

OE#

1

T23 PAD~D

C653

33P_0402_50V8J~D

@

1

2

R78 0_0402_5%~D1@ 12

R707 0_0402_5%~D@1 2

C7060.1U_0402_16V4Z~D@

1 2

R39

1K_0402_5%~D

@

12

G

D

SQ45

2N7002_SOT23~D1@

2

13

D10DA204U_SOT323~D@

2 31

C29

10P_0402_50V8J~D

@

1

2

R67 0_0402_5%~D1@ 1 2

R387

0_0805_5%~D3@

1 2

U27

SN74AHCT1G125GW_SC70-5~DA2 Y 4

P5

G3

OE#

1

Page 21: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CLK_PCI_ICH

CLK

_IC

H_T

ER

M

CO

INC

ELL

_R

PCI_REQ5#

PCI_SERR#

ICH_GPIO5_PIRQH#

PCI_PIRQA# ICH_GPIO2_PIRQE#ICH_GPIO3_PIRQF#ICH_GPIO4_PIRQG#

PCI_PIRQD#PCI_PIRQC#PCI_PIRQB#

ICH_PME#

PCI_PLTRST#

PCI_REQ3#

PCI_GNT4#PCI_REQ4#

PCI_GNT5#

MCH_ICH_SYNC#

PCI_REQ2#

PCI_C_BE2#PCI_C_BE3#

PCI_C_BE1#PCI_C_BE0#

CLK_PCI_ICH

PCI_TRDY#PCI_FRAME#

PCI_DEVSEL#

PCI_PARPCI_IRDY#

PCI_STOP#

PCI_PERR#PCI_PLOCK#

PCI_PCIRST#

PCI_AD12PCI_AD13

PCI_AD21

PCI_AD5

PCI_AD20

PCI_AD4

PCI_AD1

PCI_AD11

PCI_AD7

PCI_AD17

PCI_AD3

PCI_AD27

PCI_AD6

PCI_AD18

PCI_AD30

PCI_AD10

PCI_AD23

PCI_AD16

PCI_AD31

PCI_AD9

PCI_AD22

PCI_AD19

PCI_AD8

PCI_AD25PCI_AD24

PCI_AD2

PCI_AD26

PCI_AD14

PCI_AD28

PCI_AD15

PCI_AD29

PCI_AD0 PCI_REQ0#

PCI_REQ2#

PCI_REQ3#

PCI_PIRQD#

PCI_REQ5#

PCI_REQ4#

PCI_DEVSEL#

PCI_TRDY#

PCI_FRAME#

PCI_STOP#

PCI_PLOCK#

PCI_IRDY#

PCI_PERR#

PCI_SERR#

PCI_PIRQA#

PCI_PIRQC#

PCI_PIRQB#

ICH_GPIO5_PIRQH#

ICH_GPIO2_PIRQE#

ICH_GPIO3_PIRQF#

ICH_GPIO4_PIRQG#

PCI_REQ0#

PCI_REQ1#

PCI_GNT4#PCI_GNT5#

PCI_GNT0#

+COINCELL

PLTRST2#

PCI_GNT2#

PCI_GNT3#

PCI_REQ1#

PLTRST3#

PCI_PCIRST#PCI_RST#

PCI_PLTRST#PLTRST1#

+COINCELL

+3.3V_RTC_LDO

+RTC_CELL

+3.3V_RUN

+COINCELL

+3.3V_SUS

+3.3V_RUN

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS

PCI_C_BE1# <30,33,35>

PCI_PAR <30,33,35>

PCI_SERR# <31,33,35>

PCI_IRDY# <31,33,35,36>

PCI_PERR# <31,33,35>

PCI_C_BE3# <31,33,35>

PCI_PIRQC#<33>

PCI_FRAME# <31,33,35,36>

PCI_C_BE2# <31,33,35>

PCI_DEVSEL# <31,33,35>

PCI_TRDY# <31,33,35>

PCI_PIRQD#<33>

PCI_C_BE0# <31,33,35>

PCI_STOP# <30,33,35>

PCI_AD[0..31]<30,31,33,35>

ICH_PME# <37>CLK_PCI_ICH <6>

MCH_ICH_SYNC# <10>

PCI_PLOCK# <35>

PCI_PIRQA#<35>

PCI_GNT0# <35,36>

PCI_RST# <30,33,34,35>

PLTRST1# <10,23,30>

PLTRST2# <34,37,38>

PCI_GNT2# <33>PCI_REQ2# <33>

PCI_PIRQB#<31>

PCI_GNT3# <31>PCI_REQ3# <31>

PCI_REQ0# <36>

PLTRST3# <34>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

ICH7-M(1/4)

21 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

PCI

GNT5#R322

GNT4#R323

11

10

01

unstuff unstuff

unstuff

unstuff stuff

stuff

ICH Boot BIOS select

LPC

SPI

Place closely pin U19.A9

*

R331 8.2K_0402_5%~D

1 2

R350 8.2K_0402_5%~D

1 2

R351 8.2K_0402_5%~D

1 2 U22D

74VHC08MTCX_NL_TSSOP14~D

IN113

IN212 OUT 11

P14

G7

R352 8.2K_0402_5%~D1 2

R335 8.2K_0402_5%~D

1 2

R401K_0402_5%~D

12

U22A

74VHC08MTCX_NL_TSSOP14~D

IN11

IN22 OUT 3

P14

G7

U22C

74VHC08MTCX_NL_TSSOP14~D

IN110

IN29 OUT 8

P14

G7

R535 8.2K_0402_5%~D

1 2

R332 8.2K_0402_5%~D1 2

R533 8.2K_0402_5%~D

1 2

C2950.1U_0402_16V4Z~D

R348 8.2K_0402_5%~D

1 2

R347 8.2K_0402_5%~D

1 2

R349 8.2K_0402_5%~D

1 2

R322

1K_0402_5%~D

12

R344 8.2K_0402_5%~D

1 2

D1BAT54C-7-F_SOT23~D

23

1

Interrupt I/F

PCI

MISC

U19B

ICH7M B0_BGA652~D

FRAME# F16

GPIO17 / GNT5# D8

TRDY# F14STOP# F15

GPIO2 / PIRQE# G8GPIO3 / PIRQF# F7GPIO4 / PIRQG# F8GPIO5 / PIRQH# G7

C/BE0# B15C/BE1# C12C/BE2# D12C/BE3# C15

IRDY# A7PAR E10

PCIRST# B18DEVSEL# A12

PERR# C9PLOCK# E11

SERR# B10

PIRQC#C5

RSVD[4]AH4

PIRQA#A3

RSVD[5]AD9

RSVD[2]AD5RSVD[3]AG4

PIRQB#B4

PIRQD#B5

RSVD[1]AE5

REQ0# D7GNT0# E7REQ1# C16GNT1# D16REQ2# C17GNT2# D17REQ3# E13GNT3# F13

REQ4# / GPIO22 A13GNT4# / GPIO48 A14GPIO1 / REQ5# C8

AD0E18AD1C18AD2A16AD3F18AD4E16AD5A18AD6E17AD7A17AD8A15AD9C14AD10E14AD11D14AD12B12AD13C13AD14G15AD15G13AD16E12AD17C11AD18D11AD19A11AD20A10AD21F11AD22F10AD23E9AD24D9AD25B9AD26A8AD27A6AD28C7AD29B6AD30E6AD31D6

RSVD[6] AE9RSVD[7] AG8RSVD[8] AH8RSVD[9] F21

MCH_SYNC# AH20

PLTRST# C26PCICLK A9

PME# B19

U22B

74VHC08MTCX_NL_TSSOP14~D

IN14

IN25 OUT 6

P14

G7

R536 8.2K_0402_5%~D

1 2

C44

1U_0603_10V4Z~D

1

2

R330 8.2K_0402_5%~D

1 2

R327 8.2K_0402_5%~D

1 2

R333 8.2K_0402_5%~D1 2

R353 8.2K_0402_5%~D

1 2

R329

10_0402_5%~D@

12

R323

1K_0402_5%~D@

12

R334 8.2K_0402_5%~D

1 2

JCOIN

MOLEX_53398-0290~D

1122

R345 8.2K_0402_5%~D

1 2

C46

0.1U_0402_16V4Z~D@

1 2

R532 8.2K_0402_5%~D

1 2

R328 8.2K_0402_5%~D

1 2

C285

8.2P_0402_50V8J~D@

1

2

R346 8.2K_0402_5%~D

1 2

Page 22: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_INIT#

H_IGNNE#

H_INTR

H_NMI

H_STPCLK#

H_FERR#

H_DPRSTP#

IDE_DD9

IDE_DD2

SATA_TX0-_N0

ICH_RTCX2

CLK_PCIE_SATA#

IDE_DD15

IDE_DD0

IDE_DIOR#

CLK_PCIE_SATA

LPC_LFRAME#

IDE_DD14

LPC_LDRQ1#

IDE_DIOW#

ICH_AZ_MDC_SDIN1

IDE_DD6

ICH_AZ_SDOUT_R

IDE_DD13

SATA_ACT#

IDE_DD10

IDE_DD8

IDE_DD1

IDE_DD7

IDE_DD4

LPC_LAD3

ICH_AZ_RST_R#

IDE_IRQ

IDE_DD12

IDE_DD3

IDE_DD5

ICH_RTCX1

SIO_RCIN#

LPC_LAD0

IDE_DD11

IDE_DDACK#

ICH_AZ_CODEC_SDIN0

LPC_LDRQ0#INTRUDER#

IDE_DIORDY

IDE_DCS1#

INTRUDER#

ICH_AZ_SYNC_R

ICH_AZ_SYNC_R

ICH_AZ_RST_R#

ICH_AZ_SDOUT_R

H_CPUSLP#H_CPUSLP_R#

H_SMI#

LPC_LAD2

IDE_DCS3#

H_FERR#

LPC_LAD1

ICH_INTVRMEN

SATA_TX0+_P0

SATA_RX0+

ICH_RTCRST#

SATA_RX0-

H_A20M#SIO_A20GATE

H_DPSLP#

H_DPRSTP_R#

H_PWRGOOD

IDE_DD[0..15]

IDE_DA0IDE_DA1IDE_DA2

IDE_DDREQ

ICH_AZ_BITCLK_R

ICH_AZ_BITCLK_R

IDE_IRQ

SIO_A20GATE

IDE_DIORDY

SIO_RCIN#

SATA_ACT#

ICH_INTVRMEN

THRMTRIP_ICH#

+RTC_CELL

+RTC_CELL

+3.3V_RUN

+3.3V_RUN

+1.05V_VCCP

+1.05V_VCCP+3.3V_RUN

IDE_DD[0..15] <25>

IDE_DDACK#<25>

IDE_DIOR#<25>IDE_DIOW#<25>

ICH_AZ_MDC_SDIN1<28>

IDE_DDREQ <25>

CLK_PCIE_SATA<6>

H_INTR <7>H_INIT# <7>

H_DPSLP# <7>

H_SMI# <7>

H_IGNNE# <7>

H_A20M# <7>

H_NMI <7>

H_STPCLK# <7>

H_CPUSLP# <7,10>

SATA_ACT#<39>

IDE_IRQ<25>

H_DPRSTP# <7,48>

SIO_RCIN# <38>

IDE_DIORDY<25>

IDE_DCS1# <25>

LPC_LDRQ0# <37>

ICH_AZ_CODEC_SDIN0<26>

IDE_DCS3# <25>

CLK_PCIE_SATA#<6>

LPC_LDRQ1# <37>

ICH_AZ_CODEC_RST#<26>

ICH_AZ_CODEC_SYNC<26>

ICH_AZ_CODEC_SDOUT<26>

ICH_AZ_MDC_SYNC<28>

ICH_AZ_MDC_RST#<28>

ICH_AZ_MDC_SDOUT<28>

SATA_TX0-<25>

SATA_TX0+<25>

SATA_RX0+<25>SATA_RX0-<25>

SIO_A20GATE <38>

H_PWRGOOD <7>

IDE_DA0 <25>IDE_DA1 <25>IDE_DA2 <25>

LPC_LAD0 <30,37,38>LPC_LAD1 <30,37,38>LPC_LAD2 <30,37,38>LPC_LAD3 <30,37,38>

ICH_AZ_MDC_BITCLK<28>

ICH_AZ_CODEC_BITCLK<26>

LPC_LFRAME# <30,37,38>

H_FERR# <7>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

ICH7-M(2/4)

22 62Tuesday, December 13, 2005

Compal Electronics, Inc.

Package9.6X4.06 mm

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Place near ICH7 side.

H_DPRSTP# daisy

Close to U19

Within 500 mils

ICH7-M --> Yonah --> IMVP6

R548

0_0402_1%@

12

R58456_0402_5%~D

1 2

R557

1M_0402_5%~D

12

R297 33_0402_5%~D 1 2

R186

10K_0402_5%~D

12

C562

1U_0603_10V4Z~D

1 2

C233 3900P_0402_50V7K~D12

CMOS_CLR @SHORT PADS~D

11 2 2

R36

4.7K_0402_5%~D

1 2

R300 33_0402_5%~D

1 2

R560

20K_0402_5%~D

1 2

R544 33_0402_5%~D 1 2

C5350.1U_0402_16V4Z~D@

1

2

C260

27P_0402_50V8J~D@

1

2

C234 3900P_0402_50V7K~D12

R266

0_0402_5%~D 1 2

R586 0_0402_5%~D 12

R577

56_0402_5%~D

12

RTC

LAN

SATA

AC-97/AZALIA

LPC

CPU

IDE

U19A

ICH7M B0_BGA652~D

RTCX1AB1RTCX2AB2

RTCRST#AA3

INTVRMENW4INTRUDER#Y5

EE_CSW1EE_SHCLKY1EE_DOUTY2EE_DINW3

LAN_CLKV3

LAN_RSTSYNCU3

LAN_RXD0U5LAN_RXD1V4LAN_RXD2T5

LAN_TXD0U7LAN_TXD1V6LAN_TXD2V7

ACZ_BCLKU1ACZ_SYNCR6

ACZ_RST#R5

ACZ_SDIN0T2ACZ_SDIN1T3ACZ_SDIN2T1

ACZ_SDOUTT4

SATALED#AF18

SATA0RXNAF3SATA0RXPAE3SATA0TXNAG2SATA0TXPAH2

SATA2RXNAF7SATA2RXPAE7SATA2TXNAG6SATA2TXPAH6

SATA_CLKNAF1SATA_CLKPAE1

SATARBIASNAH10SATARBIASPAG10

IORDYAG16IDEIRQAH16DDACK#AF16DIOW#AH15DIOR#AF15

LAD0 AA6LAD1 AB5LAD2 AC4LAD3 Y6

LDRQ0# AC3LDRQ1# / GPIO23 AA5

LFRAME# AB3

A20GATE AE22A20M# AH28

CPUSLP# AG27

TP1 / DPRSTP# AF24TP2 / DPSLP# AH25

FERR# AG26

GPIO49 / CPUPWRGD AG24

IGNNE# AG22INIT3_3V# AG21

INIT# AF22INTR AF25

RCIN# AG23

SMI# AF23NMI AH24

STPCLK# AH22

THERMTRIP# AF26

DA0 AH17DA1 AE17DA2 AF17

DCS1# AE16DCS3# AD16

DD0 AB15DD1 AE14DD2 AG13DD3 AF13DD4 AD14DD5 AC13DD6 AD12DD7 AC12DD8 AE12DD9 AF12

DD10 AB13DD11 AC14DD12 AF14DD13 AH13DD14 AH14DD15 AC15

DDREQ AE15

R184 24.9_0402_1%~D

1 2

R587 0_0402_5%~D@12

C25712P_0402_50V8J~D

12

R197

8.2K_0402_5%~D

12

R275

33_0402_5%~D

1 2

R27433_0402_5%~D

1 2

C25612P_0402_50V8J~D

12

R591

10K_0402_5%~D@

12

R549 332K_0402_1%~D

1 2

R267

10M_0402_5%~D

12

R299 33_0402_5%~D

1 2

R286 33_0402_5%~D 1 2

R187

10K_0402_5%~D

12

Y2

32.768K_12.5PF_Q13MC30610003~D

14

23

R545 33_0402_5%~D 1 2

C25927P_0402_50V8J~D@

12

Page 23: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SMBALERT#

ICH_BATLOW#

ICH_PCIE_WAKE#

SIO_THRM#

USBP3+

SIO_THRM#

USBP5-

ICH_PCIE_WAKE#

USBP7-

CLK_PCIE_ICH#

USBP5+

PM_BMBUSY#

CLK_ICH_14M

CLK_PCIE_ICH

PLTRST1#

USBP2+

USBP4-

USBP6-

H_STP_CPU#

IMVP_PWRGD

SIO_SLP_S3#ITP_DBRESET#

USBP3-

ICH_RI#

USBP6+

IRQ_SERIRQ

USBP2-

SIO_SLP_S5#

USBP4+

USBP7+

SMBALERT#

CLKRUN#

USBRBIAS

DMI_IRCOMP

GPIO24

USB_OC0#

USB_OC3#

USB_OC1#USB_OC2#

USB_OC5#USB_OC6#USB_OC7#

ICH_SMBCLK

SPKR

LINKALERT#

USB_OC4#

H_STP_PCI#

ICH_SMLINK1

ICH_BATLOW#

DPRSLPVR

SIO_PWRBTN#

ICH_PWRGD

ICH_SUSCLK

USBP1+USBP1-

SATA_CLKREQ#

SPI_CS#

DMI_MTX_IRX_N0

DMI_MTX_IRX_N1

DMI_MTX_IRX_N2

DMI_MTX_IRX_N3

DMI_MTX_IRX_P0

DMI_MTX_IRX_P1

DMI_MTX_IRX_P2

DMI_MTX_IRX_P3

DMI_MRX_ITX_P0

DMI_MRX_ITX_P1

DMI_MRX_ITX_N0

DMI_MRX_ITX_N1

DMI_MRX_ITX_N2

DMI_MRX_ITX_N3

DMI_MRX_ITX_P2

DMI_MRX_ITX_P3

CLK_ICH_14MCLK_ICH_48M

CLK_ICH_48MSUSPWROK

ICH_SMBDATA

USBP0+USBP0-

PLTRST_DELAY#LED_FAULT_DET

SIO_EXT_SMI#

SIO_EXT_SCI#

PCIE_TX3-_N3

PCIE_RX3-PCIE_RX3+

PCIE_RX2-PCIE_RX2+

PCIE_TX2+_P2PCIE_TX2-_N2

DPRSLPVR

LINKALERT#

RSVD_HDD_DET#

PCIE_TX4-_N4

PCIE_RX4-PCIE_RX4+

PCIE_TX4+_P4

BT_RADIO_DIS#

BT_RADIO_DIS#

LCD_TST

LAMP_STAT#

HDDC_EN#MODC_EN#

ICH_EC_SPI_CLK

USB_OC7#USB_OC6#

USB_OC4#USB_OC5#

USB_OC0#USB_OC3#

USB_OC1#USB_OC2#

IRQ_SERIRQ

LED_FAULT_DETIDE_RST_MOD

SIO_SLP_S3#

CLKRUN#

ICH_EC_SPI_DINICH_EC_SPI_DO

ICH_SMLINK0

SATA0GP

SIO_EXT_SCI#

SIO_EXT_SMI#

PCIE_TX3+_P3

LAMP_STAT#

IMVP_PWRGD

MODC_EN#

HDDC_EN#

+3.3V_SUS

+3.3V_RUN

+1.5V_RUN

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS+3.3V_SUS +3.3V_SUS

+3.3V_SUS

+3.3V_RUN

+3.3V_SUS

SIO_EXT_SMI#<38>

H_STP_CPU#<6>

IMVP_PWRGD<40,48>

USBP4+ <29>USBP5- <29>

USBP3+ <29>

USBP5+ <29>

USBP4- <29>

USBP3- <29>USBP2+ <29>USBP2- <29>

IRQ_SERIRQ<30,33,37,38>

SIO_SLP_S3# <38>

SIO_SLP_S5# <38>

CLK_PCIE_ICH# <6>CLK_PCIE_ICH <6>

PM_BMBUSY#<10>

SIO_THRM#<38>

USBP6+ <29>USBP6- <29>

PLTRST1# <10,21,30>

CLK_ICH_14M <6>CLK_ICH_48M <6>

ICH_SMBDATA<6,30,34>ICH_SMBCLK<6,30,34>

CLKRUN#<31,33,37,38>

SPKR<27>

H_STP_PCI#<6>

SUSPWROK <16,40>

SIO_PWRBTN# <38>

ICH_PWRGD <10,40>

DPRSLPVR <10,48>

USBP1+ <29>USBP1- <29>

PLTRST_DELAY# <19>SATA_CLKREQ# <6>

DMI_MTX_IRX_N0 <10>

DMI_MTX_IRX_N1 <10>

DMI_MTX_IRX_N2 <10>

DMI_MTX_IRX_N3 <10>

DMI_MTX_IRX_P0 <10>DMI_MRX_ITX_N0 <10>DMI_MRX_ITX_P0 <10>

DMI_MTX_IRX_P1 <10>DMI_MRX_ITX_N1 <10>DMI_MRX_ITX_P1 <10>

DMI_MTX_IRX_P2 <10>DMI_MRX_ITX_N2 <10>DMI_MRX_ITX_P2 <10>

DMI_MTX_IRX_P3 <10>DMI_MRX_ITX_N3 <10>DMI_MRX_ITX_P3 <10>

USB_OC6#<29>

USB_OC4#<29>

USB_OC1#<29>

SIO_EXT_SCI# <38>

ICH_EC_SPI_CLK<38>

ICH_EC_SPI_DIN<38>ICH_EC_SPI_DO<38>

SPI_CS#<38>

PCIE_TX3-<30>

PCIE_RX3-<30>

PCIE_TX3+<30>

PCIE_RX3+<30>

PCIE_RX2-<34>PCIE_RX2+<34>PCIE_TX2-<34>

PCIE_TX2+<34>

USB_OC2#<29>USB_OC3#<29>

PCIE_RX4-<34>PCIE_RX4+<34>PCIE_TX4-<34>

PCIE_TX4+<34>

BT_RADIO_DIS#<28>

ITP_DBRESET#<7,38>

LCD_TST<20>

LAMP_STAT#<20>

HDDC_EN# <25>MODC_EN# <25>

IDE_RST_MOD<25>LED_FAULT_DET<41>

ICH_PCIE_WAKE#<37>

SIO_EXT_WAKE#<38>

USB_OC5#<29>

USBP0- <37>USBP0+ <37>

USBP7- <36>USBP7+ <36>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

ICH7-M(3/4)

23 62Tuesday, December 13, 2005

Compal Electronics, Inc.

(PCI Express Wake Event)

Place closely pin U19.B2

Place closely pin U19.AC1

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Within 500 mils

Within 500 mils

GIGA LAN--->

Mini Card--->

Express Card--->

Place close to pin AD22 of U19

Reserved for Rikers Use Only

R534 24.9_0402_1%~D 1 2

R354 10K_0402_5%~D

1 2

R337 680_0402_5%~D

1 2

R53

8

10K_

0402

_5%

~D

12

R19810_0402_5%~D@

12

C272 0.1U_0402_16V4Z~D

1 2

R553

10K_0402_5%~D

1 2

C274 0.1U_0402_16V4Z~D

1 2

R54647_0402_5%~D

1 2

T10 PAD~D

T8 PAD~D

R324

2.2K_0402_5%~D

12

R53

7

10K_

0402

_5%

~D

12

R784 100K_0402_5%~D@1 2

R783 100K_0402_5%~D@1 2

R559

10K_0402_5%~D

1 2

R54

2

10K_

0402

_5%

~D

12

R597 8.2K_0402_5%~D1 2

T7 PAD~D

RP8

10K_1206_8P4R_5%~D

1 82 73 64 5

R336 10K_0402_5%~D

1 2

PCI-EXPRESS

DIRECT MEDIA INTERFACE

USB

SPI

U19D

ICH7M B0_BGA652~D

SPI_CLKR2SPI_CS#P6SPI_ARBP1

SPI_MOSIP5SPI_MISOP2

DMI0RXN V26DMI0RXP V25DMI0TXN U28DMI0TXP U27

DMI1RXN Y26DMI1RXP Y25DMI1TXN W28DMI1TXP W27

DMI2RXN AB26DMI2RXP AB25DMI2TXN AA28DMI2TXP AA27

DMI3RXN AD25DMI3RXP AD24DMI3TXN AC28DMI3TXP AC27

DMI_CLKN AE28DMI_CLKP AE27

DMI_ZCOMP C25DMI_IRCOMP D25

PERn1F26PERp1F25PETn1E28PETp1E27

PERn2H26PERp2H25PETn2G28PETp2G27

PERn3K26PERp3K25PETn3J28PETp3J27

PERn4M26PERp4M25PETn4L28PETp4L27

PERn5P26PERp5P25PETn5N28PETp5N27

PERn6T25PERp6T24PETn6R28PETp6R27

OC0#D3OC1#C4OC2#D5OC3#D4OC4#E5OC5# / GPIO29C3OC6# / GPIO30A2OC7# / GPIO31B3

USBP0N F1USBP0P F2USBP1N G4USBP1P G3USBP2N H1USBP2P H2USBP3N J4USBP3P J3USBP4N K1USBP4P K2USBP5N L4USBP5P L5USBP6N M1USBP6P M2USBP7N N4USBP7P N3

USBRBIAS# D2USBRBIAS D1

R598 8.2K_0402_5%~D@1 2

R181 0_0402_5%~D1 2

R554 10K_0402_5%~D 1 2

R561

10_0402_5%~D@

12

R338 10K_0402_5%~D@1 2

R567

100K_0402_5%~D

12

C515

4.7P_0402_50V8C~D@

1

2

T9 PAD~D

R343

10K_0402_5%~D

12

C267 0.1U_0402_16V4Z~D

1 2

R317 22.6_0402_1%~D 1 2

R562 10K_0402_5%~D

1 2

C269 0.1U_0402_16V4Z~D

1 2

SATA

POWER MGT

SYS

SMB

GPIO

Clocks

GPIO

GPIO

U19C

ICH7M B0_BGA652~D

RI#A28

SPKRA19

SYS_RST#A22 SUS_STAT#A27

GPIO0 / BM_BUSY#AB18

GPIO26A21

GPIO27B21GPIO28E23

GPIO32 / CLKRUN#AG18

GPIO33 / AZ_DOCK_EN#AC19GPIO34 / AZ_DOCK_RST#U2

VRMPWRGDAD22

GPIO11 / SMBALERT#B23

SUSCLK C20

SLP_S3# B24SLP_S4# D23SLP_S5# F22

PWROK AA4

GPIO16 / DPRSLPVR AC22

TP0 / BATLOW# C21

PWRBTN# C23

LAN_RST# C19

RSMRST# Y4

GPIO21 / SATA0GP AF19GPIO19 / SATA1GP AH18GPIO36 / SATA2GP AH19GPIO37 / SATA3GP AE19

CLK14 AC1CLK48 B2

GPIO9 E20GPIO10 A20GPIO12 F19GPIO13 E19GPIO14 R4GPIO15 E22GPIO24 R3GPIO25 D20

SATACLKREQ#/GPIO35 AD21GPIO38 AD20GPIO39 AE20

SMBCLKC22SMBDATAB22LINKALERT#A26SMLINK0B25SMLINK1A25

GPIO18 / STPPCI#AC20GPIO20 / STPCPU#AF21

WAKE#F20SERIRQAH21THRM#AF20

GPIO6AC21GPIO7AC18GPIO8E21

R340 8.2K_0402_5%~D 1 2

R356

2.2K_0402_5%~D

12

C275 0.1U_0402_16V4Z~D

1 2

R526

10_0402_5%~D@

12

R580

8.2K_0402_5%

~D

12

R326

10K_0402_5%~D

12

C448

4.7P_0402_50V8C~D@

1

2

C713

0.1U_0402_16V4Z~D

1

2

C266 0.1U_0402_16V4Z~D

1 2

R541 47_0402_5%~D

1 2

R325 10K_0402_5%~D@12

R355 8.2K_0402_5%~D

1 2

R357 10K_0402_5%~D

1 2

R339 10K_0402_5%~D

1 2

RP7

10K_1206_8P4R_5%~D

1 82 73 64 5

R185 10K_0402_5%~D

1 2

Page 24: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.5VRUN_L

ICH_V5REF_SUS

ICH_V5REF_RUN

ICH_V5REF_RUN

ICH_V5REF_SUS

+1.5V_DMIPLL

+VCCSATAPLL

+1.5V_DMIPLLR

+VCCSATAPLLR

+1.05V_VCCP

+3.3V_SUS

+1.5V_RUN

+3.3V_RUN+5V_RUN

+3.3V_SUS+5V_SUS

+1.5V_RUN

+1.5V_RUN

+3.3V_SUS

+3.3V_RUN

+1.5V_RUN

+1.05V_VCCP

+1.5V_RUN

+1.5VRUN_L

+1.5V_DMIPLL

+1.5V_RUN

+3.3V_RUN

+1.5V_RUN

+1.5V_RUN

+3.3V_RUN

+3.3V_RUN

+1.5V_RUN

+1.5V_RUN

+3.3V_SUS

+3.3V_SUS

+RTC_CELL

+3.3V_RUN

+VCCSATAPLL

+3.3V_SUS

+1.5V_RUN

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

ICH7-M(4/4)

24 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

CRB is 270uF

C518

10U_0805_4VAM

~D

1

2

L49

BLM21PG600SN1D_0805~D1 2

R342

10_0402_5%~D

12

C471

0.1U_0402_16V4Z~D

@1

2

C465

0.1U_0402_16V4Z~D

1

2

C476

0.1U_0402_16V4Z~D

1

2

C500

0.1U_0402_16V4Z~D

1

2

C278

0.1U_0402_16V4Z~D

1

2

C514

0.1U_0402_16V4Z~D

1

2

C493

4.7U_0603_6.3V6M

~D

1

2

C510

0.1U_0402_16V4Z~D

1

2

C517

0.1U_0402_16V4Z~D

1

2

C488

0.1U_0402_16V4Z~D

1

2

C280

0.1U_0402_16V4Z~D

1

2

U19F

ICH7M B0_BGA652~D

V5REF[1]G10

V5REF[2]AD17

V5REF_SusF6

Vcc1_5_B[1]AA22Vcc1_5_B[2]AA23Vcc1_5_B[3]AB22Vcc1_5_B[4]AB23Vcc1_5_B[5]AC23Vcc1_5_B[6]AC24Vcc1_5_B[7]AC25Vcc1_5_B[8]AC26Vcc1_5_B[9]AD26Vcc1_5_B[10]AD27Vcc1_5_B[11]AD28Vcc1_5_B[12]D26Vcc1_5_B[13]D27Vcc1_5_B[14]D28Vcc1_5_B[15]E24Vcc1_5_B[16]E25Vcc1_5_B[17]E26Vcc1_5_B[18]F23Vcc1_5_B[19]F24Vcc1_5_B[20]G22Vcc1_5_B[21]G23Vcc1_5_B[22]H22Vcc1_5_B[23]H23Vcc1_5_B[24]J22Vcc1_5_B[25]J23Vcc1_5_B[26]K22Vcc1_5_B[27]K23Vcc1_5_B[28]L22Vcc1_5_B[29]L23Vcc1_5_B[30]M22Vcc1_5_B[31]M23Vcc1_5_B[32]N22Vcc1_5_B[33]N23Vcc1_5_B[34]P22Vcc1_5_B[35]P23Vcc1_5_B[36]R22Vcc1_5_B[37]R23Vcc1_5_B[38]R24Vcc1_5_B[39]R25

Vcc1_5_B[41]T22Vcc1_5_B[42]T23Vcc1_5_B[43]T26Vcc1_5_B[44]T27Vcc1_5_B[45]T28Vcc1_5_B[46]U22Vcc1_5_B[47]U23Vcc1_5_B[48]V22Vcc1_5_B[49]V23Vcc1_5_B[50]W22

Vcc1_5_B[52]Y22Vcc1_5_B[53]Y23

Vcc1_5_B[51]W23

Vcc1_5_B[40]R26

Vcc3_3[1]B27

VccDMIPLLAG28

VccSATAPLLAD2

Vcc3_3[2]AH11

Vcc1_05[1] L11Vcc1_05[2] L12Vcc1_05[3] L14Vcc1_05[4] L16

Vcc1_05[6] L18Vcc1_05[5] L17

Vcc1_05[7] M11Vcc1_05[8] M18Vcc1_05[9] P11

Vcc1_05[10] P18Vcc1_05[11] T11Vcc1_05[12] T18Vcc1_05[13] U11Vcc1_05[14] U18Vcc1_05[15] V11Vcc1_05[16] V12Vcc1_05[17] V14Vcc1_05[18] V16Vcc1_05[19] V17Vcc1_05[20] V18

Vcc3_3 / VccHDA U6

VccSus3_3/VccSusHDA R7

V_CPU_IO[1] AE23V_CPU_IO[2] AE26V_CPU_IO[3] AH26

Vcc3_3[3] AA7Vcc3_3[4] AB12Vcc3_3[5] AB20Vcc3_3[6] AC16Vcc3_3[7] AD13Vcc3_3[8] AD18Vcc3_3[9] AG12

Vcc3_3[10] AG15Vcc3_3[11] AG19

Vcc3_3[12] A5

Vcc3_3[14] B16Vcc3_3[15] B7Vcc3_3[16] C10

Vcc3_3[13] B13

Vcc3_3[17] D15Vcc3_3[18] F9Vcc3_3[19] G11Vcc3_3[20] G12

VccRTC W5

VccSus3_3[1] P7

VccSus3_3[2] A24

VccSus3_3[4] D19VccSus3_3[5] D22VccSus3_3[6] G19

VccSus3_3[3] C24

VccSus3_3[7] K3VccSus3_3[8] K4VccSus3_3[9] K5

VccSus3_3[10] K6VccSus3_3[11] L1

Vcc1_5_A[19] AB17Vcc1_5_A[20] AC17

Vcc1_5_A[21] T7Vcc1_5_A[22] F17Vcc1_5_A[23] G17

Vcc1_5_A[24] AB8Vcc1_5_A[25] AC8

VccSus1_05[1] K7

Vcc1_5_A[1]AB7Vcc1_5_A[2]AC6Vcc1_5_A[3]AC7Vcc1_5_A[4]AD6Vcc1_5_A[5]AE6Vcc1_5_A[6]AF5Vcc1_5_A[7]AF6Vcc1_5_A[8]AG5Vcc1_5_A[9]AH5

Vcc1_5_A[10]AB10Vcc1_5_A[11]AB9Vcc1_5_A[12]AC10Vcc1_5_A[13]AD10Vcc1_5_A[14]AE10Vcc1_5_A[15]AF10Vcc1_5_A[16]AF9Vcc1_5_A[17]AG9Vcc1_5_A[18]AH9

VccSus3_3[19]E3

VccUSBPLLC1

VccSus1_05/VccLAN1_05[1]AA2VccSus1_05/VccLAN1_05[2]Y7

VccSus3_3/VccLAN3_3[1]V5VccSus3_3/VccLAN3_3[2]V1VccSus3_3/VccLAN3_3[3]W2VccSus3_3/VccLAN3_3[4]W7

Vcc3_3[21] G16

VccSus3_3[12] L2VccSus3_3[13] L3VccSus3_3[14] L6VccSus3_3[15] L7VccSus3_3[16] M6VccSus3_3[17] M7VccSus3_3[18] N7

VccSus1_05[2] C28VccSus1_05[3] G20

Vcc1_5_A[26] A1Vcc1_5_A[27] H6Vcc1_5_A[28] H7Vcc1_5_A[29] J6Vcc1_5_A[30] J7

C487

0.1U_0402_16V4Z~D

1

2

C496

0.1U_0402_16V4Z~D

1

2

C498

0.1U_0402_16V4Z~D

1

2

C497

0.1U_0402_16V4Z~D

1

2

L14

BLM18AG601SN1D_0603~D

1 2

D16

RB751V_SOD323~D

21

C475

0.1U_0402_16V4Z~D

1

2

C485

0.1U_0402_16V4Z~D

1

2

C495

0.1U_0402_16V4Z~D

1

2

C470

0.1U_0402_16V4Z~D

1

2

U19E

ICH7M B0_BGA652~D

VSS[0]A4VSS[1]A23VSS[2]B1VSS[3]B8VSS[4]B11VSS[5]B14VSS[6]B17VSS[7]B20VSS[8]B26VSS[9]B28VSS[10]C2VSS[11]C6VSS[12]C27VSS[13]D10VSS[14]D13VSS[15]D18VSS[16]D21VSS[17]D24VSS[18]E1VSS[19]E2VSS[21]E4VSS[22]E8VSS[23]E15VSS[24]F3VSS[25]F4VSS[26]F5VSS[27]F12VSS[28]F27VSS[29]F28VSS[30]G1VSS[31]G2VSS[32]G5VSS[33]G6VSS[34]G9VSS[35]G14VSS[36]G18VSS[37]G21VSS[38]G24VSS[39]G25VSS[40]G26VSS[41]H3VSS[42]H4VSS[43]H5VSS[44]H24VSS[45]H27VSS[46]H28VSS[47]J1VSS[48]J2VSS[49]J5VSS[50]J24VSS[51]J25VSS[52]J26VSS[53]K24VSS[54]K27VSS[55]K28VSS[56]L13VSS[57]L15VSS[58]L24VSS[59]L25VSS[60]L26VSS[61]M3VSS[62]M4VSS[63]M5VSS[64]M12VSS[65]M13VSS[66]M14VSS[67]M15VSS[68]M16VSS[69]M17VSS[70]M24VSS[71]M27VSS[72]M28VSS[73]N1VSS[74]N2VSS[75]N5VSS[76]N6VSS[77]N11VSS[78]N12VSS[79]N13VSS[80]N14VSS[81]N15VSS[82]N16VSS[83]N17VSS[84]N18VSS[85]N24VSS[86]N25VSS[87]N26VSS[88]P3VSS[89]P4VSS[90]P12VSS[91]P13VSS[92]P14VSS[93]P15VSS[94]P16VSS[95]P17VSS[96]P24VSS[97]P27

VSS[98] P28VSS[99] R1

VSS[100] R11VSS[101] R12VSS[102] R13VSS[103] R14VSS[104] R15VSS[105] R16VSS[106] R17VSS[107] R18VSS[108] T6VSS[109] T12VSS[110] T13VSS[111] T14VSS[112] T15VSS[113] T16VSS[114] T17VSS[115] U4VSS[116] U12VSS[117] U13VSS[118] U14VSS[119] U15VSS[120] U16VSS[121] U17VSS[122] U24VSS[123] U25VSS[124] U26VSS[125] V2VSS[126] V13VSS[127] V15VSS[128] V24VSS[129] V27VSS[130] V28VSS[131] W6VSS[132] W24VSS[133] W25VSS[134] W26VSS[135] Y3VSS[136] Y24VSS[137] Y27VSS[138] Y28VSS[139] AA1VSS[140] AA24VSS[141] AA25VSS[142] AA26VSS[143] AB4VSS[144] AB6VSS[145] AB11VSS[146] AB14VSS[147] AB16VSS[148] AB19VSS[149] AB21VSS[150] AB24VSS[151] AB27VSS[152] AB28VSS[153] AC2VSS[154] AC5VSS[155] AC9VSS[156] AC11VSS[157] AD1VSS[158] AD3VSS[159] AD4VSS[160] AD7VSS[161] AD8VSS[162] AD11VSS[163] AD15VSS[164] AD19VSS[165] AD23VSS[166] AE2VSS[167] AE4VSS[168] AE8VSS[169] AE11VSS[170] AE13VSS[171] AE18VSS[172] AE21VSS[173] AE24VSS[174] AE25VSS[175] AF2VSS[176] AF4VSS[177] AF8VSS[178] AF11VSS[179] AF27VSS[180] AF28VSS[181] AG1VSS[182] AG3VSS[183] AG7VSS[184] AG11VSS[185] AG14VSS[186] AG17VSS[187] AG20VSS[188] AG25VSS[189] AH1VSS[190] AH3VSS[191] AH7VSS[192] AH12VSS[193] AH23VSS[194] AH27

C486

0.1U_0402_16V4Z~D

1

2

C474

0.1U_0402_16V4Z~D

1

2

C519

1U_0603_10V4Z~D

1

2

C505

0.1U_0402_16V4Z~D

1

2

C481

1U_0603_10V4Z~D

1

2

C527

0.1U_0402_16V4Z~D

1

2

C284

1U_0603_10V4Z~D

@1

2

C254

10U_0805_4VAM

~D

1

2

R269

0.5_0805_1%~D

1 2

+

C49

4

220U

_D2_

4VM

~D

1

2

C251

0.01U_0402_16V7K~D

1

2

C279

0.1U_0402_16V4Z~D

1

2

R581

0.5_0805_1%~D

1 2

+

C507

330U_D

2E_2.5VM

~D

1

2

R596

100_0402_5%~D

12

D9

RB751V_SOD323~D

21

C516

0.1U_0402_16V4Z~D

1

2

C452

0.1U_0402_16V4Z~D

1

2

C480

1U_0603_10V4Z~D

@1

2

C469

0.1U_0402_16V4Z~D

1

2

C533

0.1U_0402_16V4Z~D

1

2

C477

0.1U_0402_16V4Z~D

1

2

L5010U_LB2012T100MR_20%_0805~D

1 2

C483

0.1U_0402_16V4Z~D

1

2

Page 25: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

SATA_RX0-_N0

SATA_RX0+_P0

SATA_TX0+SATA_TX0-

IDE_DDACK#

IDE_DD10

IDE_DD14

IDE_DA0

IDE_DD4

IDE_DD7

IDE_DD8

IDE_DD6

IDE_DCS1#

IDE_DDREQIDE_DD15

IDE_DD2

IDE_DD4

IDE_DD15

IDE_DD9

PDIAG#IDE_IRQ

IDE_DD3

IDE_DD10

IDE_DD14

IDE_DD11

IDE_DD9

IDE_LED#

IDE_DD0

IDE_DD12

IDE_DD1

IDE_DCS3#

IDE_DD11

IDE_DD5

IDE_DD13

PRI_CSEL

IDE_DD1

IDE_RST_MOD

IDE_DD0

IDE_DD7

RPDDACK#

IDE_DD6

IDE_DA1

IDE_DD5

IDE_DD2

IDE_DA2

IDE_DD13

IDE_DIORDY

IDE_DD3IDE_DD12

IDE_DIOW#

IDE_DD8

IDE_DIOR#

MOD_EN

MODC_EN#

HDDC_EN#

HDD_EN

+5V_MOD

+3.3V_RUN

+5V_HDD

+5V_MOD

+5V_MOD

+5V_MOD

+5V_MOD

+5V_SUS+15V_SUS

+5V_MOD +5V_RUN

+5V_HDD

+5V_HDD

+15V_SUS+5V_SUS

+5V_RUN

+3.3V_RUNIDE_DD[0..15] <22>

IDE_DDACK# <22>

SATA_RX0-<22>

SATA_TX0+<22>

SATA_RX0+<22>

IDE_DA0<22>IDE_DCS3# <22>

IDE_DIOW#<22>

IDE_IRQ<22>

IDE_DDREQ <22>

IDE_DA2 <22>

IDE_RST_MOD<23>

IDE_DA1<22>

IDE_DCS1#<22>

IDE_DIORDY<22>

SATA_TX0-<22>

IDE_DIOR# <22>

MODC_EN#<23>

HDDC_EN#<23>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

SATA HDD and CD-ROM CONN.

25 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Layout Note: Place close to CD-ROM CONN

Main SATA +5V DefaultLayout Note: W=80 mils

CD-ROM Connector

close SATA connector

+5V_MOD Source

Pleace near HD CONN

+5V_HDD Source

SATA Connector

Shorted

C462

0.1U_0402_16V4Z~D

@

1

2

C454

0.1U_0402_16V4Z~D

@

1

2

S

GD Q88

SI3456BDV-T1_TSOP6~D

3

624

51

C460

0.1U_0402_16V4Z~D

1

2

C458

0.1U_0402_16V4Z~D

1

2

C4513900P_0402_50V7K~D

12JODD

SUYIN_80095AR-050G1T~D

113355779911111313151517171919212123232525272729293131333335353737393941414343454547474949

2 24 46 68 8

10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 50

R710

470_0402_5%~D

12

C463

1U_0603_10V4Z~D

1

2

C42

1U_0603_10V4Z~D

1

2

C456

4.7U_1206_16V6K~D

1

2

C45

4.7U_1206_16V6K~D

1

2

C453

0.01U_0402_25V7K~D

1

2Q100

DTC144EKA_SOT23~D

@

2

13

C459

1000P_0402_50V7K~D

1

2

C461

1U_0603_10V4Z~D

@

1

2

R528

100K_0402_5%~D

12

C49

10U_0805_10V4Z~D

1

2

PJP19

PAD-OPEN 4x4m

1 2

C652

0.01U_0402_25V7K~D

@

1

2

R527100K_0402_5%~D

12

C35

0.1U_0402_16V4Z~D

1

2

PJP20

PAD-OPEN 4x4m

1 2

JSATA

TYCO_1770615-2_RV~D

GNDS1RX+S2RX-S3GNDS4TX-S5TX+S6GNDS7

3.3VP13.3VP23.3VP3GNDP4GNDP5GNDP65VP75VP85VP9GNDP10ReservedP11GNDP1212VP1312VP1412VP15 GND1 1

GND2 2

R33 22_0402_5%~D

1 2

R711

510_0402_5%~D

12

C4503900P_0402_50V7K~D

12

C466

1000P_0402_50V7K~D@

1

2

C455

10U_0805_10V4Z~D

@

1

2

C36

0.1U_0402_16V4Z~D

1 2

R34 100K_0402_5%~D 1 2

R706100K_0402_5%~D@

12

47K

47K Q87PDTC144EK_SOT23~D

2

13

C41

1000P_0402_50V7K~D

1

2

C457

10U_0805_10V4Z~D

1

2

S

GD

Q18SI3456BDV-T1_TSOP6~D

@

3

624

51

R37

100K_0402_5%~D

12

Page 26: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

TPS793475_BYPASS

ICH_AZ_CODEC_BITCLK

ICH_AZ_CODEC_SDOUT

AC97VREFI

HP_OUT_R

HP_OUT_L

MIC_SWITCH

ICH_AZ_CODEC_SYNC

ICH_AZ_CODEC_SDOUT

ICH_AZ_CODEC_BITCLK

SENSE_A

ICH_AZ_CODEC_SDIN0

CAP2

ICH_AZ_CODEC_RST#

AC97VREFI

ICH_AZ_SDIN0_R

SPDIF

AUD_MONO_OUT

SPDIF_SHDN

VREFOUT

CAP2

HP_NB_SENSE

AUDIO_AVDD_ON

DOCK_HP_MUTE#

DOCK_HP_MUTE#

EAPD

+VDDA+5V_SUS +5V_RUN

+VDDA

+3.3V_RUN

+VDDA

+3.3V_RUN

ICH_AZ_CODEC_SDOUT<22>

HP_OUT_L <27>

ICH_AZ_CODEC_SYNC<22>

NB_MICIN_L <27>

ICH_AZ_CODEC_RST#<22>

HP_OUT_R <27>

ICH_AZ_CODEC_BITCLK<22>

ICH_AZ_CODEC_SDIN0<22>

SPDIF<20>

AUD_MONO_OUT <28>

AUD_LINE_OUT_R <27>

MIC_SWITCH <27>

VREFOUT<27>

NB_MICIN_R <27>

AUD_LINE_OUT_L <27>

AUDIO_AVDD_ON<37>

HP_NB_SENSE<27,28,37>

SPDIF_SHDN<20,37>

EAPD<27,28>

DOCK_HP_MUTE#<37>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Azalia CODEC

26 62Tuesday, December 13, 2005

Compal Electronics, Inc.

VDDA=4.75V

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Close to U31.3

Close to U31.5

Close to U31.18

W=30 mil

Place R461, R457, R458 close to U31 Pin9

Close to U31.20

Removed internal MICs

Trace width is 5mil for all analog signals.

C379

10U_0805_6.3V6M

~D

1

2

R455

47_0402_5%~D@

12

R454 33_0402_5%~D

1 2

L35

BLM31A260SPT_1206~D@

1 2

STAC9200

U31

STAC9200X5NAEB1XR_QFN32~D

SDATA_OUT2

BIT_CLK3

SYNC7

RESET#8

SPDIF _OUT32

CAP220

VREF_OUT19

VREF_IN18

AVD

D26

AVSS

117

AVSS

229

SPDIF _ IN/EAPD /GPIO331

SENSE_A 9

SDATA_IN5

LINE_IN_L 15

LINE_IN_R 16

CD_L 10

CD_R 12

HP_L 27

HP_R 28

LOUT_L 23

LOUT_R 24

MONO_OUT 25

DVD

D6

DVS

S4

GPIO021

GPIO122

GPIO230

MIC1 13

MIC2 14

NC11NC211

C380

0.1U_0402_10V7K~D

1

2

R476 0_0402_5%~D@ 12

C374

0.1U_0402_10V7K~D

1

2

C377

0.1U_0402_16V4Z~D

1

2

R456

10_0402_5%~D@

12

G

D

SQ792N7002_SOT23~D

2

13

R460

0_0402_5%~D

12

C365

0.1U_0402_16V4Z~D

1

2

R457

39.2K_0402_1%~D

12

C360

10P_0402_50V8J~D@

1

2

C363

0.1U_0402_10V7K~D

1

2

C362

1U_0603_10V6K~D

1

2

R701100K_0402_5%~D

12

R458

20K_0402_1%~D

12

C382

1U_0603_10V6K~D

1

2

C372

0.1U_0402_16V4Z~D

1

2

G

D

S Q802N7002_SOT23~D

2

13

R4615.1K_0402_1%~D

12

C366

0.01U_0402_16V7K~D

1

2

U32

TPS793475DBVR_SOT23-5~D

OUT 5

BYPASS 4

GND2

EN3

IN1

C359

22P_0402_50V8J~D@

1

2

C358

10U_0805_6.3V6M

~D

1

2

C381

1U_0603_10V6K~D

1

2

C376

0.047U_0402_16V4Z~D

1

2

C364

1U_0603_10V4Z~D

1

2 C378

2.2U_0805_10V6K~D

1

2

Page 27: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AUD_GAIN0

AUD_GAIN1

INT_SPK_R1

INT_SPK_R2

INT_SPK_L1

INT_SPK_L2

+5VAMPVCC

BYPASS

HP_SPK_L1

HP_SPK_R1

+3.3V_RUN_4411

HP_NB_SENSE

AUD_LINE_IN_R

INT_SPK_L1INT_SPK_L2

INT_SPK_R2INT_SPK_R1

INT_SPK_R1INT_SPK_R2INT_SPK_L1INT_SPK_L2

AUD_GAIN0

AUD_GAIN1

AUD_LINE_IN_L

LIN-

RIN-

HP_SPK_R2

HP_SPK_L2

PC_BEEP

+Z2401

PC_BEEPZ2402 Z2404

HP_SPK_L2

HP_SPK_R2

HP_NB_SENSE

MICIN_R

MICIN_L

+5V_SUS

+3.3V_RUN

+5VAMPVCC

+3.3V_RUN

+VDDA

+3.3V_RUN

+3.3V_RUN

NB_MUTE<28,37>

AUD_LINE_OUT_R<26>

AUD_LINE_OUT_L<26>

HP_OUT_L<26>

HP_OUT_R<26>

BEEP<37>

SPKR<23>

HP_NB_SENSE<26,28,37>

NB_MICIN_L<26>

MIC_SWITCH<26>

NB_MICIN_R<26>

VREFOUT<26>

EAPD<26,28>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Amplifier and Phone Jack

27 62Tuesday, December 13, 2005

Compal Electronics, Inc.

W=40mils

GAIN0INPUT

AV(inv)GAIN1

21.6dB

15.6dB

6dB

1

0

10dB

25K ohm

45K ohm

70K ohm

90K ohm

IMPEDANCE

11

0

0

0

*

1

Place close to connector

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Gain Setting

Trace width is 5mil for HP_SPK_R1/R2 HP_SPK_L1/L2

C3690.012U_0402_16V7K~D

1 2

C3491U_0603_10V4Z~D

1

2

L38

BLM18AG121SN1D_0603~D

12

C3670.1U_0402_16V4Z~D

1

2

C91

0.1U_0402_16V4Z~D

@

1

2

C350

0.47U_0603_16V7K~D

1

2

C346

0.047U_0402_10V7K~D

1

2

R470

20K_0402_1%~D

12

L36

BLM18AG601SN1D_0603~D

1 2

R46310K_0402_5%~D 1 2

C375

0.1U_0402_16V4Z~D

1

2

L40BLM18AG121SN1D_0603~D

12

R466

4.7K_0402_5%

~D

12

R459

100K_0402_5%~D

12

C388

2.2U_0805_10V6K~D

12C3841U_0603_10V6K~D

1 2

C351

0.047U_0402_10V7K~D

1

2

C38

6

47P

_040

2_50

V8J~

D

1

2

U34

MAX4411ETP+_TQFN20~D

C1P1

PGN

D2

C1N3

NC-4 4

PVss

5

NC-6 6

SVss

7

NC-8 8

OUTL 9

SVD

D10

INR15

SHDNR#14

INL13

NC-12 12

OUTR 11

NC-20 20

PVD

D19

SHDNL#18

SGN

D17

NC-16 16

G

D

S

Q1042N7002_SOT23~D@

2

13

C3430.012U_0402_16V7K~D

1 2

R462

2.2K_0402_5%~D

12

C389

2.2U_0805_10V6K~D

12

L34BLM18AG121SN1D_0603~D

12

C368

47P_0402_50V8J~D

@

1

2

R468

4.7K_0402_5%

~D

12

C39

4

100P

_040

2_50

V8J~

D

1

2

JSPK

MOLEX_53398-0490~D

11223344

C3730.1U_0402_16V4Z~D

1 2

C387

1000P_0402_50V7K~D

1

2

C341

47P_0402_50V8J~D

@

1

2

R44810K_0402_5%~D

12

C344

47P_0402_50V8J~D

@

1

2

C38

5

47P

_040

2_50

V8J~

D

1

2

C39

110

0P_0

402_

50V8

J~D

1

2

R44910K_0402_5%~D

12

C96

0.1U_0402_16V4Z~D

@

1

2

R45310K_0402_5%~D@

12

U33

74AHCT1G86GW SOT353-5~D

A1

B2 Y 4

P5

G3

R464

4.99_0402_1%~D

1 2

C348

47P_0402_50V8J~D

@

1

2

C39

5

1U_0

603_

10V6

K~D 1

2

C3700.1U_0402_16V4Z~D

1

2

C3961U_0603_10V6K~D

1

2

C39

210

0P_0

402_

50V8

J~D

1

2

JAUDO

FOX_JA8333L-B2P4-7F~D

A2

A3

A4

A5

A6

B2B6

B3

B4

B5

A1

B1

1 2 3

R46710K_0402_5%~D

12

C3831U_0603_10V6K~D 1 2

G

D

S Q822N7002_SOT23~D

2

13

L33BLM21PG600SN1D_0805~D

1 2

L39BLM18AG121SN1D_0603~D

12

C39

3

100P

_040

2_50

V8J~

D

1

2

C3901U_0603_10V6K~D

1

2

C37110U_0805_10V4Z~D

1

2

R45210K_0402_5%~D@

12

R47

1

100K

_040

2_5%

~D

12

C93

0.1U_0402_16V4Z~D

@

1

2

R469

20K_0402_1%~D

12

L37

BLM18AG121SN1D_0603~D

12

C98

0.1U_0402_16V4Z~D

@

1

2

R465

4.99_0402_1%~D

1 2

U30

TPA6017A2PWP_TSSOP20~D

GN

D4

1G

ND

311

GN

D2

13G

ND

120

VDD

16PV

DD

115

RIN-17

BYPASS 10

NC 12

LOUT- 8

LOUT+ 4

ROUT- 14

ROUT+ 18

RIN+7

LIN-5

LIN+9

GAIN0 2

GAIN1 3

PVD

D2

6

SHUTDOWN19

Page 28: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

COEX1_BT_ACTIVE

COEX2_WLAN_ACTIVE

COEX3

BT_RADIO_DIS#

ECE_USBP4-

ICH

_AC

_SD

OU

T_M

DC

TER

M

ICH_AZ_MDC_SDOUT

MD

C_A

C_B

ITC

LK_T

ERM

ICH_AZ_MDC_BITCLK

ICH_AZ_MDC_BITCLK

ICH_AZ_MDC_SDOUT

MDC_SDINICH_AZ_MDC_RST1#

ICH_AZ_MDC_RST1#

MAX9713_G1MAX9713_G2MAX9713_FS1MAX9713_FS2

MAX9713_FS1MAX9713_FS2

MAX9713_G2MAX9713_G1

SUB_OUT1

SUB_OUT2

SUB_OUT1SUB_OUT2

SUB_SHUTDOWN#

RJ_TIPRJ_RING

RJ_RING

RJ_TIP

ECE_USBP4+

+3.3V_RUN

+3.3V_SUS

+5V_SUS

+5V_RUN

+15V_SUS+3.3V_RUN

COEX2_WLAN_ACTIVE<34>

COEX1_BT_ACTIVE<34>

BT_ACTIVE<34,39>

BT_RADIO_DIS#<23>

ICH_AZ_MDC_SYNC<22>ICH_AZ_MDC_SDIN1<22>

ICH_AZ_MDC_SDOUT<22>

ICH_AZ_MDC_BITCLK <22>

ICH_AZ_MDC_RST#<22>

MDC_RST_DIS#<37>

AUD_MONO_OUT<26>

SUB_SHDN_ON_BATT<37>

NB_MUTE<27,37>

HP_NB_SENSE<26,27,37>

EAPD<26,27>

ECE_USBP4+<37>ECE_USBP4-<37>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

SUBWOOFER,BT PORT and MDC

28 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Place near JBT.

PWR / GND Minimum Spacing W=20 mil

H

Freq Hz

L

H

335 +/- 7%

L 335

460

FS2

236L

Oscillator frequency selection

H(ss mode)

FS1

L H

H

L

Av dB(TYP)

H

L

16

19.1

22.1

L

G1

H

Voltage Gain selection

L 13

G2

H Place near Pin3Place near Pin22

Apply lead free P/N

*

*

R685

0_0603_5%~D

1 2

R69

90_

0402

_5%

~D@

12

G

D

S

Q1052N7002_SOT23~D@

2

13

G

D

S

Q812N7002_SOT23~D@

2

13

C76

10U_1206_25V6M

~D

1

2

G

D

S

Q842N7002_SOT23~D

2

13

C44

910

00P_

1808

_3KV

7K~D

@

1

2

C26

2

33P

_040

2_50

V8J~

D

1

2

R37010K_0402_5%~D

12

C73

1000P_0402_50V7K~D

1

2

C64

410

0P_0

402_

50V8

J~D @

1

2

L57

BLM21PG600SN1D_0805~D

1 2

R69

20_

0402

_5%

~D@

12

C263

0.1U_0402_16V4Z~D

1

2

C620

0.033U_0603_16V7K~D

1 2

C46

410

00P_

1808

_3KV

7K~D

@

1

2

L46FBMA-L11-160808-301LMA20T_0603~D

1 2

C300

10P_0402_50V8J~D

@

1

2

R372

0_0402_5%~D@

1 2

JBT

JST_BM10B-SRSS-TB~D

1122334455667788991010

11 1112 12

T1 PAD~D

C62

5

0.01

U_0

402_

16V7

K~D

1

2

R38

510

_040

2_5%

~D@

12

R54

010

_040

2_5%

~D@

12

R69

60_

0402

_5%

~D

12

C30

60.

1U_0

402_

16V4

Z~D

1

2

G

D S

Q61BSS138_SOT23~D

2

1 3

R69

80_

0402

_5%

~D@

12

C636

0.1U_0603_25V7K~D

1

2

C30

74.

7U_0

603_

6.3V

6M~D

1

2

C632

0.22U_0603_10V7K~D

@

1

2

JMDC

TYCO_1-1734054-2~D

GND11IAC_SDATA_OUT3GND25IAC_SYNC7IAC_SDATA_IN9IAC_RESET#11

RES0 2RES1 43.3V 6

GND3 8GND4 10

IAC_BITCLK 12

R373100K_0402_5%~D

12

C64

2

1000

P_04

02_5

0V7K

~D

1

2

JWOFR

MOLEX_53398-0290~D

1122

L47FBMA-L11-160808-301LMA20T_0603~D

1 2

C261

100P_0402_50V8J~D@

1

2

G

D

S

Q832N7002_SOT23~D

2

13

R69

40_

0402

_5%

~D

12

C489

10P_0402_50V8J~D

@

1

2

C64

3

1000

P_04

02_5

0V7K

~D

1

2

C64

710

0P_0

402_

50V8

J~D @

1

2

R69

70_

0402

_5%

~D

12

JPHON

JM34613-L002-TR~D

1122

GND13GND24

C618

0.1U_0603_25V7K~D

1

2

C6190.1U_0603_25V7K~D

12

C77

0.22U_0603_10V7K~D

1

2

C82

1U_0

805_

25V6

K~D

1

2

R69

30_

0402

_5%

~D

12

R531100K_0402_5%~D

R38133_0402_5%~D

1 2

U47

MAX9713ETJ_TQFN-EP32~D

VDD3VDD4VDD21VDD22

C1N5C1P6

CHOLD7

SHDN#14

SS 13

IN+12 IN-11

NC 17

FS118FS219

NC 20NC 25NC 26

OUT- 27OUT- 28

OUT+ 29OUT+ 30

NC 31NC 32

NC 8

PGND1PGND2 PGND 23

PGND 24

G115G216

REG 9

AGND 10

GND33

R29

810

K_04

02_5

%~D 1

2

R69

10_

0402

_5%

~D@

12

C70

10U_1206_25V6M

~D

1

2

C69

0.47

U_0

603_

16V7

K~D

1

2

JWIRE1

MOLEX_48227-0201~D

11

22 G2 4

G1 3

L58

BLM21PG600SN1D_0805~D

1 2

Page 29: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USBP3+USBP3-

USBP1-USBP1+

USB_OC3#

USB_OC1#

USB_BACK_EN#

USB_OC4#

USB_BACK_EN#USB_OC6#

USB_OC5#

USB_SIDE_EN#USB_OC2#

USBP1-

USBP1+

USBP3-

USBP3+

USBP4+USBP4-

USBP6-USBP6+

USBP2+USBP2-

USBP5-USBP5+

USBP4-

USBP4+

USBP6+

USBP6-

USBP2-

USBP2+

USBP5-

USBP5+

USBP2+

USBP2-

USBP5+

USBP5-

USBP3+

USBP3-

USBP1+

USBP1-

USBP4+

USBP4-

USBP6+

USBP6-

+USB_R_PWR

+5V_SUS+USB_R_PWR

+USB_L_PWR+5V_SUS

+USB_S_PWR+5V_SUS

+USB_L_PWR

+USB_S_PWR

+USB_R_PWR

+USB_L_PWR

+USB_S_PWR

USB_BACK_EN#<37>

USB_OC1# <23>

USB_OC3# <23>

USB_BACK_EN#<37>

USB_OC4# <23>

USB_OC6# <23>

USB_SIDE_EN#<37>

USB_OC5# <23>

USB_OC2# <23>

USBP1+<23>

USBP1-<23>

USBP3-<23>

USBP3+<23>

USBP4-<23>

USBP4+<23>

USBP6-<23>

USBP6+<23>

USBP2-<23>

USBP2+<23>

USBP5+<23>

USBP5-<23>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

USB 2.0 PORT

29 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

JUSB_S (Ext Side Top)

JUSB_S (Ext Side Bottom)

JUSB_R (Ext Back Right Bottom)

JUSB_R (Ext Back Right Top)

JUSB_L (Ext Back Left Top)

JUSB_L (Ext Back Left Bottom)

2

3

1

4

USB IO PORT#

5

DESTINATION

6

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Ext Back Right USB Port

Ext Back Left USB Port

Ext Side USB Port

Place U189, U190, U191 as close as USB connector.

U11

IP4220CZ6_SO6@

D2+ 4

D1- 6

VCC 5

D1+1

GND2

D2-3

C554

10U_1206_16V4Z~D

@

1

2

C235

0.1U_0402_16V4Z~D

1

2

+

C2

150U_D

2_6.3VM~D

1

2

C3

0.1U_0402_16V4Z~D

1

2

U1

IP4220CZ6_SO6@

D2+ 4

D1- 6

VCC 5

D1+1

GND2

D2-3

JUSB_S

JST_SM8B-SRSS~D

11 22 33 44

55 66 77 88

9 910 10

JUSB_L

FOX_UB11123-8Z4-HT~D

A_VCCA1A_D-A2A_D+A3A_GNDA4

B_VCCB1B_D-B2B_D+B3B_GNDB4

G19G210G311G412

U48

TPS2062DR_SO8~D

GND1IN2EN1#3EN2#4

OC1# 8OUT1 7OUT2 6OC2# 5

+

C210

150U_D

2_6.3VM~D

1

2

C559

0.1U_0402_16V4Z~D

1

2

C218

0.1U_0402_16V4Z~D

1

2

U12

TPS2062DR_SO8~D

GND1IN2EN1#3EN2#4

OC1# 8OUT1 7OUT2 6OC2# 5

C693

0.1U_0402_16V4Z~D

1

2

C680

10U_1206_16V4Z~D

@

1

2

+

C544

150U_D

2_6.3VM~D

1

2

U14

IP4220CZ6_SO6@

D2+ 4

D1- 6

VCC 5

D1+1

GND2

D2-3

JUSB_R

FOX_UB11123-8Z4-HT~D

A_VCCA1A_D-A2A_D+A3A_GNDA4

B_VCCB1B_D-B2B_D+B3B_GNDB4

G19G210G311G412

C164

0.1U_0402_16V4Z~D

1

2

U43

TPS2062DR_SO8~D

GND1IN2EN1#3EN2#4

OC1# 8OUT1 7OUT2 6OC2# 5

C543

0.1U_0402_16V4Z~D

1

2

C217

10U_1206_16V4Z~D

@

1

2

C211

0.1U_0402_16V4Z~D

1

2

C679

0.1U_0402_16V4Z~D

1

2

Page 30: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

REGCTL_PNP12

LAN_TPM_EN# LAN_TPM_EN_EXT_POR#

LINK_10#

LAN_GPIO0LAN_GPIO1LAN_GPIO2

LAN_SCLK

LAN_SILAN_SO

BIASVDD

BIASVDD

LAN_ACT#

LINK_1000#LINK_100#

XTALI

XTALO

XTALI

XTALO

LAN_TX0+LAN_TX0-

LAN_TX1-LAN_TX2+

LAN_TX1+

LAN_TX3-LAN_TX3+LAN_TX2-

PCI_C_BE0_TPM_GPIO2_R#

PCI_SERR_ATTN_BTTN_R#PCI_C_BE1_VMAIN_R#

PCIE_RX3-_N3PCIE_RX3+_P3

CLK_PCIE_LOM#CLK_PCIE_LOM

REGCTL_PNP25

LAN_CS#

LAN_GPIO1LAN_GPIO0LAN_GPIO2

PCI_AD12_NVS0_R

PCI_C_BE0_TPM_GPIO2_R#

SPROM_DIN_TPM_GPIO1

SPROM_DOUT_TPM_GPIO0

SPROM_DOUT_TPM_GPIO0SPROM_DIN_TPM_GPIO1

REGCTL_PNP12

PCI_AD11_NVS1_R

PCI_C_BE3_GPIO3_R#

PCI_AD14 PCI_AD14_SD0_R

PCI_AD10 PCI_AD10_R

PCI_AD15_RPCI_AD15

PCI_SERR_ATTN_BTTN_R#

LAN_TPM_EN_EXT_POR#

PCI_AD16_SDI_RPCI_AD14_SD0_R

PCI_PAR_RPCI_STOP# PCI_STOP_R#PCI_PARPCI_C_BE1# PCI_C_BE1_VMAIN_R#

PCI_AD11 PCI_AD11_NVS1_RPCI_AD12 PCI_AD12_NVS0_R

CLK_PCI_LAN_LPC

LPC_LAD0LPC_LAD1LPC_LAD2LPC_LAD3

LPC_LFRAME#PLTRST1#

IRQ_SERIRQ

ICH_SMBDATA

ICH_SMBCLK

+2.5

V_3

.3V_

LAN

PCI_C_BE3_GPIO3_R#

LAN_SI

LAN_CS#

LAN_SCLKLAN_SO

REGCTL_PNP25

+1.2V_1.8V_LAN

+3.3V_LAN

+AVDD

+2.5V_LAN

+XTALVDD

+3.3V_LAN

+AVDD

+GPHY_PLLVDD

+PCIE_PLLVDD

+AVDDL

+1.2V_1.8V_LAN

+AVDDL

+PCIE_PLLVDD

+GPHY_PLLVDD

+3.3V_LAN

+3.3V_RUN

+3.3V_LAN

+3.3V_LAN

+3.3V_LAN

+3.3V_SRC

+2.5V_3.3V_LAN

+3.3V_LAN

+3.3V_LAN

+3.3V_LAN

+3.3V_LAN

+1.2V_1.8V_LAN

+3.3V_LAN

+3.3V_LAN

+2.5V_3.3V_LAN

+3.3V_LAN

+2.5V_LAN

CLK_PCI_LAN_LPC<6>

LPC_LAD0<22,37,38>LPC_LAD1<22,37,38>LPC_LAD2<22,37,38>LPC_LAD3<22,37,38>

LPC_LFRAME#<22,37,38>

IRQ_SERIRQ<23,33,37,38>

LAN_TPM_EN#<37>

PLTRST1#<10,21,23>

LINK_10#<32>

PCIE_TX3+ <23>PCIE_TX3- <23>

LAN_ACT#<32>

LINK_100#<32>LINK_1000#<32>

LAN_TX3- <32>

LAN_TX2+ <32>

LAN_TX3+ <32>LAN_TX2- <32>

LAN_TX1+ <32>LAN_TX1- <32>

LAN_TX0+ <32>LAN_TX0- <32>

PCIE_RX3- <23>PCIE_RX3+ <23>

CLK_PCIE_LOM# <6>CLK_PCIE_LOM <6>

ENAB_3VLAN<40>

SYS_PME# <33,35,37>

PCI_RST# <21,33,34,35>

PLTRST1# <10,21,23>

SPROM_DOUT_TPM_GPIO0 <31>SPROM_DIN_TPM_GPIO1 <31>

ICH_SMBDATA<6,23,34>

ICH_SMBCLK<6,23,34>

PCIE_WAKE# <34,37>

LAN_LOW_PWR <37>

PCI_AD14<21,33,35>

PCI_AD10<21,33,35>

PCI_AD15<21,33,35>

PCI_AD10_R <31>

PCI_AD15_R <31>

PCI_C_BE3_GPIO3_R#<31>

PCI_STOP_R# <31>

PCI_C_BE0_TPM_GPIO2_R# <31>

PCI_SERR_ATTN_BTTN_R# <31>

PCI_AD16_SDI_R <31>

PCI_PAR_R <31>PCI_STOP#<21,33,35>PCI_PAR<21,33,35>PCI_C_BE1#<21,33,35>

PCI_AD11<21,33,35>PCI_AD12<21,33,35>

LOM_CABLE_DETECT<37>

LAN_LOW_PWR<37>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

BCM5752/4401E

30 62Tuesday, December 13, 2005

Compal Electronics, Inc.

Layout Notice : No highspeed signal should berouted near RDAC or onadjacent layer to RDAC

3.3V for 4401E

2.5V for 57521.8V for 4401E

1.2V for 5752

1.24K(P/N: SD01412418L) for 4401E

1.15K (P/N: SD01411518L) for 5752

POP option for 5752 NVRAM

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

(Default EEPROM is ST )

P/N: SA00000o71L (5752KFB2); 5@

SA00000oD0L (4401E) ; 4@

For Rikers:

No POP R612 and POP R498 for disabling TPM

POP R845,R846,R847 for 5752 only

0

0(Default) 0

SCLK

1

SI

ST M45PE20

1

NV_STRAP0NV_STRAP1 SO CS#

1

1

Atmel AT45BCM021B

5752 NVRAM table

1 00

0 1*

750 ohm(P/N: SD02875008L) for 4401E

470 ohm(P/N: SD02847008L) for 5752

5752 NVRAM , See NVRAM table, Set ST_45PE20 as default

DELL CONFIDENTIAL/PROPRIETARY

R5240_0402_5%~D 5@

1 2

L22

BLM18AG601SN1D_0603~D

5@12

R509

4.7K_0402_5%

~D5@

12

C426

0.1U

_040

2_16

V4Z~

D

5@1

2

R3680_0402_5%~D 4@1 2

R51

7

4.7K

_040

2_5%

~D5@

12

L26

BLM18AG601SN1D_0603~D

12

R49810K_0402_5%~D@

12

R494

1K_0402_5%~D12

C28

30.

1U_0

402_

16V4

Z~D

1

2

C431

0.1U_0402_16V4Z~D

1

2

C4450.1U_0402_16V4Z~D

5@

1

2U24

AT45BCM021B-SU_SO8~D@

SI 1SCK 2

RESET# 3CS# 4

SO8GND7VCC6WP#5

R51

610

K_04

02_5

%~D

@

12

C271

0.1U_0402_16V4Z~D

5@

1

2

C31

4

22P

_040

2_50

V8J~

D

1

2

LPC/TPM

Media

GPIO

BCM4401E/BCM5752

Power

PCI-E

TEST

LED

Bias

Clock

Control

Regulator

Control

SPI

SMBUS

BIAS

PLL

Analog

Power

U23A

BCM5752KFB2G_A2_FPBGA196~D

XTALON12

XTALIP12

NC/PCIE_TXDP N6

RSVD/PCIE_RXDN N10

NC/PCIE_TXDN P6

RSVD/PCIE_RXDP P10

PME#/WAKE# A6

DC/REFCLK_SEL F4

RSVD/REFCLK+ N8RSVD/REFCLK- P8

PCI_RST#/PERST# C2

DC/LAD1L11

DC/LFRAME#H11

DC/LAD2K9

DC/LCLKK10

DC/LAD3L5

DC/LRESET#M9

DC/LAD0M11

DC/SERIRQL8EXT_POR/TPM_EN#L9

SPROM_DOUT/TPM_GPIO0J11CBE0#/TPM_GPIO2M4SPROM_DIN/TPM_GPIO1N13

TRD0+ B13TRD0- B14TRD1+ C13TRD1- C14

DC/TRD2+ D13DC/TRD2- D14DC/TRD3+ E13DC/TRD3- E14

LINK_LED10#/LINKLED#A11

COL_LED#/SPD1000LED#A12 LINK_LED100#/SPD100LED#B11

ACT_LED#/TRAFFICLED#B10

EECLK_PXE/SCLKE11

EEDATA_PXE/SIE12DC/SOF11

DC/CS#C12

AD11/NV_STRAP1M1AD12/NV_STRAP0M2

DC/SMB_DATAD9

DC/SMB_CLKD10

DC/REGCTL12 J13

REG18OUT/REGSEN12 J14

VREF/REGCTL25 K13

REGSUP18/REGSUP12 K14

DC/REGSEN25 M14

RDAC A10

TMS C11TDO D6

TCK D7

TRST# D12

TDI H12

AD16/SERIAL_DI K1AD14/SERIAL_DO L1DC/GPHY_TVCOI D8

VAUXPRSNT J12

CBE1#/VMAINPRSNT L3

TEST_MODE/LOW_PWR L6

SERR#/ATTN_BTTN# A2

CBE3#/GPIO3C4

GPIO0G12

DC/GPIO2G13 GPIO1H13

BIASVDDA14

DC/AVDD_0A13DC/AVDD_1F14EPHY_AVDD/AVDDL_0F12EPHY_AVDD/AVDDL_1F13

DC/PCIE_PLLVDDM8

PLLVDD/GPHY_PLLVDDG14

RN5

0_1206_8P4R_5%~D

4@

1 82 73 64 5

R39

910

K_04

02_5

%~D

@1

2

R40

410

K_04

02_5

%~D

5@

12

R408

4.7K

_040

2_5%

~D

@

12

C268

10U_0805_10V4Z~D

5@

1

2

C3034.7U_0805_10V4Z~D

1

2

C31

3

22P

_040

2_50

V8J~

D

1

2

C4440.1U_0402_16V4Z~D

1

2

R515

1.24

K_06

03_1

%~D

12

R49

510

K_04

02_5

%~D

5@

12

C2820.1U_0402_16V4Z~D

1

2

S

GD

Q55SI3456DV-T1-E3_TSOP6~D

3

6

245

1

R5230_0402_5%~D4@ 1 2

R407

4.7K

_040

2_5%

~D5@

12

R5130_0402_5%~D

5@ 1 2 R507

4.7K_0402_5%

~D

@

12

R618

4.7K_0402_5%~D @

12

R505

4.7K_0402_5%

~D

@

12U50

M45PE20-VMN6TP_SO8~D5@

D 1C 2

RESET# 3S# 4

Q8VSS7VCC6W#5

R36

2

0_06

03_5

%~D

5@

12

R5060_0402_5%~D@1 2

C277

0.1U_0402_16V4Z~D

5@

1

2

X1

25MHZ_18PF_1BX25000CK1D~D

1 2

Q59

MBT35200MT1G_TSOP6~D 5@3

41 2 5 6R514

0_0402_5%~D 4@ 1 2

C28

74.

7U_0

805_

10V4

Z~D

1

2

R612 0_0402_5%~D

1 2

Q58

MMJT9435T1G_SOT223~D5@

1

23

4

RN4

0_1206_8P4R_5%~D

4@

1 82 73 64 5

R36

1

0_06

03_5

%~D

4@

12

C281

4.7U_0603_6.3V6M

~D 5@

1

2

R5114.7K_0402_5%~D

12

R5080_0402_5%~D5@1 2

C3154.7U_0805_10V4Z~D

5@

1

2

R363 0_0402_5%~D4@

R5124.7K_0402_5%~D

@ 12

R35

8

2_12

10_5

%~D

5@

12

C4300.1U_0402_16V4Z~D

1

2

C432

0.1U_0402_16V4Z~D

1

2

C312 0.1U_0402_16V4Z~D5@

1 2

L30

BLM18AG601SN1D_0603~D

5@12

R40

010

K_04

02_5

%~D

@1

2

R40

310

K_04

02_5

%~D

@1

2

R757

4.7K_0402_5%~D@

1 2

R39

61K

_040

2_5%

~D5@

1

2

C28610U_0805_10V4Z~D

1

2

R34

1

2_12

10_5

%~D

5@

12

L28

BLM18AG601SN1D_0603~D

12

C4190.1U_0402_16V4Z~D5@

1

2

R410

470_0402_5%~D

12

C3024.7U_0805_10V4Z~D

1

2

R522 0_0402_5%~D@

C311 0.1U_0402_16V4Z~D5@

1 2

L21

BLM18AG601SN1D_0603~D

12

L27

BLM18AG601SN1D_0603~D

12

R402

4.7K_0402_5%

~D

5@

12

R49

310

K_04

02_5

%~D 5@

12

R5104.7K_0402_5%~D

@ 12

Page 31: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_AD24_R

PCI_AD17_R

PCI_AD15_R

PCI_AD13_RPCI_AD5_RPCI_AD0_R

PCI_AD10_RPCI_AD9_RPCI_AD7_RPCI_AD4_RPCI_AD1_R

PCI_AD8_RPCI_AD6_RPCI_AD3_RPCI_AD2_R

PCI_AD25_R

PCI_AD27_RPCI_AD26_RPCI_AD26

PCI_AD27

PCI_AD22_RPCI_AD23_RPCI_AD26_RPCI_AD27_R

PCI_AD28_RPCI_AD28

PCI_AD21_R

PCI_AD28_RPCI_AD29_RPCI_AD30_RPCI_AD31_R

PCI_AD18_RPCI_AD19_RPCI_AD20_R

PCI_TRDY_R#PCI_STOP_R#PCI_DEVSEL_R#

PCI_PAR_R

+3.3V_LAN

PCI_GNT3_R#

PCI_REQ3_R#

PCI_IRDY_R#

PCI_C_BE2_R#

PCI_PERR_R#PCI_PIRQB_R#

SPROM_CS_EEDATA

SPROM_CLK_EECLK

PCI_AD16_R

SPROM_CLK_EECLKSPROM_CS_EEDATA

SPROM_DOUT_TPM_GPIO0SPROM_DIN_TPM_GPIO1

+2.5V_LAN

PCI_C_BE2# PCI_C_BE2_R#PCI_FRAME_R#PCI_FRAME#

PCI_AD9_RPCI_AD9

PCI_AD25 PCI_AD25_R

PCI_SERR# PCI_SERR_ATTN_BTTN_R#

CLK_PCI_LAN

PCI_REQ3# PCI_REQ3_R#

PCI_C_BE3# PCI_C_BE3_GPIO3_R#

PCI_AD18PCI_AD19

PCI_AD18_RPCI_AD19_RPCI_AD17_RPCI_AD17

PCI_IRDY# PCI_IRDY_R#PCI_TRDY_R#PCI_TRDY#

PCI_AD7 PCI_AD7_R

CLKRUN_R#

PCI_AD16_SDI_R

+3.3V_LAN

PCI_AD21 PCI_AD21_R

PCI_DEVSEL#PCI_PIRQB_R#PCI_PIRQB#PCI_DEVSEL_R#

PCI_GNT3#PCI_PERR_R#PCI_PERR#PCI_GNT3_R#

PCI_AD30_RPCI_AD31_RPCI_AD31

PCI_AD29_RPCI_AD29

PCI_AD30

PCI_AD20_RPCI_AD20

PCI_AD24_RPCI_AD24

PCI_AD22_RPCI_AD22PCI_AD23 PCI_AD23_R

PCI_AD2

PCI_AD5

PCI_AD1PCI_AD0

PCI_AD2_RPCI_AD1_RPCI_AD0_RPCI_AD5_R

PCI_AD6_RPCI_AD6

PCI_AD3 PCI_AD3_RPCI_AD4 PCI_AD4_R

PCI_AD13_RPCI_AD13PCI_C_BE0# PCI_C_BE0_TPM_GPIO2_R#

PCI_AD8_RPCI_AD8

PCI_AD16

PCI_AD16_R

PCI_FRAME_R#

CLKRUN# CLKRUN_R#

+XTALVDD

+1.2V_1.8V_LAN

+3.3V_LAN

+3.3V_LAN

+2.5V_LAN

+PCIE_SDS_VDD

+3.3V_LAN

+1.2V_1.8V_LAN

+PCIE_SDS_VDD

+3.3V_LAN

+1.2V_1.8V_LAN

+2.5V_LAN

PCI_AD26<21,33,35>PCI_AD27<21,33,35>

PCI_AD28<21,33,35>

SPROM_DOUT_TPM_GPIO0<30>SPROM_DIN_TPM_GPIO1<30>

PCI_FRAME#<21,33,35,36>PCI_C_BE2#<21,33,35>

PCI_AD9<21,33,35>

PCI_AD25<21,33,35>

PCI_SERR#<21,33,35>

CLK_PCI_LAN <6>

PCI_REQ3#<21>

PCI_C_BE3#<21,33,35>

PCI_AD18<21,33,35>PCI_AD19<21,33,35>PCI_AD17<21,33,35>

PCI_IRDY#<21,33,35,36>PCI_TRDY#<21,33,35>

PCI_AD7<21,33,35>

PCI_AD10_R<30>

PCI_PAR_R<30>

PCI_STOP_R#<30>

PCI_AD15_R<30>

PCI_C_BE3_GPIO3_R# <30>

PCI_C_BE0_TPM_GPIO2_R# <30>

PCI_SERR_ATTN_BTTN_R# <30>

PCI_AD16<21,33,35>

PCI_AD21<21,33,35>

PCI_DEVSEL#<21,33,35>PCI_PIRQB#<21>

PCI_GNT3#<21>PCI_PERR#<21,33,35>

PCI_AD31<21,33,35>

PCI_AD29<21,33,35>

PCI_AD30<21,33,35>

PCI_AD20<21,33,35>

PCI_AD24<21,33,35>

PCI_AD22<21,33,35>PCI_AD23<21,33,35>

PCI_AD2<21,33,35>

PCI_AD5<21,33,35>

PCI_AD1<21,33,35>PCI_AD0<21,33,35>

PCI_AD6<21,33,35>

PCI_AD3<21,33,35>PCI_AD4<21,33,35>

PCI_AD13<21,33,35>PCI_C_BE0#<21,33,35>

PCI_AD8<21,33,35>

PCI_AD16_SDI_R <30>

CLKRUN#<23,33,37,38>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

BCM5752/4401E

31 62Tuesday, December 13, 2005

Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

1.8V for 4401E

1.2V for 5752

For 4401E

Layout Notice : Place Caps as close as to chip

Place as close as to chip

U22,Pin A8,D5,P13

P/N: SA00000o70L (5752KFB2), 5@

SA00000oD0L (4401E), 4@

Place as close as to U22B, Pin A1 , A7 , B3 , C5 , E1 , E4 , G1, G2, K3, L4, P1, P2

Reserve R894,R891,R895,R893,R892,R890,R887,R888,R889 as NO POP .

Isolate the PCIE signals from others when 5752 is populated.

See 5752 Pinout Diagram.

No POP R868

(When CLKRUN# is support in system)

DELL CONFIDENTIAL/PROPRIETARY

RN7

0_1206_8P4R_5%~D

4@

1 82 73 64 5

C42

90.

1U_0

402_

16V4

Z~D

1

2 C43

40.

1U_0

402_

16V4

Z~D

1

2

R49

1

0_0402_5%~D@ 1

2

RN3

0_1206_8P4R_5%~D

4@

1 82 73 64 5

C42

70.

1U_0

402_

16V4

Z~D

1

2

C439

0.1U_0402_16V4Z~D

4@

1

2

RN10

0_1206_8P4R_5%~D

4@

1 82 73 64 5

C438

0.1U_0402_16V4Z~D

4@

1

2C290

4.7U_0805_10V4Z~D

4@

1

2

C42

50.

1U_0

402_

16V4

Z~D

1

2 C42

80.

1U_0

402_

16V4

Z~D

1

2

C418

0.1U_0402_16V4Z~D

4@

1

2

R50

1

0_0402_5%~D

@

12

R394

0_0402_5%~D

4@12

R405

10K_0402_5%~D@ 12

R38

8

1K_0

402_

5%~D@

12

R393

0_0402_5%~D4@12

C4200.1U_0402_16V4Z~D

5@

1

2

R413

0_0402_5%~D@ 12

C3164.7U_0805_10V4Z~D

5@

1

2

C43

70.

1U_0

402_

16V4

Z~D

1

2

BCM4401E/BCM5752

GND

Digial power

Disconnected

Don't Care connections

U23B

BCM5752KFB2G_A2_FPBGA196~D

VSS_0 B4VSS_1 B7VSS_2 B12VSS_3 E2VSS_4 F6VSS_5 F7VSS_6 F8VSS_7 F9VSS_8 G5VSS_9 G6

VSS_10 G7VSS_11 G8VSS_12 G9VSS_13 G10VSS_14 H5VSS_15 H6VSS_16 H7VSS_17 H8VSS_18 H9VSS_19 H10VSS_20 J6VSS_21 J7VSS_22 J8VSS_23 J9VSS_24 K2VSS_25 N1VSS_26 N9VSS_27 P9

VDDC_0B8VDDC_1E5VDDC_2E6VDDC_3E7VDDC_4E8VDDC_5E9VDDC_6E10VDDC_7F5VDDC_8F10VDDC_9G4VDDC_10J4VDDC_11J5VDDC_12J10VDDC_13K4VDDC_14K5VDDC_15K6VDDC_16K7VDDC_17K8

VDDIO_0D11VDDIO_1G11VDDIO_2K12REGSUP18/VDDIO_3L14

DC/VDDP_0A8DC/VDDP_1D5DC/VDDP_2P13

DC/PCIE_SDSVDDM6

XTALVDDH14PCI_CLK/NC_0 A3

IDSEL/NC_1 A4AD25/NC_2 A5

DC/NC_3 A9AD22/NC_4 B1AD23/NC_5 B2AD26/NC_6 B5AD27/NC_7 B6

DC/NC_8 B9AD21/NC_9 C1

REQ#/NC_10 C3AD28/NC_11 C6AD29/NC_12 C7AD30/NC_13 C8AD31/NC_14 C9

DC/NC_15 C10AD18/NC_16 D1AD19/NC_17 D2AD20/NC_18 D3

IRDY#/NC_19 F1FRAME#/NC_20 F2

CBE2#/NC_21 F3INTA#/NC_22 H2

PERR#/NC_23 J2SRPOM_CLK/NC_24 K11

DC/NC_25 L7SPROM_CS/NC_26 L10

DC/NC_27 L12DC/NC_28 L13DC/NC_29 M10DC/NC_30 M13DC/NC_31 N11DC/NC_32 P11

VESD3/DC_0A1VDDIOPCI/DC_1A7VDDIOPCI/DC_2B3VDDIOPCI/DC_3C5AD24/DC_4D4VDDIOPCI/DC_5E1AD17/DC_6E3VDDIOPCI/DC_7E4VDDIOPCI/DC_8G1VESD2/DC_9G2TRDY#/DC_10G3STOP#/DC_11H1DEVSEL#/DC_12H3CLKRUN#/DC_13H4PAR/DC_14J1GNT#/DC_15J3VDDIOPCI/DC_16K3AD15/DC_17L2VDDIOPCI/DC_18L4AD13/DC_19M3AD05/DC_20M5AD00/DC_21M7DC_22M12AD10/DC_23N2AD09/DC_24N3AD07/DC_25N4AD04/DC_26N5AD01/DC_27N7DC_28N14VESD1/DC_29P1VDDIOPCI/DC_30P2AD08/DC_31P3AD06/DC_32P4AD03/DC_33P5AD02/DC_34P7DC_35P14

R369

100_0402_5%~D

4@ 12

RN2

0_1206_8P4R_5%~D

4@

1 82 73 64 5

C43

60.

1U_0

402_

16V4

Z~D

1

2

RN9

0_1206_8P4R_5%~D

4@

1 82 73 64 5

C42

40.

1U_0

402_

16V4

Z~D

1

2

RN11

0_1206_8P4R_5%~D

4@

1 82 73 64 5

U25

AT93C46-10SU-2.7_SO8~D4@

CS1SK2DI3DO4

VCC 8NC 7

ORG 6GND 5

R50

2

0_0402_5%~D

@

12

R412

0_0402_5%~D@ 12

C423

0.1U_0402_16V4Z~D

4@

1

2

C43

30.

1U_0

402_

16V4

Z~D

1

2

L31

BLM18AG601SN1D_0603~D

5@12

R50

0

0_0402_5%~D

@12

RN1

0_1206_8P4R_5%~D

4@

1 82 73 64 5

R496

0_0402_5%~D@ 12

C41

50.

1U_0

402_

16V4

Z~D

5@

1

2

C29

44.

7U_0

805_

10V4

Z~D

1

2

C44

30.

1U_0

402_

16V4

Z~D

5@

1

2

RN12

0_1206_8P4R_5%~D

4@

1 82 73 64 5

RN6

0_1206_8P4R_5%~D

4@

1 82 73 64 5

RN8

0_1206_8P4R_5%~D

4@

1 82 73 64 5

R49

9

0_0402_5%~D

@

12

C441

0.1U_0402_16V4Z~D

4@

1

2

C308

0.1U_0402_16V4Z~D

4@

1

2

C435

0.1U_0402_16V4Z~D

4@

1

2C291

10U_0805_10V4Z~D 4@

1

2

R49

2

0_0402_5%~D

@12

Page 32: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DOCKED

LAN_TX0- LAN_TX0-R

SW_LANTX3+SW_LANTX3-

SW_LANTX1-

LED_10_GRN#

DOCK_LED_10#

DOCK_LOM_TRD0-

DOCK_LOM_TRD1-

DOCK_LED_100#

DOCK_LOM_TRD2+

DOCK_LAN_ACTLED_YEL#

LED_100_ORG#

NB_LAN_ACTLED_YEL#

DOCK_LOM_TRD1+

DOCK_LOM_TRD0+

DOCK_LOM_TRD3-DOCK_LOM_TRD3+

DOCK_LOM_TRD2-

LAN_TX0+ LAN_TX0+R

LAN_TX1- LAN_TX1-R

LAN_TX1+ LAN_TX1+R

LAN_TX2- LAN_TX2-R

LAN_TX2+ LAN_TX2+R

LAN_TX3- LAN_TX3-R

LAN_TX3+

SW_LANTX1+

SW_LANTX0-

SW_LANTX2-

SW_LANTX0+

SW_LANTX2+

LAN_TX3+R

LAN_TX0-

LAN_TX0+

LAN_TX2+

LAN_TX3+

LAN_TX1-

LAN_TX3-

LAN_TX1+

LAN_TX2-

SW_LANTX0+

SW_LANTX0-

SW_LANTX1+

SW_LANTX1-

SW_LANTX2+

SW_LANTX2-

SW_LANTX3-

NB_LAN_ACTLED_YEL#

SW_LANTX0-

SW_LANTX0+

SW_LANTX1-

SW_LANTX1+

LAN_TX0-

LAN_TX0+

LAN_TX1-

LAN_TX1+

LAN_ACT#

SW_LANTX3+

LR10#LR100#

LED_10_GRN#LED_100_ORG#

LINK_1000#

LINK_100#

LINK_10#

LAN_ACT# NB_LAN_ACTLED_YEL#

LINK_10#

LINK_100#

LED_10_GRN#

LED_100_ORG#

LAN_ACT#LINK_10#LINK_100#

+3.3V_LAN

+3.3V_LAN

+3.3V_LAN

+3.3V_LAN

+3.3V_LAN

+3.3V_LAN

+2.5V_3.3V_LAN

DOCKED<36,37>

LAN_TX0-<30>

LAN_TX0+<30>

LAN_TX1-<30>

LAN_TX1+<30>

LAN_TX2-<30>

LAN_TX2+<30>

LAN_TX3-<30>

LAN_TX3+<30>

LAN_ACT#<30>LINK_10#<30>LINK_100#<30>

DOCK_LOM_TRD1- <36>

DOCK_LOM_TRD0- <36>

DOCK_LOM_TRD1+ <36>

DOCK_LOM_TRD2+ <36>

DOCK_LOM_TRD0+ <36>

DOCK_LOM_TRD2- <36>

DOCK_LOM_TRD3+ <36>

DOCK_LED_10# <36>DOCK_LAN_ACTLED_YEL# <36>

DOCK_LOM_TRD3- <36>

DOCK_LED_100# <36>

LAN_ACT#<30>

LINK_1000#<30>

LINK_10#<30>

LINK_100#<30>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

LAN Transfomer and RJ45

32 62Tuesday, December 13, 2005

Compal Electronics, Inc.

Layout Notice : Placetermination as close aschip as possible

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Place these caps as close to the center tap pins of the mag/connector.

FROM NIC

DOCKED1: TO DOCK0: TO RJ45

LAN ANALOG SWITCH

TORJ45

TODOCK

TYCO_1368458-1 & Belfuse_L830-1J1C-47 / 4401ETYCO_1368938-2 & Belfuse_L830-1J1C-43 /5752

Apply lead free P/N

R359, R360, R364, R366 pop 49.9_1% ohm resistor for 4401E LOM

R359

48.7_0603_1%

12

L1936NH_0603CS-360EJTS_5%_0603~D

5@1 2

L2036NH_0603CS-360EJTS_5%_0603~D

5@1 2

L2536NH_0603CS-360EJTS_5%_0603~D

5@1 2

D8RB495D_SOT23~D

@2

31

C298

0.1U_0402_10V7K~D

5@

1

2

R375

48.7_0603_1%

5@

12

1000pF 2KV

4 X 75 OHMS

1CT:1CT

1CT:1CT

1CT:1CT

1CT:1CT

TRP1P

TRP1N

TRP2P

TRP2N

TRP3P

TRP3N

TRP4P

TRP4N

JLOM

TYCO_1368398-2~D

TRD1P11

TRCT112

TRD1N10

TRD2P4

TRCT26

TRD2N5

TRD3P3

TRCT31

TRD3N2

TRD4P8

TRCT47

TRD4N9

YELLOW13

COMMON014

COMMON116

GREEN17ORANGE15

SHIE

LD0

18SH

IELD

119

C440

0.1U_0402_16V4Z~D

@ 1

2

R316

10K_0402_5%~D@

12

L1836NH_0603CS-360EJTS_5%_0603~D

5@1 2

R383 150_0402_5%~D

12

R379

0_0402_5%~D

12

R318

10K_0402_5%~D @

12

R366

48.7_0603_1%

1

2

R376

10K_0402_5%~D @

12

R360

48.7_0603_1%

12

C447

0.1U_0402_16V4Z~D

1

2

R518 0_0402_5%~D4@

12

R384 150_0402_5%~D

12

C288

0.1U_0402_10V7K~D

1

2

L2436NH_0603CS-360EJTS_5%_0603~D

5@1 2

L1736NH_0603CS-360EJTS_5%_0603~D

5@1 2

C299

0.1U_0402_10V7K~D

5@

1

2

C4420.1U

_0402_16V4Z~D

1

2

R319

10K_0402_5%~D @

12

R386 0_0402_5%~D4@

12

L16

36NH_0603CS-360EJTS_5%_0603~D5@1 2

R520 0_0402_5%~D 4@

12

R320 0_0402_5%~D4@

12

R364

48.7_0603_1%

12

R380 0_0402_5%~D4@

12

C293

0.1U_0402_10V7K~D

1

2

R519 0_0402_5%~D 4@

12

R321

150_0402_5%~D

12

R371

48.7_0603_1%

5@

12

L2336NH_0603CS-360EJTS_5%_0603~D

5@1 2

R382

48.7_0603_1%

5@

12

R374

48.7_0603_1%

5@

12

U21

PI3L500E_TQFN56~D

5@

SEL17

A02

A13

A27

A38

A411

A512

A614

0B1 48

0B2 46

1B1 47

1B2 45

2B1 43

2B2 41

3B1 42

3B2 40

4B1 37

4B2 35

5B1 36

5B2 34

6B1 32

6B2 30

7B1 31

7B2 29

A715

LED019LED120LED254

0LED1 22

0LED2 25

1LED1 23

1LED2 26

2LED1 52

2LED2 51NC5

VDD

04

VDD

110

VDD

218

VDD

327

VDD

438

VDD

550

VDD

656

GN

D0

1G

ND

16

GN

D2

9G

ND

313

GN

D4

16G

ND

521

GN

D6

24G

ND

728

GN

D8

33G

ND

939

GN

D10

44G

ND

1149

GN

D12

53G

ND

1355

R521 0_0402_5%~D4@

12

C446

0.1U_0402_16V4Z~D

@ 1

2

Page 33: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

TPBIAS0

SDDATA1

XD_CDSW#XD_CDSW#SDCD#_XDCD0#

SDCD#_XDCD0#

SDWP#_XDRB#SDCLK_MSCLK_XDRE#XD_CE#XDCLEXDALESDCMD_MSBS_XDWE#XDWP#SDDATA0_MSDATA0_XDD0SDDATA1_MSDATA1_XDD1SDDATA2_MSDATA2_XDD2

XDD4SDDATA3_MSDATA3_XDD3

XDD5XDD6XDD7

SDDATA2

TPB0-

TPA0_D+

TPB0_D+

TPB0_D-

TPA0_D-

R5C832XO

SDDATA2_MSDATA2_XDD2

PCI_AD30

PCI_AD7

PCI_SERR#

UDIO5

PCI_DEVSEL#

PCI_AD1

PCI_AD9

PCI_AD18

BUS_GRST#

XDD6

SDCMD_MSBS_XDWE#

PCI_STOP#

PCI_C_BE1#

PCI_AD31

PCI_AD6

PCI_AD27

TPA0+

BUS_GRST#

SDCD#_XDCD0#

TPBIAS0

PCI_AD28

PCI_AD13

PCI_AD19

TPA0+

CLK_PCI_PCCARD

SDDATA1_MSDATA1_XDD1

XDWP#

PCI_AD3

TPA0-

TPA0-

XDD5

MSCD#_XDCD1

PCI_TRDY#

PCI_AD8

SDCLK_MSCLK_XDRE#PCI_PAR

PCI_AD12

PCI_AD22

PCI_AD17

R5C832XI

PCI_IRDY#

TP_SD/MMC/MS/XD_LED#

PCI_AD15

PCI_AD2

PCI_AD17

PCI_AD14

IRQ_SERIRQ

PCI_RST#

TPB0+

PCI_GNT2#

XD_CE#

SDDATA0_MSDATA0_XDD0

CARD_EN

PCI_AD0

R5C832XO

TPB0+

R5C832XI

XDD4

PCI_AD4

PCI_AD24

PCI_AD20

CARD_EN

XDD7

PCI_FRAME#

PCI_AD11

PCI_IDSEL

PCI_C_BE0#

PCI_AD16

PCI_AD26

PCI_AD23

SDWP#_XDRB#PCI_C_BE3#

PCI_AD29

PCI_PERR#

XDALE

PCI_AD21

PCI_AD5

TPB0-

XDCLE

SDDATA3_MSDATA3_XDD3

PCI_AD10

PCI_REQ2#

PCI_C_BE2#

PCI_AD25

SDDATA3_MSDATA3_XDD3

SDDATA1SDDATA2

SDDATA0_MSDATA0_XDD0

SDCLK_MSCLK_XDRE#SDCLKSDCMD_MSBS_XDWE#SDCD#_XDCD0#SDWP#_XDRB#

SDDATA2_MSDATA2_XDD2SDDATA3_MSDATA3_XDD3

SDCMD_MSBS_XDWE#MS_INS#

SDDATA0_MSDATA0_XDD0

SDCLK_MSCLK_XDRE#MSCLK

SDDATA1_MSDATA1_XDD1

UDIO4

MSCD#_XDCD1

MS_INS#

XD_SW#

SDDATA2_MSDATA2_XDD2

SDDATA1_MSDATA1_XDD1

+15V_SUS

+3.3V_RUN_CARD

+3.3V_RUN_XD

+3.3V_RUN_XD

+3.3V_RUN_CARD+3.3V_R5C832

+3.3V_RUN_CARD

+VCC_ROUT+3.3V_RUN_PHY

+3.3V_R5C832

+3.3V_RUN

+3.3V_R5C832

+3.3V_R5C832

+3.3V_R5C832+3.3V_R5C832

+3.3V_RUN_PHY

+3.3V_R5C832

+VCC_ROUT+3.3V_R5C832

+3.3V_R5C832

+3.3V_RUN_CARD

+3.3V_R5C832

PCI_PIRQC#<21>

CLK_PCI_PCCARD<6>

PCI_IRDY#<21,31,35,36>PCI_TRDY#<21,31,35>

PCI_C_BE0#<21,31,35>

CBUS_GRST#<37>

PCI_PIRQD#<21>

CB_HWSPND#<37>

PCI_SERR#<21,31,35>

PCI_C_BE2#<21,31,35>

PCI_STOP#<21,30,35>

PCI_GNT2#<21>

PCI_RST#<21,30,34,35>

PCI_AD[0..31]<21,30,31,35>

CLKRUN#<23,31,37,38>

SYS_PME#<30,35,37>

PCI_DEVSEL#<21,31,35>

PCI_FRAME#<21,31,35,36>

PCI_C_BE3#<21,31,35>

PCI_REQ2#<21>

IRQ_SERIRQ <23,30,37,38>

PCI_C_BE1#<21,30,35>

PCI_PAR<21,30,35>

PCI_PERR#<21,31,35>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

R5C832-1394 and 5 IN 1

33 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4 IN 1 CardReader CONN.

XDLED#

XDR/B#

XDPWR

XDRE#

XDCE#

XDWE#

Solve MS Duo Adaptor short problem

Media I/FMDIO00

MDIO02

MDIO01

MDIO07

MDIO06

MDIO05

MDIO04

MDIO03

SDCD#

SD Card

MDIO08

MDIO09

SDCCMD

SDLED#

SDPWR1

SDPWR0

SDWP#

MDIO13

MDIO12

MDIO11

MDIO10

SDCCLK

MDIO18

MDIO17

MDIO16

MDIO15

MDIO14

SDCDAT2

SDCDAT1

SDCDAT0

MDIO19

MSEN

MMC Card

SDCDAT3

UDIO4UDIO3 XDEN

Pull-up

Function

Pull-upPull-up

Function set pin define

SD,MMC,MS,XD muti-function pin define

EnableSD,XD,MS,MMC Card

Pull-up

MMCLED#

MMCPWR

MMCCD#

MMCCLK

MMCCMD

MMCDAT

MSWR

MSCD#

MS Card

MSCDAT2

MSCDAT1

MSCDAT0

MSEXTCK

MSLED#

XD Card

MSCCLK

MSBS

MSCDAT3

XDCDAT4

XDCDAT3

XDCDAT2

XDCDAT1

XDCDAT0

XDCDAT7

XDCDAT6

XDCDAT5

XDALE

XDCLE

XDWP#

XDCD1#

XDCD0#

SDEXTCK

Place close to J5IN1

Layout Note: Place close to 1394 connector

Layout Note: Place C340,C338,R436 close to R5C832

Layout Note: Place close to R5C832 Chip

Layout Note: Place close to R5C832and Shield GND

Note: If countermeasurecircuit is needed,please populate D22,R446, R117, R447,Q75-Q78, Q85 andno-stuff R451,R747-R750. If countermeasurecircuit is NOT needed,please no-stuff D22,R446, R117, R447,Q75-Q78, Q85 and stuffR451, R747-R750.

C330

10P_0402_50V8J~D

@

1

2

X224.576MHz_16P_1BG24576CKIA~D

12

R44610K_0402_5%~D

12

C323

0.01U_0402_16V7K~D

1

2

U29

AAT4250IGV-T1_SOT23-5~D

IN5

ON/OFF#4

OUT 1GND 2N.C 3

R5C832

U36

R5C832_TQFP128P~D

AD31125AD30126AD29127AD281AD272AD263AD255AD246AD239AD2211AD2112AD2014AD1915AD1817AD1718AD1619AD1536AD1437AD1338AD1239AD1140AD1042AD943AD844AD746AD647AD548AD449AD350AD251AD152AD053

VCC_PCI3V 10VCC_PCI3V 20

VCC_RIN 61

VCC_ROUT 16VCC_ROUT 34

VCC_3V 67

VCC_MD3V 86

AVCC_PHY3V 98AVCC_PHY3V 106AVCC_PHY3V 110

TPBIAS0 113

MDIO00 80

MDIO03 77MDIO04 76MDIO05 75MDIO06 74MDIO07 73

MDIO10 82MDIO11 81MDIO12 93MDIO13 90

FIL0 96

VREF 100REXT 101

MDIO08 88MDIO09 84

MDIO01 79MDIO02 78

MDIO14 91MDIO15 89MDIO16 92MDIO17 87MDIO18 85MDIO19 83

C/BE3#7C/BE2#21C/BE1#35C/BE0#45

PAR33FRAME#23TRDY#25IRDY#24STOP#29DEVSEL#26IDSEL8PERR#30SERR#31

NC97

TEST66 HWSPND#69

INTA#115INTB#116

PCICLK121PCIRST#119GBRST#71CLKRUN#117PME#70

REQ#124GNT#123

AGND99 AGND102 AGND103

GND 4GND 13GND 22GND 28

UDIO0/SERIRQ# 72UDIO1 60UDIO2 56UDIO3 65UDIO4 59UDIO5 57

XI 94XO 95

MSEN 58XDEN 55

AGND107 AGND111

GND 54GND 62GND 63GND 68GND 118GND 122

VCC_PCI3V 32VCC_PCI3V 27

VCC_PCI3V 41

VCC_ROUT 114VCC_ROUT 64

VCC_ROUT 120

VCC_PCI3V 128

AVCC_PHY3V 112

TPAP0 109TPAN0 108

TPBP0 105TPBN0 104

C361

2.2U_0805_10V6K~D

1

2

R485

0_0402_5%~D

12

R4720_0402_5%~D 1 2

R445

150K

_0402

_5

%~

D

C401

1U_0603_10V4Z~D

1

2

C342

1U_0603_10V4Z~D

1

2

C338

0.01U_0402_16V7K~D

1

2

T6

D13RB751V_SOD323~D

2 1

C332

1000P_0402_50V7K~D

1

2

C40522P_0402_50V8J~D

1 2

R479

56.2_0603_1%~D

12

R439

100K_0402_5%~D

12

C339

0.1U_0402_16V4Z~D

1

2

R750 0_0402_5%~D@1 2

C411

0.01U_0402_16V7K~D

1

2

C356

0.01U_0402_16V7K~D

1

2

R429 0_0402_5%~D 1 2

R486220_0402_5%~D

1 2

C397

270P_0402_50V7K~D

1

2

G

D S

Q852N7002_SOT23~D

2

1 3

C407

0.01U_0402_16V7K~D

1

2

C357

0.01U_0402_16V7K~D

1

2

C403

0.01U_0402_16V7K~D

1

2

L42 DLW21SN121SQ2_0805~D@11

44 3 3

2 2

R11710K_0402_5%~D

12

R451 0_0805_5%~D@1 2

R4740_0402_5%~D 1 2

C328

0.01U_0402_16V7K~D

1

2

C324

0.01U_0402_16V7K~D

1

2

R4840_0402_5%~D

1 2

D14RB751V_SOD323~D

2 1

C335

0.01U_0402_16V7K~D

1

2

C333

10U_0805_6.3V6M

~D

1

2

C40422P_0402_50V8J~D

1 2

4 IN 1 CONN

xD Card

Interface M

S Card

Interface

SD Card

Interface

J5IN1

MOLEX_480001002~D

XD0_GND1

XD1_CD2XD2_R/B#3XD3_RE#4XD4_CE#5XD5_CLE6XD6_ALE7XD7_WE#8XD8_WP#9

XD9_GND10

XD10_D011XD11_D112XD12_D213XD13_D314XD14_D415XD15_D516XD16_D617XD17_D718

XD18_VCC19

MS1_VSS 20

MS2_BS 21

MS3_DATA1 22MS4_DATA0 23

MS5_DATA2 24

MS6_INS 25

MS7_DATA3 26MS8_SCLK 27

MS9_VCC 28

MS10_VSS 29

SD1_CD/DAT3 30

SD2_CMD 31

SD3_VSS 32

SD4_VDD 33

SD5_CLK 34

SD6_VSS 35

SD7_DAT0 36SD8_DAT1 37SD9_DAT2 38

SD_GND 39

SD_SW 40SD_SW/WP 41

GND042GND143GND244

C337

0.1U_0402_16V4Z~D

1

2

R478

56.2_0603_1%~D

12

R477

5.1K_0603_1%

~D

12

C334

10U_0805_6.3V6M

~D

1

2

R748 0_0402_5%~D@1 2

C336

10U_0805_6.3V6M

~D

1

2

C355

0.01U_0402_16V7K~D

1

2

J1394

TYCO_1775260-1~D

44332211

G1 5

G2 6

G

D

S

Q77

2N70

02_S

OT2

3~D

2

13

R44710K_0402_5%~D

1 2

R4730_0402_5%~D 1 2

R487100K_0402_5%~D

1 2

T5

R436

10K_0402_1%~D

12

R438 0_0402_5%~D@1 2

C406

0.47U_0402_10V4Z~D

1

2

C329

10U_0805_6.3V6M

~D

1

2

C399

0.01U_0402_16V7K~D

1

2

R434

0_0805_5%~D

1 2

L32

BLM21AG601SN1D_0805~D

1 2

G

D

S Q752N7002_SOT23~D

2

13

C3400.01U_0402_16V7K~D 1 2

R481

56.2_0603_1%~D

12

C331

0.01U_0402_16V7K~D

1

2

R435

0_0402_5%~D@

1 2

R480

56.2_0603_1%~D

12

C409

0.1U_0402_16V4Z~D

1

2

G

DS

Q76SI2303BDS-T1-E3_SOT23-3~D

2

13R482

100K_0402_5%~D

12

C322

0.01U_0402_16V7K~D

1

2

R426100_0402_5%~D

1 2

C325

0.01U_0402_16V7K~D

1

2

C398

0.33U_0603_10V7K~D

1

2

R437

10K_0402_5%~D

1 2 G

D S

Q782N7002_SOT23~D

2

1 3

R74

90_

0402

_5%

~D@

12

R44010K_0402_5%~D

1 2

L41 DLW21SN121SQ2_0805~D@

11

44 3 3

2 2

D22RB751V_SOD323~D

2 1

R427

10_0402_5%~D

@

12

C327

0.47U_0402_10V4Z~D

1

2

R4750_0402_5%~D 1 2

R747 0_0402_5%~D@1 2

C326

0.01U_0402_16V7K~D

1

2

R441

0_0402_5%~D@

1 2

Page 34: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SCCD-SCCD+

SC_CLK

SC_IOMD0

SC_C4

SC_RST#

SCCD-SCCD+

SC_DET#

ICH_SMBCLK

PCIE_RX2-

CLK_PCIE_MINI

PCIE_TX2+

PCIE_RX2+

CLK_PCIE_MINI#

PLTRST3#

PCIE_WAKE#

WLAN_RADIO_DIS#

MINICLK_REQ#

ECE_USBP1-ECE_USBP1+

ICH_SMBDATA

LED_WLAN#

PCIE_TX2-

CLK_SMCARD_48M

PLTRST2#

EXPRCRD_STBY_R#

CPUSB#

EXPR_CARD_RST#

CPPE#

COEX2_WLAN_ACTIVECOEX1_BT_ACTIVE

LED_BT_OUT

EXPR_CARD_RST#

CARD_CLK_REQ#CPPE#

CPUSB#

PCIE_WAKE#

HOST_DEBUG_TXHOST_DEBUG_RX8051TX

8051RX

ECE_USBP3_D+

ECE_USBP3_D-

+SC_VCC

+3.3V_OUT

+3.3V_RUN

+SC_VCC

+SC_VCC

+3.3V_RUN

+3.3V_LAN

+3.3V_RUN

+1.5V_RUN

+3.3V_CARDAUX

+1.5V_CARD

+3.3V_SUS

+3.3V_SUS +3.3V_RUN+3.3V_CARD

+1.5V_RUN

+3.3V_LAN

+1.5V_CARD

+3.3V_CARDAUX

+3.3V_CARD

+5V_RUN

PCI_RST#<21,30,33,35>

CLK_SMCARD_48M<6>

ECE_USBP2-<37>ECE_USBP2+<37>

SC_DET#<37>

WLAN_RADIO_DIS# <37>

LED_WLAN# <39>

MINICLK_REQ#<6>

CLK_PCIE_MINI#<6>

PLTRST3# <21>

PCIE_RX2+<23>

COEX2_WLAN_ACTIVE<28>

CLK_PCIE_MINI<6>

COEX1_BT_ACTIVE<28>

PCIE_TX2+<23>

ICH_SMBCLK <6,23,30>

ECE_USBP1- <37>ECE_USBP1+ <37>

ICH_SMBDATA <6,23,30>

PCIE_WAKE#<30,37>

PCIE_TX2-<23>

PCIE_RX2-<23>

PLTRST2#<21,37,38>

CPPE#<37>

EXPRCRD_STBY#<37>

BT_ACTIVE <28,39>

CARD_CLK_REQ# <6>

PCIE_WAKE# <30,37>ICH_SMBDATA<6,23,30>ICH_SMBCLK<6,23,30>

CLK_PCIE_EXPCARD#<6>CLK_PCIE_EXPCARD<6>

PCIE_RX4+<23>PCIE_RX4-<23>

PCIE_TX4+<23>PCIE_TX4-<23>

HOST_DEBUG_TX <38>HOST_DEBUG_RX<38>

8051TX<38>

8051RX <38>

ECE_USBP3-<37>

ECE_USBP3+<37>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

SMART/EXPRESS/MINI CARD

34 62Tuesday, December 13, 2005

Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

USB SMARTCARD READER.

& USB SMARTCARDS ARE SUPPORTED.TYPE A (5V), B (3V), AB (5V/3V)

MINI Wireless LAN Card

Place closely pin 3

MODE1

HIGHLOW 48MHz

6MHz Crystal

CLOCK INPUT

SMART CARD

Layout Note: Place R509~R513 and C631 closely JSC

SCCD-/SCCD+ msut be kept equal lengthwith a differential impedance of 90 ohms

Layout Notes

+3.3V_CARD: Max. 1300mA, Average 1000mA+1.5V_CARD: Max. 650mA, Average 500mA

R244 15K_0402_5%~D5@ 1 2

C289

0.047U_0402_16V4Z~D

1

2

U37

R5538D001_ES4_QFN20~D

3.3Vin23.3Vin4 3.3Vout 3

3.3Vout 5

SYSRST#6

SHDN#20

STBY#1

PERST# 8

OC# 19

RCLKEN18

AUX_IN17 AUX_OUT 15

CPPE#10

CPUSB#9

NC 16

GND 7

1.5Vin121.5Vin14 1.5Vout 11

1.5Vout 13

R529 100K_0402_5%~D1 2

R245 15K_0402_5%~D5@

1 2

C309

0.047U_0402_16V4Z~D

1

2

L15 DLW21SN900SQ2_0805~D@11

44 3 3

2 2

R246 15K_0402_5%~D5@

1 2

C297

0.1U_0402_16V4Z~D

1

2

C491

0.1U_0402_16V4Z~D

1

2

C490

0.1U_0402_16V4Z~D

1

2

C292

4.7U_0805_10V4Z~D

1

2

C252

0.1U_0402_16V4Z~D

5@1

2

C249

0.1U_0402_16V4Z~D

5@1

2R234

1.5K_0402_5%

~D5@

12 C

265

0.1U_0402_16V4Z~D

5@

1

2

C467

0.1U_0402_16V4Z~D

1

2

JMINI

TYCO_1775838-1~D

1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151

GND153

2 24 46 68 8

10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52

GND2 54

C301

0.1U_0402_16V4Z~D

1

2

R261 220_0402_5%~D5@ 12

R3150_0402_5%~D 1 2

R250 220_0402_5%~D5@ 12

JCLIP

MOLEX_48099-5200~D

11223344

R3140_0402_5%~D 1 2

C478

0.1U_0402_16V4Z~D

1

2

C484

0.1U_0402_16V4Z~D

1

2

C479

0.1U_0402_16V4Z~D

1

2

R539 0_0402_5%~D@1 2

C273

0.1U_0402_16V4Z~D

1

2

R525

0_0402_5%~D@

1 2

C238

4.7U_0805_10V4Z~D

5@

1

2

C468

10U_0805_6.3V6M

~D

1

2

U15

OZ77C6LN-B1_QFN32~D5@

VCC5V_IN5VCC5V_IN28

UPD-17UPD+16

RST#14

NC30NC31

XI/48M_IN3XO4

MODE0/SC_LED#32MODE11MODE22

GND11GND13GND26

+3.3V_OUT 29

DPD- 19DPD+ 18

EGATED- 21EGATED+ 20

SC_VCC 27

SC_RST# 24SC_CLK 23

SC_C4 22SC_IO 25

SC_DET# 15

RF_OUT 8RF_IN/RX 7

RF_CLK 9RF_AUX 10

VR_C

PR6

VR_C

PR12

C296

0.047U_0402_16V4Z~D

1

2

R251 33_0402_5%~D5@ 12

C229

4.7P_0402_50V8C

~D

@1

2

R243

47K_0402_5%~D

5@

12

C244

1U_0603_10V4Z~D5@

12

C317

0.1U_0402_16V4Z~D

1

2

R543 100K_0402_5%~D1 2

JEXP

FOX_QTS0030A-3121-9F~D

11 2 233 4 4GND5 GND 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 24GND25 GND 262727 28 282929 30 30

GND 32GND31

C492

0.1U_0402_16V4Z~D

1

2

R564 220_0402_5%~D5@ 12

C230

4.7U_0805_10V4Z~D

5@1

2

C472

0.1U_0402_16V4Z~D

1

2

C310

0.047U_0402_16V4Z~D

1

2

R565 15K_0402_5%~D5@ 1 2

JSMART

MOLEX_52610-1075~D5@

1122334455667788991010

C482

0.1U_0402_16V4Z~D

1

2

R189

10_0402_5%~D

@

12

R183

4.7K_0402_5%

~D5@1

2

C239

0.1U_0402_16V4Z~D

5@

1

2C

264

1U_0603_10V4Z~D

5@

1

2

C473

0.1U_0402_16V4Z~D

1

2

R303

10K_0402_5%~D

5@

12

C276

0.1U_0402_16V4Z~D

5@1

2

C255

4.7U_0805_10V4Z~D

5@

1

2

R530 100K_0402_5%~D1 2

Page 35: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DOCK_PAR

DOCK_GNT0#

DOCK_STOP#

DOCK_C_BE0#

DOCK_C_BE2#

DOCK_PIRQA#

DOCK_TRDY#

DOCK_IRDY#

DOCK_PCIRST#

DOCK_C_BE1#

DOCK_SERR#

DOCK_LOCK#

DOCK_PERR#

DOCK_C_BE3#

DOCK_DEVSEL#

DOCK_FRAME#

DOCK_PCI_IDSEL

DOCK_PME#

QBUFEN#

DOCK_PCI_EN#QUIETE#

DOCK_AD19DOCK_AD20

DOCK_AD4

DOCK_AD24

DOCK_AD2

DOCK_AD21

DOCK_AD13

DOCK_AD8

DOCK_AD3

DOCK_AD31

DOCK_AD1

DOCK_AD25

DOCK_AD11

DOCK_AD18DOCK_AD17

DOCK_AD10DOCK_AD9

DOCK_AD15

DOCK_AD0

DOCK_AD27

DOCK_AD22

DOCK_AD14

DOCK_AD12

DOCK_AD28

DOCK_AD7

DOCK_AD5

DOCK_AD16

DOCK_AD23

DOCK_AD29DOCK_AD30

DOCK_AD6

DOCK_AD26

PCI_SERR#

PCI_TRDY#PCI_FRAME#

PCI_C_BE2#

PCI_PARPCI_C_BE1#

PCI_RST#

PCI_PLOCK#

PCI_DEVSEL#

PCI_STOP#

PCI_PERR#

PCI_C_BE3#

PCI_GNT0#

SYS_PME#

PCI_PIRQA#

PCI_IRDY#

DOCK_TRDY#

DOCK_SERR#

DOCK_FRAME#

DOCK_PAR

DOCK_C_BE2#DOCK_PERR#

DOCK_C_BE1#

DOCK_C_BE3#

DOCK_STOP#

DOCK_PME#

DOCK_IRDY#

DOCK_PIRQA#

DOCK_LOCK#

DOCK_GNT0#DOCK_PCIRST#

DOCK_DEVSEL#PCI_C_BE0# DOCK_C_BE0#PCI_AD24 DOCK_PCI_IDSEL

PCI_AD25

PCI_AD27

PCI_AD30

PCI_AD26

PCI_AD17

PCI_AD19

PCI_AD16

PCI_AD22

PCI_AD31

PCI_AD23

PCI_AD18

PCI_AD21

PCI_AD20

PCI_AD29PCI_AD28

PCI_AD24

PCI_AD14

PCI_AD12PCI_AD11PCI_AD13

PCI_AD10

PCI_AD8

PCI_AD15

PCI_AD9

PCI_AD6PCI_AD7

PCI_AD1PCI_AD0

PCI_AD3PCI_AD2

PCI_AD4PCI_AD5

QUIETE#

DOCK_AD28

DOCK_AD30DOCK_AD29

DOCK_AD24DOCK_AD26

DOCK_AD25

DOCK_AD27

DOCK_AD31

DOCK_AD22

DOCK_AD21

DOCK_AD18

DOCK_AD19

DOCK_AD23

DOCK_AD17

DOCK_AD20

DOCK_AD16

DOCK_AD15

DOCK_AD13DOCK_AD11

DOCK_AD14

DOCK_AD8

DOCK_AD12DOCK_AD10DOCK_AD9

DOCK_AD0

DOCK_AD7

DOCK_AD1

DOCK_AD4DOCK_AD5DOCK_AD3

DOCK_AD6

DOCK_AD2

+VCC_QBUFD

QUIETE#

+VCC_QBUF

+3.3V_RUN

+5V_RUN

DOCK_GNT0# <36>

DOCK_FRAME# <36>

DOCK_DEVSEL# <36>

DOCK_C_BE1# <36>

DOCK_C_BE3# <36>DOCK_C_BE2# <36>

DOCK_SERR# <36>DOCK_IRDY# <36>

DOCK_C_BE0# <36>

DOCK_PCI_IDSEL <36>

DOCK_PERR# <36>

DOCK_PAR <36>DOCK_TRDY# <36>

DOCK_PME# <36>DOCK_LOCK# <36>DOCK_PCIRST# <36>

DOCK_STOP# <36>

DOCK_PIRQA# <36>

DOCK_AD[0..31] <36>

QBUFEN#<37>

DOCK_PCI_EN#<36>

PCI_C_BE2#<21,31,33>

PCI_FRAME#<21,31,33,36>

PCI_IRDY#<21,31,33,36>

PCI_RST#<21,30,33,34>

SYS_PME#<30,33,37>

PCI_PIRQA#<21>

PCI_C_BE1#<21,30,33>

PCI_SERR#<21,31,33>

PCI_GNT0#<21,36>

PCI_PERR#<21,31,33>

PCI_C_BE3#<21,31,33>

PCI_TRDY#<21,31,33>

PCI_PAR<21,30,33>

PCI_PLOCK#<21>

PCI_STOP#<21,30,33>

PCI_C_BE0#<21,31,33>

PCI_AD[0..31]<21,30,31,33>

PCI_DEVSEL#<21,31,33>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

DOCKING BUFFER

35 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C144

0.047U_0402_16V4Z~D

5@

1

2

C134

0.047U_0402_16V4Z~D

5@

1

2

C150

0.1U_0402_16V4Z~D

5@

1

2

D6

RB751V_SOD323~D5@

2 1D5

RB751V_SOD323~D5@

2 1

R620

100K_0402_5%~D

5@

12 C

563

0.1U_0402_16V4Z~D

5@1

2

U45

PI5C162861BE_BQSOP48~D5@

A02A13A24A35A46A57A68A79A810A911

A1014A1115A1216A1317A1418A1519

B0 46B1 45B2 44B3 43B4 42B5 41B6 40B7 39B8 38B9 37

B10 34B11 33B12 32B13 31B14 30B15 29

GND1 12GND2 24NC11

NC213

OE147OE235 VCC2 48VCC1 36

A1620A1721A1822A1923

B16 28B17 27B18 26B19 25

C1570.1U_0402_16V4Z~D5@

1 2

U44

74AHC1G32GW_SOT353-5~D5@INB2

INA1O 4

P5

G3

C124

0.1U_0402_16V4Z~D

5@

1

2

R103

4.7K_0402_5%

~D5@

12U46

PI5C34X2245BE_BQSOP80~D5@

NC11A12A23A34A45A56A67A78A89GND110NC211A912A1013A1114A1215A1316A1417A1518A1619GND220NC321A1722A1823A1924A2025A2126A2227A2328A2429GND330NC431A2532A2633A2734A2835A2936A3037A3138A3239GND440

VCC4 80OE1# 79

B1 78B2 77B3 76B4 75B5 74B6 73B7 72B8 71

VCC3 70OE2# 69

B9 68B10 67B11 66B12 65B13 64B14 63B15 62B16 61

VCC2 60OE3# 59

B17 58B18 57B19 56B20 55B21 54B22 53B23 52B24 51

VCC1 50OE4# 49

B25 48B26 47B27 46B28 45B29 44B30 43B31 42B32 41

Page 36: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DOCK_AD26

DOCK_DEVSEL#

DVI_DETECT_L

DOCK_PIRQA#

DOCK_AD22

CLK_KBD

DVI2_CLK-

DOCK_SIO_ALERT#

DVI2_TX1+

DVI_SCLK_L

DAT_DDC2

DOCK_C_BE2#

DOCK_AD30

DOCK_IRDY#

DOCK_AD8

RED

DAT_KBD

DOCK_SMB_CLK

DVI2_TX2-

DOCK_AD11

DOCK_AD16

DOCK_AD0

DOCK_SERR#

DOCK_AD10

DOCK_AD19

VSYNC_DOCK

CLK_DDC2

DVI2_TX0+

DOCK_AD31

DAT_DOCK

DOCK_AD4

DOCK_TRDY#

DOCK_AD6

D_LAD2

DOCK_LOCK#

DOCK_C_BE0#

D_SERIRQ

DOCK_C_BE1#

DOCK_AD20

DVI2_TX2+

DOCK_LAN_ACTLED_YEL#

DOCK_AD7

TV_Y

DOCK_FRAME#

DOCK_OWNS_PCI

USBP7-

HDD_LED

DOCK_PCI_IDSEL

DVI2_TX1-

DVI2_CLK+

DOCK_TIP

DOCK_AD14

DOCK_AD2

DOCK_AD27

D_DLDRQ1#D_CLKRUN#

CLK_DOCK

DOCK_PSID

DVI2_TX0-DOCK_C_BE3#

DOCK_AD17

DOCK_AD25

TV_CVBSUSBP7+

D_LFRAME#

DOCK_RING

DOCK_AD15

DOCK_AD18

DOCK_AD28

DOCK_AD21

D_LAD0

DOCK_PWR_EN

DVI_SDAT_L

HSYNC_DOCK

DOCK_SMB_DAT

DOCK_AD13

DOCK_AD5

DOCK_SMB_INT#

DOCK_AD12

DOCK_STOP#

Z330

7

CLK_PCI_DOCK DOCK_PCIRST#

DOCK_PERR#

GREEN

DOCK_AD29

D_LAD1

DOCK_AD1

DOCK_AD23

DOCK_PAR

DOCK_AD24

BLUE

D_LAD3

DOCK_AD9

DOCK_AD3

DOCK_DET# DOCK_DET#

Z3308

+2.5V_LAN_R

DOCK_AD24

DOCK_AD7

DOCK_AD20

DOCK_AD27

DOCK_AD9

DOCK_AD14

DOCK_AD25

DOCK_AD30

DOCK_AD23

DOCK_AD3

DOCK_AD26

DOCK_AD11

DOCK_AD6

DOCK_AD4

DOCK_AD1

DOCK_AD5

DOCK_AD8

DOCK_AD29

DOCK_AD12DOCK_AD13

DOCK_AD17

DOCK_AD22

DOCK_AD31

DOCK_AD10

DOCK_AD15

DOCK_AD2

DOCK_AD18

DOCK_AD16

DOCK_AD21

DOCK_AD0

DOCK_AD28

DOCK_AD19

+DC_IN

DOCK_PCI_EN#

DOCK_LED_100#

DOCK_PME#

SPDIF_DOCK

DOCK_LED_10#

PCI_GNT0#

CLK_PCI_DOCK

+G_DOC_PWRSRC

TV_C

DOCK_DET#

DVI_T-DVI_T+

DVI_T+DVI_T-

DVI_T+DVI_T-

DVI_T+

DVI_T-

DOCK_RING

DOCK_TIP

PCI_REQ0#

PCI_IRDY#

Z3305DOCK_OWNS_PCI

Z3306PCI_FRAME#

+3.3V_SUS

+PWR_SRC

+3.3V_ALW

+2.5V_3.3V_LAN +3.3V_RUN

+DOCK_PWR_SRC

+DOCK_PWR_SRC

+3.3V_RUN

+3.3V_RUN

+3.3V_RUN

+5V_ALW

+3.3V_RUN

+3.3V_RUN

+DC_IN

DOCK_FRAME#<35>

DAT_KBD <38>

DOCK_TRDY# <35>

DOCK_LOM_TRD3+ <32>

CLK_PCI_DOCK<6>

CLK_KBD <38>

DOCK_AD[0..31] <35>

DOCK_LOM_TRD3- <32>

DOCK_SMB_INT# <38>

DOCK_GNT0# <35>

DVI2_TX0-<19>

D_LFRAME# <37>

DOCK_IRDY# <35>

DVI_DETECT_L <19>DOCK_PSID<43>

DOCK_DEVSEL# <35>

DVI2_TX0+<19>

DVI_SDAT_L <19>

DVI2_CLK+<19>

DVI_SCLK_L <19>

DVI2_TX1-<19>

CLK_DDC2 <20>

D_DLDRQ1# <37>

USBP7- <23>

D_LAD0 <37>

DVI2_TX1+<19>

DOCK_C_BE3# <35>

DOCK_LOCK#<35>

DAT_DOCK<38>

DOCK_SMB_DAT<38>

DOCK_PCI_IDSEL <35>

DOCK_PAR<35>

DOCK_C_BE2#<35>

DOCK_LOM_TRD0-<32>

CLK_DOCK<38>

USBP7+ <23>

D_LAD1<37>

DVI2_CLK-<19>

D_LAD2<37>

D_SERIRQ <37>

DOCK_LOM_TRD1-<32>

DVI2_TX2-<19>

HDD_LED <39>

DOCK_SIO_ALERT# <37>

DOCK_PCIRST# <35>

DOCK_SMB_CLK<38>

D_LAD3<37>

DOCK_LAN_ACTLED_YEL# <32>

DOCK_C_BE0# <35>

DOCK_PERR# <35>

D_CLKRUN# <37>

DOCK_STOP# <35>

DAT_DDC2 <20>

DOCK_SERR#<35>

DOCKED <32,37>

DVI2_TX2+<19>

DOCK_C_BE1# <35>

DOCK_LOM_TRD2+ <32>

DOCK_PIRQA#<35>

DOCK_LOM_TRD0+<32>

DOCK_LOM_TRD1+<32>DOCK_LOM_TRD2- <32>

DOCK_PWR_EN<37>

DOCK_PCI_EN#<35>

DOCK_LED_10#<32>

DOCK_PME#<35>

SPDIF_DOCK<20>

DOCK_LED_100#<32>

HSYNC_DOCK <20>VSYNC_DOCK <20>

RED <20>

TV_CVBS <20>

TV_Y <20>

GREEN<20>

BLUE<20>

PCI_GNT0#<21,35>

PCI_IRDY#<21,31,33,35>

PCI_FRAME#<21,31,33,35>

TV_C<20>

PCI_REQ0# <21>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

DOCKING CONNECTOR

36 62Tuesday, December 13, 2005

Compal Electronics, Inc.

PLACE TERMINATIONS CLOSE TO DOCK CONNECTOR

NB

PWR_SRC

no power dock

self power dock

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Place closely pin 35

R125 100K_0402_5%~D@

12

C1710.01U_0402_16V7K~D5@

1 2

C470.1U_0603_50V4Z~D5@

1 2

R71

10K_0402_5%~D

@

12

C67

0.1U_0603_50V4Z~D

5@

1

2

C74

0.1U_0805_50V7M

~D5@

1

2

U9

74AHC1G08GW_SOT353-5~D5@

IN11

IN22 G3

O 4

P5

JDOCKB

AMP_1473681~D5@

S137137S138138S139139S140140S141141S142142S143143S144144S145145S146146S147147S148148S149149S150150S151151S152152S153153S154154S155155S156156S157157S158158S159159S160160S161161S162162S163163S164164S165165S166166S167167S168168S169169S170170S171171S172172S173173S174174S175175S176176S177177S178178S179179S180180S181181S182182S183183S184184S185185S186186S187187S188188S189189S190190

S205 205S206 206S207 207S208 208S209 209S210 210S211 211S212 212S213 213S214 214S215 215S216 216S217 217S218 218

S220 220

S222 222S223 223S224 224S225 225S226 226S227 227S228 228S229 229S230 230S231 231S232 232S233 233S234 234S235 235S236 236S237 237S238 238S239 239S240 240S241 241S242 242S243 243S244 244S245 245S246 246S247 247S248 248

S250 250

S252 252S253 253S254 254S255 255S256 256S257 257S258 258S259 259

S193193S194194S195195S196196

M204204

C1620.1U_0402_16V4Z~D5@

1 2

JDOCKA

AMP_1473681~D5@

S11S22S33S44S55S66S77S88S99S1010S1111S1212S1313

S1515

S1717S1818S1919S2020S2121S2222S2323S2424S2525S2626S2727S2828S2929S3030S3131S3232S3333S3434S3535S3636S3737S3838S3939S4040S4141S4242S4343

S4545

S4747S4848S4949S5050S5151S5252S5353S5454S5555

S69 69S70 70S71 71S72 72S73 73S74 74S75 75S76 76S77 77S78 78S79 79S80 80S81 81S82 82S83 83S84 84S85 85S86 86S87 87S88 88S89 89S90 90S91 91S92 92S93 93S94 94S95 95S96 96S97 97S98 98S99 99

S100 100S101 101S102 102S103 103S104 104S105 105S106 106S107 107S108 108S109 109S110 110S111 111S112 112S113 113S114 114S115 115S116 116S117 117S118 118S119 119S120 120S121 121S122 122

S125 125S126 126S127 127S128 128

M136 136

U3

74AHCT1G08GW_SOT353-5~D5@

A1

B2 G3

Y 4

P5

JWIRE2

MOLEX_48227-0401~D5@

11223344 G2 6

G1 5

R1420_0402_5%~D5@

12

C1590.1U_0402_16V4Z~D5@

1 2

47K

47K

Q16PDTC144EK_SOT23~D5@2

13

R70

22K_0402_5%~D

@

12

U8

MC74VHC1G04DFT2G_SC70-5~D5@

IN A2

OUT Y 4

NC1

GND3

VCC 5

R46100K_0402_5%~D5@

12

C1630.1U_0402_16V4Z~D5@

1 2

C64

1000P_0402_50V7K~D5@

1

2

C151

22P_0402_50V8J~D

@

1

2

R29100K_0402_5%~D5@

12

C79

1000P_0402_50V7K~D5@

1

2

R30100K_0402_5%~D5@

12

U7

74AHC1G08GW_SOT353-5~D5@

IN11

IN22 G3

O 4

P5

R72

22K_0402_5%~D

@

12

Q19FDS4435_NL_SO8~D5@

4

78

65

123

R69

10K_0402_5%~D

@

12

R28

100K_0402_5%~D

5@

12

D3

SM05_SOT23@

2

31

JDOCKC

AMP_1473681~D5@

P1P1

P2P2

P3P3

P4P4

P5 P5

P6 P6

P7 P7

P8 P8

MH1MH1 MH2 MH2

SHLD5MH9

MH4 MH4

SHLD1MH5

SHLD2MH6

SHLD3 MH7

SHLD6MH10

SHLD4 MH8

SHLD7 MH11

SHLD8 MH12

MH14 MH14MH16 MH16

MH3MH3MH13MH13MH15MH15

C1740.01U_0402_16V7K~D5@

12

R116

33_0402_5%~D

@

12

R53100K_0603_5%~D5@

C52

0.47

U_0

805_

25V7

k

5@

12

C1660.01U_0402_16V7K~D5@

1 2

G

D

S

Q152N7002_SOT23~D5@

2

13

C1680.01U_0402_16V7K~D5@

12

Page 37: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CLK_SIO_14M

BID3

DOCK_SIO_ALERT#

DOCK_SIO_ALERT#

PCIE_WAKE#

LAN_TPM_EN#

QBUFEN#

AUDIO_AVDD_ON

LPC_LFRAME#

LPC_LAD1LPC_LAD0

LPC_LAD2LPC_LAD3

PLTRST2#CLK_PCI_5018

BID2BID1BID0

+SIO_VDDASYS_PME#

+REG_EN

RBIAS

CLK_PCI_5018

DOCK_PWR_EN

USB_SIDE_EN#USB_BACK_EN#

BEEP

BC_CLK

PCIE_WAKE#

BC_DATBC_INT#

ECE_USBP4+ECE_USBP4-

USBP0+USBP0-ECE_USBP1+ECE_USBP1-ECE_USBP2+ECE_USBP2-ECE_USBP3+ECE_USBP3-

PBAT_PRES#

PBAT_ALARM#

CLKRUN#LPC_LDRQ0#LPC_LDRQ1#IRQ_SERIRQ

THERMTRIP_SIO

CPU_PROCHOT#

RUNPWROK

BID1

BID2

BID0

BID3

ICH_PCIE_WAKE#

SC_DET#D_LAD0

PBAT_ALARM#

D_LAD1ICH_PME# D_LAD2

DOCKED

D_LAD3D_LFRAME#D_CLKRUN#

ECE5018_XTAL1

D_DLDRQ1#D_SERIRQ

LAN_LOW_PWR

CB_HWSPND#

D_CLKRUN#

D_DLDRQ1#

D_SERIRQ

CBUS_GRST#CPPE#

EXPRCRD_STBY#

MDC_RST_DIS#

FPBACK_EN

NB_MUTE

GPIOH2

ADAPT_OC

SIO_GFX_PWRYPRPB_DET#

TXD0

SYS_PME#

SPDIF_SHDN

AC_OFFECE5018_XTAL2LOM_CABLE_DETECT

IMVP6_PROCHOT#

SUB_SHDN_ON_BATT

M_LED_BK

5V_CAL_SIO#

5V_CAL_SIO2#DOCK_HP_MUTE#HP_NB_SENSE

IMVP6_PROCHOT#

INSTANT_ON# INSTANT_ON_R2#

CLK_SIO_14M

TXD0

+3.3V_ALW

+3.3V_ALW

+3.3V_ALW

+3.3V_ALW

+3.3V_ALW

+3.3V_RUN

+3.3V_RUN

+5V_SUS

+RTC_CELL

ECE_USBP1+ <34>ECE_USBP1- <34>ECE_USBP2+ <34>ECE_USBP2- <34>ECE_USBP3+ <34>ECE_USBP3- <34>ECE_USBP4+ <28>ECE_USBP4- <28>

PLTRST2# <21,34,38>CLK_PCI_5018 <6>

CLKRUN# <23,31,33,38>

IRQ_SERIRQ <23,30,33,38>

LPC_LFRAME# <22,30,38>

LPC_LDRQ1# <22>LPC_LDRQ0# <22>

CLK_SIO_14M <6>

D_DLDRQ1# <36>

D_LAD1 <36>D_LAD2 <36>D_LAD3 <36>

D_LAD0 <36>

D_LFRAME# <36>D_CLKRUN# <36>

D_SERIRQ <36>

RUNPWROK <19,38,40,48>

PCIE_WAKE#<30,34>SYS_PME#<30,33,35>DOCK_SIO_ALERT#<36>PBAT_PRES#<44>

DOCKED<32,36>QBUFEN#<35>DOCK_PWR_EN<36>

BC_CLK<38>

BC_INT#<38>BC_DAT<38>

PBAT_ALARM#<44>

LAN_TPM_EN#<30>LAN_LOW_PWR<30>AUDIO_AVDD_ON<26>

ICH_PME#<21>ICH_PCIE_WAKE#<23>

NB_MUTE<27,28>

USB_SIDE_EN#<29>USB_BACK_EN#<29>

THERMTRIP_SIO<16>

SC_DET#<34>

CB_HWSPND#<33>

CBUS_GRST#<33>CPPE#<34>

EXPRCRD_STBY#<34>

MDC_RST_DIS#<28>

FPBACK_EN<19,20>

LPC_LAD0 <22,30,38>LPC_LAD1 <22,30,38>LPC_LAD2 <22,30,38>LPC_LAD3 <22,30,38>

ADAPT_OC<49>

SIO_GFX_PWR<19>YPRPB_DET#<19,20>

SPDIF_SHDN<20,26>

AC_OFF<43,49>

BEEP<27>

LOM_CABLE_DETECT<30>

CPU_PROCHOT#<7>

IMVP6_PROCHOT#<48>

SUB_SHDN_ON_BATT<28>

M_LED_BK<39>

5V_CAL_SIO#<16>

5V_CAL_SIO2#<16>DOCK_HP_MUTE#<26>

HP_NB_SENSE<26,27,28>

INSTANT_ON#<38>

WLAN_RADIO_DIS# <34>

USBP0+ <23>USBP0- <23>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

SUPPER IO ECE5018

37 62Tuesday, December 13, 2005

Compal Electronics, Inc.

TEST_PIN is a No Connect

SYSOPT straps aresampled at power up.

Place closely pin 56

<---Blue Tooth<---Express Card<---Smart Card<---Mini Card

Route RBIAS and its return to pin 128 veryshort.

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

0 1 A001 11

X02

1

BID0BID3

X01X00

REVBID2 BID1

0 0

0

000

00000

000 M00

Place closely pin 64

Note: For system debugpin4 connect to serial port pin3

A010 01 1

C23

74.

7U_0

805_

10V4

Z~D

1

2

R753 0_0402_5%~D6@ 1 2

C55722P_0402_50V8J~D@

1

2

U41

MC74VHC1G04DFT2G_SC70-5~D@

IN A 2

OUT Y4

NC 1

GND 3

VCC5

R61322_0402_5%~D @

12

R209 10K_0402_5%~D

1 2

C523

22P_0402_50V8J~D

1 2

D24

RB751V_SOD323~D

21

C23

10.

1U_0

402_

16V4

Z~D

1

2

C25

34.

7U_0

805_

10V4

Z~D

1

2

R150 10K_0402_5%~D

1 2

R570 10K_0402_5%~D

1 2

R568 10K_0402_5%~D

1 2

C55822P_0402_50V8J~D@

1

2

R212 10K_0402_5%~D@ 1 2

R23

512

K_04

02_1

%~D

12

C2500.1U_0402_16V4Z~D

1

2R569 10K_0402_5%~D

1 2

Y324MHZ_20PF_1BX24000BK1A~D

12

C53

64.

7U_0

805_

10V4

Z~D

1

2

C22

20.

1U_0

402_

16V4

Z~D

1

2

R573

10K_0402_5%~D

@12

C24

10.

1U_0

402_

16V4

Z~D

1

2

R610 100K_0402_5%~D

1 2

T11

R21

810

K_04

02_5

%~D

@

12

C245

10U_0805_6.3V6M~D

1

2

C524

22P_0402_50V8J~D

1 2

R21

910

K_04

02_5

%~D

12

C5220.1U_0402_16V4Z~D

1

2

R249 0_0402_5%~D

1 2

R57

4

1M_0

402_

5%~D

12

C2130.1U_0402_16V4Z~D

1

2

C2140.1U_0402_16V4Z~D

1

2

R609 100K_0402_5%~D

1 2

R210 10K_0402_5%~D@1 2

R22

110

K_04

02_5

%~D

12

R572

10K_0402_5%~D

@12 R780 0_0402_5%~D@

1 2

R608 100K_0402_5%~D

1 2

L11BLM18PG181SN1_0603~D

1 2

R779

100K_0402_5%~D7@

1 2

R211 10K_0402_5%~D 1 2

C5370.1U_0402_16V4Z~D

1

2

R444 100K_0402_5%~D

R24010K_0402_5%~D

12

R61122_0402_5%~D @

12

R22

010

K_04

02_5

%~D

@

12

LPC

DLPC

USB

GPIO

ECE5018

CLK

TEST

U39

ECE5018 A0_VTQFP128~D

GPIOA[0]97GPIOA[1]98GPIOA[2]99GPIOA[3]100GPIOA[4]101GPIOA[5]102GPIOA[6]103GPIOA[7]104

VDDA33 8

VSS 23

VDDA33 14

VSS 51

VDDA33 20

VSS 36

GPIOH[0]24GPIOH[1]25GPIOH[4]26GPIOH[5]27BC_INT#58BC_DAT59BC_CLK60

VCC

134

GPIOE[0]/RXD1GPIOE[1]/TXD2GPIOE[2]/RTS#3GPIOE[3]/DSR#4GPIOE[4]/CTS#5GPIOE[5]/DTR#84GPIOE[6]/RI#83GPIOE[7]/DCD#6

CLKRUN# 37

DCLK_RUN# 38

SER_IRQ 39

DSER_IRQ 40

LRESET# 41LFRAME# 42

DLFRAME# 43

LDRQ1# 44

DLDRQ1# 45

LDRQ0# 46

LAD3 47

DLAD3 48

LAD2 49

DLAD2 50

LAD1 52

VCC

157

DLAD1 53

LAD0 54

DLAD0 55

PCICLK 56

GPIOB[0]/INIT#65GPIOB[1]/SLCTIN#66GPIOC[2]/SCLT67GPIOC[3]/PE68GPIOC[4]/BUSY69GPIOC[5]/ACK#70GPIOC[6]/ERROR#71GPIOC[7]/ALF#73GPIOD[0]/STROBE#74GPIOC[1]/PD775GPIOC[0]/PD676GPIOB[7]/PD577GPIOB[6]/PD478GPIOB[5]/PD379GPIOB[4]/PD280GPIOB[3]/PD181GPIOB[2]/PD082

CLKI (14.318 MHz) 64

GPIOD[1]61GPIOD[2]62

GPIOD[3]/VBUS_DET63

CAP_LDO 86

VCC

185

VSS 96

GPIOD[4]/OCS1_N28GPIOD[5]/OCS2_N29GPIOD[6]/OCS3_N30GPIOD[7]/OCS4_N31

GPIOH[6]32GPIOH[7]33

GPIOG[0]88GPIOG[1]89GPIOG[2]90GPIOG[3]91GPIOG[4]92GPIOG[5]93GPIOG[6]94GPIOG[7]95

SYSOPT1/GPIOH[2]106SYSOPT0/GPIOH[3]107

VCC

110

8

GPIOF[7]109GPIOF[6]110GPIOF[5]111GPIOF[4]112

IRTX113IRRX114

GPIOF[3]/IRMODE/IRRX3B115GPIOF[2]/IRTX2116GPIOF[1]/IRRX2117GPIOF[0]/IRMODE/IRRX3A118

VCC1 119

VDD18 120

VSS 17

XTAL2 122XTAL1/CLKIN 123

VDDA18PLL 124VDDA33PLL 125

ATEST 126

RBIAS 127

VSS 11

VSS 128VSS 121VSS 87VSS 72

USBDP0 9USBDN0 10USBDP1 13USBDN1 12USBDP2 15USBDN2 16USBDP3 19USBDN3 18USBDP4 21USBDN4 22

PWRGD 7

OUT65 105

TEST_PIN 35

C22

60.

1U_0

402_

16V4

Z~D

1

2

Page 38: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CLK_KBD

DAT_KBD

DAT_DOCK

DOCK_SMB_INT#

DAT_SMB

CLK_SMB

FWP#

SIO_SLP_S5#

VAUX_EN

ALWON

CLK_PCI_5004

KSO16

KSI0

KSI6

KSO9

BREATH_LED

SIO_EXT_SCI#

LPC_LAD2

KSO4

KSO12

SIO_SLP_S3#

CLK_SMB

BAT2_ORG_LED#BAT1_GRN_LED#

ICH_EC_SPI_CLK

NUM_LED#

DEBUG_ENABLE#

PS_ID_DISABLE#

SBAT_SMBDAT

VGA_IDENTIFY

KSI4

BC_INT#

SIO_EXT_SMI#EC_FLASH_SPI_DIN

SIO_A20GATE

LPC_LAD0

CLK_DOCK

KSO1

KSO6PBAT_SMBDAT

KSO14KSO15

ICH_EC_SPI_DIN

CAP_LED#

FWP#

LPC_LAD1

KSI5

CLK_PCI_5004

EC_FLASH_SPI_DO

EC_FLASH_SPI_CLK

KSO2

CLK_KBD

KSO8

DOCK_SMB_CLK

SFPI_EN

BC_CLK

PS_ID

DAT_KBD

KSI7

KSO11

SIO_THRM#

SIO_EXT_WAKE#

SRL_LED#

IRQ_SERIRQ

FAN1_TACH

SIO_RCIN#

SUS_ON

KB_XOSEL

KSO3

FAN2_TACH

POWER_SW_IN#

KSO0

DOCK_SMB_DAT

BC_DAT

CLK_TP_SIO

KSI3

KSO7

ACAV_IN

DOCK_SMB_INT#

SBAT_SMBCLK

DAT_DOCK

KSI1

PBAT_SMBCLK

RESET_OUT#

RUNPWROK

VGA_IDENTIFY

LPC_LAD3

PLTRST2#

ATF_INT#

KSO5

KSI2

KSO13

DAT_SMB

RUN_ON

SIO_PWRBTN#

ICH_EC_SPI_DO

DAT_TP_SIO

CLKRUN#

LPC_LFRAME#

KSO10

SPI_CS#

LID_CL_SIO#

32K_XTAL2

DEBUG_ENABLE#8051TX

PBAT_SMBDAT

PBAT_SMBCLK

DOCK_SMB_DAT

DOCK_SMB_CLK

SBAT_SMBDAT

SBAT_SMBCLK

BIA_PWM

KSO17

8051RX

LID_CL_SIO# LID_CL#

ATF_INT#

POWER_SW_IN# POWER_SW#

32K_XTAL1

INSTANT_ON# INSTANT_ON_SW#

RUN_ON_D

ITP_DBRESET#

INSTANT_ON#

HOST_DEBUG_TXHOST_DEBUG_RX

SFPI_EN

EC_FLASH_SPI_CLK

SPI_CS#

EC_FLASH_SPI_DO

EC_FLASH_SPI_DIN

CLK_DOCK

VR_CAP

VR_CAPALWON

INSTANT_ON_R1#

+3.3V_ALW

+3.3V_ALW

+RTC_CELL

+3.3V_ALW

+5V_RUN

+5V_ALW +3.3V_ALW

+3.3V_ALW

+3.3V_ALW

+3.3V_ALW

+RTC_CELL

+3.3V_ALW

+RTC_CELL

+RTC_CELL

+3.3V_ALW

+3.3V_SUS

+3.3V_SUS+3.3V_SUS

+3.3V_ALW

+RTC_CELL

LPC_LFRAME#<22,30,37>

PLTRST2#<21,34,37>

CLKRUN#<23,31,33,37>

CLK_PCI_5004<6>

KSI[0..7]<39>

BAT1_GRN_LED# <39>BAT2_ORG_LED# <39>

RESET_OUT# <40>

RUNPWROK <19,37,40,48>

ACAV_IN <16,19,49>

CLK_TP_SIO<39>DAT_TP_SIO<39>

ALWON <45>

BREATH_LED <39>

FAN1_TACH <16>

CLK_SMB <16>

SIO_A20GATE<22>

CLK_KBD<36>DAT_KBD<36>

DAT_DOCK<36>CLK_DOCK<36>

ICH_EC_SPI_DO<23>

ICH_EC_SPI_CLK<23>

PBAT_SMBCLK <41,44,49>PBAT_SMBDAT <41,44,49>

SIO_EXT_SCI# <23>

SIO_EXT_SMI# <23>

BC_INT#<37>

BC_CLK<37>BC_DAT<37>

SIO_THRM#<23>

IRQ_SERIRQ<23,30,33,37>

VAUX_EN <40,45>SUS_ON <40,45>RUN_ON <19,40,45,46,47>

SIO_SLP_S5# <23>SIO_SLP_S3# <23>

SIO_RCIN# <22>SIO_EXT_WAKE# <23>

PS_ID <43>

SRL_LED# <39>CAP_LED# <39>

NUM_LED# <39>

ATF_INT# <16>

BIA_PWM <12,19,20>

DAT_SMB <16>

DOCK_SMB_DAT <36>DOCK_SMB_CLK <36>

PS_ID_DISABLE# <43>

DOCK_SMB_INT# <36>

LPC_LAD0<22,30,37>LPC_LAD1<22,30,37>LPC_LAD2<22,30,37>LPC_LAD3<22,30,37>

FAN2_TACH <16>

SPI_CS# <23>

SIO_PWRBTN#<23>

SBAT_SMBDAT <19,20>SBAT_SMBCLK <19,20>

KSO[0..17]<39>

LID_CL# <39>

POWER_SW# <16,39>

INSTANT_ON_SW# <39>

ICH_EC_SPI_DIN<23>

ITP_DBRESET# <7,23>

INSTANT_ON#<37>

HOST_DEBUG_RX <34>HOST_DEBUG_TX <34>

8051RX<34>8051TX<34>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

EMC5004

38 62Tuesday, December 13, 2005

Compal Electronics, Inc.

Bat2 = Orange LEDBat1 = Green LED

Place closely pin 58

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Flash write protect bottom 4Kof internal bootblock flash

Low = write protected

0 = UMA1 = Discrete Gfx

1=Flash Recovery Enabled0=Flash Recovery Disabled

Note:Pop R601, depop R600 for development

200 MIL SO8

150 MIL SO8Flash ROM

Depop R601, pop R600 for production

R781100K_0402_5%~D6@

12

R156

10K_0402_5%~D

1@

12

R161 4.7K_0402_5%~D

1 2

R207

10K_0402_5%~D

1 2

R754 0_0402_5%~D7@ 1 2

R214 100K_0402_5%~D 12

C216

0.1U_0402_16V4Z~D

1

2

C52122P_0402_50V8J~D

1 2

U17

MX25L8005M2C-15G_SO8~D

S#1Q2W#3VSS4

VCC 8HOLD# 7

C 6D 5

R195

100K_0402_5%~D

12

R227

10K_0402_5%~D

12

R607

10_0402_5%~D

1 2

R169

10K_0402_5%~D

12

R778

100K_0402_5%~D@

1 2

C546

0.047U_0402_10V7K~D

1

2

R154

10K_0402_5%~D

3@

12

R256

10K_0402_5%~D

12

D23

RB751V_SOD323~D@

21

R268 0_0402_5%~D1 2

R216 2.2K_0402_5%~D

1 2

R614

22_0402_5%~D

@

12

R571

0_0402_5%~D

12

R179

10K_0402_5%~D

1 2

C2400.1U_0402_16V4Z~D

1

2

C51322P_0402_50V8J~D

1 2

R177 2.2K_0402_5%~D

1 2

R776

10K_0402_5%~D@

1 2

C243

0.1U_0402_16V4Z~D

1

2

R196 8.2K_0402_5%~D12

R603

10K_0402_5%~D

@

12

R162 4.7K_0402_5%~D

1 2

C258

0.1U_0402_16V4Z~D

1 2

R26247_0402_5%~D

12

R606

100K_0402_5%~D

12

R168 4.7K_0402_5%~D

1 2

R77410K_0402_5%~D@

12

R550

1K_0402_5%~D

12

R217 2.2K_0402_5%~D

1 2

R192

100K_0402_5%~D

12

C221

0.1U_0402_16V4Z~D

1

2

R600

100K_0402_5%~D

12

C

BE

Q110MMBT3906_SOT23~D@1

2

3

U18

MX25L8005MC-15G_SOP8~D@

CS#1SO2WP#3GND4

VCC 8HOLD# 7

SCLK 6SI 5

C227

10U_0805_6.3V6M

~D

1

2

R777

0_0402_5%~D@

1 2

R182 2.2K_0402_5%~D

1 2

C215

0.1U_0402_16V4Z~D

1

2R

555

1K_0402_5%~D

@

12

R592 2.2K_0402_5%~D

1 2

C228

1U_0603_10V4Z~D

1

2

LPC Interface

Host/8051

Keyboard and Mouse Interface

BC Bus

PWR SW

U40

MEC5004_D_VTQFP128~D

GPIO82/FAN_TACH3 43

SGPIO35 1SGPIO36 (SFPI_EN) 2

SGPIO37 3

SGPIO43 4

GPIO16/FAN_TACH2 42GPIO15/FAN_TACH1 41

GPIO5/KSO1514GPIO4/KSO1415

OUT11/PWM1 46OUT10/PWM0 45

OUT9/PWM2 47

OUT5/KBRST50

OUT2/PWM3 48

PWRGD 49

nRESET_OUT/OUT6 53

ACAV_IN 128

POWER_ SW_IN1# 126

AB1A_DATA 5AB1A_CLK 6AB1B_DATA 7AB1B_CLK 8

KSO13/GPIO1816KSO12/OUT817KSO11/GPIOC718KSO10/GPIOC619KSO9/GPIOC520KSO8/GPIOC423KSO7/GPIO324KSO6/GPIO225

KSO4/GPIO028KSO3/GPIOC329KSO2/GPIOC230KSO1/GPIOC131KSO0/GPIOC032

KSI7/GPIO1933KSI6/GPIO1734KSI5/GPIO1035KSI4/GPIO936KSI3/GPIO837KSI2/GPIO738KSI1/GPIO639KSI0/SGPIO3040

KCLK77KDAT78EMCLK79EMDAT80

POWER_ SW_IN0# 127

VCC

121

KSO5/GPIO127

VR_C

AP22

VSS

26

KSO17/GPIOA112KSO16/GPIOA013

VSS

51

VCC

144

GPIO96/TOUT1 52

SGPIO44/MSCLK/SPCLK2 54SGPIO45/MSDATA/SPDOUT2 55

SER_IRQ56

LRESET#57PCICLK58LFRAME#59LAD060LAD161LAD262LAD363

VSS

74

CLKRUN#64

VCC

165

nEC_SCI/SPDIN2 66

SGPIO31/TIN1/SPCLK1 67SGPIO47/SPDOUT1 68SGPIO46/SPDIN1 69

SYSOPT0/SGPIO32/LPC_TX 70SYSOPT1/SGPIO33/LPC_RX 71

TEST_PIN 72

GPIOA3/WINDMON 73

GPIO94/IMCLK75GPIO95/IMDAT76

VCC

183

GPIO20/PS2CLK/8051RX81GPIO21/PS2DAT/8051TX82

VSS

88

nFWP 84

SGPIO42 89SGPIO41 90SGPIO40 91

SGPIO34/A20M92

VSS_

PLL

101

HSTCLK102

FLCLK103

VC

C_P

LL10

4HSTDATAIN105

FLDATAIN106

HSTDATAOUT107

FLDATAOUT108

FLCS0109FLCS1110

VSS

113

nBAT_LED 114nPWR_LED 115

VCC

111

6

OUT7/nSMI 11

GPIO83/32KHZ_OUT 117

BGPO0 118

ALWON 120

XTAL1122

XOSEL123

XTAL2124

AGN

D12

5

POWER_ SW_IN2# 119

GPIO11/AB2A_DATA 93GPIO12/AB2A_CLK 94

GPIO13/AB2B_DATA 95GPIO14/AB2B_CLK 96

GPIO87/AB1C_DATA 111GPIO86/AB1C_CLK 112

GPIO85/AB1D_DATA 9GPIO84/AB1D_CLK 10

GPIO93/AB1F_DATA 97GPIO92/AB1F_CLK 98

GPIO91/AB1E_DATA 99GPIO90/AB1E_CLK 100

BC_CLK87BC_DAT86BC_INT85

VCC

012

1

C7124.7U_0603_6.3V6M~D@

1

2

C219

4.7U_0805_10V4Z~D

1

2

JDEBG1

MOLEX_53398-0571~D@

1 12 23 3

5 54 4

T12

C242

0.1U_0402_16V4Z~D

12

C246

1U_0603_10V4Z~D

1

2

R616 10K_0402_5%~D12

R7820_0402_5%~D

12

R167 4.7K_0402_5%~D

1 2

L12BLM18AG121SN1D_0603~D

1 2

R194

100K_0402_5%~D

12

C556

22P_0402_50V8J~D

@

1

2

R604

10K_0402_5%~D

@

12

R599 2.2K_0402_5%~D

1 2

JDEBG2

1.5mm SMT~D@11 22 33

R208 8.2K_0402_5%~D12

L13B

LM18AG

121SN1D

_0603~D

12

R775

100K_0402_5%~D

@

12

R601

100K_0402_5%~D

@

12

Y4

32.768K_12.5PF_Q13MC30610003~D

14

23

R26310K_0402_5%~D

12

R193

0_0402_5%~D

1 2

G

D

S

Q1112N7002_SOT23~D@

2

13

R153

10K_0402_5%~D

12

Page 39: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CLK_TP_SIO

DAT_TP_SIO TP_DATA

TP_CLK

KSI5

KSI7

KSI2KSI1

KSI3KSI4

KSI0

KSI6

KSO1

KSO7

KSO0

KSO8

KSO2

KSO6

KSO3

KSI4KSI6

KSO5

KSI3

KSI7

KSI1

KSI0

KSO4

KSO14

KSI5

KSO13

KSI2

KSO12

KSO15

KSO9

KSO16

BREATH_LED_B

Z390

1

R_BREATH_LED

R_BT_MPCI_ACT_R

BT_MPCI_ACTIVE

R_LED_WLAN_OUT LED_WLAN_OUT

HDD_LED ACTLED

KSI1KSI2KSI3KSI4KSI5KSI6

KSI0

TP_DATATP_CLKLID_CL#

KSO8KSO9

KSO14KSO13

KSO4

KSO12

KSO3

KSO5

KSO17

KSO2

KSO7

KSO11

KSO17

KSO10

KSO6

KSO1KSO0

KSO15

KSO11KSO10

KSO16

LED_WLAN_OUT

R_BREATH_LEDACTLED

R_BT_MPCI_ACT

NUM_LED#SRL_LED#

POWER_SW#

CAP_LED#

BAT1_GRN_LED#BAT2_ORG_LED#

INSTANT_ON_SW#

LED_TP_B

R_BT_MPCI_ACT

+5V_RUN+3.3V_ALW

+3.3V_RUN

+3.3V_RUN

+5V_RUN+5V_ALW

+3.3V_ALW

+5V_RUN

KSI[0..7]<38>

DAT_TP_SIO<38>

CLK_TP_SIO<38>

KSO[0..17]<38>

BREATH_LED<38>

BT_ACTIVE<28,34>

LED_WLAN#<34>

HDD_LED <36>

SATA_ACT#<22>

LID_CL#<38>

M_LED_BK<37>

INSTANT_ON_SW#<38>POWER_SW#<16,38>

BAT1_GRN_LED#<38>BAT2_ORG_LED#<38>

CAP_LED#<38>NUM_LED#<38>SRL_LED#<38>

LED_TP_B <41>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

LED/INT KB/Touch Pad and Swithch CONN.

39 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Touch PAD and Multi Media

DTA114YKA

OUT

GND12 3IN

C56

100P_0402_50V8J~D

@

1

2

R137 0_0402_5%~D1 2

R134 0_0402_5%~D

1 2

10K

47K

Q32

DTA114YKA_SOT23~D2

13

JKYBD

HRS_FH28D-25SB-1SH~D1

3

5

7

11

9

13

15

17

19

21

23

25

27

2

4

6

8

10

12

14

16

18

20

22

24

26

C154

10P_0402_50V8J~D

1

2

C90

100P_0402_50V8J~D

@

1

2

C100

100P_0402_50V8J~D

@

1

2

C68

100P_0402_50V8J~D

@

1

2

C92

100P_0402_50V8J~D

@

1

2

C62

100P_0402_50V8J~D

@

1

2

C161

10P_0402_50V8J~D

1

2

R1410_0402_5%~D

12

R124 0_0402_5%~D

1 2

C95

100P_0402_50V8J~D

@

1

2

R135 0_0402_5%~D

1 2

C78

100P_0402_50V8J~D

@

1

2

C65

100P_0402_50V8J~D

@

1

2

R121

56_0402_5%~D

12

R123

4.7K_0402_5%

~D

12

R128 0_0402_5%~D

1 2

R127

10K_0402_5%~D

1 2

C115

100P_0402_50V8J~D

@

1

2

JSW

MOLEX_53398-1371~D11 22 33 44 55 66 77 88 99 1010 1111 1212 1313 GND114 GND215

C155

0.1U_0402_16V4Z~D

1

2

C88

100P_0402_50V8J~D

@

1

2

C158

0.1U_0402_16V4Z~D

1

2

C107

100P_0402_50V8J~D

@

1

2

R120

150_0402_5%~D

12

L9BLM18AG601SN1D_0603~D

1 2

R122

100_0402_5%~D

12

C112

100P_0402_50V8J~D

@

1

2

R136 0_0402_5%~D

1 2

C97

100P_0402_50V8J~D

@

1

2

C72

100P_0402_50V8J~D

@

1

2

EB

CQ31PMBT3904_SOT23~D

2

31R126

10K_0402_5%~D

1 2

R129

4.7K_0402_5%

~D

12

C165

10P_0402_50V8J~D

1

2

C63

100P_0402_50V8J~D

@

1

2

10K

47K

Q33

DTA114YKA_SOT23~D2

13

R132 0_0402_5%~D

1 2

C167

10P_0402_50V8J~D

1

2

C60

100P_0402_50V8J~D

@

1

2

C83

100P_0402_50V8J~D

@

1

2

EB

CQ30PMBT3904_SOT23~D

23

1

C80

100P_0402_50V8J~D

@

1

2

C71

100P_0402_50V8J~D

@

1

2

C86

100P_0402_50V8J~D

@

1

2

JTP

JST_BM20B-SRDS-G-TFC

11 2 233 4 455 6 677 8 899 10 10

12 1214 141111

13131515 16 1617171919 18 18

20 20

C75

100P_0402_50V8J~D

@

1

2

C84

100P_0402_50V8J~D

@

1

2

R1430_0402_5%~D

12

C66

100P_0402_50V8J~D

@

1

2

L10BLM18AG601SN1D_0603~D

1 2

10K

47K

Q109

DTA114YKA_SOT23~D2

13

C101

100P_0402_50V8J~D

@

1

2

Page 40: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Z400

5

Z400

6

Z400

7

SUS_ON_5V#

Z400

8

Z400

9

Z401

0

SUS_ON

Z4018

SUSPWROK_5V#

SUSPWROK_5V

SUS_ENABLE

RUN_ON

SUS_ON

RUNPWROK

SUSPWROK

ICH_PWRGD#

RUN_ON_5V#

RUN_ENABLE

ENAB_3VLAN

VAUX_EN

RESET_OUT#ICH_PWRGD

IMVP_PWRGD

SUSPWROK_1P8V

Z401

1

5V_3V_RUN_PWRGD

SUS_ON_5V#

Z401

2

RUN_ON_5V#

+VCC_CORE +0.9V_DDR_VTT +3.3V_RUN

+3.3V_SRC+3.3V_SUS

+5V_ALW

+1.5V_RUN +1.05V_VCCP +GFX_PWR_SRC

+1.8V_SUS

+5V_ALW

+15V_SUS

+3.3V_SUS+3.3V_RUN

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS

+15V_SUS

+5V_ALW

+PWR_SRC

+PWR_SRC

+3.3V_SUS

+3.3V_SUS

+3.3V_SUS

+5V_SUS

+5V_RUN

+3.3V_SUS

+3.3V_RUN

+3.3V_SUS

+3.3V_ALW

+2.5V_RUN

+1.8V_SUS +5V_SUS +3.3V_SUS

+3.3V_SRC

+5V_SUS

+3.3V_RUN

+5V_RUN+5V_RUN

SUS_ON<38,45>

SUSPWROK_5V<45,47>

RUNPWROK <19,37,38,48>

SUSPWROK <16,23>

RUN_ON<19,38,45,46,47>

SUS_ON<38,45>

RESET_OUT#<38>

IMVP_PWRGD<23,48>

ICH_PWRGD# <16>

RUN_ON<19,38,45,46,47>

VAUX_EN<38,45>

ENAB_3VLAN <30>

ICH_PWRGD<10,23>

RUN_ENABLE<45>

SUSPWROK_1P8V<47>

2.5V_RUN_PWRGD<16>

1.5V_RUN_PWRGD<46>

1.05V_RUN_PWRGD<46,48>

0.9V_DDR_PWRGD<47>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

POWER CONTROL AND SEQUENCE

40 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

+5V_RUN SourceRun Planes Enable

+3.3V_RUN Source

+3.3V_SUS Source

Maximum Rds on value for Q41, Q89 and Q90 should 15 mohm

22.2uA leakage current at S3

13.7uA leakage current at S3

Depoplated following BITS issue ID : CR29440

G

D

S

Q112N7002_SOT23~D@

2

13

C85

470P_0402_50V7K~D

1

2

R62130_0805_5%@

12

R17020K_0402_5%~D

12

R307

200K_0402_5%~D@

C501

4.7U_0805_10V4Z~D

1

2

R31

10_

0402

_5%

~D

12

R1030_0805_5%@

12

R302

200K_0402_5%~D@

G

D

S

Q92N7002_SOT23~D@

2

13

G

D

S

Q262N7002_SOT23~D@

2

13

G

D

S

Q992N7002_SOT23~D@

2

13

EB

CQ56

PMBT3904_SOT23~D@2

31

G

D

SQ40

2N7002_SOT23~D

2

13

R306

4.7K_0402_5%~D@

G

D

SQ20

2N7002_SOT23~D

21

3

EB

CQ57

PMBT3904_SOT23~D@2

31

G

D

S

Q1082N7002_SOT23~D@

2

13

R31

00_

0402

_5%

~D

12

G

D

S

Q1012N7002_SOT23~D@

2

13

U38C

74LVC3G14DC_VSSOP8~D

P8

A3 Y 5

G4

U42A

74VHC08MTCX_NL_TSSOP14~D

IN11

IN22 OUT 3

P14

G7

G

D

S

Q82N7002_SOT23~D@

2

13

R31

20_

0402

_5%

~D

12

G

D

S

Q1122N7002_SOT23~D@

2

13

R74530_0805_5%@

12

R74

100K_0402_5%~D

12

R7440_0402_5%~D

1 2

U38B

74LVC3G14DC_VSSOP8~D

P8

A6 Y 2

G4

C

BE

Q54MMBT3906_SOT23~D@

1

2

3

EB

CQ39PMBT3904_SOT23~D

2

31

R4730_0805_5%

12

U42C

74VHC08MTCX_NL_TSSOP14~D

IN110

IN29 OUT 8

P14

G7

G

D

S

Q242N7002_SOT23~D@

2

13

R215100K_0402_5%~D

12

U42B

74VHC08MTCX_NL_TSSOP14~D

IN14

IN25 OUT 6

P14

G7

C529

0.1U_0402_16V4Z~D

1

2

D26

MMBD4148-7-F_SOT23-3~D

1

3

2

C502

4.7U_0805_10V4Z~D

1

2

C220

0.1U_0402_16V4Z~D

1

2

U42D

74VHC08MTCX_NL_TSSOP14~D

IN113

IN212 OUT 11

P14

G7

R146

470K_0402_5%~D

12

4700P_0402_25V7K~D

C81

1

2

C223

4.7U_0805_10V4Z~D

1

2

R301

4.7K_0402_5%~D@

G

D

S

Q1062N7002_SOT23~D

2

13

R101100K_0402_5%~D@

12

G

D

S

Q482N7002_SOT23~D

2

13

R70830_0805_5%@

12

G

D

S

Q952N7002_SOT23~D@

2

13

C526

0.1U_0402_16V4Z~D

1 2

R147100K_0402_5%~D

12

C538

0.1U_0402_16V4Z~D

1 2

Q89SI4810DY-T1-E3_SO8~D

365

78

2

4

1

Q41SI4810DY-T1-E3_SO8~D

365

78

2

4

1

G

D

S

Q472N7002_SOT23~D2

13

G

D

S

Q382N7002_SOT23~D

2

13

R31

30_

0402

_5%

~D

12

R151

200K_0402_5%~D

12

G

D

S

Q372N7002_SOT23~D2

13

R74630_0805_5%@

12

R78630_0805_5%@

12

G

D

SQ212N7002_SOT23~D

2

13

R583

20K_0402_5%~D

12

R178100K_0402_5%~D

12

R174100K_0402_5%~D

12

R1930_0805_5%@

12

R55820K_0402_5%~D

12

R619150_0805_5%~D

12

U38A

74LVC3G14DC_VSSOP8~D

P8

A1 Y 7

G4

Q90SI4810DY-T1-E3_SO8~D

365

78

2

4

1R149100K_0402_5%~D

12

R10222_0805_5%~D@

12

G

D

S

Q1072N7002_SOT23~D@

2

13

C

BE

Q53MMBT3906_SOT23~D@

1

2

3C

503

0.1U_0402_16V4Z~D

1

2

R70430_0805_5%@

12

R1230_0805_5% @

12

G

D

S

Q942N7002_SOT23~D

2

13

R148

100K_0402_5%~D

12

R785

200K_0402_5%~D

R159

10K_0402_5%~D

12

R11

100K_0402_5%~D

12

Page 41: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LED_SPKR_R#

LED_SPKR_G#

LED_L_FAN_G#

LED_L_FAN_R#

LED_R_FAN_R#

LED#R4

R_FAN_G

LED#R3

R_FANLED_G

R_FAN_R R_FANLED_R

LED#R5

R_FANLED_BR_FAN_B

PCA_INT

LED_R_FAN_R#

LED_R_FAN_G#

LED_R_FAN_G#

LED_PANEL_G#

LED_SPKR_B#

LED_PANEL_B#

LED_R_FAN_B#

LED_L_FAN_B#

LED_R_FAN_B#

LED_PANEL_R#

R_FANLED_GR_FANLED_B

R_FANLED_R

LED_TP_B#

L_FAN_B

LED#R2

L_FANLED_B

L_FANLED_R

L_FANLED_B

LED#R1

L_FANLED_R

LED#R0

L_FAN_G

L_FANLED_G

LED_L_FAN_R#

L_FANLED_G

LED_L_FAN_G#

L_FAN_R

LED#7

LED_SPKR_G#

LED_SPKR_R#

SPKR_G

SPKR_B

LED#6

SPKR_R

LED#8

SPKRLED_B

SPKRLED_R

SPKRLED_R

LED_SPKR_B#

SPKRLED_B

SPKRLED_G

SPKRLED_G

LED_TP_B#

LED_TP_B

LED#R12

TP_B

LED#9

PANEL_R

PANEL_B

PANEL_LED_R

PANEL_LED_R

LED_PANEL_G#

PANEL_LED_G

PANEL_LED_GPANEL_G

LED#11

PANEL_LED_B

PANEL_LED_B

LED#10

LED_L_FAN_B#

LED_PANEL_R#

LED_PANEL_B#

+3.3V_RUN+3.3V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+3.3V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUN

+5V_RUNPBAT_SMBCLK<38,44,49>PBAT_SMBDAT<38,44,49>

LED_TP_B <39>

LED_FAULT_DET<23>

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Rikers LEDs for FAN/Speaker/Panel/TP

41 62Tuesday, December 13, 2005

Compal Electronics, Inc.PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

RIGHT FAN

LEFT FAN SPKR LED

PANEL LED

LED FaultDetection

TP LED

G

D

S

Q3BSS138_SOT23~D2@

2

13

G

D

S

Q64BSS138_SOT23~D2@

2

13

R39210K_0402_5%~D2@1 2

C156

100P_0402_50V8K~D@

1

2

R226

0_0805_5%~D2@

1 2

R810K_0402_5%~D2@1 2

R173

0_0805_5%~D2@

1 2

R10010K_0402_5%~D2@

1 2

C353

100P_0402_50V8K~D@

1

2

R119

0_0805_5%~D2@

1 2

R406

0_0805_5%~D2@

1 2

G

D

S

Q622N7002_SOT23~D2@

2

13

G

D

S

Q282N7002_SOT23~D2@

2

13

G

D

S

Q602N7002_SOT23~D2@

2

13

U26

PCA9532_TSSOP24~D2@

LED37

LED13 18

SDA23

LED15 20

LED9 14

SCL22

LED14 19

VDD 24

LED8 13

RESET# 21

LED11 16

LED48

GND12

A01

LED04

LED59

LED10 15

LED12 17

LED6 10

LED26 LED15

LED7 11

A12A23

R367

0_0603_5%~D

2@

12

C354

1U_0603_10V4Z~D

2@

1

2

G

D

S

Q22N7002_SOT23~D2@

2

13

R42410K_0402_5%~D2@

1 2

R11010K_0402_5%~D2@1 2

G

D

S

Q34BSS138_SOT23~D2@

2

13

C160

1U_0603_10V4Z~D

2@

1

2

R3650_0402_5%~D@1 2

R4

0_0805_5%~D2@

1 2

C212

1U_0603_10V4Z~D

2@

1

2

G

D

S

Q5BSS138_SOT23~D2@

2

13

C225

100P_0402_50V8K~D@

1

2

G

D

S

Q50BSS138_SOT23~D2@

2

13

G

D

S

Q712N7002_SOT23~D2@

2

13

G

D

S

Q352N7002_SOT23~D2@

2

13

R310K_0402_5%~D2@

1 2

R9910K_0402_5%~D2@1 2

R42210K_0402_5%~D2@

1 2

R910K_0402_5%~D2@

1 2

R39

810

K_04

02_5

%~D

@

12

R39010K_0402_5%~D2@1 2

JSPLED

JST_BM05B-SRSS-TB~D2@11 22 33 44 55

6 6

7 7

R7

0_0805_5%~D2@

1 2

G

D

S

Q682N7002_SOT23~D2@

2

13

R43010K_0402_5%~D2@1 2

C9

100P_0402_50V8K~D@

1

2

R442

0_0805_5%~D2@

1 2

R43110K_0402_5%~D2@

1 2

R13910K_0402_5%~D2@

1 2

R37810K_0402_5%~D2@1 2

C305

0.1U_0402_16V4Z~D

2@

1

2

C347

100P_0402_50V8K~D@

1

2

R41810K_0402_5%~D2@1 2

R610K_0402_5%~D2@

1 2

R43210K_0402_5%~D2@1 2

R510K_0402_5%~D2@1 2

C6

100P_0402_50V8K~D@

1

2

G

D

S

Q49BSS138_SOT23~D2@

2

13

R210K_0402_5%~D2@1 2

C152

100P_0402_50V8K~D@

1

2

G

D

S

Q632N7002_SOT23~D2@

2

13

JPALED

JST_BM05B-SRSS-TB~D2@11 22 33 44 55

6 6

7 7

JLFLED

JST_BM05B-SRSS-TB~D2@11 22 33 44 55

6 6

7 7

G

D

S

Q62N7002_SOT23~D2@

2

13

G

D

S

Q42N7002_SOT23~D2@

2

13

R130

0_0805_5%~D2@

1 2

G

D

S

Q722N7002_SOT23~D2@

2

13

G

D

S

Q29BSS138_SOT23~D2@

2

13

C248

100P_0402_50V8K~D@

1

2

C247

100P_0402_50V8K~D@

1

2

G

D

S

Q1BSS138_SOT23~D2@

21

3

C345

100P_0402_50V8K~D@

1

2

R225

0_0805_5%~D2@

1 2

R109

0_0805_5%~D2@

1 2

R428

0_0805_5%~D2@

1 2

R13810K_0402_5%~D2@1 2

C1

100P_0402_50V8K~D@

1

2

R42310K_0402_5%~D2@1 2

R1

0_0805_5%~D2@

1 2

G

D

S

Q74BSS138_SOT23~D2@

2

13

G

D

S

Q70BSS138_SOT23~D2@

2

13

R39

510

K_04

02_5

%~D

@

12

G

D

S

Q73BSS138_SOT23~D2@

2

13

R11110K_0402_5%~D2@

1 2

JRFLED

JST_BM05B-SRSS-TB~D2@11 22 33 44 55

6 6

7 7

R43310K_0402_5%~D2@

1 2

G

D

S

Q27BSS138_SOT23~D2@

2

13

R39110K_0402_5%~D2@

1 2

G

D

S

Q252N7002_SOT23~D2@

2

13

R38910K_0402_5%~D2@

1 2

R443

0_0805_5%~D2@

1 2

C684

1U_0603_10V4Z~D

2@

1

2

G

D

S

Q692N7002_SOT23~D2@

2

13

R40110K_0402_5%~D2@

12G

D

S

Q46BSS138_SOT23~D2@

2

13

C153

100P_0402_50V8K~D@

1

2

R37710K_0402_5%~D2@

1 2

Page 42: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

PAD and Standoff

42 62Tuesday, December 13, 2005

Compal Electronics, Inc.DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Fiducial Mark

HEX STANDOFF

MDC StandoffVGA Standoffs

KeyboardStandoff forZanzibar

HW POP option control table

ZUMA Zanzibar Rikers Suva

R612 No-POP POP

R498 No-POP No-POP POP No-POP

R515 1.24K 1.24K 1.15K 1.15K(SD01412418L)(SD01411518L)

1.24K P/N1.15K P/N

U6(MCH)

U23(LOM) 4401E 4401E 5752 57524401E P/N (SA00000oD0L)5752 P/N (SA00000o71L)

UMA Discrete Discrete DiscreteUMA P/N (SA0000059GL)Dis P/N (SA00000KDBL)

R205 15 ohm 15 ohm 33 ohm 33 ohm15 ohm P/N (SD028150A8L)33 ohm P/N (SD028330A8L)

Power SW SupportStandoff

C414, C417, C422

C413, C416, C42147 pF82 pF 47 pF 47 pF

82 pF P/N (SE071820J8L)(SE071470J8L)47 pF P/N

L43, L44, L45 1.8 uH 0.47 uH 0.47 uH 0.47 uH1.8 uH P/N0.47 uH P/N

(SHI0118AK8L)

R410 750 ohm 750 ohm 470 ohm 470 ohm750 ohm P/N (SD02875008L)470 ohm P/N (SD02847008L)

No-POP No-POP

R359, R360R364, R366 49.9_1% ohm 49.9_1% ohm 48.7_1% ohm 48.7_1% ohm

49.9_1% ohm (SD014499A8L)48.7_1% ohm (SD014487A8L)

(SHI00002C0L)

H11C276D126@

1

H1C315D91@

1

Cable

CABLE6

LED FFC Cable@NC1

FD17

FIDUCAL

1

H29C276D110@

1

H28O236X134D236X134N@

1

H3C315D110@

1

H15TC315BC197D110@

1

FD12

FIDUCAL

1

H23C275D102

1@

1

CONDUCTIVE TAPE(ZZZ)

TAPE1

CONDUCTIVE_TAPE~D@NC1

FD15

SMD40M80

1

Cable

CABLE5

Media Board Cable@NC1

FD9

SMD40M80

1FD10

SMD40M80

1

H14C276D110

3@

1

H7TC236BC315D118@

1

H4C134D134N@

1

STAND1

HEX_STANDOFF~D@

1

Cable

CABLE1

17" LCD Caxil Cable@NC1

H5C315D126@

1

H30C315D126@

1FD3

SMD40M80

1

H6C315D126@

1

MYLAR(ZZZ)

MY2

SD_MINIPCI~D@NC1

H31TP276@

1

STAND2

HEX_STANDOFF~D@

1

FD1

SMD40M80

1

H26C315D126@

1

IO BRACKET(ZZZ)BRKT1

IO_BRACKET~D@NC1

FD5

SMD40M80

1

Cable

CABLE2

BlueTooth Cable@NC1

STAND4

HEX_STANDOFF~D@

1

Cable

CABLE3

Switch Board Cable@NC1

H17C276D110

3@

1

H27C315D126@

1

H18C315D126@

1

H20C276D110@

1

FD7

SMD40M80

1

H13C276D126@

1

FD13

SMD40M80

1

FD4

FIDUCAL

1

Cable

CABLE4

RJ11 MDC Cable@NC1

H16C276D110@

1

FD14

SMD40M80

1

H2C315D91@

1

H21C276D146

1

H22C354D126@

1

BARE PCB

PCB

ZRS_LA-2881P _REV2_M/B~D

NC1STAND3

HEX_STANDOFF~D@

1

MYLAR(ZZZ)

MY3

MYLAR_DIMMB~D@NC1

H9C315D91@

1

MYLAR(ZZZ)

MY4

MYLAR_MINIPCI~D@NC1

H24C276D110

3@

1

H12C315D102

1@

1

FD18

FIDUCAL

1FD6

SMD40M80

1

MYLAR(ZZZ)

MY1

MYLAR_DIMMA~D@NC1

H10C315D91@

1

SD_RUBBER (ZZZ)RUBER1

SD_RUBBER~D@NC1

H8O531X571D452X492@

1

FD16

SMD40M80

1

LOG LOW GASKET(ZZZ)

ZZZ1

LOG_LOW_GASKET~D@NC1

H25C276D110

3@

1

H19O531X571D452X492@

1

FD2

FIDUCAL

1FD11

FIDUCAL

1

RJ11_RUBBER (ZZZ)COVER1

RJ11_RUBBER~D@NC1

FD8

SMD40M80

1

Page 43: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+DCIN_JACK

PQ_G

PWR_ID

DOCK_PSID PS_ID

-DCIN_JACK

+DC_IN_SS

+PWR_SRC

+3.3V_RTC_LDO

+3.3V_ALW+5V_ALW

+5V_ALW+5V_ALW

+DC_IN

DOCK_PSID <36>

PS_ID <38>

PS_ID_DISABLE# <38>

AC_OFF<37,49>

Title

Size Document Number R ev

Date: Sheet o f

2.0

+DCIN

43 62Tuesday, December 13, 2005

Compal Electronics, Inc.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DELL CONFIDENTIAL/PROPRIETARY

NOTE: "THE POINT LOCATEDAT PS MODULE

THE POINT

+DC_IN Source

PS_ID Detector

3.3V RTC Power

Change PL2, PL21 filter from 6A to 9A for rated current concern

CB

E

PQ2PMBT3904_SOT23~D

2

31

PC

50.

1U_0

603_

25V

7K~D

12 P

C7

10U

_120

6_25

V6M

~D

1

2

PC

21U

_080

5_25

V4Z

~D

12

G

D S

PQ1FDV301N_SOT23

2

1 3

PR

1047

K_0

402_

5%~D

1

2

PR

310

0K_0

402_

1%~D

12

MAX1615EUK+_SOT23-5~DPU1

IN1

GN

D2

OUT 3

5/3+ 4#SHDN5

PC

60.

1U_0

603_

25V

7K~D

12

PR

824

0K_0

402_

5%~D

12

PR233_0402_5%~D 1 2

PR

910

K_0

603_

1%~D

12

PR

715

K_0

402_

1%~D

12

PL1BLM11B102S 0603~D

12

PC

30.

47U

_080

5_25

V7k

12

PC

40.

01U

_040

2_25

V7K

~D

12

PC

168

0.01

U_0

402_

25V

7K~D

@

12

PQ4SI4825DY_SO8~D4@

3 65

78

2

4

1

PL2KC FBMA-L18-453215-900LMA90T _1812~D

1 2

PD

1D

A20

4U_S

OT3

23~D 23

1

PR

180

100K

_040

2_1%

~D

@

12

PQ36DTC115EUA_SC70~D@

2

13

PC

11U

_080

5_10

V7K

~D

12

FOX_JPD113D-509-TR~DPJDCIN

Low_PWR 1

DC+_1 2

DC+_2 3

DC-_1 4

DC-_2 5GND_16

GND_27

GND_38

GND_49

MH

1M

H2

PR6100_0402_5%~D@

1 2

PL21KC FBMA-L18-453215-900LMA90T_1812~D

1 2

PR

510

K_0

402_

1%~D

12

PD

2D

A20

4U_S

OT3

23~D

@

231

PQ3FDS6679Z_SO8~D5@

3 65

78

2

4

1

PR

12.

2K_0

402_

5%~D

12PR151

0_0402_5%~D@1 2

PD

53SM

24_S

OT2

3

@

2 31

G

DS

PQ35SI2301DS_SOT23~D@

2

13

Page 44: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Z4304

+PBATT

Z4305Z4306

Z4307

+3.3V_ALW

+3.3V_ALW+VCHGR

+PBATT

PBAT_SMBDAT <38,41,49>PBAT_PRES# <37>

PBAT_ALARM# <37>

PBAT_SMBCLK <38,41,49>

Title

Size Document Number Rev

Date: Sheet o f

2.0

Battery Conn

44 62Tuesday, December 13, 2005

Compal Electronics, Inc.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DELL CONFIDENTIAL/PROPRIETARY

SUYIN_200028MR009G502ZLTOP view

9

8

7

6

5

4

3

2

1

Battery Connector

ESD Diodes

Change PL3 from 6A to 9APop PL4 needed for ZRS/ ZUMA for discharge current concern

PD4DA204U_SOT323~D@

231

PL3KC FBMA-L18-453215-900LMA90T _1812~D

1 2

PC

80.

1U_0

603_

25V7

K~D

12

PD3DA204U_SOT323~D@

231

PR

1110

K_04

02_1

%~D

12

PR15100_0402_5%~D

1 2PC

922

00P_

0402

_50V

7K~D

12

PD5DA204U_SOT323~D@

231

PR13100_0402_5%~D

1 2PR14

100_0402_5%~D

1 2

PD6DA204U_SOT323~D@

231

PR12100_0402_5%~D

1 2

PJBATSUYIN_200028MR009G502ZL~D

BATT1+ 1

SMB_CLK 3SMB_DAT 4

BATT_PRES# 5SYSPRES# 6

BATT2- 9GND10GND11

BATT2+ 2

BATT_VOLT 7BATT1- 8

PL4KC FBMA-L18-453215-900LMA90T _1812~D

1 2

Page 45: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MAX8734_V+

MAX8734_ON3MAX8734_ON5

MAX8734_BST3B MAX8734_BST5B

+VCC_MAX8734

MAX8734_DH3

MAX8734_LX3

MAX8734_FB3

MAX

1999

_SKI

P#

MAX8734_REFMAX8734_TON

MAX8734_PRO#MAX8734_DL3

MAX8734_LX5

MAX8734_DH5

MAX8731_BR PJ3800CS_OUT

PJ3800CS_SCPPJ3800CS_IN PJ3800CS_FB

PJ3800CS_OSC

MAX8734_PRO#

MAX8734_TON

MAX8734_ILIM5

MAX8734_ILIM3

MAX8734_ILIM5MAX8734_ILIM3

MAX8734_REF

MAX8734_DL5

+DCDC_PWR_SRC

MAX8734_FB5

+5V_SUSP

+5V_ALW

+PWR_SRC

+3.3V_SRCP

+VCC_MAX8734

+3.3V_SRCP

+3.3V_SRCP

+5V_SUS+5V_SUSP

+3.3V_SRC

+VCC_MAX8734

+5V_SUSP

+VCC_MAX8734

+15V_SUSP

+15V_SUS+15V_SUSP

+3.3V_ALW

NC_TEST1

NC_TEST2

+3.3V_RTC_LDO

+3.3V_SRCP

+3.3V_ALW

GNDA_3V5V

GNDA_3V5V

GNDA_3V5VGNDA_3V5V

GNDA_3V5V

GNDA_3V5V

SUSPWROK_5V <40,47>

SUS_ON<38,40>

RUN_ON <19,38,40,46,47>

THERM_STP# <16>

ALWON<38>

THERM_STP#<16>

RUN_ENABLE <40>

VAUX_EN<38,40>

SUS_ON<38,40>

Title

Size Document Number R ev

Date: Sheet o f

2.0

+3.3V/+5V/+15V

45 62Tuesday, December 13, 2005

Compal Electronics, Inc.

3.3 Volt +/-5%Typical current: 4.67AMax current: 6.67A Min OCP: 7.4A

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DELL CONFIDENTIAL/PROPRIETARY

Place these CAPsclose to FETs

DC +3.3V/ +5V

Place these CAPsclose to FETs

Enable Skip Mode

Leverage Sullivan

+15V_SUSP

L-S Rds-on (max)=20m ohms

Output Caps ESR= 25mohms

Output Caps ESR= 25mohms

5 Volt +/-5%Typical current: 4AMax current: 5.6A Min OCP: 8.5A

Return to original design due to SMSC issue already be fixed.

PR180_0603_5%~D

1 2

PR1631K_0402_1%~D

1 2

PC

145

10U

_120

6_25

V6M

~D

1

2

+

PC

172

100U

_25V

M_R

340m

1

2

PR

210_

0402

_5%

~D

@

12

PL5FBM-L11-453215-900LMAT_1812~D

1 2

PC331000P_0402_50V7K~D@

1 2

PR

370_

0402

_5%

~D

@

12

PR3930.9K_0402_1%~D

1 2

PC

1322

00P

_040

2_50

V7K~

D

12

S

GD

PQ39FDC655BN_NL_SSOT-6~D

3

6 24

5 1

PR

3415

0K_0

402_

1%~D

12

PC

171U

_060

3_10

V6K

~D

12

PQ

7FD

S66

90A

S_N

L_S

O8~

D

36 578

2

4

1

PC

184.

7U_1

206_

10V

7K~D

12

PC

140.

1U_0

603_

25V

7K~D

12

PD8SKUL30-02AT_SMA

2 1

PC

194.

7U_1

206_

25V

6K~D

@

12

PR

3510

0K_0

402_

1%~D

12

PR190_0603_5%~D

1 2

PD

7R

B71

7F_S

OT3

23~D

2 31

PC

380.

1U_0

603_

25V

7K~D

12

PC

280.

1U_0

402_

10V

7K~D

12

PR

2519

.1K

_040

2_1%

~D

12

PC

1510

U_1

206_

25V

6M~D

1

2

PR1810_0402_5%~D@

12

PC

400.

1U_0

603_

25V

7K~D

12

PR

176

0_06

03_5

%~D

@

12

PR

160_

1206

_5%

~D

12

PC

304.

7U_1

206_

10V

7K~D

12

PC

110.

1U_0

603_

25V

7K~D

12

PR

413.

92K

_040

2_1%

~D

12

PR

230_

0402

_5%

~D

12

PR

2671

.5K

_040

2_1%

~D

12

PR310_0402_5%~D@

12

S

GD

PQ9SI3442BDV-T1-E3_TSOP6~D

3

624

51

PQ

8S

I481

0BD

Y_S

O8~

D

365 7 8

2

4

1

PR290_0402_5%~D@

12

PJP4PAD-OPEN 4x4m1 2

PR302K_0402_1%~D

1 2

+

PC

3610

0U_2

5VM

_R34

0m

1

2

PC

1222

00P

_040

2_50

V7K~

D

12

PC210.1U_0603_25V7K~D

1 2

PC

3710

U_1

206_

25V

6M~D

1

2

PL822U_SPC_06704_22R0GP_1.3A_30%~D

12

PC

1010

U_1

206_

25V

6M~D

1

2

MB3800PNF-EFE1 SOL-8 PWM~D

PU4

SCP2 FB 8

VCC3OUT 5

-IN1OSC 7

BR/CTL4 GND 6

PR

175

0_06

03_5

%~D

@

12

PR

280_

0402

_5%

~D1

2

PR

360_

0402

_5%

~D1

2

PC220.1U_0603_25V7K~D

12

PR

2410

0K_0

402_

1%~D

12

G

D

S PQ31RHU002N06_SOT323@

2

13

PJP5

PAD-OPEN 4x4m

1 2

PQ

5S

I480

0BD

Y-T

1_S

O8~

D

36 578

2

4

1

PR

330_

0402

_5%

~D 12

PL75.6U_CEP125NP-5R6M_8.8A_20%~D

1 2

PR

152

10_1

206_

5%~D

@

12

PR1747_0603_5%~D

12

+

PC

2633

0U_D

3L_6

.3V

M_R

25~D

1

2

PR184

0_0603_5%~D

12

PU16SN74AHC1G32DCKR_SSOP5~D

I02

I11O 4

P5

G3

PC

291U

_060

3_10

V6K

~D

12

PC1710.1U_0603_25V7K~D

12

PR

3224

0K_0

402_

5%~D

12

PC

161U

_060

3_10

V6K

~D

12

PC

3422

U_1

206_

6.3V

6K~D

1

2

PC

3927

0P_0

402_

50V7

K~D

12

PJP6

PAD-OPEN 4x4m

1 2

PR

200_

0402

_5%

~D

@ 12

PC

250.

1U_0

402_

10V

7K~D

12

PC

3210

00P

_040

2_50

V7K~

D

@

12

PR

401.

07K

_040

2_1%

~D

12

PR

2710

0K_0

402_

5%~D

@

12

PR

4215

0_06

03_1

%~D

12

PU2

MAX8734AEEI+_QSOP28~D

SHDN6

BST328

DH326

LX327

DL324

OUT322

LX5 15

DL5 19

FB5 9PRO 10

ILIM5 11ILIM3 5REF 8

V+20

VCC17

LDO5 18

BST5 14

DH5 16

OUT5 21N.C. 1

TON 13GND 23

SK

IP12

LDO325

FB37

ON33ON54

PGOOD 2

+

PC

3515

U_D

2_25

M_R

90~D

@

1

2

PQ

6S

I480

0BD

Y-T

1_S

O8~

D

365 7 8

2

4

1

PC

200.

1U_0

603_

25V

7K~D

12

PJP7

PAD-OPEN 4x4m

1 2

PR

220_

0402

_5%

~D

12

+

PC

2433

0U_D

3L_6

.3V

M_R

25~D

1

2

PL63.2U_CEP125NP-3R2MC_9.9A_20%~D

1 2

Page 46: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

ISL6227_PHASE1

ISL6227_LGATE2

ISL6227_ISEN2 ISL6227_ISEN1

ISL6227_OCSET1

ISL6227_LGATE1

ISL6227_SOFT2

ISL6227_EN2

ISL6227_UGATE1ISL6227_UGATE2

ISL6227_EN1

ISL6227_V

CC

ISL6227_OCSET2

ISL6227_SOFT1

ISL6227_BOOT2 ISL6227_BOOT1

ISL6227_VSEN1

ISL6227_BOOT2B ISL6227_BOOT1B

GNDA_DC2GND

ISL6227_VSEN2

+1.5V_1P05VP_PWRSRC

ISL6227_PHASE2

+1.5V_RUNP

+5V_SUS

+1.5V_RUNP+VCCP_1P05VP

+VCCP_1P05VP +1.05V_VCCP

+3.3V_RUN

+1.5V_RUN

GNDA_DC2

GNDA_DC2

GNDA_DC2

GNDA_DC2 GNDA_DC2 GNDA_DC2 GNDA_DC2 GNDA_DC2

GNDA_DC2

GNDA_DC2

GNDA_DC2

+PWR_SRC

NC_TEST3 NC_TEST4

+3.3V_RUN

1.05V_RUN_PWRGD <40,48>

RUN_ON<19,38,40,45,47>RUN_ON <19,38,40,45,47>

1.5V_RUN_PWRGD <40>

Title

Size Document Number Rev

Date: Sheet o f

2.0

+1.5VRUNP /+VCCP_1P05VP

46 62Tuesday, December 13, 2005

Compal Electronics, Inc.

+1.5V_RUNP / +VCCP_1P05VP

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DELL CONFIDENTIAL/PROPRIETARY

1.05 Volt +/-5%Thermal Design Current: 6AMaximum current: 8.6AOCP min: 9.5A, max: 18.2A

Place these CAPsclose to FETs Place these CAPs

close to FETs

L-S Rds-on (max)=9.3m ohmsOutput Caps ESR

= 9mohms

Output Caps ESR= 9mohms

Use PR48 and PR52for voltage margining

Use PR49 and PR53for voltage margining

Layut notes:Place PC49 need very close Pin1 of PU5, and Pin28 of PU5.Place PR147 need very close Pin1 of PU5.Minimize loop including PQ33, PQ34, PL10, PC58, PC55 and PR147.Minimize loop including PQ10, PQ12, PL11, PC57, PC53, PC54, PC55 and PR147.Route GNDA_DC2 using 25mil trace width.Minimize GNDA_DC2 trace length.Place PC52, PR48 and PR52 near Pin19 of PU5.Place PR51 and PR58 near Pin20 of PU5.Place PC56, PR49 and PR53 near Pin10 of PU5.Place PR50 and PR59 near Pin9 of PU5.Place PR54, PC60, PR55, PC59 near Pin 18, 17, 11, 12 of PU5.Place PR46, PR47 near Pin7, 22 of PU5.Place PR44, PC50 near Pin23, 25 of PU5.Place PR45, PC51 near Pin6, 4 of PU5.Route 1.05V Boot and 1.5V Boot using 25mil trace width and minimze length.Need large copper fill areas to PQ33, PQ34, PQ10 and PQ12 for thermal inprovment.Minize length of 1.5V phase node and 1.05V phase node.PC41, PC42 and PC43 need close Pin5, 6, 7, 8 of PQ33.PC44, PC45, PC46 and PC47 need close Pin5, 6, 7, 8 of PQ10.Route +1.5V_1P05VP_PWRSRC using 50 mil trace width and minimize length.Route VSEN1 and VSEN2 away from inductor and switch node, sense Vout directly at output bulk caps.

PR51=0, PR58 Nopop, PWM/ HYSPR51 Nopop, PR58=0, froce PWM

PR50=0, PR59 Nopop, PWM/ HYSPR50 Nopop, PR59=0, froce PWM

L-S Rds-on (max)=11.5m ohms

1.5 Volt +/-5% Thermal Design Current: 4.6AMaximum current: 6.5A OCP min: 7.2A, max: 13.1A

PQ33

FDS

8880

_SO

8~D

36 578

2

4

1

PR

5512

4K_0

402_

1%~D

12

PC

590.

01U

_040

2_25

V7K~

D

12

PC

481U

_060

3_10

V6K~

D

12

PJP11PAD-OPEN 4x4m1 2

PC

4322

00P_

0402

_50V

7K~D

12

PC

4110

U_1

206_

25V6

M~D

1

2

ISL6227CA-T

PU5

ISL6227CA-T_SSOP28~D

GND 1

LGATE1 2

PGND1 3

PHASE1 4

UGATE1 5

BOOT1 6

ISEN1 7

EN1 8

VOUT1 9VSEN1 10

OCSET1 11

SOFT1 12

DDR 13VIN 14

PG1 15PG2/REF16

SOFT217

OCSET218

VSEN219VOUT220

EN221

ISEN222

BOOT223

UGATE224

PHASE225

PGND226

LGATE227

VCC28

PL103.2UH_CDEP12D38NP-3R2MC-88_8.5A_20%~D

1 2

3

PC

560.

01U

_040

2_25

V7K~

D

12

PR

6010

0K_0

402_

1%~D

@

12

PC

492.

2U_0

805_

10V6

K~D

12

PC

500.

1U_0

603_

25V7

K~D

12

PC

420.

1U_0

603_

25V7

K~D

12

PJP9PAD-OPEN 4x4m1 2

+

PC

5433

0U_D

2E_2

.5VM

_R9~

D

@

1

2

PR

5228

.7K_

0603

_1%

~D

12

PC

5710

U_0

805_

6.3V

5K~D

@

12

PD9BAT54A-7-F_SOT23~L

32

1

PJP8PAD-OPEN 4x4m1 2

PR1731K_0402_1%~D

1 2

PJP10PAD-OPEN 4x4m1 2

PR461.43K_0402_1%~D

1 2

PC

520.

01U

_040

2_25

V7K~

D

12

PC

169

10U

_120

6_25

V6M

~D

@

1

2

PC

4610

U_1

206_

25V6

M~D

1

2

PR

161

1K_0

603_

1%~D

@

12

PR571K_0402_1%~D

1 2

PC

450.

1U_0

603_

25V7

K~D

12

PL9FBM-L11-453215-900LMAT_1812~D 1 2

PR

178

0_06

03_5

%~D

@

12

PC

4422

00P_

0402

_50V

7K~D

12

PC

151

0.01

U_0

402_

25V7

K~D

12

PR

590_

0402

_5%

~D

@

12

PR

5412

4K_0

402_

1%

12

PR

160

1K_0

603_

1%~D

@

12

PR

500_

0402

_5%

~D

12

PC

510.

1U_0

603_

25V7

K~D

12

+

PC

5533

0U_D

2E_2

.5VM

_R9~

D

1

2

PR

177

0_06

03_5

%~D

@

12

PQ12

FDS

6670

AS

_SO

8~D

365 7 8

2

4

1

PR

5330

.1K

_060

3_1%

~D

12

PR

183

100K

_040

2_1%

~D

@

12

+

PC

5333

0U_D

2E_2

.5VM

_R9~

D

1

2

PR

510_

0402

_5%

~D

12

PR

4310

_080

5_5%

~D

12

PR

495.

11K_

0402

_1%

~D

12PQ

34FD

S66

70A

S_S

O8~

D

36 578

2

4

1

PR147

0_0603_5%~D

12

PQ10

FDS

8880

_SO

8~D

365 7 8

2

4

1

PJP12PAD-OPEN 4x4m1 2

PC

4710

U_1

206_

25V6

M~D

@

1

2

PL111.5uH_SIL104-1R5_10A_30%~D

1 2

PR471.87K_0402_1%~D

1 2

PR

440_

0603

_5%

~D

12

PC

5810

U_0

805_

6.3V

5K~D

@

12

PR

4819

.6K_

0402

_1%

~D

12

PR

580_

0402

_5%

~D

@ 12

PC

600.

01U

_040

2_25

V7K~

D

12

PR

174

0_04

02_5

%~D

12

PR

450_

0603

_5%

~D

12

Page 47: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MAX8632_LX

MAX8632_DH

MAX8632_DL

MAX8632_ILIM

MAX8632_REF

+DDR_PWR_SRC

MAX8632_FB

MAX8632_REFIN

MA

X86

32_A

VDD

MAX8632_AVDD

SUSPWROK_5V

GNDA_DDRGND

MAX

8632

_OVP

+1.8V_SUSP +1.8V_SUS

+0.9V_DDR_VTT+0.9V_DDR_VTTP

+5V_SUS

+DDR_PWR_SRC

+PWR_SRC

+3.3V_SUS

+0.9V_DDR_VTTP

+1.8V_SUSP

+1.8V_SUSP

GNDA_DDR

GNDA_DDR

GNDA_DDR

GNDA_DDR

GNDA_DDR

GNDA_DDR

GNDA_DDR

GNDA_DDR

+1.8V_SUSP

GNDA_DDRNC_TEST5

+5V_SUS+5V_SUS+5V_ALW

SUSPWROK_5V <40,45>

SUSPWROK_1P8V <40>

0.9V_DDR_PWRGD <40>

RUN_ON <19,38,40,45,46>

+0.9V_DDR_REF <10,17,18>

Title

Size Document Number R ev

Date: Sheet o f

LA-2881P 2.0

+1.8VSUSP/ +0.9V_DDR_VT

47 62Tuesday, December 13, 2005

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

(10A,320mils ,Via NO.=20)

(2A,200mils ,Via NO.=4)

+1.8V_SUSP/ +0.9V_DDR_VTTPDDR2 Termination

0.9 Volt +/-5%Design current 1.05A for +0.9V_DDR_VTTPPeak current 1.5A for +0.9V_DDR_VTTP

Place these CAPsclose to FETs

1.8 Volt +/-5%Design Current: 7.3A Maximum Current: 10.5A OCP min: 10.5A

0.9 Volt VTTR current limit: +-32mA typ

L-S Rds-on (max)=4.8m ohms

Output Caps ESR= 15mohms/ each

No pop, f= 300KHz

PR

7127

.4K

_060

3_1%

~D

@

12

PR671_0603_5%~D

12

PL12FBM-L11-453215-900LMAT_1812~D

1 2

PR

187

0_04

02_5

%~D 1

2

PR1450_0402_5%~D

12

PC

681U

_060

3_10

V6K

~D

12

PJP16

PAD-OPEN 4x4m

1 2

PR7020_0603_1%~D

12

PJP14PAD-OPEN 4x4m1 2

PC

770.

1U_0

402_

10V

7K~D

12

+

PC

7133

0U_D

2E_2

.5V

M~D

1

2

PC

820.

22U

_060

3_10

V7M

~D

12

PC

674.

7U_1

206_

10V

7K~D

12

PR

694.

7_12

06_5

%~D

@

12

PC

650.

1U_0

603_

25V

7K~D

12

PJP13PAD-OPEN 4x4m1 2

PL13 1.4UH_HMU1356-1R4_15.5A_+-20%~D 2 1

3

PR

6510

0K_0

402_

1%~D

12

PC

6622

00P

_040

2_50

V7K~

D

12

PQ

13IR

F782

1_S

O8~

D

36 578

2

4

1

PQ

15IR

F783

2_S

O8~

D

36 578

2

41

PD

11R

B75

1V-4

0_S

OD

323~

D

21

PR

7310

0K_0

402_

1%~D

12

PR

186

0_04

02_5

%~D

@

12

PC

7910

U_0

805_

6.3V

5K~D

1

2

PR

6310

_120

6_5%

~D

12

PC

6310

U_1

206_

25V

6M~D

1

2

PC

8310

00P

_040

2_50

V7K~

D

12

PR148

0_0603_5%~D

12

PC

7510

00P

_060

3_50

V7K~

D

@

12

PR720_0402_5%~D @

12

PR740_0402_5%~D

12

PR1460_0402_5%~D@

12P

R75

17.4

K_0

402_

1%~D

@

12

PU6

MAX8632ETI+_TQFN28~D

SK

IP25

VD

D22

PGND123

LX19

AV

DD

26

REF3

TON1

OV

P/ U

VP

2

SS

8

GN

D24

POK1 5

POK2 6

VTT 12

STBY 7

TP0

28

VOUT16 REFIN 14

FB15

VTTR 10

ILIM

4

PGND2 11

DH18

DL21

VTTS 9

SHDN 27

VIN 17BST20

VTTI 13

GN

D29

PC

7010

U_0

805_

6.3V

5K~D

1

2PC

730.

1U_0

402_

10V

7K~D

12

PR

179

0_06

03_5

%~D

@

12

PC

841U

_060

3_10

V6K

~D

12

PC

6410

U_1

206_

25V

6M~D

1

2

PC

7810

U_0

805_

6.3V

5K~D

1

2

PC

8010

U_0

805_

6.3V

5K~D

@

1

2

+

PC

7233

0U_D

2E_2

.5V

M~D

1

2

PC

760.

1U_0

402_

10V

7K~D

12

PR

6610

0K_0

402_

1%~D

@

12

PC690.1U_0603_25V7K~D

12

PJP15PAD-OPEN 4x4m1 2

PR

7636

.5K

_040

2_1%

~D

1

2

Page 48: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

H H

G G

F F

E E

D D

C C

B B

A A

ISL6260_PWM3

ISL6260_PWM1

ISL6208_LGATE1

ISL6260_VID0ISL6260_VID1ISL6260_VID2ISL6260_VID3ISL6260_VID4ISL6260_VID5ISL6260_VID6

ISL6260_VR_TT#

ISL6260_RBIAS

ISL6260_NTC

ISL6260_SOFT

ISL6260_OCSET

ISL6

260_

DFB

ISL6

260_

DR

OO

P

ISL6

260_

VO

ISL6260_VSUM

ISL6260_ISEN1

ISL6260_DPRSTP#

ISL6260_DPRSLPVR

ISL6260_PSI#

ISL6260_PGD_IN

ISL6260_CLK_EN#

ISL6260_FCCM

ISL6260_VO

ISL6

260_

VM

ISL6260_FB

ISL6

260_

VIN

ISL6

260_

VD

D

ISL6

260_

VO

ISL6260_ISEN2

ISL6208_PHASE1

ISL6208_UGATE1

ISL6208_LGATE2

ISL6208_UGATE2

ISL6208_PHASE2

ISL6

260_

VO

ISL6260_PWM2

ISL6208_UGATE3

+CPU_PWR_SRC

ISL6

260_

CO

MP

GNDA_VCOREGND

ISL6

260_

VS

UM

ISL6

260_

VS

UM

ISL6

260_

VS

UM

DCR3_SEN1 DCR3_SEN2

DCR2_SEN1 DCR2_SEN2

DCR1_SEN2DCR1_SEN1

ISL6260_VR_ON

ISL6260_ISEN3

ISL6208_LGATE3

ISL6208_PHASE3

+PWR_SRC

+VCC_CORE

+CPU_PWR_SRC

+CPU_PWR_SRC

+VCC_CORE

+5V_RUN

+5V_RUN

+CPU_PWR_SRC

+5V_RUN

+3.3V_RUN

+CPU_PWR_SRC

+5V_RUN

+VCC_CORE

GNDA_VCORE

GNDA_VCORE

GNDA_VCORE

GNDA_VCORE

GNDA_VCORE

GNDA_VCORE

GNDA_VCORE

VID0<8>VID1<8>VID2<8>

VID4<8>VID3<8>

VID5<8>VID6<8>

H_DPRSTP#<7,22>

DPRSLPVR<10,23>

H_PSI#<8>

1.05V_RUN_PWRGD<40,46>

RUNPWROK<19,37,38,40>

VSSSENSE<8>

VCCSENSE<8>

IMVP_PWRGD <23,40>

CLK_ENABLE#<6>

IMVP6_PROCHOT#<37>

Title

Size Document Number R ev

Date: Sheet o f

2.0

+VCORE

48 62Tuesday, December 13, 2005

Compal Electronics, Inc.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DELL CONFIDENTIAL/PROPRIETARY

+VCC_CORE IMVP-6

Output Caps=330uF*6Pcs/ 7mOhmsESR <= 1.5m ohm

Place these CAPsclose to FETs

Place these CAPsclose to FETs

Place these CAPsclose to FETs

L-S Rds-on (max)=3.3m ohms

NEC MPC1040LR45DCR=1.1+-7% mohms

Reserve PC173 Double footprint with PC150.

PR12110K_0402_1%~D

1 2

PC

111

1U_0

603_

10V

6K~D

12

PC

9710

U_1

206_

25V

AK

~D

1

2

PR

122

7.68

K_0

805_

1%~D

12

PC

8522

00P

_040

2_50

V7K~

D

12

PR1050_0402_5%~D

12

PR910_0402_5%~D

12

PL160.45U_ETQP4LR45XFC_25A_20%~D

1

3

4

2

PC

860.

1U_0

603_

25V

7K~D

12

PH

26.

8KB

_060

3_5%

_ER

TJ1V

R68

2J~D

12

PC

170

0.1U

_060

3_25

V7K

~D

12

PC

118

0.01

2U_0

402_

16V

7K~D

1

2

PH1470KB_0402_5%_NCP15WM474J03RB~D@

12 PC

991U

_060

3_10

V6K

~D

12

PQ

16IR

F782

1_S

O8~

D

365 7 8

2

4

1

PC1041000P_0402_50V7K~D

12

PR780_0603_5%~D

12

PR1040_0402_5%~D @ 12

PR8210K_0402_1%~D

1 2

PQ

19FD

S70

88S

N3_

SO

8~D

G2

D3

S1

PC

8710

U_1

206_

25V

AK

~D

1

2

PC1141500P_0402_50V7K~D

1 2

PR920_0402_5%~D

12

PC

107

2200

P_0

402_

50V7

K~D

12

PU7

ISL6208CRZ-T_QFN8~D

BOOT 1

FCCM6

VCC5

PWM2

LGATE 4GND3

PHASE 7

UGATE 8

PR1201K_0402_1%~D

12

PL14FBM-L11-453215-900LMAT_1812~D

1 2

PR

8110

_060

3_5%

~D

12

PQ

20IR

F782

1_S

O8~

D

365 7 8

2

4

1

PR940_0402_5%~D

12

PC920.22U_0603_10V7K~D

12

PR

111

2.43

K_0

402_

1%~D

12

PC

112

0.33

U_0

603_

10V

7K~D

1

2

PQ

18IR

F782

1_S

O8~

D

365 7 8

2

4

1

PC

910.

01U

_040

2_25

V7K

~D

12

PC

103

1500

P_0

805_

50V7

K

@

12

PC

891U

_060

3_10

V6K

~D

12

PC

9810

U_1

206_

25V

AK

~D

1

2

PR990_0402_5%~D

12

PR1020_0402_5%~D@

12

PR890_0603_5%~D

12

PR1140_0603_5%~D

12

PR

9610

_040

2_1%

~D

12

PU10

ISL6208CRZ-T_QFN8~D

BOOT 1

FCCM6

VCC5

PWM2

LGATE 4GND3

PHASE 7

UGATE 8

PR900_0402_5%~D

12

PC

941U

_060

3_10

V6K

~D

12

PC1051000P_0402_50V7K~D

12

PR1166.34K_0402_1%~D

12

PU8ISL6260CRZ-T_QFN40~D

VW8

PGD_IN2

PSI#1

DPRSLPVR36

DPRSTP#37

VID634 VID533

RTN13

FB10

COMP9

VS

S19

VDIFF11

DFB

15

VO

16

ISEN3 21

OCSET 7

PWM3 25

FCCM 24

CLK_EN#38

VR_TT#4

RBIAS3

NTC5

SOFT6

VID028VID129VID230VID331VID432

3V3

39

VSUM 17

VSEN12

VR_ON35

PWM1 27

ISEN2 22

ISEN1 23

PWM2 26

DR

OO

P14

VD

D20

VIN

18

PG

OO

D40

VS

S41

PQ

21FD

S70

88S

N3_

SO

8~D

G2

D3

S1

PR87147K_0402_1%~D

12

PC

9522

00P

_040

2_50

V7K~

D

12

PC

8810

U_1

206_

25V

AK

~D

1

2

PR149

0_0805_5%~D

12

PC

120

1500

P_0

805_

50V7

K

@

12

PJP18PAD-OPEN 4x4m

1 2

PC

108

0.1U

_060

3_25

V7K

~D

12

PL170.45U_ETQP4LR45XFC_25A_20%~D

1

3

4

2

PC1190.22U_0603_10V7K~D

12

PQ

17FD

S70

88S

N3_

SO

8~D

G2

D3

S1

PR1820_0402_5%~D

1 2

PR109332_0402_1%~D

12

PR970_0402_5%~D

12

PR

841.

91K

_060

3_1%

~D

12

PR880_0402_5%~D @

12

PL150.45U_ETQP4LR45XFC_25A_20%~D

1

3

4

2

PC1000.01U_0402_25V7K~D

12

PR

7710

_060

3_5%

~D

12

PR950_0402_5%~D

12

PR1850_0402_5%~D

1 2

PR

7910

_040

2_1%

~D

12

PC

113

0.03

3U_0

402_

16V

7K~D

1

2

PC1010.22U_0603_10V7K~D

1 2

PC1020.22U_0603_10V7K~D

12

PR

103

7.68

K_0

805_

1%~D

12

PC

960.

1U_0

603_

25V

7K~D

12

PR930_0402_5%~D

12

PR11910.5K_0402_1%~D

12

PR

115

10_0

402_

1%~D

12

PR11382.5K_0402_1%~D

12

PC900.22U_0603_10V7K~D

1 2

PR

107

0_06

03_1

%~D

12

PU9

ISL6208CRZ-T_QFN8~D

BOOT 1

FCCM6

VCC5

PWM2

LGATE 4GND3

PHASE 7

UGATE 8

PC

109

10U

_120

6_25

VA

K~D

1

2

PC116220P_0402_50V8J~D

1 2

PR1102.21K_0402_1%~D

12

PC

110

10U

_120

6_25

VA

K~D

1

2

PR

117

15K

_040

2_1%

~D

12

PJP17PAD-OPEN 4x4m

1 2

PR1060_0402_5%~D

12

PC1171000P_0402_50V7K~D

12

+

PC

173

100U

_25V

M_R

340m

@

1

2

PR

837.

68K

_080

5_1%

~D

12

PR100

499_0402_1%

12

PR10811.5K_0402_1%~D

12

PC1150.22U_0603_10V7K~D

1 2

PC121330P_0402_50V7K~D

12

+

PC

150

220U

_CE

-AX

_25V

_M ~

D

1

2

PR860_0402_5%~D

12

PR

112

4.53

K_0

402_

1%~D

12

PR10110K_0402_1%~D

1 2

PC

9315

00P

_080

5_50

V7K

@

12

PC106680P_0402_50V7K~D

1 2

Page 49: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MAX8731_ACOK

MAX8731_IINP

MAX8731_CCV

MAX8731_CCI

MAX8731_CCSM

AX87

31_D

AC

MAX

8731

_CSS

N

+VCHGR_L

MAX8731_CSIP

MAX8731_CSIN

MAX8731_DHI

MAX8731_LDO

MAX8731_VCC

MAX8731_ACIN

ACAV_IN

MAX8731_BSTB

MAX8731_LDO

MAX

8731

_CSS

P

MAX

8731

_AC

SNS

GNDA_CHGR

ACAV_IN

MAX8731_DLO

MAX8731_IINP

MAX8731_LX

N657586

GND

N657586

MAX8731_REF

MAX8731_REF

+VCHGR

+DC_IN_SS+VCHGR

+PWR_SRC

+DC_IN_SS

+5V_ALW

GNDA_CHGR

GNDA_CHGR

GNDA_CHGR

GNDA_CHGR

GNDA_CHGR

GNDA_CHGR

GNDA_CHGR

+5V_ALW +3.3V_ALW

CHRG_IN

+5V_ALW

+5V_ALW

+5V_ALW

+PWR_SRC

+PBATT

+VCHGR

GNDA_CHGR

+5V_ALW

ACAV_IN<16,19,38>

PBAT_SMBCLK<38,41,44>

PBAT_SMBDAT<38,41,44>

ADAPT_OC <37>

AC_OFF<37,43>

Title

Size Document Number Rev

Date: Sheet o f

2.0

Charger

49 62Tuesday, December 13, 2005

Compal Electronics, Inc.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DELL CONFIDENTIAL/PROPRIETARY

+DC_IN discharge pathSmart Charger

Place these CAPsclose to FETs

Maximum Battery Charge current = 6.2Awhen system off, S3, S4.

Need double confirm

Change to 1206 size

PU17 for back up.

Pop Option notes:Reserve PR169 and PR172 for 90W5@. For Ricker/ Suva for 130W

Change PL18 from 6A to 9APop PL19 needed for ZRS/ ZUMA for discharge rated current concern

PU12ALM393DR_SO8~D 5@

IN+3

IN-2O 1

P8

G4

PC

136

10U

_120

6_25

VAK~

D

1

2

PR

167

100K

_040

2_1%

~D 5

@1

2

PC1241U_0603_10V6K~D

1 2

PU17

INA194 SOT23-5~D@

V+5

VIN-4 OUT 1

VIN+3 GND 2

PR

168

100K

_040

2_5%

~D 5

@1

2

PR

136

33_0

603_

1%~D

12

PR

193

1K_0

603_

1%~D

12

PC

122

10U

_120

6_25

V6M

~D

1

2

PC

165

0.01

U_0

402_

25V8

K 5

@1

2

PR1340_0603_5%~D

1 2

PR166976K_0402_1%~D 5@1 2

PC

175

0.01

U_0

402_

25V8

K

@

12

PQ38DTC115EUA_SC70~D@

2

13

G

D

S

PQ27RHU002N06_SOT323

2

13

PR

130

0_04

02_5

%~D

12

PQ24SI4825DY_SO8~D4@

3 65

78

2

4

1

PC

159

10P

_040

2_50

V8J~

D 5

@1

2

PC

161

100P

_040

2_50

V8K

5@

12

PR12915.8K_0402_1%~D

12

PR

139

4.7K

_040

2_5%

~D

12

PR165 1_0805_5%~D

1 2

G

D

S PQ32RHU002N06_SOT323 5@

2

13

PR

189

33.2

K_04

02_1

%5@

12

PR

126

0_04

02_5

%~D

@ 12

PC

125

2200

P_04

02_5

0V7K

~D

12

PR

172

9.31

K_04

02_1

%~D

@1

2

PC

176

0.01

U_0

603_

25V7

K~D

@1

2

PC

127

10U

_120

6_25

VA

K~D

1

2

PC

137

10U

_120

6_25

VAK~

D

@

1

2

PC

158

200P

_060

3_50

V8J~

D1

2

PC

143

0.01

U_0

402_

25V7

K~D

12

G

D

S

PQ26RHU002N06_SOT323

2

13

PR128100K_0402_1%~D

12

PC

141

1U_0

603_

10V6

K~D

12

PC

162

100P

_040

2_50

V8K

5@

12

PL205.6U_CEP125NP-5R6M_8.8A_20%~D

1 2

PR

171

13.3

K_04

02_1

% 5

@1

2

PC

140

0.01

U_0

402_

25V7

K~D

12

PQ22FDS6679Z_SO8~D5@

3 65

78

2

4

1

PC

144

0.1U

_040

2_10

V7K~

D

12

PC

177

3300

PF_0

402_

50V7

K~D

12

PL18KC FBMA-L18-453215-900LMA90T _1812~D

1 2PQ25

SI4825DY_SO8~D4@

365

78

2

4

1

PC1231U_0805_25V4Z~D

12

PR1380.01_2512_1%~D

4

2

1

3

PR1350_0402_5%~D

1 2P

C13

90.

01U

_040

2_25

V7K~

D

12

PL19KC FBMA-L18-453215-900LMA90T _1812~D

1 2

PR1230.01_2512_1%~D

4

2

1

3

PQ29

SI4

800B

DY

-T1_

SO8~

D

365 7 8

2

4

1

PR13210K_0402_1%~D

1 2

PR1910_0402_5%~D@1 2

PC

134

0.1U

_080

5_50

V7M

~D

12

PQ30

SI4

810B

DY

_SO

8~D

365 7 8

2

4

1

PU12BLM393DR_SO8~D 5@

IN+5

IN-6 O 7

P8

G4

PR150

0_0603_5%~D

12

PR

192

100_

0402

_5%

~D

12

PR

125

470K

_040

2_5%

~D

12

PQ28

SI4

800B

DY

-T1_

SO8~

D

365 7 8

2

4

1

PC

174

100P

_040

2_50

V8K

@

12

PR

190

15K_

0402

_1%

5@1

2

PR1700_0402_5%~D5@ 1 2

PR

169

49.9

K_04

02_1

%@

12

PC

142

0.1U

_040

2_10

V7K~

D

12

PC1331U_0603_10V6K~D

1 2

PR13349.9K_0402_1%~D

12

PC

163

0.01

U_0

402_

25V8

K 5

@1

2

PC

160

0.01

U_0

402_

25V8

K

@

12

PC1300.01U_0402_25V7K~D

12

PC

131

0.1U

_060

3_25

V7K~

D

12

PR18880.6K_0402_1%@1 2

PQ23FDS6679Z_SO8~D5@

365

78

2

4

1

PC

128

10U

_120

6_25

VA

K~D

1

2

PC1320.1U_0402_10V7K~D

12

PU11

MAX8731_TQFN28~D

DHI 24

CSIP 18

LX 23

FBSA 15

SDA9

IINP8

GN

D1

DCIN22

ACIN2

VDD11

SCL10

ACOK13

BATSEL14

BST 25

FBSB 16

CCS4

LDO 21

VCC 26

CSS

P28

CSIN 17

PGND 19

DLO 20

CCV6

CCI5

CSS

N27

REF3

DAC7

GND12

GN

D29

PR

140

10K_

0402

_1%

~D

12

PD

12R

B75

1V-4

0_SO

D32

3~D

21

PR12710K_0402_1%~D

12

PC

126

0.1U

_080

5_50

V7M

~D

12

1SS

355_

SOD

323~

DP

D54

21

PC

135

10U

_120

6_25

VAK~

D

1

2

PC

164

100P

_040

2_50

V8K

5@

12

PR

124

10K_

0402

_1%

~D

12

PR

131

365K

_040

2_1%

~D

12

Page 50: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Changed-List History

50 62Tuesday, December 13, 2005

Compal Electronics, Inc.

Version Change List ( P. I. R. List )

Item Issue DescriptionDateRequestOwner Solution Description Rev.Page#

1

2

Title

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

06/22/200537 SIO Compal BID change to X00. Pop R549, depop R553. X00

42 Rikers LED 06/22/2005 Dell Reserved LCM and Backlight circuit and depop on Rikers. X00Depop Q104~Q107, R913~R918, C910, C920,JLMLED and JKBLED.

20 CRT 06/27/2005 Compal X00Added R967,R968,C923,C924

06/27/2005 Compal X00

X00

X00

Buffers are duplicated on the video card, so added by passresistors on Discrete mode.

20 CRTConnected HSYNC and VSYNC to docking connector from the output of U194 and U195.

Added SW1 and pop R591.38 EMC5004 07/06/2005 Compal Added a DIP switch for the Flash recovery disable/enable function at develop phase.

37 ECE5018 07/06/2005 Compal +3VRUN leakage at AC mode in S5 Change R533 pull up from +3.3V_SRC to +3.3V_RUN

37 ECE5018 07/08/2005 Compal Pop R545Internal speaker no sound.

Added R622, R623 reserved for bypass SW1.

07 CPU

CPU

POWER SEQUENCE

07/11/2005

07/11/2005

07/11/2005

Dell

Dell

Dell

07

40

X00

X00

X00

X00

Updated ITP pullup resistor values asM07-discrete-A03 Ref. Sch.Updated H_PROCHOT# pullup resistor values asM07-discrete-A03 Ref. Sch.

Updated Power Good circuit as M07-discrete-A03 Ref. Sch.

Change R81~R86, R77, R196 value.

Change R548 to 75 ohm.

Added R617, R619, R620, R621, Q51, Q52, Q53, Q64.

06CLOCKGENERATOR 07/12/2005 Dell

Updated clock GEN. resistor values asCOE X04 Ref. Sch. Change R36,R37,R43,R45,R49,R919,R33,R35 value to 15 ohm. X00

X0036Docking Connector 07/12/2005 Dell Update docking circuit as COE A03 ref. sch. Made R899,R900,R901,R902 no stuff.

X00

X00

16 Thermal sensor 07/12/2005 Dell Change R701 location.Change R701 so that C158 and C159 are between LDO_IN and

R701.

19 & 37GFX CONN.ECE5018 07/12/2005

X00

Change the net name of pin1 of U5 to SIO_GFX_ENFollow COE graphic card A05 ref. sch.

34 Added C925

X00

Dell

Dell07/12/2005MINI card No filtering on +3.3V_LAN

07 CPU 07/12/2005 Dell Added pull down R969 for TEST1Per Intel checklist rev 1.3 and CRB rev 1.4

40POWER SEQUENCE 07/12/2005 Dell X00Added RUN_ENABLE off-page connectionFollow COE graphic card A05 ref. sch.

14 Calistoga-PWR 07/12/2005 Dell Per Intel checklist rev 1.3 and CRB rev 1.4 Added C926 and C927. X00

40POWER SEQUENCE 07/13/2005 Dell X00Follow COE UMA A07 and Core discrete A04 ref. sch. Added R970~R975, C928, Q118 and U40C.

16 Thermal sensor 07/13/2005 Dell Added 2.5V_RUN_PWRGD off-page connection on pin 31 of U4Follow COE UMA A07 and Core discrete A04 ref. sch. X00

33 R5C832 07/13/2005 Dell Added R976 and no stuff. X00

26 CODEC 07/13/2005 Dell

May potentially have leakage current into R5C832.

Change GPIO0 control to HP_NB_SENSE, internal EQ will be controlled by codec jack sence.

Connected HP_NB_SENSE to pin 21 of U188,and added R977 no stuff. X00

26 & 27 CODECAmplifier 07/13/2005 Dell Move PC BEEP circuit from CD inputs of codec to internal

speaker amplifier. C414 depop and change R381 value to 2.2K ohm. X00

27 Amplifier 07/13/2005 Dell

Add place holders for 47pF caps on positive inputs of speaker amplifier.Change GPRS immunity caps to no stuff by default.

Added C929,C930 no stuff.

Depop C885,C886.Remove Q29.

X00

Signal removed to allow BEEP while headphones plugged in.

Page 51: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Changed-List History

51 62Tuesday, December 13, 2005

Compal Electronics, Inc.

Version Change List ( P. I. R. List )

Item Issue DescriptionDateRequestOwner Solution Description Rev.Page#

25

26

Title

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

07/13/200533 1394Reserved common mode chokes for EMI and added 0 ohm resistors to bypass 1394 signals for cost saving. Added R978~R981 and L90, L91 depop. X00

X00

X00

X00

X00

Dell

34 EXPRESS CARD 07/13/2005 DellReserved common mode chokes for EMI and added 0 ohm resistors to bypass USB signals for cost saving. Added R982, R983 and L92 depop.

24 ICH7-M 07/14/2005 Dell Depop C349, C350, C359.Follow COE ICH A03 ref. sch.

23 ICH7-M 07/14/2005 Dell Change R711 from 8.2K no stuff to 10K stuff.Follow COE ICH A03 ref. sch.

38 EMC5004 07/14/2005 Dell Swapped ITP_DBRESET# and RUN_ON_D.ITP_DBRESET# not on wake pin.

37 ECE5018 07/14/2005 Dell SPDIF_SHDN at the codec is +5V. X00Connected SPDIF_SHDN to pin 76 of U36.

37 ECE5018 07/14/2005 Dell Follow COE Latitude EC A02 ref. sch. Added GPIOs AC_OFF and LOM_CABLE_DETECT.

37 ECE5018 07/14/2005 Dell Missing series resistor on Xtal.

X00

X00Added R984.

3 Index 07/14/2005 Compal Update PCI table. X00

16 07/14/2005 Dell Change decoupling for VDD_5V Swap location of C160 and C161. X00Thermal sensor

37 ECE5018 07/15/2005 Dell X00Removed level shift circuit. Delete R546, R547, Q42

40 07/15/2005 Dell

Dell

Dell

X00

X00

X00

07/15/2005

07/15/2005

POWER SEQUENCE Added R988, Q121 and no stuff.Add +2.5V_RUN bleed of ckt as UMA A07 schematic.

39/41/42 TP LED Will use tri-color TP LED on Rikers. Added R985,R986,R987,Q119,Q120.Remove LCM circuit and connected TP LED control signal.

40POWER CONTROL

Connected the pin 1 of R645 to +5V_ALW and pin 1 of R644to +15V_SUS.

Follow COE UMA A07 ref. schematic.R646,R647 no stuff and change R644 value to 100K.

47

Calistoga13Changed resistor package from 0402 to 0603 forIncreasing VCCD_LVDS Power Rating.Compal07/19/2005 Changed R168, R169, R182, R183. X00

07/19/2005LOM/ECE501830/375752M Hooks not in place. Need to connect Pin C04 (EnergyDetect to pin 75 GPIOC1 of the champion chip)Dell Added R228 (5@) X00

LOM_LOW_PWR signal must be connected to 4401 Export#signal also.Dell07/19/2005LOM30 Added R231 (4@) X00

Rename +3V_PHY to +3VRUN_PHY per ref schematic.Dell07/19/2005R5C83233 Changed Net Name X00

UDIO3, UDIO4, XDEN, MSEN pins can be pulled up to+3V_R5C832 through a single 10k resistor.Dell07/19/2005R5C83233 Deleted R487, R488, R489. X00

Rename +XD_VCC to +3VRUN_XD per ref schematicDell07/19/2005R5C83233 Changed Net Name X00

X00Rename +VCC_5IN1 to +3VRUN_CARD per ref schematicDell07/19/2005R5C83233 Changed Net Name

150k-ohm pull-down to GND is needed on +VCC_5IN1 for mediacard detection per Ricoh. This is R21 on M07 ref schematicDell07/19/2005R5C83233 Added R501 X00

Rename H_PROCHOT# to CPU_PROCHOT# on page 7. RenameH_PROCHOT# to IMVP6_PROCHOT# on page 49, and route toECE5018 pin 77. Add 100k ohm pull-up on IMPV6_PROCHOT# to+3.3V_RUN on page 37. Rename PROCHOT_SIO# (page 37) toCPU_PROCHOT# and route to cpu pin D21 (leave pull-up)

Dell07/20/2005CPU/ECE50187/37 X00Added R60 (100K Pull Up).

Page 52: ZRS REV : A01 · 2014. 1. 7. · PS2 page 22,23,24,25 page 10,11,12,13,14,15 PCIe BUS 1394 CONN. page33 page 30 page 38 Compal confidential page 34 Smart Card OZ77C6 3.3V 33MHz Docking

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-2881P 2.0

Changed-List History

52 62Tuesday, December 13, 2005

Compal Electronics, Inc.

Version Change List ( P. I. R. List )

Item Issue DescriptionDateRequestOwner Solution Description Rev.Page#

49

50

Title

51

52

53

54

55

56

57

58

59

60

61

62

64

65

66

67

68

69

70

71

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

X00

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48 23 ICH7M 07/20/2005 Dell Moved R365 to left of R713SPI pullup location doesn't match DG (M07_ICH7_A04)

23 Renamed GPIO12 to RSVD_HDD_DET#Dell07/20/2005ICH7M HDD_DET# not needed (M07_ICH7_A04) X00

Deleted R345, R961~R966.Dell23 X00Change SATAGP[0-3] to pullup as M07_ICH7_A04 CoE RefSchematic07/20/2005ICH7M

07/20/2005 Dell33 R5C832 U26 changed to AAT4250 X00Power switch follows up the recommended switch in refschematic. Use the AAT4250

07/20/2005 X00Changed DOCK pin 238 connection to ICH7MPCI_REQ0# directly from PCI Buffer (U31).DOCK36 DOCK can't be enabled

26 CODEC 07/20/2005

Dell

Dell X00Remove C414.Follow COE AUDIO A03 ref.sch.

07/21/2005CLOCK6 X00Changed C7Item Id: CR03833Title: Change 0.1uF cap to 10uF capDell

07/21/2005 X00Changed connectionNeed to move the NB_MUTE GPIO to C7 ( pin 73 ). The originalGPIO CANNOT be programmed to drive.( SMSC Silicon issue)ECE501837 Dell

R365 has been moved to the left of R713Dell23 X00Per the ICH reference schematic A04, need to move thepull-up on ICH_EC_SPI_DO to the other side of R713. 07/21/2005ICH7M

37 ECE5018 07/21/2005 Dell Media button LED always ON issue. X00Connected M_LED_BK to pin 1 of U36.

22 ICH7M 07/21/2005 Dell

Dell

Dell

Dell

07/21/2005

07/21/2005

07/21/2005

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X00

Add R989 no stuff.

Changed R358 value to 680 ohms.

Add R990.

23

ICH_INTVRMEN is missing the NP 0 ohm pulldown at pin 2 of R323.

LAMP_STAT# pullup resistor should be tied to +3V_SUS.

Per ICH M07 Ref Schematics Rev A04.

SIO_EXT_WAKE needs a 0 ohm series resistor at the ICH Pin AC21.

ICH7M R711 tied to +3V_SUS.

23

23

ICH7M

ICH7M

24 ICH7M 07/21/2005 Dell Per ICH M07 Ref Schematics Rev A04. Add R991,R992 and pop C534,C362. X00

X00Changed R375 value to 510 ohms and JMOD name to JODD.

Per ICH M07 Ref Schematics Rev A04Dell07/21/200525 CD-ROM Change the JMOD pin 37 name to IDE_LED#

X0007/22/2005 Changed R533 pulled up[ to +3.3V_ALW.SYS_PME# is pulled up to 3VRUN. It is pulled up to 3VALWin the M07 EC Ref Schematics Rev. A02DellECE501837

X00Changed Netname.07/22/2005 SIO_GFX_EN is named differently from the Ref Schematics. Itis named SIO_GFX_PWR in the M07 EC Ref Schematics Rev. A02DellECE501837

33 1394 07/22/2005 Compal X00

X00

Swap L91, R980 and R981.

Pop JDEBG1 connector.38 EMC5004 07/22/2005 Compal

For 1394 TPB0+ and TPB0- layout routing smooth.

EC debug requirement for design phase, will be removed after MP.

16Thermal sensor 07/23/2005 Dell

Add a note to U4 that states "Solder thermal pad to plane. Add 9 ground vias to pad."Follow GuardianII X03 reference schematics. X00

Calistoga 07/23/200513 Dell X00Add note to place C100/C99/C96 close to pin AB1/D2/A6.Per the UMA reference schematic A07.

C341 should be 330uF. It is currently 220uF. Per ICH M07Ref Schematics Rev A04. (Item Id: DF04040) Change C341 value to 330uF. X00

X00

Dell

Dell10 CalistogaNeed to POP R140 to enable testing C4Latency.(Item Id: DF04038)

24 ICH7M 07/24/2005

07/24/2005 Populated R140.

X01All Pages 08/02/2005 CompalN/A Renamed all parts Reference All Parts but Connector

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Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

X016/31 CLOCK/LOM 08/02/2005 Dell Changed R206 as 4@. Changed CLK_PCI_LAN connection.Avoid running clk_pci_lan throun RN8 as LayoutIssues list request.

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X01SIO37Changed R221, R211 as @.Changed R220, R212 as pop.Dell08/02/2005 Changed BID

X01Added C699.DellCLOCK6 Add 0.1uF cap to +CK_VDD_MAIN so that each VDD pin hasa cap (CoE CLOCK Ref Sch X05)08/03/2005

Deleted R117(Old Ref R218).Populated R118(Old Ref R213)DellMemory

Connected pin 50 of DIMMA to pin 50 of DIMMB and named netPM_EXTTS#0_R. Remove No Stuff attribute from R118(Old RefR213).Delete R118(Old Ref R218), 0 ohm, and connection toPM_EXTTS#1. (CoE Memory Ref X03)

08/03/200517/18 X01

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X01Deleted R47(Old Ref R227)DellGuardian II16Removed pull-up at LDO_POK. Pullup is on powersequence.(CoE Guardian II Ref X04)08/03/2005

X01Added R737Add voltage margin circuit(CoE Guardian II Ref X04)Dell08/03/2005Guardian II16

X01Added R738~R743. C700, C701, Q102, Q103.Add additional thermistor circuit(CoE Guardian II Ref X04)Dell08/03/2005Guardian II16

X01Unpoped C46 (Old ref C892)Component not required.(CoE Latitude EC Ref A03)Dell08/03/2005ICH7M21

X01Change R616(Old ref R570) pullup to +3.3V_SUS.DellKBC38 ATF_INT# pullup should be +3.3V_SUS(CoE Latitude EC RefA03)08/03/2005

X01Deleted R701(Old ref R139)Remove PM_EXTS#1 connection options to the SODIMM. Usethis to implement C4E implementaion Only(CoE UMA Ref A08)Dell08/03/2005GMCH10

X01Added Note.Item Id: CR03751Title: Add note to place 0-ohm resistors close to bufferDell08/04/2005

LVDS/ TV_OUT/CRT20

X01Added +3V_ALW BlockCompalPower Rails4 Update Power Rails08/08/2005

X01Modified +3V_ALW instead of +3.3V_SRCCompal Update SMBUS Pull-Up Power Rail08/08/2005SMBUS4

X01Depopulated R735 as CoE Ref Schematic.Update ITP port resistor pop option.Compal08/08/2005Yonah77

Change 22uF Caps from X5R to X6SChanged C4, C5, C7, C8, C10~C13, C15~C18, C662~C664,C658, C668~C675, C677, C678, C681, C682, C686~C6897 Yonah 08/08/2005 Dell X01

Added D22, R117. Changed Q76 to P MOSFET.

Updated the electrical countermeasure circuit for the MSDuo Adapter short issue (CoE 1394 Ref A06)Dell08/12/2005R5C83233 X01

Changed L90, L91 to DLW21N121SQ2 as nopop.Changed part for the common mode choke since the properimpedance for 1394 is 110 to 200-ohms(CoE 1394 Ref A06)Dell08/12/2005R5C83233 X01

Added DOCK_HP_MUTE# signal and 100K pullup (R701).Add GPIO to control internal speaker mute when docked andHP plugged in.Dell08/12/2005AUDIO/SIO26/37 X01

Added Q104, Q105 as Nopop.Add EAPD signal back in for future power savingsopportunities. Default NP. Added EAPD to GPIO3, also2N7002 control to speaker and sub shutdown pins. A04

Dell X0108/12/2005AUDIO/Amplifier26/27/28

X01Nopop R678NO STUFF Resistor for the CFG11 (CoE Ref Sch.945PM_GM_M07_A00)Dell08/12/2005GMCH12

X01Changed Netname +G_PWR_SRC to +GFX_PWR_SRCChanged net name INV_PWRSRC to GFX_PWR_SRC (CoECRT_LVDS_SVIDEO M07_A00)Dell08/12/2005GMCH/Power19/20/40

X01Added NoteAdding SVIDEO with SPDIF option Note (CoECRT_LVDS_SVIDEO M07_A00)Dell08/12/2005LVDS20

X01Changed R170, R558 to 20K as PopulatedAdded Power Down Ckt (CoE M07System POWER SEQUENCE A01)Dell08/12/2005Power40

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Version Change List ( P. I. R. List )

Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

X01Power 08/12/2005 DellPatch for the Yonah ICCP issue (CoE M07 System POWER SEQUENCE A01)

Changed R476, R477, R483, R484 to 0 ohm as Populated. Added R744 as populated.4096

97 20 LVDS 08/15/2005 DellSupport M07 inverter on ZUMA.

X01Depop D7, U10 and pop R152, R133.Duplicate pull down on PANEL_BKEN.

98 10/12 Calistoga 08/16/2005 Dell X01Adding notes for discrete implementation and depop R683.Follow CoE Core/945PM_GM_M07_A01 schematic.

99 29 USB 08/16/2005 Dell 10uF caps at USB switches are optional. X01Depop C554, C217 and C680.

100 23 ICH 08/16/2005 Dell SIO_EXT_SCI and SIO_EXT_SMI# causing leakage to +3.3V_RUN on S3 mode. Changed pull up power rail from +3.3V_RUN to +3.3V_SUS. X01

101 16Thermal sensor 08/16/2005 Dell

Follow D05, ALWON is driven high and pull up is on VR reference design. X01Depop R702.

Add new GPIOs(CoE Latitude EC ref A04)Dell08/16/2005102 37 ECE5018 X01Added HP_NB_SENSE back to pin 82 of U36.

Change disable fet to lower Vgs. Corrects circuitissues(CoE M07_MDC_A03)Dell08/20/2005103 X01Q61 changed to BSS138.MDC28

Adding Clamp Ckt for 1.8VSUS, 3.3VUS and 5VSUS X01Added R47, R745, R746, Q106~Q108. Deleted R171, R188.Changed bleed resistors from 22 to 30 ohm.Dell08/20/2005104 Power

Sequence40

Delete 40.2ohm pull down resistors for M_OCDOCMP0/1 andreplace them with Test Points. Per Intel DG 1.0(CoE 945_a02) X01Deleted R663, R682. Added T24, T25.Dell08/20/2005105 GMCH10

X01Added C702 and pop C146.Add 0.1 uf (402) for the DDR VREF at Calistoge for betternoise immunity (CoE 945_a02)Dell08/20/2005GMCH10106

X01Deleted R720, R724.Remove H_DPRSTP# and H_DPSLP#. Previously theyNo Stuff. Per Intel (CoE yonah_m07_a01)Dell08/20/2005GMCH10107

X01Depoped R573.NB_MUTE Pull down Resistor Reserved as Nopop as CoE RefSch (EC_A03).Dell08/20/2005ECE501837108

X01Update LOM 4401E from PCIe to PCI BusDell08/20/2005BlockDiagram2109

Update Lead Free Layout Library.Compal08/22/20054-in-1/LED33/41/42110 X01Updated U29, Q76, Q5, Q3, Q1, Q73, Q74, Q70, Q29,Q27, Q34, Q49, Q46, Q50, Q36, Q12, Q64, Q66.

23/29/37111

112

08/23/2005

08/23/2005 Compal

Dell X01

X01Depoped R554.23 ICH

USB Swapped the ICH USB port0 and port5.

LAMP_STAT# causing leakage to +3.3V_RUN and +5V_RUNon S3 mode.

38 EMC5004 08/24/2005 Dell113 X01FWP# should be pulled high for development and pulled down for production.

Change pop option for FWP# for development and production.

23 ICH 08/24/2005114 X01Change R537, R538, R542 value from 1K to 10K ohms.Change value of SPI pull-ups.DellBITS item ID: CR05958

33 X0108/24/20054-in-1115 Added R747~R750 as no pop (@).Adding bypass MS Duo short circuits in the event that theconnector would be correctedDell

X0108/24/2005GMCH13116 Added R751, R752, C703, C704.TeamTrack: BITS Item Id: CR06800Title: Calistoga Filter Issues page 13Dell

X01Populated R302, R307, Q54, Q53, R306, R301,Q56, Q57, R683. Depoped R623.08/24/2005

GMCH/PowerSequence10/40117 TeamTrack: BITS Item Id: DF06790

Title: Power Sequence Circuit, and C4-E and SPDIF IssuesDell

X01Added U49, C705, C706.08/24/2005LVDS20118 TeamTrack: Item Id: DF06789Title: BIA_PWM for UMA need to add AND GATEDell

X01Moved C535.08/24/2005ICH7M22119 TeamTrack: Item Id: CR05951Title: Move C535 to other side of R584Dell

X01Depoped R598.08/24/2005 TeamTrack: Item Id: CR05955Title: Depop pull-up on SIO_THRM#DellICH7M23120

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Version Change List ( P. I. R. List )

Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

X01121 23/30/34 ICH7M/PCIe 08/24/2005 Dell BITS CR05959: Rename PCI-E nets Renamed PCI-E Nets.

ICH7M/SATA22/25 Dell08/24/2005 Renamed SATA Rx/Tx Nets.BITS CR05950: Rename SATA Rx / Tx lanes X01122

X01123 13 GMCH 08/26/2005 Added C707, C708. Deleted R665, R679, R671, R675.DellTeamTrack: BITS Item Id: CR06800Title: Calistoga Filter Issues page 13

X01124 Changed Value of R751, R752 to 0 ohm.

It is part of the Intel Filter ckt, for now you couldplace 0 ohm 805 package. The key is to reserve a placementfor this component, in case you got an issue with yourplatform that related to this power rail noise. "

Dell08/26/2005GMCH13

Updated the schematic notes for the MS-Duo AdapterCountermeasure Circuit.Dell08/26/2005125 GMCH13 X01

Added +2.5V_RUN Rail DiagramCompal08/26/2005Power Rails126 4 X01

127 7 CPU 08/26/2005 Dell X01Chnage R714 to 1K, R723 to 51ohm.Per Intel DG rev 1.0 and M07 Ref Schematic.

128 39 08/26/2005 Compal Swapped JTP pin1 and pin2.For TP cable is compatible with Sullivan. X01Touch Pad

12129 08/29/2005 Dell X01Removed R631.PANEL_BKEN has twice pull down.Calistoga

5SMBus Topology130 08/29/2005 Compal Update SMBus Diagram. X01

131 X01Add R754 for Zanzibar/ZUMA/Rikers only and R753 for Suva only.Media direct button don't power on the system for Suva.37/38 ECE5018

EMC5004 08/29/2005 Dell

132 1 Dell08/29/2005 X01Cover pageAdd 6@ for Suva used only and 7@ for Zanzibar/ZUMA/Rikers used only.

133 20 SPDIF 08/30/2005 Dell X01Removed L29.Remove the transformer for SPDIF ckt.

Added R755 and R756.Added 39 ohm series resistors at HSYNC and VSYNC after the Buffer. X01Dell08/30/200520134 CRT

135 20/43 TV_OUT 08/30/2005 Dell X01Added C709~C711 no stuff. C414,C417,C422,C413,C416,C421

Modified TV OUT filters for resolution support.

136 Dell08/31/2005Guardian II16 X01Populated C410.BITS CR20056: This is to address a D05 acousticnoise issue on the 5V Run rail.

X01Dell08/31/2005LOM30137 Depopulated R507, R522.BITS CR20058: The comms teams recommedns that R507 andR522 be de-populated for all configurations.

138 30 LOM 08/31/2005 Dell X01Added U50 and depop U24, R505.Include support for ST-Micro Flash M45PE20 for the 5752 LOMBITS CR07184 and CR07190

Added R757 nopop and pop R407, R509 for Rikers/Suva.

34/38MINI cardEMC5004 09/02/2005 Dell139 Debug Signals Routed to WLAN mCard connector.

Route HOST_DEBUG_TX/HOST_DEBUG_TX/8051TX/8051RX/ to JMINI pin16/17/19/42.Moved U49 and C705 to page 12.

Change R737 and R703 from 0402 to 0603.

Added Q109.

Updated backlight control circuit.

Resistors package change for temperature/voltage margining test.

Updated bluetooth control circuit.

Dell

Dell

Dell

09/02/2005

09/02/2005

09/02/2005

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X01

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X01

Pop R152 for UMA only.12/20

CalistogaLVDS CONN

39 LED

Guardian II16

143 33 09/05/2005 Dell X01Change R487 value from 10K to 100K.BITS DF20288: CoE5 Design review feedback from Arin Lin.R5C832

X01Change R515 value from 1.27K 1% ohm to 1.24K 1% ohm.144 30/43 LOM 09/05/2005 Dell

BITS CR20884:Based on IEEE testing, need to update RDAC value. This is ONLY for Zanzibar/Zuma using 4401E LOM. This change is for Zanzibar/ZUMA 4401E LOM only.

BITS: CR03757

pop 47P for discrete and 82P for UMA.

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Version Change List ( P. I. R. List )

Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

X01145 6/30/33CLOCK/LOM/R5C832 Crystal circuit evaluation.

Change C313,C314 value to 22pF and R199,R486 value to 220 ohm.Compal09/06/2005

R410 pop 750 ohm for 4401E, 470 ohm for 5752.

146 5/38 09/07/2005 CompalSMBUS X01Fine tune SMBus pull-up resistors value. Change R177/R182/R216/R217/R592/R599 value to 2.2K.

147 43 Config.table 09/09/2005 Compal Nopop R612 on ZUMA and Zanzibar. X014401E don't support TPM function.

TV out filter circuit and termination changes for graphics.Dell Change R497,R503,R504,R17,R22,R26 value to 150 ohm. X0109/13/200520/43148 TV_OUT/CRTChange R755 and R756 from 39 ohm to 33 ohm.

149 40Power control 09/16/2005 Dell X01Pop R47 and Q106.Poplated +1.8V_SUS clamp circuit.

150 37 09/23/2005 Dell Board ID change. Pop R221, depop R212. X02ECE5018

151 X023/23/28/36 USB 09/29/2005 Dell Added 0 ohm pop option for BT port Useing ICH7-M port 7 for BT on Zanzibar/ZUMA.

Added R758~R765.

152 3/23/34/37 USB 10/11/2005 Dell Added 0 ohm pop option for express card.

Useing ICH7-M port 0 for express card on Zanzibar/ZUMA.Added R766~R773. X02

EMC5004 10/14/2005153 X02Remove SW1, R551, R552 and depop R555.Dip switch and JDEBG1connector are for development debug only, will remove for MP.38

Depop U41.154 ECE501837 10/14/2005

Compal

Compal X02

Depop JDEBG1.We can read system debug code from JDEBG2, so depop serial port inverter for cost saving.

155 Compal10/15/2005Rikers LED39/41 X02Remove page 42 and update intersheet references.Backlite Keyboard will not be supported and TP will only support single color LED on Rikers.

156 10/15/2005 DellEMC500438 BITS item ID: CR29479The MEC5004 boot block needs to be write protected.

X02Pop R600 and depop R601.

157 20 CRT 10/15/2005 Dell X02Change D17 to RB500.BITS item ID CR29469 : Per the VESA requitrement,change the VCC CRT diode to RB500 rated at Io = 100 mA Max.

Deopulated R302, R307, Q54, Q53, R306, R301,Q56,Q57. X02158 40 Power

sequence 10/15/2005 Dell BITS item ID: CR29440These are causing backdrive issue.

159 13 Calistoga 10/15/2005 DellBITS item ID: CR29472

X02Remove R751, R752.R751,R752 are not needed, replace these resistors by copper

10/15/2005 DellR5C83233160 BITS item ID: DF20275Follow Ricoh and M07 ref. schematic.

Remove R483.

13161 Calistoga 10/15/2005 Dell

X02

X02Follow COE ref. sch. 945PM_GM_PM_M07_A04 Added notes for 3GPLL and 1.5V PCI-E power rails.

162 34 Minicard 10/15/2005 DellFollow COE ref. sch. M07_minicard_A06 to remove resistors on COEX1_BT_ACTIVE and COEX2_WLAN_ACTIVE. Removed R409 and R411. X02

X02

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163 23 ICH7-M 10/15/2005 Dell Follow COE ref. sch. ICH7_A06. Moved LAMP_STAT# pull up resistor from +3.3V_SUSto +3.3V_RUN and pop R554.

164 10/15/2005 Per broadcom ref. schematic.

165 38 EMC5004 10/17/2005 DellAdded a work around proposed by SMSC for the flash corruption issue.

30 LOM Compal Change Q59 from BCP69 to MBT352000MT1G.

Added D23,Q110,Q111,C712,R774~R778.

37/38166 EMC5004ECE5018

10/18/2005 Dell Added R779, R781.Added pull up resistors to +RTC_CELL on INSTANT_ON_R1# andINSTANT_ON_R2# for Rikers/Suva.

37167 ECE5018 10/18/2005 Dell Added D24 and R780 depoplated. Fixed a potential backdrive issue on the WLAN_RADIO_DIS# signal when we start doing Wake on WLAN.

38168 EMC5004 10/18/2005 Dell Added R782 connected TEST_PIN to GND.Change C219 value to 22uF and 0805 package for REV C parts.

SMSC work around proposed for the flash corruption issue.

169 32LANTransfomer 10/19/2005 Dell

BITS DF06679:IEEE Return loss failures on Gig and 100 with Transpower DDOCK,these changes are just for Rikers/Suva only

Change R359,R360,R364,R366,R371,R374,R375,R382 to 48.7_1% ohm and L16~L20,L23~L25 to 36nH for Rikers/Suva only.

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Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

170 40Powersequence 10/19/2005 Dell X02

5V_3V_RUN_PWRGD ckt values update to minimize the leakage current. Change R302/R307 to 200K ohm, R301/R306 to 4.7K ohm.

X02Added C713.

X02Added R783.

171

172

23

19

ICH

DVI

10/20/2005

10/20/2005

Dell

Dell Reserved a 0805 pad for DVI safety issue.

Added 0.1uF cap as a short-term solution for IMVP_PWRGD glitch issue.

173 20 CRT 10/21/2005 Dell Poplated CRT HSYNC and VSYNC buffer on discrete mode. X02Change pop options on U4,U5,C653,C656,R41,R42,R38, R755,R756,R713,R707.

174 3/23/28/34 USB 10/24/2005 Dell Using the same USB mapping for Zuma,Zanzibar,Riker,and Suva X02Update USB pop options.

175 16 Thermal 10/26/2005 Dell Follow COE M07_GUARDIANII_X05 ref. schematic. X02Change R489,R490 to 120K and R488 to 78.7K 1%.Change C400,C694 to 22U and C412 to 0.22U.

BITS item ID: CR20057Change layout note for VCP thermistors

Updated Note. X02Dell10/28/200516176 Thermal

177 5-in1 10/28/2005 DellBITS item ID: DF20280 Layout for pins FIL0/REXT/VREF --the ref designators need to be updated Updated Note. X0233

178 27 Amplifier 11/01/2005 Dell X02

X02

X02

Populate R449 and depop R453.

Populate R693 and depop R698.

Change R685 to 0 ohm and C369, C343 from 0.015uF to0.012uF.

Set gain of TPA60017A2 to 21.6dB

Set gain of MAX9713 to 22 dB.

Audio filter fine tune.

11/01/2005

11/01/2005

Dell

Dell

179 28 Subwoofer

180 27/28 AUDIO Depop C632 and change C383,C384 to 1U_10V_X5R.Change C620 from 0.056uF to 0.033uF.

A00182 37 ECE5018 11/12/2005 Dell Depop R221, R220, R210.Pop R211, R212, R219.

Board ID change to A00.

181 38 X02EMC5004 11/11/2005 Dell Depop SMSC work around proposed on EMC5004 revision D chipDepop R774~R778, C712, Q110, Q111 and D23.Change C219 from 22uF to 4.7uF

183 19 DVI 11/12/2005 Dell A00Change 0 ohm(R783) to RB500V(D25).To fix the overloading test failed issue on DVI port.

184

185

23 ICH

40POWERSEQUENCE

11/12/2005

11/12/2005

Dell

Dell

A00

A00

Added R783 and R784.

Added R785 and D26.

HDDC_EN# and MODC_EN# floats at initial power up.

Added +3.3V_RUN delay RC CKT to fix IMVP_PWRGD glitch issue

Follow COE ref. schematic ICH7_A07.

Change C81 from 0.01U to 4700P and C85 from 0.022U to 470P.Added diode bleed off for +3.3V_RUN GFX power down sequence

adjustment.

Follow COE ref. schematic system power sequence_A05.

186 Compal11/12/200540 POWERSEQUENCE A00Added clamp ckt for +5V_RUN. Added R786 and Q112 but no stuff.

187 16 Thermal 11/22/2005 Dell A00BITS item ID: CR20057

Updated Note.Change layout note for VCP thermistors

188 23 11/22/2005 DellBITS item ID: CR05952

ICHChange schematic notes on page 23.

Updated Note. A00

189 26/27 AUDIO 11/22/2005 Dell M07 cap change recommendations for audio. A00Change C390,C395,C396,C362,C381,C382,C379 from Y5V to X5R and C363,C374,C380 from Y5V to X7R.

190 39 LED 11/22/2005 Dell Follow COE ref. schematic bluetooth_A06. A00Change Q30 from PMBT3904 to BSS138.

191 23/28/34 USB 11/24/2005 Dell A00Since BIOS can fix bluetooth and express card issue on STbuild. Remove 0 ohm pop options resistors for cost saving.

192 28 Subwoofer 11/24/2005 Dell A00

Remove R758~R773.

Change C69 value from 0.22uF to 0.47uF.Improveing the "BO, BO" sound in DOS after system post.

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Compal Electronics, Inc.

Version Change List ( P. I. R. List )

Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

193 23 ICH 12/01/2005 Dell A00To fix HDD parking sound issue when system warm boot. R783 and R784 no stuff.

194 33 R5C832-1394 12/01/2005 Dell A00Since the AAT4250 doesn't provide current limited capablility. Change U29 from AAT4250IGV-T1 to G5240B1T1U.

195 39 A00Change Q30 from BSS138 to PMBT3904.Dell12/02/2005LEDPer Bo's requirement, keep original circuit that the same as ST build.

196 20 CRT 12/05/2005 Dell A00Change R755 and R756 value from 33 ohm to 0 ohm.H&V SYNC rise/fall times improvement.

197 9 CPU Bypass 12/05/2005 Dell A00Change Vcore MLCC CAPs from 22uf *32pcs to 10uf * 32pcs; change output SP caps from 330u/ 7mohms * 6pcs to 330u/ 6mohms *4pcs.

These changes improved buzzing noise.

198

37 ECE5018 12/02/2005 Board ID change. A01Pop R221 and depop R212.Dell

A00Change G5240B1T1U U29 go back to AAT4250IGV-T1.The curent switch G5240B1T1U is not on Dell PSL.

199

33 R5C832-1394 12/13/2005 Dell

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Compal Electronics, Inc.

Version Change List ( P. I. R. List ) for Power Circuit

Solution Description Rev.Page#

2

TitleItem Issue DescriptionDateRequestOwner

3

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

1 Charger 06/20/2005 Compal M00P50 Schematic issue on Charger: The RC filiter should be connectedon Charger LX Pin, not L-S gate Pin.

Change PR165 from 1 ohm to 0 ohmNo POP PC158 200pF.

ChargerP50 06/20/2005 Compal Add 1 ohm_0402, 200pf RC filter to Charger LX pin as shownin attached schematic.

X00PR165 1 ohm_0805PC158 200pF_0603.

+3.3V/+5V/+15V+1.5VRUNP /+VCCP_1P05VP+1.8VSUSP/ +0.9V_DDR_VT

P46P47P48

06/22/2005 Compal Voltage margining test. X00Reserve PR175, PR176, PR177, PR178 and PR79 for voltage margining test.

7

5

6

4 +DCINP44 07/04/2005 Dell Under power Adapter disable. Add PQ35, PQ26 and PR180 (No pop). X00

P50 Charger 07/04/2005 Dell Need capability for controlling the Adapter input. Add PQ38 (No pop). X00

P46 +3.3V/+5V/+15V 07/06/2005 Dell Return to original due to SMSC EC issue already be fixed. Add PQ39, PU16, PC171 and PR181 (No POP)Delete PR162, PC157, PU14 and PR164.

X00

Rename pull high net from +3.3V_SRC to +3.3V_ALW.Dell07/06/2005+DCINBattery ConnCharger

P44P45P50

PR1-Pin2, PR11-P IN1, Battery ESD diode, PC30-Pin1 and PR168-Pin1. X00

8

9

P49 +VCC_CORE 07/06/2005 Dell Follow Coe ref sch: change to A02.Change PR77-Pin2 net from +PWR_SRC to +CPU_PWR_SRCChange PR87 from 150k to 147k. X00

X0007/06/2005 Dell Follow Coe ref sch: change to A03.

Change PR100 from 0 to 499 for Intel requireAdd PR182, No POP PR102 for POP option for PU5-Pin15 PG.Change net name from PGD_IN to 1.05V_RUN_PWRGDNo Pop PH1 and PR88Change RC phase node to C snubber, delete PR80, PR98 and PR118Change PC93, PC103 and PC120 from 0.01u to 1500pF.

+VCC_COREP49

07/06/2005+1.8VSUSP/ +0.9V_DDR_VTP48 Follow Coe ref sch: change to A02 Change net name from +0.9V_PWRGD to 0.9V_DDR_PWRGD. X00

P47 +1.5VRUNP /+VCCP_1P05VP 07/06/2005 Dell Follow Coe ref sch: change to A02Need independent PGs and update Layout notes.

Change PG name from PGD_IN to 1.05V_RUN_PWRGD Use 1.5V PG: Add PR183 for 1.5V_RUN_PWRGDUpdate Layout notes.

X0011

10

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20

X0012 P48 +1.8VSUSP/ +0.9V_DDR_VT 07/13/2005 Compal Change 0.9V input power to 1.8VSUS. Install PJP21 for 0.9V input power.

07/20/2005 Dell ILIM5 set point is too high for 6.5A OCP. Change PR25 to 69.8K.+3.3V/+5V/+15VP46

07/20/2005 Dell ILIM3 set point is too high for 6.9A OCP. Change PR26 to 82.5K.P46 +3.3V/+5V/+15V

P50 Charger Dell It is recommended to connect the ground pins of the followinganalog components with a separate analog ground:

PR22, PC16, PC29, PR23, PR34, PR35, PU2_pin23. Add PR184Short this analog ground with the power ground plane at PU2_pin23.

07/20/2005

X00

X00

X00

P48 +1.8VSUSP/ +0.9V_DDR_VT Dell Update 1.8V output notes Modified 1.8V: Min OCP=12.7A, not design current.07/20/2005 X00

P48 +1.8VSUSP/ +0.9V_DDR_VT Dell PC69 need change to 0603 size. Change PC69 to 0.1uF_25V_0603 from 0.1uF_50V_0805.07/20/2005 X00

ChargerP50 07/20/2005 Dell Two 10uF 1210 caps are recommended for input ripple current at the 6.2A charge rate will be over 3A.

Change PC127 and PC128 to 1210 from 1206 size. X00

+VCC_COREP49 Dell Change PC87, PC88, PC97, PC98, PC109 and PC110 to X6S from X5R.Recommend using X6S filtering capacitors for VCORE decouplingFollow Team track (BITS): no: CR03709

07/20/2005 X00

Dell to match latest VCore reference schematic A03. Depop PR104 and add PR185 resistor to jumper pin 2 to pin 3807/20/2005P49 +VCC_CORE X00

Dell

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Power-Changed-List History

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Version Change List ( P. I. R. List ) for Power Circuit

Solution Description Rev.Page#

22

TitleItem Issue DescriptionDateRequestOwner

23

DELL CONFIDENTIAL/PROPRIETARY

21

24

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DellP49 +VCC_CORE 07/20/2005 Change net name from H_PROCHOT# to IMVP6_PROCHOT# Change net name from H_PROCHOT# to IMVP6_PROCHOT# on PR86 Pin2. X00

ChargerP50 Compal Improve current sense accuracy Update PR123 and PR138 Symbol Pin define for layout dimensionpin define changed.

07/20/2005X00

P49 +VCC_CORE 07/20/2005 Compal Improve Inductor DCR sense accuracy Update PL15, PL16 and PL17 Symbol Pin define for layout dimension pin define changed. X00

P50 Charger Compal Set power limit to 130W/ 90W for ZRS.

Change PR169 to 28.7K from 200K.Add Pop Option notes.For Z/ ZUMA pop PR169: 28K, depop PR186For R/ S pop PR186: 100K, depop PR169.

07/21/2005 X00

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30

31

34

35

36

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38

32

P50 Charger 07/22/2005 Compal Follow COE charger A02 ref. schematic. X00Connected PC131 pin2 to PR165 pin2.

P49 +VCC_CORE 08/22/2005 Compal Cost Down:Change CPU L-S MOSFET from BSC022N03S to FDS7088SN3. Change PQ17, PQ19 and PQ21 to FDS7088SN3. X01

P49Change PR83, PR103 and PR122 to 0805 size from 0402.Chang loadline slope resistor PR119 from 9.53k to 10.5k+VCC_CORE 08/22/2005 Dell

BITS ID: CR04364. Change ISL6260 VSUM resistors to 0805 package to reduce offset error; and DROOP reisstor value X01

P47 +1.5VRUNP /+VCCP_1P05VP Dell Follow Coe ref sch: change to A03.Change PL10 to 3.2UH_CDEP12D38NP_8.5A from 3.8UH_SIL104-3R8_6A.Change PR47 to 1.87K from 2.1K.08/22/2005 X01

Delete PJP21 and PJP22 Jumper. VTTI only need 1.8V, no 1.5V.Dell+1.8VSUSP/ +0.9V_DDR_VTP48 Follow Coe ref sch: change to A03.08/22/2005 X01

P50 Charger Follow COE charger A03 ref. schematic.08/23/2005 DellChange PR169 to 301k, PR170 to 0, PR171 to 59k, PR172 to 33.2k.Delete PR186, PC166, PC167 and PU15; depop PR166. X01

+1.8VSUSP/ +0.9V_DDR_VTP48 08/26/2005 Dell To fix the 1.8VSUS bleed off issue at Power Down2 of 0ohm resitors (PR186 and PR187) at PU6 pin 22 (VDD)to either 5VSUS and 5VALW. X01

+3.3V/+5V/+15VP46 08/26/2005 CompalTo fix the PC36 AL-Caps can not meet lead free reflow spec isse.

Add PC172 and change PC36 from C_25CV220AX to NIPPON, MVY25VC100MF80due to SANYO AL Cap can not meet lead free reflow spec X01

+VCC_COREP49 08/29/2005 CompalTo fix the PC150 AL-Caps can not meet lead free reflow spec isse.

Reserve PC173 (100U) and double footprint with PC150 (220U)Pop PC173 if needed for buzz noise, Reserve PC150 for SANYO Vendor ready AL-Caps reflow spec. and it is enough capacity (220U)to against buzz noise.

X01

P48 +1.8VSUSP/ +0.9V_DDR_VT 08/30/2005 DellBITS issue: CR20063: This is not on the reference schematic and is not asked for by Maxim. Delete PC74. X01

+VCC_COREP49 08/30/2005 DellBITS issue: CR07318: Intersil X01 ZRS Schematic Review - Vcore

Set PC100=0.015uF (decrease soft-start time)Set PR108=11.5K (set OCP=55A) X01

ChargerP50 08/30/2005 DellBITS issue: DF20383 : Maxim ZRS X01 MAX8731 Schematic Review Nopop PC158, set PR165=0.

X01

De-populate PR183 and PR60Dell08/31/2005 X01+1.5VRUNP /+VCCP_1P05VPP47BITS issue: CR20060 : Power Good Pull Up Removed

ChargerP50 08/31/2005 DellReserve INA194 as a Buck up. No POP PU17, PC174, PC175 and PR188.

X01

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Compal Electronics, Inc.

Version Change List ( P. I. R. List ) for Power Circuit

Change PR169: 28K for R/S, 100K for Z/ZUMAChange PR171 to 121K; Change PR172 to 3.01K

X01

Solution Description Rev.Page# TitleItem Issue DescriptionDateRequestOwner

DELL CONFIDENTIAL/PROPRIETARY

39

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

ChargerP50 09/16/2005 Dell Update ADAPT_OC, add note.

40 ChargerP50 09/26/2005 Compal Change filter for derating is not enough.1. Change PL2, PL21, PL3, PL4, PL18 and PL19 from 453215-900LMAT 1812_6A to 1812_9A;2. Pop PL3 and PL18.

X02

Charger41 09/29/2005P50 Adapter OC setting update. Dell X02

Pop Option notes:1. 4@. For Zanzibar/ ZUMA pop PR169, PR172 for 90W, no pop PR189, PR190. 2. 5@. For Ricker/ Suva pop PR189, PR190 for 130W, no pop PR169, PR172. 3. PC160 no pop.

ChargerP5042 10/05/2005 DelldV/dt issue with the FBSA pin of Charger,recommend an RC filter at the pin.

Add PR191 and PC176 filterAdd PR192 (No pop) X02

P48 +1.8VSUSP/ +0.9V_DDR_VT 10/11/2005 Dell43Modified BST resistor to protection BOOT diode.Depop 0.9V pull high.

Change PR67 from 0 to 1.Depop PR66. X02

+VCC_COREP4944 10/14/2005 Dell Follow Coe schematic Change PC100 from 0.015u to 0.01uF. X02

+VCC_COREP4945 10/14/2005 DellImprove the temperature compensation of output voltage regulation Change PR111 from 3.57K to 2.43K X02

P49 +VCC_CORE 10/14/200546 DellImprove the time constant match between L/DCR and droop circuit R*C

Change PC113 from 0.01uF_NC to 0.033uF X02

+VCC_CORE 10/14/2005 Dell Follow Coe schematicP49 PR182 Pin 1 change from H_DPRSTP# to A_GND X02

ChargerP50

47

48 10/17/2005 Dell Follow Coe schematicPop PR192 , No pop PR191Connect FBSA and FBSB (pins 15 and 16) together X02

+1.5VRUNP /+VCCP_1P05VP

+3.3V/+5V/+15V

P47P4649 10/17/2005 Dell Change input MLCC cap.

Pop PC145 , No pop PC47.X02

+VCC_COREP4850 10/18/2005Dell Change CPU L-S Layout dimension

Use combination footprint Layout dimension from FDS7088SN3_SO8 to FDS7088SN3_SO8_3P X02

P46P48

+3.3V/+5V/+15V+1.8VSUSP/ +0.9V_DDR_VT51 10/25/2005 Dell Update 3V, 5V and 1.8V OC to meet power Budgets

Change PR76 from 48.7k to 36.5kChange PR26 from 82.5k to 71.5k Change PR25 from 69.8k to 19.1k

X02

ChargerP50 10/26/2005 Add 1 ohm, 200pf RC filter to Charger LX pin same as Travis. Change PR165 from 0 to 1, Pop PC158 220pF. X02Compal52

53 P50 Charger 10/27/2005 Dell Adapter OC UL circuit update

1. change PR169 from 4@301k to [email protected] 2. change PR172 from [email protected] to [email protected] 3. change PR171 from 68.1k to 13.3k 4. change PR189 from 5@215k to [email protected] 5. change PR190 from 5@121k to 5@15k 6. change PR166 from @499k to 976k

X02

P47 +1.8VSUSP/ +0.9V_DDR_VT 11/11/200554 Dell Follow Coe A05 schematicDelete PR68 0 ohms on pin7 drived by RUN_ON.

A00

P49 Charger55 11/11/2005 Dell Change Charger input caps size due to material EOL. Change PC127 and PC128 from 1210 to 1206. A00

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Power-Changed-List History

62 62Tuesday, December 13, 2005

Compal Electronics, Inc.

Version Change List ( P. I. R. List ) for Power Circuit

Solution Description Rev.Page# TitleItem Issue DescriptionDateRequestOwner

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOTBE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRDPARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A00P4956 Charger 11/21/2005 Dell Follow Coe A09 schematic No pop PC176, Add PC177 pop

57 All All 1812 size bead 11/23/2005 Compal Use co-dimension bead for shortage issueChange to new dimension:PL2, PL21, PL3, PL4, PL5, PL9, PL12, PL14, PL18 and PL19 A00

58 P49 Charger 11/24/2005 Dell ADAPT_OC Circuit update.Keep use for Ricker/ Suva #130W;Delete these circuit for Zanzibar/ ZUMA.Update notes on Page49.

A00

59 11/29/2005P49 A00Change Inductor from NEC-TOKIN MPC1040LR45 to PANASONIC ETQP4LR45XFCV_CORE rusted issueDell

+VCC_CORE

60 11/29/2005P49 V_CORE Aduio buzzing noise Pop PC150 220UF. A00+VCC_CORE Compal

P49 Charger 12/1/2005 Dell62 Deeply dischargered battery problem. Add PR193, PD54. A01

A0061 P43 PR9 should be 10K ohms to meet derating.+DCIN 12/05/2005 Dell Change PR9 value from 4.7K to 10K.