Q1 What are the fundamental and basic design principles in MIPS-based computer architecture

1048713 Simplicity favors regularity1048698 fixed size instructions ndash 32-bits1048698 small number of instruction formats1048698 opcode always the first 6 bits1048698 Good design demands good compromises1048698 three instruction formats1048698 Smaller is faster1048698 limited instruction set1048698 limited number of registers in register file1048698 limited number of addressing modes1048698 Make the common case fast1048698 arithmetic operands from the register file ( load-store machine)

1048698 allow instructions to contain immediate operands

Q2 Write the following sequence of code into MIPS assembly language1- x = x + y + z - qAssume that x y z q are stored in registers $s1-$s4

The MIPS assembly sequence is as followsadd $t0 $s1 $s2add $t1 $t0 $s2

sub $s1 $t1 $s4

2-a=b-c d=3a assume that the variables a b c and d are associated with registers $s0$s1$s2 and $s3

sub $s0 $s1 $s2 $s0 contains b ndash cadd $s3 $s0 $s0 $s3 contains 2aadd $s3 $s3 $s0 $s3 contains 3a

3-G=2F A[17]=A[16]+GAssume that A is an array of 32-bit numbers whose base address is stored in $s0

add $s5 $s4 $s4 $s5 contains 2Flw $t0 64($s0) $t0 contains A[16] (note the offset is 64)add $t0 $t0 $s5 $t0 contains A[16] + Gsw $t0 68($s0) store $t0 in A[17] i (note the offset 68)

Q3 In the following MIPS code a) How many times is instruction memory accessed b) How many times is data memory accessed (Count only accesses to memory

not registers)lw $v1 0($a0)

CS 207D- Computer ArchitectureSecond Semester 14351436HSheet 2

Princess Noura Bint Abdulrahman UniversityFaculty of Computer and Information

SciencesDepartment of the Computer Sciences

addi $v0 $v0 1sw $v1 0($a1)addi $a0 $a0 1

The instruction memory is accessed four times (as there are four instructions) and the data memory isaccessed twice (once for the lw instruction and another time for the sw instruction)Q4 Use the register and memory values in the table below for the next questions

Assume a 32-bit machine Assume each of the following questions starts from the table values that is DO NOT use value changes from one question as propagating into future parts of the questions

a) What values will be in R1 and R3 after this instruction is executed

load R3 12(R1)

After load R3 12(R1)R3 = 16 and R1 = 12

b) What values will be in the registers after this instruction is executed

addi R2 R3 16

After addi R2 R3 16R2 = 16 and R3 = 20

c) Give the values of R1 R2 and R3 after this instruction

add R3 R2 R1

After add R3 R2 R1R1 = 12 R2 = 16 and R3 = 20

addi $v0 $v0 1sw $v1 0($a1)addi $a0 $a0 1

The instruction memory is accessed four times (as there are four instructions) and the data memory isaccessed twice (once for the lw instruction and another time for the sw instruction)Q4 Use the register and memory values in the table below for the next questions

Assume a 32-bit machine Assume each of the following questions starts from the table values that is DO NOT use value changes from one question as propagating into future parts of the questions

a) What values will be in R1 and R3 after this instruction is executed

load R3 12(R1)

After load R3 12(R1)R3 = 16 and R1 = 12

b) What values will be in the registers after this instruction is executed

addi R2 R3 16

After addi R2 R3 16R2 = 16 and R3 = 20

c) Give the values of R1 R2 and R3 after this instruction

add R3 R2 R1

After add R3 R2 R1R1 = 12 R2 = 16 and R3 = 20