yieldstar metrology system applications for advanced process … · yieldstar metrology system...

Dr. Paul Hinnen

April 20 2018 / IMEC, Leuven

YieldStar Metrology System Applications for Advanced Process Control

Program System Engineer, BL Applications, ASML

Public

Overlay and CD-Uniformity (CDU) are critical for device performance

Rule-of-thumb:

OV 30 % of CD

CDU 10 % of CD

OVCritical Dimension

(CD)

Today’s devices: CD 16 nm

OV < 5 nm

CDU < 1.5 nm

ASML Holistic Lithography approach seeks to

maximize patterning process performance and control

Full chip process window detection

Process Window Enhancement

Process Window Control

Lithography scanner with advanced capability (Imaging, overlay and focus)

Computational Lithography Metrology

1

3 2

Public

Slide 3

Measurement Signal type Target size

( µm2 )

Primary application

Overlay

After Develop

Pupil 40x160 Monitor wafer

Dark field image 10x10 On Product

Focus

Pupil 40x80 Monitor wafer

Dark field image 10x10 On Product

CD & Overlay

At Resolution

Pupil 40x40 – 5x5 Monitor & On Product

Slide 4

Public

YieldStar Optical Scatterometry SystemOverlay, Focus and CD measurement capability

Standalone

Integrated

After develop measurements

with YieldStar

Design for Control optimizes YieldStar overlay targets for

best on-product overlay performance

Printability

• Mask optimization

• Litho process window

• Design rule compatibility

Detectability

• Optimize precision (TMU) and measurement time (MAM)

• Dependent on stack & target design

Process robustness• Measurement robust

for process variations (detectability & accuracy)

Device matching

• Aberration sensitivity

• Match target to device

D4C

device target

𝜕𝑂𝑉𝐿𝑑𝜕𝑍𝑖

𝜕𝑂𝑉𝐿𝑡𝜕𝑍𝑖

≈

Slide 6

Public

Public

YieldStar Dark Field (μDBO) Measurement PrincipleYS350 allows parallel detection of + and – first order image

grating 1 grating 2

dOVX dOVX

Measured OV:

-1st)1st) ((

dd III

-1st)1st) ((

dd III

𝐴+ = 𝐾(𝑂𝑉 + 𝑑) 𝐴− = 𝐾(𝑂𝑉 − 𝑑)

𝑂𝑉 = 𝑑 ×𝐴+ + 𝐴−

𝐴+ − 𝐴−

𝐴+

𝐴−

+d

-d

YieldStar Image of

μDBO target on

the wafer

μDBO target on

the wafer

K is overlay sensitivityA is asymmetry (delta Intensity)

d is grating bias

Public

Overlay recipe optimization required

Presence of grating asymmetry, imbalance along with film variations trigger an overlay swing phenomena

In the absence of asymmetry life is easy in

OV metrology

But when asymmetry is present, each

measurement site may be susceptible to an OV

error which will vary with the variation of …

1. Asymmetry over wafer

2. Field location specific grating imbalance

3. Symmetric stack parameters (thin film thickness

etc.) over the wafer

4. Any or all of the above from W2W, L2L

Goal is to eliminate or minimize these errors

Grating Imbalance Grating Asymmetry Thickness, n, k

+d -d

A B C


+d -d


+d -d

450 500 550 600 650 7002

3

4

5

6

7symmetric grating

TE

TM

[nm]

measure

d O

V [

nm

]

All setting gives accurate OV

Symmetric target @ 5nm OV

Measurement wavelength

450 500 550 600 650 7002

3

4

5

6

72 nm bottom asymmetry

measure

d O

V [

nm

]

TE

TM

[nm]

Bottom grating is impacted

by process asymmetry

Asymmetric target @ 5nm OV

Careful selection necessary

Measurement wavelength

Simulation using signal

formation physics

polarizations

polarizations

Public

Multi Wavelength approach towards accuracy & robustness

Enabled by continuous WL and fast WL switching hardware (reducing throughput penalty)

𝐴+ =𝑂𝑉+𝑑

𝑂𝑉−𝑑𝐴− 𝐴+ =

𝑂𝑉+𝑑

𝑂𝑉−𝑑𝐴− + 𝐶

𝐴+

𝐴−Each colored dot

is a different WL

Every WL has the

same slope to

origin = same OV

Symmetric gratings Asymmetric gratings

Slope of multi WL line

immune to asymmetry=

accurate OV

Multi WL (at least dual WL) can describe

the OV more accurately than 1 WL

Every WL has

different slope to

origin = wrong OV

Slope of the line => Overlay

dOVKA dOVKA

DBO uses overlapping gratings with a shift(bias) +d and -d

AA

AAdOV

Top gratings

Bottom gratings

OV

+d-d

+d -d

➢ K is overlay sensitivity: detects process dependency of overlay

➢ A is asymmetry (delta intensity)

Slope is proportional to

overlay in A+ vs. A- plot

Distance to origin

(DTO) = measure of

asymmetry ~ C

Public

Simulation showing the robustness of Dual WLResult of Monte-Carlo simulation

3 repro [nm]

|mean error| [nm]

4 stack parameters were randomly varied:

1. Oxide film thickness: 390 – 410 nm2. Grating imbalance : 2 nm top-top3. Side wall asymmetry: ± 1 nm impact4. Etch depth: 77 – 83 nm

For 140 random selections the OV error was calculated for the single wavelength and the dual wavelength recipe:

Dual WL remains immune to large stack variations

Public

Single WL doesn’t match to AEI device OV (reference)

Multi WL can bring the result closer to the reference

All R2 are > 0.95

All measurement WLs are used to

create the Multi WL result above

Wavelength 1 Wavelength 2 Wavelength 3 Wavelength 4 AEI Reference Multi WL

Overlay

Correlation

Slope to AEI

Reference

(critical x dir)

0.69 0.74 0.86 0.95 ReferenceSlope = 0.98

R2 = 0.99

ADI YieldStar Single Wavelength Recipes ADI YieldStar

better match

0.8

1.15

0.82

0.950.995

1

0.7

0.8

0.9

1

1.1

1.2

1.3

Sign

al

Co

ntr

ast

Best signal single WL

A

B

Measurement wavelengths

C

A B C A + B B + C

Single Wavelengths DUAL WL

YieldStar OV (ADI) to reference OV (AEI) correlation

slope

Multi WL

All WL

WL A+B WL B+C Multi (all WL)

slope 0.954 0.995 1

R² 0.978 0.983 0.99

Slide 12

Public

Dual & multi WL OV not impacted by asymmetry induced error

Single WL OV (even @ signal peaks) do not match reference, but multi WL (and also dual WL) provide good match to reference OV

Low side of

visible WL

High side of

visible WL

Assuming

1. the error sources not

related to asymmetry are

excluded by target design

2. no etch (post ADI)

induced ADI to AEI delta

-6

-4

-2

0

2

4

6

LOT 1 LOT 2 LOT 3 LOT 4 LOT 5 LOT 6 LOT 7 LOT 8 LOT 9 LOT 10

Overlay delta of YieldStar (ADI) to Reference (AEI) [nm]

Single WL Dual WL

Average subtracted

wafer field

L2L noncorrectable error (10Par)

Single WL (ADI)

Dual WL (ADI)

AEI reference

40%

reduction

by Dual WL

Slide 13

Public

Dual WL showing better accuracy and lot to lot overlay

robustness compared to single WL measurements

A reduction of 40% lot to lot non-correctable error (NCE) is observed below

indicating less systematic error present in dual WL compared to single WL

Dual WL Improved accuracy and L2L stability

After etch measurements with

YieldStar In Device Metrology (IDM)

Slide 14

Public

Litho Overlay Metrology on Target to After Etch

Device offsets are a common problem today in HVM Slide 15

Public

ADI Litho –

uDBO Overlay

After Etch –

Cell Overlay

Zero Overlay

AEI-ADI

offset

In-Device Metrology (IDM) Overlay: ConceptWhen both OV gratings are in close proximity, the resulting OV-induced

0th-Order Pupil Asymmetry signals can be exploited

Overlay Principle

DRAM Memory Cell

Zero

P

lace

me

nt

Erro

r

+

No

n-Z

ero

Pla

cem

en

t Er

ror

OV

+

Asymmetric PartMeasured Pupil

Overlay Metrology

OVOV Inference

Measured Pupil

Overlay pupil model to translatepupil to OV in nm

Asymmetric Part

Overlay asymmetry signal fully captured with

YieldStar’s unique design within one acquisition

High 0.95 NA

Continuous Angles

All Azimuthal

Directions

Overlay signal typically at the edge of the pupil

Slide 16

Public

YS1375 Enable Overlay

and μCD DRAM features

>1000points per field

In-Device Full Field

Full

Device

Slide 17

Public

In-Device Metrology (IDM) enables accurate and dense overlay

metrology on device level featuresIDM measures allows flexible sampling and High Order corrections

Typical μDBO Targets

Scribelane based

<30points per field

Field Coverage Scribelane ONLY (2% Reticle)

Sampling Flexibility Limited

Matched to Device

Overlay600nm Pitch Target

Device

Area

Device

Area600nm Pitch

✓

✓

Device Pitch

10x10µm2

targets

Device

Area

Device

Area

Set/Get Overlay +/-5.2nm

98% Yieldstar Accuracy (Slope)

Interfield Fingerprint

Similar Interfield Fingerprint

Intrafield Fingerprint

Similar Intrafield FingerprintMeasurement Statistics

Yie

ldS

tar

IDM

CD

SE

M/D

EC

AP

Slope = 0.9887R² = 0.9674

GE

T -

Me

as

ure

d O

ve

rla

y [

nm

]

SET - Overlay 0.33ppm [nm]

SET – Overlay 0.33ppm [nm]

Slope = 0.7876R² = 0.9487

GE

T -

Me

as

ure

d O

ve

rla

y [

nm

]

SET - Overlay 0.33ppm [nm]

SET – Overlay 0.33ppm [nm]

MAG

IDM Intrafield

CDSEM Intrafield

IDM Interfield

CDSEM Interfield

0.5

sec0.087

nm 3σ

MAM Time

Precision

YieldStar S1250 shows similar overlay fingerprints to CDSEM

Overlay with 98% accuracy with respect to induced overlayG

ET

–M

ea

su

red

Ove

rla

y [

nm

] G

ET

–M

ea

su

red

Ove

rla

y [

nm

]

Set OV Range +/-5.2nm

SET OV Range +/-5.2nm

Slide 18

Public

YS1375 Enable Overlay

and μCD DRAM features


In-Device Full Field

Full

Device

Slide 19

Public

In-Device Metrology (IDM) enables accurate and dense overlay

metrology on device level featuresIDM measures allows flexible sampling and High Order corrections

Typical μDBO Targets

Scribelane based

<30points per field

Field Coverage Scribelane ONLY (2% Reticle)

Sampling Flexibility Limited

Matched to Device

Overlay600nm Pitch Target

Device

Area

Device

Area600nm Pitch

✓

✓

Device Pitch

10x10µm2

targets

YS 1250/1375 Enable

Overlay and μCD logic

features


In-Device Targets >90%

Maximized

Device Feature

Device

Area

Device

Area

5µm

5x5µm2

targets

Device

Area

Device

Area

✓

✓

Public

IDM needs target design for logic

SYMMETRY RULES

• Point symmetry for

geometry and

materials

• The Point symmetry

is broken in

presence of Overlay

PITCH RULES

• Pitch as close as

possible to product

pitch

Logic SRAM features can be simplified to enable fast and reliable metrology

Product Layout

(up to contact

layer)

Extract Layers of

Interest

Define Overlay

parameters

Contact

IDM target

Point symmetric

unit cell

Gate

Fin

Public

Small device-like targets correlate well with larger scribelane

targets5x5µm2 and 10x10µm2 optimized IDM recipes show consistent behavior

IDM target Slope R2 Offset Precision

10x10µm2 1.0 0.93 -0.53nm 0.10nm

5x5µm2 0.97 0.91 -0.64nm 0.37nm

Induced overlay offset @ Litho [nm] Induced overlay offset @ Litho [nm]

To

tal

measu

red

ov

erl

ay [

nm

]

To

tal

measu

red

ov

erl

ay [

nm

]

YieldStar IDM used to measure dense overlay fingerprintLogic

(5x5 m

m2

targ

et)

DR

AM

(devic

e)

Slope = 0.98R² = 0.98

-8

-6

-4

-2

0

2

4

6

8

-8-7-6-5-4-3-2-10 1 2 3 4 5 6 7 8

Slope = 0.97

R2=0.91

Ge

t o

ve

rla

y [

nm

]

Set overlay [nm]

-8 -6 -4 -2 0 2 4 6 8-20

-1

0

0

1

5

Ge

t o

ve

rla

y [

nm

]

1.8 s MAM time

145 points per field

Overlay data proprietary0.5 s MAM time

164 points per field

19 par/field

CPE

correction

per exposure

19 par/field

CPE

correction

per exposure

Overlay Residuals

Mean+3 = 3.8nm Mean+3 = 2.2nm

Mean+3 59% reduced

Slide 22

Public

>36% Device overlay improvements on DRAM word line

with implementation of YieldStar In Device Metrology

1 71

31

92

53

13

74

34

95

56

16

77

37

98

59

19

71

03

109

115

121

127

133

139

145

151

157

163

169

175

181

187

193

199

205

211

217

223

229

235

241

247

253

259

265

271

277

283

289

295

301

307

313

319

325

331

337

343

349

355

361

367

373

379

385

391

397

403

409

415

421

427

433

439

445

451

457

463

469

475

481

487

493

499

505

511

517

523

529

535

541

547

553

559

565

571

577

583

589

595

601

607

613

619

625

631

637

643

649

655

661

667

673 1 6

11

16

21

26

31

36

41

46

51

56

61

66

71

76

81

86

91

96

101

106

111

116

121

126

131

136

141

146

151

156

161

166

171

176

181

186

191

196

201

206

211

216

221

226

231

236

241

246

251

256

261

266

271

276

281

286

291

296

301

306

311

316

321

326

331

336

341

346

351

356

361

366

371

376

381

386

391

396

401

406

411

416

421

426

431

436

441

446

451

456

461

466

471

476

481

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88

Total 36%↓

vvvvvv

v

vvvvv

27%↓

Mean+

3σ

[nm

]

11 months 8 months 5 months

Controlling

Metrology ToolHigh Voltage SEM Yieldstar IDM Yieldstar IDM

Control

FrequencyLow (Static) Low (Static) High

Lot Sampling

RateLow High High

Wafer Sampling

PointsLow High High

Device Overlay

Control

HV SEM Yieldstar IDM Yieldstar IDM

Full

Slide 23

Public

IDM mCD measurements on 5x5 µm2 match 10x10 µm2

After-Etch Across Wafer

Target: test target

Sampling: full wafer, 16 pts per field

Results:

• Good correlation of full wafer CD

Public

Slide 24

Correlation of full wafer CD measurements

Full wafer CD

5x5 targets 10x10 targets

• Clear etch process fingerprint

• Same residuals

5um

5x5

ta

rge

ts

10x10 targets

Summary

- Combination of integrated and stand-alone metrology to support

Scanner-stability and process-variation control.

- Overlay capability on optimized targets for good printability, low

process sensitivity, high detectability, good matching to device.

- Multi-WL recipes required to meet accuracy requirements

- 5x5µm2 target At Resolution OV and CD capability allows high

density Intra- and Intra- field fingerprint metrology for improved

after etch patterning control.

Public

Slide 25

yieldstar metrology system applications for advanced process … · yieldstar metrology system...

Documents