x86-session12.ppt

X86 Session_12Protected mode operations in 286 & 386

Property of Accel Technologies Ltd., Copyright protected

80286 protected modeIf an OS of type OS/2 or Windows is used,the real mode is used toinitialize peripheral devicesload the main part of the OS in to memoryload some registersenable interruptsset up descriptor tables and switch to protected mode


80286 Protected mode

80286 is switched in to protected mode by setting the protection enable bit in the machine status word register followed by an inter segment jump to the start of the main system program

This flushes the instruction byte queue and this is necessary because the queue functions differently in the protected mode


80286 Protected modeThis enables the integrated MMU to provide virtual memory and protectionCan be brought back to the real mode only by resetting the systemHence,80286 cannot easily multitask a mixture of programs in the real mode and protected modeThis is overcome in 386 and 486


386 nonpipelined read cyclesCLK2(INPUT)VALID 1VALID 2BE0# - BE3# , A2-A31,M/IO# , D/C# , W/R#ADS#NA# I/PREADY#I/PLOCK#Out putD0-D31(Input during read)IN1ININVALID 1VALID 2 CYCLE 1CYCLE 2T1T1T2T2


386 nonpipelined read cyclesEach read operation requires two states , T1 & T2READY# is made low during T2 so that no wait states are inserted


386 nonpipelined read cyclesADS# is used for address pipelining Address is held by the latches386 address pins point to the next addressExternal circuitry asserts NA# signal to tell the 386 when to output the address for the next operation


80386 Functional UnitsCONTROL UNITDATA UNITPROTECTION TEST UNITSEGMENT REGISTERSSEGMENT TRANSLATORTRANSLATION LOOKASIDEBUFFERPAGE TRANSLATOR

DECODERINSTRUCTION QUEUEPREFETCHQUEUEPREFETCHERBUS INTERFACEBUS UNITPREFETCH UNITDECODE UNITPAGE UNITSEGMENT UNITEXECUTION UNIT


80386 Functional Unit (Contd.)The BIU interfaces between the 80386 with memory and I / OThe code PREFETCH UNIT prefetches instructions ,stores them in a 16 byte queueThe INSTRUCTION DECODE UNIT translates instructions into microcodesThe EXECUTION UNIT acts on the microcodes from the instruction queue


80386 Functional Unit (Contd.)The SEGMENTATION UNIT translates logical addresses into linear addressesThe PAGING UNIT , if enabled , translates these linear addresses into physical addresses. If not enabled , then linear addresses and physical addresses are identical


80386 Functional Unit (Contd.)The Execution Unit comprises Control unit -having microcode and parallel hardware Data unit - having ALU and 8 GPRs and a 64 bit barrel shifter The protection unit checks for segmentation violations under the control of microcode


Processing Modes of 80386 1. Protected mode [ normal 32 bit application of 80386 ] 2. Real address mode or Real mode [ A fast 8086 mode with a few new instructions] 3. Virtual 8086 mode or V86 mode [ goes back and forth between V86 mode and the protected mode ]


Data and Address Representations Data can beByte or 8 bitsword ,the low byte addressed by n and the high byte by n + 1.double word with byte 0 addressed by n and the byte 3 by address n + 3. integer signed ( 8 , 16 or 32 bit ). ordinal ( unsigned 8 , 16 or 32 bit ) .Addresses (real mode): near pointer ( a 32 bit logical address ) far pointer ( a 48 bit logical address )


Data and Address Representations A string ( 8 , 16 or 32 bit ) Bit field ( a contiguous sequence of bits at any position of any byte that may contain up to 32 bits )Bit string ( a contiguous sequence of bits at any position of any byte that may contain (2^32 -1 ) bits )Packed and unpacked BCD


Application RegistersEAXEBXECXEDXEBPESIEDIESP (Stack Pointer)EFLAGSEIP (Instruction Pointer)CS (Code)DS (Data)ES (Data)FS (Data)GS (Data)SS (Stack)General RegistersSegment RegistersMiscellaneous32-bit16-bit32-bit


Segment RegistersThere are six 16 -bit segment registersCS , SS , DS , ES are all similar to the ones in 8086 FS and GS are the additional data segment registers They allow the usage of flat or segmented model of memory organization


8-bit and 16-bit Data RegistersEAXAXAHAL31 24 16 8 0EAX: AX, AH, ALEBX: BX, BH, BLECX: CX, CH, CLEDX: DX, DH, DLEIP : IPEFLAGS: FLAGS


Flag Register

It is a 32 bit registerThe low order 16 bits is named FLAGSFlags fall in to three typesstatus flags - CF, PF, AF, ZF,SF and OFcontrol flags - DFsystem flags - IF , TF ,IOPL ,NT , RF and VMUsed to Control I / O , maskable interrupts, debugging,task switching and virtual 8086 to operate in a multitasking environment


Setting the protection enable bit in the machine status word is done with the help of a LMSW(load machine status word) instruction.

x86-session12.ppt

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