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IEEE P1500 Architecture Task Force, 2000 Copyright © 2000 IEEE P1500 P1500 IEEE Embedded Core Test Wrapper Instruction Register (WIR) Tiger Team Status Mike Ricchetti, Fidel Muradali, Alan Hales, Lee Whetsel, Eddie Rodriguez May 5th at VTS2000

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Page 1: Wrapper Instruction Register (WIR) Tiger Team Statusgrouper.ieee.org/groups/1500/vts00/05.05.WIRTTstatus.ricchetti.pdf · lFourth revision in progress & has been reviewed by Tiger

IEEE P1500 Architecture Task Force, 2000Copyright © 2000 IEEE P1500

P1500IEEE

Embedded Core Test

Wrapper Instruction Register (WIR)Tiger Team

Status

Mike Ricchetti, Fidel Muradali, Alan Hales,Lee Whetsel, Eddie Rodriguez

May 5th at VTS2000

Page 2: Wrapper Instruction Register (WIR) Tiger Team Statusgrouper.ieee.org/groups/1500/vts00/05.05.WIRTTstatus.ricchetti.pdf · lFourth revision in progress & has been reviewed by Tiger

IEEE P1500 Architecture Task Force, 2000Copyright © 2000 IEEE P1500

P1500IEEE

Embedded Core Test

Presentation Outline

q WIR Tiger Team Overviewl Tiger Team Members

l Mission & Scope

q Tiger Team Status

q Open Issues

q Work to Complete

Page 3: Wrapper Instruction Register (WIR) Tiger Team Statusgrouper.ieee.org/groups/1500/vts00/05.05.WIRTTstatus.ricchetti.pdf · lFourth revision in progress & has been reviewed by Tiger

IEEE P1500 Architecture Task Force, 2000Copyright © 2000 IEEE P1500

P1500IEEE

Embedded Core Test

P1500 Architecture Task ForceWIR Tiger Team Mission and Scope

Team MembersTeam MembersMike Ricchetti - Intellitech (Chair) Fidel Muradali - Agilent Technologies

Alan Hales - Texas Instruments Lee Whetsel - Texas InstrumentsEddie Rodriguez - Intel

Team Mission & ScopeTeam Mission & ScopeDefine the design & operation of the Wrapper Instruction Register (WIR) interms of behavioral Requirements, Permissions, and Recommendations:

4 WIR within P1500 register architecture

4 WIR operation: Capture, Shift, Update, Reset, etc.

4 Wrapper Interface Port signals & protocol

4 WIR Interface/Control to Bypass, WBR and Core

4 Provide some example WIR implementations & SoC configurations

4 Proposed owning Wrapper Bypass to CTAG

Page 4: Wrapper Instruction Register (WIR) Tiger Team Statusgrouper.ieee.org/groups/1500/vts00/05.05.WIRTTstatus.ricchetti.pdf · lFourth revision in progress & has been reviewed by Tiger

IEEE P1500 Architecture Task Force, 2000Copyright © 2000 IEEE P1500

P1500IEEE

Embedded Core Test

q Overview & most Descriptions/Specifications for WIRare donel Descriptions and Rules, Permissions & Recommendations for:

4 Wrapper Register Architecture4 WIR Design and Operation4 Wrapper Interface Port (WIP)

l Slides are on CTAG private web site

q All of above have been reviewed by CTAGl Text version handed off to Documentation Task Force in D0.1

l Fourth revision in progress & has been reviewed by Tiger Team

q Team has been inactive since DATEl New Tiger Team member: Eddie Rodriguez from Intel

l Owners assigned for “Work to Complete” list

P1500 Architecture Task ForceCurrent Status of WIR Tiger Team

Page 5: Wrapper Instruction Register (WIR) Tiger Team Statusgrouper.ieee.org/groups/1500/vts00/05.05.WIRTTstatus.ricchetti.pdf · lFourth revision in progress & has been reviewed by Tiger

IEEE P1500 Architecture Task Force, 2000Copyright © 2000 IEEE P1500

P1500IEEE

Embedded Core Test

q Currently some minor issues from last TT review:Will need further input and discussion from CTAGl Asynchronous vs. Synchronous reset

4 Should one method be a Rule ?4 WIRs with either method should be interoperable ?

l Encoding of WIP Enables for Shift, Capture, Update, etcto save wrapper terminals & reduce global wires4 Would enforce single operation at a time for WIR4 This may not be desirable for WBR

l Wrapper Subordination4 WIR should not reset coming out of subordination mode4 Reset takes precedence over all operations & instructions

q Other Issues ?

P1500 Architecture Task ForceWIR Tiger Team Open Issues List

Page 6: Wrapper Instruction Register (WIR) Tiger Team Statusgrouper.ieee.org/groups/1500/vts00/05.05.WIRTTstatus.ricchetti.pdf · lFourth revision in progress & has been reviewed by Tiger

IEEE P1500 Architecture Task Force, 2000Copyright © 2000 IEEE P1500

P1500IEEE

Embedded Core Test

q Work to Complete:l Description & Specification for:

4 WIR system chip connections4 WIR Interface to Bypass, WBR and Core

l Implementation Examples for:4 WIR connected to WIP

(Muxscan, LSSD, etc. & gated-clock vs. synchronous)4 WIR Operation for above (Showing protocols & timing)4 WIR system chip connections4 WIR interoperability with 1149.1 TAP(s) at SoC level

(Show simultaneous WIR Updates w/TAPed Cores)

l Write descriptive text for sections in P1500Draft Documentation

P1500 Architecture Task ForceWIR Tiger Team Work to Complete