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FPGA Fundamentals

Dr. Arshad Aziz

Contents

• What is an FPGA• Modern FPGA – Alternative Architectures• Design Considerations• Trends• Choosing an FPGA• Development Tools• Summary

Way back in the mist of time… Simple PLDs (SPLDs) - PROMs

Unprogrammed PROM (predefined AND array, programmable OR array)

Simple PLDs (SPLDs) - PLAs

Unprogrammed PLA (programmable AND and OR arrays).

Simple PLDs (SPLDs) - PALs

Unprogrammed PAL (programmable AND array, predefined OR array).

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Complex PLDs (CPLDs)

A generic CPLD structure

The “Gap”

The gap between PLDs and ASICs

Enter the FPGA FPGAs

A generic FPGA Architecture

Fusible Links (not used in FPGAs) Antifuse Technology

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EPROM Technology EEPROM and FLASH Technology

SRAM – Based Devices Summary of Technologies

Potential Application Areas

• Industrial Control• Medical Diagnostics• Telecommunication• Data Processing• Automotive• Aerospace• Gaming Systems• Set-top Boxes ……………… the list goes on…

ASIC vs FPGAs

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Architecture and Fabrics

A generic FPGA Architecture

MUX – based Fabrics

LUT – based Fabrics Embedded SRAM

Embedded Multiplier Embedded MAC/DSP Macros

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Soft and Hard Processor Cores Clock Trees

Clock Managers General – Purpose Input / Output (GPIO)

High – Speed Serial Interconnect Technology “Stuff”

• Abtifuse– Low-power, instant-on, OTP, SRAM blocks

• “Pure” FLASH-based– Low-power, instant-on, SRAM and NVM

blocks• FLASH + SRAM on the same chip

– Copy configuration from FPASH to SRAM• FLASH + SRAM die in the same package• “Pure” SRAM-based

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Special-Purpose FPGAs

• Customer-Specific Standard Parts(CSSPs)• Maxed-Signal FPGAs• Asynchronous FPGAs

Design Consideration (SRAM Config.)

Parallel load with FPGA as the master Parallel load with FPGA as slave.

Serial load with FPGA as master Daisy-chaining FPGAs

Embedded Logic Analyzer Other Design Considerations

• Use of flip-flops and latches• Check for larger, pin-compatible devices• Warning need fixing• Clock enables versus ASIC clock gating• Using IP cores• Tie down power requirements early

Trends• Glue logic• Increased capacity and speed• Hard macro cores• Embedded CPUs• Sophisticated interfaces• Domain-specific devices• Ultra-high-capacity / performance FPGAs• Ultra-low-power FPGAs• Mixed-signal FPGAs

Choosing an FPGASome questions to ask…• Do we need the FPGA

to be reprogrammable in-system?

• De we need on-chip multiplier and DSP functions?

• Do we have a restricted power budget?

• Are we board-area limited?

• Are we I/O limited?

Who are all the players?• Actel• Altera• Lattic Semiconductor• QuicLogic• Xilinx

• AchronixSemiconductor

• SiliconBlueTechnologies

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Development Tools System-Builder Tools

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Algorithm / DSP Designs Algorithm / DSP Designs

Evaluation Kits

Spartan-3E Starter Kit• Include everything

needed to get started:– Spartan-3E starter kit

and cables– ISE Design Suit:

Webpack edition– Supporting CD Rom

containing all references designs, demos, and documentation

Xilinx ISE Demo

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Create your project Follow the Design Flow

Synthesis Need Xilinx XST Layout and Design Analysis

Assigning Pins

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Functional Simulation with ISIM