vybrid automotive customer evaluation board...- all test points denoted tpx. - all test point vias...
TRANSCRIPT
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A AFreescale AISG Applications, East Kilbride
Boot - Boot mode / RCON Configuration
- Modifications from previous major board revision given throughtout schematic.
B1
Power 2 - Switch-Mode voltage regulator
GPIO - Vybrid MCU GPIO & Peripheral Connections
Reset - (incl I2C reset Mux) and Clocks
8 Oct. 2014 D.K.Release to production.Update Marketing Part Number to EVB-VF522R3.
Revision Information
Designer
Sheet 8
Sheet 9
Sheet 10
Sheet 11
Sheet 12
Sheet 13
Sheet 14
Sheet 15
Sheet 16
Sheet 17
Sheet 18
Sheet 19
Sheet 20
Sheet 21
Comments
Sheet 22
Sheet 23
Sheet 24
Sheet 25
Rev Date
B2 20 Nov. 2014 N.G. Default jumper settings updated on schematic.
A 7 April 2013
These schematics are provided for reference purposes only. As such, Freescale doesnot make any warranty, implied or otherwise, as to the suitability of circuit design orcomponent selection (type or value) used in these schematics for hardware designusing the Freescale Vybrid family of microprocessors. Customers using any part ofthese schematics as a basis for hardware design, do so at their own risk and Freescaledoes not assume any liability for such a hardware design.
G. RonCloser to reference design: DDR, power, no socket.Design leverage from Rev.D 27419.Power design leverage from Rev.H 27442 (Vybrid Tower board).Bluetooth connector like on i.MX6 boards.
B 24 April 2013 G. Ron
SCH change:- New 24 MHz crystal.Fab change.- L1 TOP: remove GND plane in between USB and USB1 diff pairs.- Correct Fab note 22 to match netname changes on board.- Change Fab note 6 to 0.0035''/0.0035''.- Change Fab note 7 to (2-8 microinches).
Sheet 2
Sheet 3
Sheet 4
Sheet 5
Sheet 6
Sheet 7
Comms 1 - CAN, LIN & SCI Interfaces
Comms 2 - MAC (Ethernet)
Comms 3 - USB Interfaces
Memory 1 - DDR3 MCU Connections and Memory
Memory 2 - QuadSPI Flash
Memory 3 - SD Card slot
Video - Video ADC (VADC) Inputs (RCA Connectors)
Graphic - DCU Interface
AV - MOST (MLB) Daughtercard Connections
Audio & Peripheral - User Peripherals, Audio Controls and GPIOs
- User notes given throughtout schematic.- Specific PCB LAYOUT notes detailed in ITALICS.
- All Test Points denoted TPx.
- All Test Point Vias denoted TPVx.
Audio 1 - Line and Microphone Inputs
Audio 2 - DSP
Audio 3 - DACs & Amplifier Outputs
Audio 4 - RF Tuner Interface
Audio 5 - I2C, CD, and Bluetooth Headers
Appendix 1 - EVB Block Diagram
Appendix 2 - Audio Routing Diagram
Note:
This board was designed for maximum flexibility in software development and demonstrates multiple functions possible with Vybrid processors. Although best design practices have been applied, some areas may not be suitable for amass-production design.System evaluation was not performed over process fluctuations, voltage changes, and temperature variations.
For an added resource, refer to Vybrid Hardware Development Guide document.- All small capacitors are 0402 unless otherwise stated.
Table of Contents:
Notes:
Vybrid Automotive Customer Evaluation Board
- All components and board processes are to be ROHS compliant.
- All jumpers are denoted Jx. Vast majority of them are 2-mm pitch.
- All connectors and headers are denoted Px and are 2.54mm pitch, unless otherwise stated.
Power 1 - Main input and Linear voltage regulators
Power 3 - MCU Power Connections
Debug - JTAG and Cortex Connectors
- Jumper settings given throughtout schematic.
- All zero ohm links are 0603.
- Jumper default positions are shown. 2-way jumpers have "source" as pin 1.
- All Switches denoted SWx.
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Microcontroller Product Group6501 William Cannon Drive WestAustin, TX 78735-8598
This document contains information proprietary to Freescale and shall not be used for engineering design,procurement or manufacture in whole or in part without the express written permission of Freescale.
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Title and Revision History
N.G.
Ross M.
N.G.
1 25
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Microcontroller Product Group6501 William Cannon Drive WestAustin, TX 78735-8598
This document contains information proprietary to Freescale and shall not be used for engineering design,procurement or manufacture in whole or in part without the express written permission of Freescale.
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Title and Revision History
N.G.
Ross M.
N.G.
1 25
____X____Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
Designer:
Drawn by:
Approved:
Microcontroller Product Group6501 William Cannon Drive WestAustin, TX 78735-8598
This document contains information proprietary to Freescale and shall not be used for engineering design,procurement or manufacture in whole or in part without the express written permission of Freescale.
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Title and Revision History
N.G.
Ross M.
N.G.
1 25
____X____
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
2.1mm Barrel Connector
Main EVBPower In
Layout note: GND Test Points, Top Side
Main Input and Linear Voltage Regulators (1.2V / 1.8V / 3.3V)
Layout note: GND Test Points, Bottom Side
Label "12V, 2A"
(25V RADIAL)
Label each TP "GND"
Label"1.2VL"
Power Supply Input, Polarity Protection, and Filter
1.2V Linear Regulator (150mA Max)
Test and reference points
Label "1.8VL"
1.8V Linear Regulator (350mA Max)
(for Audio circuits)
(0805 16V)
(0805 16V) (0805 16V)
(0805 16V)
(0603 25V)
(0603 35mcd)
(0603 5%)
(0603 5%)
(0603 35mcd)
(backup supply for analog circuits)
Layout note:provide copper for good cooling.
(0805 16V)
Default: A
3.3V Linear Regulator (500mA Max)(backup supply for analog circuits)
Layout note:provide copper for good cooling.
Layout note:provide copper for good cooling.
Note: Modifications from Rev.D 27419: - 12V input circuitry simplified.- D500 (wrong-polarity protection) connection changed.- optional 1.2V Linear Regulator circuitry added and DNP-ed.- LED indication for VCC_1V2_AFE rail added.- LED indication transistors from FET to bipolar.
12V-POL-PROT12V-IN
A_3V3_SR_ESR
A_1V2_LR_EN A_1V2_LR_PWRGD_G
A_1V8_LR_PWRGD
A_1V8_LR_PWRGD_G
A_1V2_LR_PWRGD_CAT
A_1V2_LR_PWRGD
A_1V8_LR_PWRGD_CAT
A_1V
8_LR
_A
DJ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
P12V
VCC_1V2_LR
1V8_LR3V3_SR
3V3_SR
3V3_SR
3V3_SR
GND GND
VCC_3V3_MCU
VCC_3V3_AN
GND
5V0_SR
VCC_1V2_AFE
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Main input and Linear voltage regulators (1.2V / 1.8V / 3.3V)
2 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Main input and Linear voltage regulators (1.2V / 1.8V / 3.3V)
2 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Main input and Linear voltage regulators (1.2V / 1.8V / 3.3V)
2 25
___ ___X
+
C731000uFDNP
R548
560
R5222400603_CC
1%
TP7DNP
1
TP52
1
U1
LM1117MPX-ADJ
ADJ1
VOUT2IN
3TAB_VOUT
4
Q500MMBT3904LT1G
23
1
TP42
1
TP500
1
R511
560
C55110UF
DNP
DS1LED_GREEN
AC
TP21DNP
1
TP43
1
R546 1.5K
P12
CONN PWR 1
1
23
TP10
1
C63710UF
DNP
R523100 1%
U511LP2983AIM5-1.2
DNP
VIN1
GND
2
VOUT5
ESR4 ON/OFF3
TP9
1
TP20
1
A
B
R6250
C5580.1UF
TP26
1
C63810UFDNP
TP51
1
D500
B340A
A C
C710UF
DS3LED_GREEN
AC
R2 1.5K
U513
LM1117MPX-3.3/NOPB
DNP
GND1
VOUT2IN
3TAB_VOUT
4
TP44
1
SH511
SH0805_40
C54010UF
Q1MMBT3904LT1G
23
1
J6DNP
12
R541 10KDNP
C55010UF
DNP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Switch-Mode Voltage Regulator (5V, 3.3V, 1.5V)
(0402 6.3V)
(2.2uF min.)
(13x13 13A)
(6.5x6.5 11A)
(7.5x7.5 5A)
(0603 5%)
(0402 50V)(0402 50V)
(0603 5%)
(0603 5%)
(0603 5%)
(0603 5%)
(0603 5%)(0603 5%)(0603 5%)(0603 5%)
(1210 16V)
(1210 16V)
(3A Output)
(1210 16V)
(1210 16V)
(1210 25V)
(0402 16V)
(0603 5%)
(RAD TH 25V)
(1.5A Output)
(1210 16V)
(1210 16V)
(1210 16V)
(1210 16V)
(0603 25V)
(0603 25V)
(30V 11.6A SO8)
(30V 11.6A SO8)
(0603 25V)
(0603 25V)
(0805 16V)
(0805 16V)
Layout note: provide copper for good cooling.
Layout note:provide copperfor good cooling.
(1A Output)
Label"1.5VS"
(0603 5%)
Label"3.3VS"
Label"5VS"
(0603 5%)
RST2 is 3V3 PWRGD
(0603 5%)
1V5 PWRGD turns on 3V3
RST1 is 5V PWRGD and it turns on 1V5
Part must be 'Option E' per Selector output voltage guide.
Note: Modifications from Rev.D 27419: - full re-design (multi-output regulator instead of multiple single-output ones).
SM_DH1
SM_DL1
SM_LX1
SM_SC1
SM_BIAS
SM_COMP1
SM_RST1_B
SM_RST2_B
SM_RST3_B
SM_EN1
SM_EN2
SM_EN3SM_RST1_B
SM_ERR_B
SM_SSENSM_CSEL1SM_SYNC
3V3_LX2_SR
1V5_LX3_SR
SM_BIAS
PMIC_PV
SM_BIAS
SM_BST1
SM_BIAS
SM_RST3_B
SM_RST3_B
SM_RST2_B
SM_RST1_B
3V3_OUT2_SR
1V5_OUT3_SR
SM
_C
AP
_C
OM
P1
GND
GND
GNDGND
GND
GND
GND
GND
GND
GND
GND
GND
GNDGND
GND
GND
3V3_SR
P12V
5V0_SR
5V0_SR
P12V
3V3_SR
P12V
5V0_SR
5V0_SR
5V0_SR5V0_SR5V0_SR
GNDGND GND
GND
GND
GND
VCC_1V5
GND
GND
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Switch-Mode Voltage Regulator
3 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Switch-Mode Voltage Regulator
3 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Switch-Mode Voltage Regulator
3 25
___ ___X
R5691.5K
R6422K
DS4LED_GREEN
AC
C6430.1UF
C7547UF
12
C6390.1UF
L3 1uHVISHAY INTERTECHNOLOGY
IHLP2525CZER1R0M01
1 2
C8847UF
12
DS6LED_GREEN
AC
C6281UF
+
C74220UF
R54 10K
DS5LED_GREEN
AC
C8047UF
12
R5771.5K
TP40DNP
1
R575 10K
C852.2UF
C6420.1UF
C841UF
R603.9K
C920.1UF
C9447UF
12
R61 10K
L5002.2UH
Cooper BussmannHC7-2R2-R
1 2
C6410.1UF
R55 100K
R62 10K
C8710UF
C6400.1UF
C961500pF
R570 10K
TP41DNP
1
C93120PF
R538.45K
R576 0DNP
C7947UF
12
R5731.5K
R5110
MAX16993AGJA/VY+
U7
PV11
DL12
GND3
LX14
DH15
BST16
VSUP7
EN18
BIAS9
PV10
FB111
CS112
OUT113
EN214
EN315
OUT316
RESET317
PV318
LX319
PGND320
PGND221
LX222
PV223
RESET224
OUT225
CSEL126 SSEN27
RESET128
GND29
COMP130
ERR31
SYNC32
EP
33
R574 100K
C8947UF
12
C6270.1UF
C9110UF
L2 2.2uHMurata 46222C
1 2C8210uF
Q4 FDS6680
1
2
3
5
8
6
4
7
Q5 FDS6680
1
2
3
5
8
6
4
7
C7847UF
12
TP45DNP
1
R5912.0K
DD3BAV99
1
3
2
C9547UF
12
R63 10K
R48
0.022
RC2512
C6150.1UF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Vybrid MCU Power Connections
(1% 0805)
(1% 0805)
(1% 0805) (1% 0805)
(1% 0805)
(1% 0805) (1% 0805)
(1% 0805)
Resistor "Storage" for PowerRail Current Measurements(if required, cut "Shorts" of interest and install resistors to measure power rails' currents)
From USB Peripheral Connector
Peripheral USB Port
Host USB Port
Default: 1-2 From USB Host Connector
Default: 1-2
Default: 1-2(1-2: Peripheral, Self-powered)(2-3: Peripheral, Bus-powered)
Layout note:Place 0.1uF close to each VDD33 pin, better to place one by one at the opposite PCB side under the 364BGA.
Layout note:Place 0.22uF close to each SDRAMC pin, better on opposite PCB side under the 364BGA.
Layout note:Place 0.22uF close to each VDD pin, better to place one by one at the opposite PCB side under the 364BGA.
Default: 1-2
Diode DD2 guarantees 3.3V power is uninterrupted when J9 open
Compatible withuser-supplied2016/2025/2032coin cells.
Diodes are notautomotive. Useany regular diodewith min. 0.5A andfitting footprint.
For application without 1.5V rail,i.e. without DDR. install diodesand move 0-Ohm resisitor fromposistion A to B.
Default: A
Best performance when x_ADC rails powered from dedicated linear voltage regulators.
Most critical for VREFH_ADC;without power filtering, actual ADCresolution might be degraded.
Best performance when x_AFE rails powered from dedicated linear voltage regulators.
Default:Populated
Note: Modifications from Rev.D 27419: - power management scheme copied from Tower module.
Vybrid_VBUS_PERIPHERAL
FVBG
VCC_2V5_SDRAM
Vybrid_VBAT
VCC_3V3_MCULDO
Vybrid_VBUS_HOST
VCC_3V3_AFE
BCTRL
VBATDVCOIN
VREF_3V3
VCC_2V5_SDRAM
VCC_3V3_ADC
VCC_1V1
VCC_1V5_SDRAM
VCC_1V2
VCC_1V5
VCC_3V3_AN
VCC_3V3_MCU
VCC_1V5
VCC_3V3_AN
3V3_SR
VCC_1V2
VCC_3V3_MCUVCC_3V3_MCU
VCC_3V3_MCU
VCC_3V3_MCU
VCC_1V2_AFEVCC_1V2_LR
VCC_1V2
VCC_1V2_AFE
GND
GNDGND
GND
GND
GND GND
GND
GND
GND
GND GND
GNDGND
GND
GND
GND GND
GND GND
GND
GND
GND
GND
5V0_SR
USB0_VBUS_DETECT 5,11
USB1_VBUS_DETECT 5,11
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
C
Thursday, November 20, 2014
MCU Power Connections
4 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
C
Thursday, November 20, 2014
MCU Power Connections
4 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
C
Thursday, November 20, 2014
MCU Power Connections
4 25
___ ___X
+
-
BT500BK-883
13
2
Q2
PBSS4021NT
23
1C55410UF
DNP
0805_CC
16V
DD2BAT54C-7-F
2
3
1
C5770.22uF16V
TPV10
C5804.7uF
10V0603_CC
C5600.1UF
C5980.22uF16V
J9 1X2MTMM-102-07-G-S-236
12
TPV16
C5710.22uF16V
TPV22
C5910.22uF16V
TPV14
D31N4448DNP
AC
J7 1X2MTMM-102-07-G-S-236
1 2
C5830.22uF16V
C5840.22uF16V
FB503
120 OHM
1 2
C55210UF
16V
0805_CC
C5630.22uF16V
C5870.22uF16V
C5670.22uF16V
C5690.22uF16V
R38 0.02
C5930.22uF16V
D21N4448DNP
AC
C5850.22uF16V
J4 1X3MTMM-103-07-G-S-236
1 2 3
C714.7uF
10V0603_CC
TPV13
C5610.22uF16V
TPV23
C6050.22uF16V
C5750.22uF16V
C6040.22uF16V
C6010.22uF16V
U5B
SVF522R3K1CMK4
FA_VDDN7
SDRAMC_VDD1P5_1E4
SDRAMC_VDD1P5_2D5
SDRAMC_VDD1P5_3F5
SDRAMC_VDD1P5_4H5
SDRAMC_VDD1P5_5K5
SDRAMC_VDD1P5_6E7
SDRAMC_VDD1P5_7E9
SDRAMC_VDD1P5_8D11
SDRAMC_VDD2P5_1J5
SDRAMC_VDD2P5_2E6
SDRAMC_VDD2P5_3E10
VBATV14
VDD1G7
VDD2J7
VDD3L7
VDD4H8
VDD5K8
VDD6M8
VDD7P8
VDD8G9
VDD9N9
VDD10H10
VDD11P10
VDD12G11
VDD13N11
VDD14H12
VDD15P12
VDD16G13
VDD17J13
VDD18L13
VDD19N13
VDD20H14
VDD21K14
VDD22M14
VDD23P14
VDD12_AFET5
VDD33_1K3
VDD33_2N3
VDD33_3V8
VDD33_4C12
VDD33_5C15
VDD33_6U16
VDD33_7K17
VDD33_8N17
VDD33_9T17
VDD33_10C18
VDD33_11F18
VDD33_12W18
VDD33_LDOINT12
VDDA33_ADCV1
VDDA33_AFEV3
VDDREGP5
VSS1V11
VSS2A1
VSS3A20
VSS4B3
VSS5B5
VSS6B8
VSS7B11
VSS8B13
VSS9B16
VSS10B19
VSS11C2
VSS12D17
VSS13E5
VSS14E8
VSS15E11
VSS16E14
VSS17E19
VSS18F2
VSS19G17
VSS20H4
VSS21J2
VSS22J18
VSS23M2
VSS24M4
VSS25M18
VSS26R2
VSS27R18
VSS28U7
VSS29U19
VSS30V13
VSS31W6
VSS32V17
VSS33Y1
VSS34Y20
VSS35H19
VSS36L19
VSS37P19
VSS38H7
VSS39K7
VSS40M7
VSS41P7
VSS42G8
VSS43J8
VSS44L8
VSS45N8
VSS46H9
VSS47J9
VSS48K9
VSS49L9
VSS50M9
VSS51P9
VSS52G10
VSS53J10
VSS54K10
VSS55L10
VSS56M10
VSS57N10
VSS58H11
VSS59J11
VSS60K11
VSS61L11
VSS62M11
VSS63P11
VSS64G12
VSS65J12
VSS66K12
VSS67L12
VSS68M12
VSS69N12
VSS70H13
VSS71K13
VSS72M13
VSS73P13
VSS74G14
VSS75L14VSS76J14
VSS77N14
VSS_KEL0U11
VSS12_AFER5
VSSA33_ADCV2
VSSA33_AFEV4
VREFH_ADCW1
VREFL_ADCU3
BCTRLT2
DECAP_V11_LDO_OUTV12
DECAP_V25_LDO_OUTT11
USB0_VBUSW11
USB1_VBUSW10
USB_DCAPY10
VADC_AFE_BANDGAPU5
USB0_GNDV10 USB1_GNDY9
SH15SH0805_40
C5990.22uF16V
C5880.22uF16V
C5920.22uF16V
R50 0.02
TPV11
FB502
120 OHM
1 2
C5970.22uF16V
TPV4
C5740.22uF16V
C6000.22uF16V
C5700.22uF16V
C5864.7uF10V0603_CC
FB504120 OHM
1 2
C5794.7uF10V
R20 0.02
TPV25
R49 0.02
R46 0.02
R52 0.02
C5640.22uF16V
C6020.22uF16V
R33 0.02
TPV24
C600.22uF16V
TPV27
C5820.22uF16V
FB501120 OHM
1 2
TPV15
TP22
C5760.22uF16V
C5734.7uF10V0603_CC
C5620.22uF16V
C5780.22uF16V
TPV2
C55310UF0805_CC16V
A
B
R280
C55710UF0805_CC16V
C55510UF0805_CC16V
C5810.22uF16V
J8 1X3MTMM-103-07-G-S-236
123
C5950.22uF16V
C6034.7uF10V0603_CC
TPV26
R34 0.02
TPV21
C5660.22uF16V
C5900.22uF16V
R542 1.18K
C5650.22uF16V
C5940.22uF16V
C5720.22uF16V
C5560.22uF16V
TPV28
C5590.22uF16V
C5890.22uF16V
C56810UF0805_CC
16V
R632 0
DNP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Vybrid MCU GPIO & Peripheral Connections
All zero-ohm resistors 0603_CC
FTM0CH0FTM0CH1FTM0CH2FTM0CH3FTM0CH4FTM0CH5FTM0CH6
FTM1CH0FTM1CH1
FTM0CH7
MLB_I2C3_SDA
USB0_VBUS_ENUSB0_VBUS_OCENET_CARD_DET_BQSPI1_SCKRESET_BSAI2_RX_BCLK
SDHC1_CMDSDHC1_DATA0SDHC1_DATA1SDHC1_DATA2
SAI2_RX_DATASAI2_RX_SYNCSDHC1_CLK
SDHC1_DATA3MLB_I2C3_SCL
FB_AD16FB_AD17FB_AD18FB_AD19FB_AD20FB_AD21FB_AD22FB_AD23FB_AD24FB_AD25FB_AD26FB_AD27FB_AD28FB_AD29FB_AD30FB_AD31
VADCSE0VADCSE1VADCSE2VADCSE3
ADC0SE8ADC0SE9ADC1SE8ADC1SE9
DACO1DACO0
QSPI0_A_DATA0QSPI0_A_DATA1QSPI0_A_DATA2QSPI0_A_DATA3
QSPI0_B_DATA0QSPI0_B_DATA1QSPI0_B_DATA2QSPI0_B_DATA3
TAMPER0TAMPER1TAMPER2TAMPER3TAMPER4TAMPER5
GND
DACO[0..1]18
FTM1CH[0..1]18
JTCLK8,17JTDI8JTDO8,17JTMS8,17
VIU_PIX_CLK10,22
RMII_CLKOUT10
MCU-EXTAL6MCU-XTAL6
MCU-EXTAL326MCU-XTAL326
LVDS0_DP18LVDS0_DN18
MCU-RSTx6
QSPI0_A_CS0 13QSPI0_A_SCK 13QSPI0_A_DQS 13,18
SAI0_TX_BCLK 23SAI0_RX_BCLK 18SAI0_RX_DATA 23SAI0_TX_DATA 7,23SAI0_RX_SYNC 7,18SAI0_TX_SYNC 7,23SAI1_TX_BCLK 7,20SAI1_RX_BCLK 7,19SAI1_RX_DATA 7,19SAI1_TX_DATA 7,16SAI1_RX_SYNC 7,19SAI1_TX_SYNC 7,16
QSPI0_A_DATA[0..3] 13
QSPI0_B_DATA[0..3] 13QSPI0_B_CS0 13QSPI0_B_SCK 13QSPI0_B_DQS 13,18
RMII1_TXEN 16RMII1_TXD0 22RMII1_TXD1 19RMII1_RXER 20RMII1_RXD0 20RMII1_RXD1 20RMII1_CRS_DV 20RMII1_MDIO 19,20,22RMII1_MDC 19,20,22
RMII0_TXEN 10RMII0_TXD0 10RMII0_TXD1 10RMII0_RXER 10RMII0_RXD0 10RMII0_RXD1 10RMII0_CRS_DV 7,10RMII0_MDIO 7,10RMII0_MDC 7,10
ADC0SE[8..9]18
ADC1SE[8..9]18
VADCSE[0..3]15
FTM0CH[0..7]7,13,18,20
FB_AD[16..31]6,9,10,14,17,18,23
DSPI0_SCK 20DSPI0_SOUT 20DSPI0_SIN 20DSPI0_PCS0 7,20DSPI0_PCS1 7,19,20,21
CAN1_TX 6,16,22CAN1_RX 6,16,22
CAN0_TX 9CAN0_RX 9
SCI0_CTS 23SCI0_RTS 23SCI0_RX 23SCI0_TX 23
USB1_DN 11USB1_DP 11
USB1_VBUS_DETECT 4,11
USB0_DN 11USB0_DP 11
USB0_VBUS_DETECT 4,11
USB0_VBUS_EN11USB0_VBUS_OC11ENET_CARD_DET_B10QSPI1_SCK13RESET_B16SAI2_RX_BCLK23SAI2_RX_DATA23SAI2_RX_SYNC23SDHC1_CLK11,14,23SDHC1_CMD11,14,23SDHC1_DATA014,23SDHC1_DATA114,23SDHC1_DATA214,23SDHC1_DATA314,23MLB_I2C3_SCL10,17,23MLB_I2C3_SDA10,17,23
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
C
Thursday, November 20, 2014
MCU GPIO & Peripheral Connections
5 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
C
Thursday, November 20, 2014
MCU GPIO & Peripheral Connections
5 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
C
Thursday, November 20, 2014
MCU GPIO & Peripheral Connections
5 25
___ ___X
R29 0
R636 0
R554 0
R543 0
R634 0
R637 0
TPV12
R552 0
R638 0
Vybrid 364 BGAPackage 1of4 GPIO Pins
ADC
Video ADC
FlexTimer
FlexBus
Audio
Comms
Debug
Clock, Reset & Control
I/O
Ethernet
QuadSPI
U5A SVF522R3K1CMK4
ADC0SE8Y2
ADC0SE9W2
ADC1SE8W3
ADC1SE9Y3
DACO0U1
DACO1U2
VADCSE0Y4
VADCSE1U4
VADCSE2W4
VADCSE3V5
EXTALY13
XTALW13
EXTAL32Y12
XTAL32W12
RESET/RESET_OUTT4
PTA6/RMII_CLKOUT/RMII_CLKINN5
TESTT3
Ext_PORT1
PTA8/JTCLK/SWCLKK4
PTA9/JTDI/RMII_CLKOUT/RMII_CLKIN/WDOGK2
PTA10/JTDO/EXT_AUDIO_MCLK/ENET_TS_CLKINK1
PTA11/JTMS/SWDIOL1
PTA12/TRACECK/EXT_AUDIO_MCLKL3
PTA16/TRACED0/USB0_VBUS_EN/ADC1SE0/SAI2_TX_BCLKY5
PTA17/TRACED1/USB0_VBUS_OC/ADC1SE1/USB0_SOF_PULSEY6
PTA18/TRACED2/ADC0SE0/FTM1_QD_PHA/SAI2_TX_DATAV6
PTA19/TRACED3/ADC0SE1/FTM1_QD_PHB/SAI2_TX_SYNCU6
PTA20/TRACED4/SCI3_TXB18
PTA21/TRACED5/SAI2_RX_BCLK/SCI3_RXD18
PTA22/TRACED6/SAI2_RX_DATAE17
PTA23/TRACED7/SAI2_RX_SYNCC17
PTA24/TRACED8/USB1_VBUS_EN/SDHC1_CLK/WDOGR16
PTA25/TRACED9/USB1_VBUS_OC/SDHC1_CMDR17
PTA26/TRACED10/SAI3_TX_BCLK/SDHC1_DAT0R19
PTA27/TRACED11/SAI3_RX_BCLK/SDHC1_DAT1R20
PTA28/TRACED12/SAI3_RX_DATA/ENET1_1588_TMR0/SCI4_TX/SDHC1_DAT2P20
PTA29/TRACED13/SAI3_TX_DATA/ENET1_1588_TMR1/SCI4_RX/SDHC1_DAT3P18
PTA30/TRACED14/SAI3_RX_SYNC/ENET1_1588_TMR2/SCI4_RTS/SCI3_TXP17
PTA31/TRACED15/SAI3_TX_SYNC/ENET1_1588_TMR3/SCI4_CTS/SCI3_RXP16
PTB0/FTM0CH0/ADC0SE2/TRACECTL/SAI2_RX_BCLKT6
PTB1/FTM0CH1/ADC0SE3/RCON30/SAI2_RX_DATAT7
PTB2/FTM0CH2/ADC1SE2/RCON31/SAI2_RX_SYNCV7
PTB3/FTM0CH3/ADC1SE3/EXTRIGW7
PTB4/FTM0CH4/SCI1_TX/ADC0SE4Y7
PTB5/FTM0CH5/SCI1_RX/ADC1SE4Y8
PTB6/FTM0CH6/SCI1_RTS/SCI2_TXW8
PTB7/FTM0CH7/SCI1_CTS/SCI2_RXD13
PTB8/FTM1CH0/FTM1_QD_PHAJ16
PTB9/FTM1CH1/FTM1_QD_PHBJ19
PTB10/SCI0_TX/CKO1 /ENET_TS_CLKINB15PTB11/SCI0_RX/CKO2D14PTB12/SCI0_RTS/DSPI0_PCS5E13PTB13/SCI0_CTS/DSPI0_PCS4/TRACECTLD15
PTB14/CAN0_RX/I2C0_SCLB14PTB15/CAN0_TX/I2C0_SDAA14
PTB16/CAN1_RX/I2C1_SCLC14PTB17/CAN1_TX/I2C1_SDAA15
PTB18/DSPI0_PCS1/EXT_AUDIO_MCLKB12PTB19/DSPI0_PCS0C13PTB20/DSPI0_SINA13PTB21/DSPI0_SOUTE12PTB22/DSPI0_SCKD12
USB0_DPT10USB0_DMT9
USB1_DPW9USB1_DMV9
PTC0/RMII0_MDC/FTM1CH0/DSPI0_PCS3/ESAI_SCKT/RCON18L4PTC1/RMII0_MDIO/FTM1CH1/DSPI0_PCS2/ESAI_FST/RCON19L5PTC2/RMII0_CRS_DV/SCI1_TX/ESAI_SDO0/RCON20M5PTC3/RMII0_RXD1/SCI1_RX/ESAI_SDO1M3PTC4/RMII0_RXD0/SCI1_RTS/DSPI1_PCS1/ESAI_SDO2L2PTC5/RMII0_RXER/SCI1_CTS/DSPI1_PCS0/ESAI_SDO3M1PTC6/RMII0_TXD1/DSPI1_SIN/ESAI_SDI0N1PTC7/RMII0_TXD0/DSPI1_SOUT/ESAI_SDI1N2PTC8/RMII0_TXEN/DSPI1_SCKN4
PTC9/RMII1_MDC/ESAI_SCKTT15PTC10/RMII1_MDIO/ESAI_FSTU15PTC11/RMII1_CRS_DV/ESAI_SDO0P4PTC12/RMII1_RXD1/ESAI_SDO1/SAI2_TX_BCLKP3PTC13/RMII1_RXD0/ESAI_SDO2/SAI2_RX_BCLKP1PTC14/RMII1_RXER/ESAI_SDO3/SCI5_TX/SAI2_RX_DATA/ADC0SE6R1PTC15/RMII1_TXD1/ESAI_SDI0/SCI5_RX/SAI2_TX_DATA/ADC0SE7P2PTC16/RMII1_TXD0/ESAI_SDI1/SCI5_RTS/SAI2_RX_SYNC/ADC1SE6R3PTC17/RMII1_TXEN/SCI5_CTS/SAI2_TX_SYNC/USB1_SOF_PULSE/ADC1SE7R4
PTD31/NF_IO15/FTM3CH0/DSPI2_PCS1J20 PTD30/NF_IO14/FTM3CH1/DSPI2_PCS0H20 PTD29/NF_IO13/FTM3CH2/DSPI2_SINH18 PTD28/NF_IO12/FTM3CH3/DSPI2_SOUTH17 PTD27/NF_IO11/FTM3CH4/DSPI2_SCKH16 PTD26/NF_IO10/FTM3CH5/SDHC1_WPG16 PTD25/NF_IO9/FTM3CH6G18 PTD24/NF_IO8/FTM3CH7G19 PTD23/NF_IO7/FTM2CH0/ENET0_1588_TMR0/SDHC0_DAT4/SCI2_TXG20 PTD22/NF_IO6/FTM2CH1/ENET0_1588_TMR1/SDHC0_DAT5/SCI2_RXF20 PTD21/NF_IO5/ENET0_1588_TMR2/SDHC0_DAT6/SCI2_RTSF19 PTD20/NF_IO4/ENET0_1588_TMR3/SDHC0_DAT7/SCI2_CTSF17 PTD19/NF_IO3/ESAI_SCKR/FTM2_QD_PHAF16 PTD18/NF_IO2/ESAI_FSR/FTM2_QD_PHBE18 PTD17/NF_IO1/ESAI_HCKRE20 PTD16/NF_IO0/ESAI_HCKTD20
PTD2/QSPI0_A_DATA3/SCI2_RTS/DSPI1_PCS3/SPDIF_OUT1V18PTD3/QSPI0_A_DATA2/SCI2_CTS/DSPI1_PCS2/SPDIF_PLOCKY19PTD4/QSPI0_A_DATA1/DSPI1_PCS1/SPDIF_SRCLKW19PTD5/QSPI0_A_DATA0/DSPI1_PCS0W20
PTD6/QSPI0_A_DQS/DSPI1_SINV20PTD0/QSPI0_A_SCK/SCI2_TX/SPDIF_EXTCLKY17PTD1/QSPI0_A_CS0/SCI2_RX/SPDIF_IN1Y18
PTD7/QSPI0_B_SCK/DSPI1_SOUTV19PTD8/QSPI0_B_CS0/DSPI1_SCKU17PTD9/QSPI0_B_DATA3/DSPI3_PCS1/SAI1_TX_SYNCU18PTD10/QSPI0_B_DATA2/DSPI3_PCS0U20PTD11/QSPI0_B_DATA1/DSPI3_SINT20PTD12/QSPI0_B_DATA0/DSPI3_SOUTT19
PTD13/QSPI0_B_DQS/DSPI3_SCKT18
LVDS0PW14
LVDS0NY14
USB0_VBUS_DETECTY11
USB1_VBUS_DETECTU9
PTA7V15
EXT_TAMPER5/EXT_WM1_TAMPER_OUTU10EXT_TAMPER4/EXT_WM1_TAMPER_INU12EXT_TAMPER3/EXT_WM0_TAMPER_OUTU13EXT_TAMPER2/EXT_WM0_TAMPER_INT13EXT_TAMPER1U14EXT_TAMPER0T14
PTB23/SAI0_TX_BCLK/SCI1_TX/RCON18A19
PTB24/SAI0_RX_BCLK/SCI1_RX/RCON19/NF_WEA18
PTB25/SAI0_RX_DATA/SCI1_RTS/RCON20/NF_CE0B17
PTB26/SAI0_TX_DATA/SCI1_CTS/RCON21/NF_CE1A17
PTB27/SAI0_RX_SYNC/RCON22/NF_REU8
PTB28/SAI0_TX_SYNC/RCON23A16
PTC26/SAI1_TX_BCLK/DSPI0_PCS5/RCON24/NF_RBD16
PTC27/SAI1_RX_BCLK/DSPI0_PCS4/RCON25/NF_ALEE16
PTC28/SAI1_RX_DATA/DSPI0_PCS3/RCON26/NF_CLEE15
PTC29/SAI1_TX_DATA/DSPI0_PCS2/RCON27C16
PTC30/SAI1_RX_SYNC/DSPI1_PCS2/RCON28/ADC0SE5T8
PTC31/SAI1_TX_SYNC/RCON29/ADC1SE5W5
R633 0
R635 0
R549 0
R551 0
SH14SH0805_40
R547 0
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Reset (incl. I2C Reset Mux) and Clocks
(I2C1_SCL)
(I2C1_SDA)
I2C ADDRESS = 0x30
Sets Expander I/Os as inputs (outputs Hi-Z).Critical for RCON operation.
(0402 16V)
(0603 1%)
(0603 1%)
(0603 1%)
I2C RESET Control
Crystals
{Open Drain}
{2.3V Threshold}
{210 ms delay}
(0603 5%)
(0402 16V) (0603 5%)
Label"MCU RST"
(0402 16V)
Label "MNL RST"
(0603 54mcd)
Note: Modifications from Rev.D 27419: - reset circuit copied from i.MX6 design + simplified,- R640 (2.2M resistor) added as per Erratum e5880.- I2C RESET Control IO0 disconnected.- I2C RESET Control IO7 re-assigned to 3.3V I2C Daughtercard.
MCU Reset
(1.5K pull-down I2C_RST(IO0) )
(1.5K pull-Down on DSP sheet)
(1.5K pull-down on tuner sheet)
(1.5K pull-down on MLB sheet)
(1.5K pull-downon QUADSPI sheet)
(1.5K pull-down on board)
(1.5K pull-down on sheet with CD Connector)
All "Shorts" 0805.
Default: A
RST-INx
MCU-XTAL
GND
GND
GND
GND
GND
GND GNDGND GNDGND
3V3_SR
3V3_SR
3V3_SR
3V3_SRGND
GND
GND
GND
CAN1_RX5,16,22
CAN1_TX5,16,22
FB_AD265,18
JTAG-RSTx8
MCU-RSTx 5
MCU-EXTAL325
MCU-XTAL325
DSP_RST_B(IO1) 20TUNER_RST_B(IO2) 22
QUADSPI_RST_B(IO4) 13BT_RST_B(IO5) 23CD_RST_B(IO6) 23
MLB_RST_B(IO3) 17
MCU-EXTAL 5
MCU-XTAL5
I2C_RST_B(IO7) 23
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Reset - (incl I2C reset Mux) and Clocks
6 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Reset - (incl I2C reset Mux) and Clocks
6 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Reset - (incl I2C reset Mux) and Clocks
6 25
___ ___X
U4
STM6315RDW13F
VCC4
RST2
VSS1
MR3
R561.5K
MAX7310
U8
SCL1
SDA2
AD03
AD14
AD25 I/O0_OD
6
I/O17
GN
D8
I/O29
I/O310
I/O411
I/O512
I/O613
I/O714
RESET15
V+
16
SH12SH0805_40
R244.7K
C46 12PF
C45 12PF
C190.1UF
DNP
R810K
DNP
SH18
R1710K
R2310.0K
Y3
24MHZ
14
3 2
R5725.1K
R19 560
Y432.768KHZ
12
DS2RED
AC
C180.1UF
DNP
R261.0MDNP
C6518PF
SW7B3WN-6002
12
C44
0.1UF
SH17SH16
C629
0.1UF
OSC.Y2
24 MHzKC2520B24.0000C10E00
50PPM
VCC4
OUT3
DGND2
EN/DIS1
C6312PFCC0402_25
R6402.2M
R25 1.0MDNP
A
B
R6210 C66
12PF
C63618pF
R5715.1K
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
All 0603_CC,can be removedif not needed
(BOOTMOD[1])
(BOOTMOD[0])BOOTMOD[1:0] Boot Description
00 Boot from Fuses
01 Serial Download
10 From RCON Sw.
11 Reserved
Boot Mode / RCON Configuration
(PTB19)
(PTB18)
(0603 1%)
(0603 1%)
RCON Config
Boot Mode Selection
Factory use only
Label "0"
Label "0"
Label "1"
Label "1"
Layout note:place J14 and J15 side by side.
Label "MOD[0]"
Label "MOD[1]"
Default
Default
RCON8RCON9
RCON16
RCON24
RCON26RCON27RCON28RCON29RCON30RCON31
RCON25
RCON3RCON2
RCON5RCON6
RCON18RCON19
RCON7
RCON10RCON11RCON12
RCON0
RCON13RCON14RCON15
RCON1
RCON4
RCON20RCON21RCON22RCON23
RCON17
GND
GND
3V3_SR
3V3_SR
DCU0_R2 16DCU0_R3 16DCU0_R4 16DCU0_R5 16DCU0_R6 16DCU0_R7 16DCU0_G2 16DCU0_G3 16
DCU0_G4 16DCU0_G5 16DCU0_G6 16DCU0_G7 16DCU0_B2 16DCU0_B3 16DCU0_B4 16DCU0_B5 16
DCU0_B6 16DCU0_B7 16RMII0_MDC 5,10
RMII0_CRS_DV 5,10SAI0_TX_DATA 5,23SAI0_RX_SYNC 5,18SAI0_TX_SYNC 5,23
SAI1_TX_BCLK 5,20SAI1_RX_BCLK 5,19SAI1_RX_DATA 5,19SAI1_TX_DATA 5,16SAI1_RX_SYNC 5,19SAI1_TX_SYNC 5,16
RMII0_MDIO 5,10
FTM0CH1 5,13FTM0CH2 5,13
DCU0_VSYNC 16
DCU0_HSYNC 16
DSPI0_PCS1 5,19,20,21
DSPI0_PCS0 5,20
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Boot mode / RCON configuration
7 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Boot mode / RCON configuration
7 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Boot mode / RCON configuration
7 25
___ ___X
R603 5.1K
RN503 10K
1234
5
6789
10
R605 5.1K
R611 5.1K
SW11
SW
DIP
-8
12345678
16
15
14
13
12
11
10
9
R607 5.1K
RN502 10K
1234
5
6789
10
R616 5.1K
J12
HDR_1X1
DNP
1
R6510K
R612 5.1K
J14
1
2
3
R613 5.1K
R585 5.1K
J11
HDR_1X1
DNP
1
RN501 10K
1234
5
6789
10
R42100
R593 5.1K
R588 5.1K
R75 5.1K
R73 5.1K
R614 5.1K
R590 5.1K
R602 5.1K
R600 5.1K
R5710K
R39100
R5810K
R592 5.1K
R604 5.1K
R615 5.1K
SW10S
W D
IP-8
12345678
16
15
14
13
12
11
10
9
SW9
SW
DIP
-8
12345678
16
15
14
13
12
11
10
9
R606 5.1K
R608 5.1K
R6610K
R586 5.1K
R594 5.1K
R609 5.1K
R587 5.1K
R595 5.1K
R74 5.1K
RN500 10K
1234
5
6789
10
R589 5.1K
J15
1
2
3
R601 5.1K
SW8
SW
DIP
-8
12345678
16
15
14
13
12
11
10
9
R599 5.1K
R610 5.1K
R591 5.1K
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
JTAG and Cortex Connectors
From www.keil.com/coresight/connectors.asp
(VCC)
(nTRST)
(TDI)
(TMS)
(TCLK)
(RTCK)
(TDO)
(nSRST)
(NC)
(NC)
(VCC - OptionalJTAG Unit Power)
(GND)
(GND)
(GND)
(GND)
(GND)
(GND)
(GND)
(GND)
(GND)
(nSRST)
(TDI)
(TMS)
(TCLK)
(TDO)
(KEY)
(GND)
(GND)
(VCC)
Pin 9 (GNDDetect) may be optionally used by target system to detect debugger is present.
From www.keil.com/coresight/connectors.asp
ARM Standard (legacy) JTAG (20-pin)
ARM Cortex (10-pin)
Layout note: pin 7 of P16must be physically removed- used as polarization key.
(0603 1%)
(0603 1%)
Note: Modifications from Rev.D 27419: - ARM ETM connector removed.
JTAG-RSTx
3V3_SR_P11_1 3V3_SR_P11_2
JTDIJTMSJTCLK
JTDO
nTRST-JTAG
RTCK-JTAG
3v3_SR_P10_1 JTMSJTCLKJTDOJTDIJTAG-RSTx
GND
GND
3V3_SR
3V3_SR
JTDO5,17
JTCLK5,17JTMS5,17JTDI5
JTAG-RSTx6
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
JTAG and Cortex Connectors
8 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
JTAG and Cortex Connectors
8 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
JTAG and Cortex Connectors
8 25
___ ___X
R545100
R55010K
P15
HDR2X10
1 23 4
657 89 10
11 1213 1415 1617 1819 20
R55310KDNP
P16
FTSH-105-01-L-DV
1 23 4
657 89 10
R5440DNP
R55710K
TPV18
R55810KDNP
R55610KDNP
R55510KDNP
TPV7
R32100
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAN, LIN, and SCI Interfaces
(CANA-RX)
VCC - Supply voltage from 4.5V to 5.5V (with undervoltage detection kicking in between 3.5V and 4.5V.
VI/O - Determines the signal level on MCU TX and RX pims and can range from 2.8V to 5.5V.
S - Enables Silent mode (Listen Only) when High.
Enables LIN Transceiver and sets VIH/VOH for 3.3V.
(TXD_0)
(RXD_0)
LIN MolexConnector
Master Mode Pull-Up
(0402 16V)
(0402 16V)
(040216V)
(040216V)
(CANA-TX)
(LIN-EN)
(SCI2_TX)
(SCI2_RX)
Note: Modifications from Rev.D 27419:- SCI_0 is now used for Bluetooth and SCI_2 for RS-232.
(0603 1%)
LINx Physical Interface
SCI Physical Interface
CANx Physical Interface
(0402 16V)
(0402 16V)
(0402 16V)
(0402 16V)
Default:Populated
Layout note:place J16 andJ17 side by side.
Label "SCI"
Label "LIN"
Label "SCI"
Label "LIN"
Default:Removed
Default:Removed
Default: 1-2
Default: 1-2
Default:Removed
CAN-S
LIN-RX
LIN-TXLIN-LIN
C2-
SCI-RX
V+V-
RS232A-RX
C1+
C2+C1-
RS232A-TX
SCI-TX
SCI-TX
SCI-RX
LIN-RX
LIN-TX
CAN-CANH
CAN-CANL
LIN-VSUP
GND
GND
GND
GNDGND
GNDGND
GND
GNDGND
GNDGND
5V0_SR3V3_SR
3V3_SR
3V3_SR
GND
P12V
P12V
CAN0_TX5
FB_AD235
CAN0_RX5
FB_AD225
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
CAN, LIN, and SCI Interfaces
9 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
CAN, LIN, and SCI Interfaces
9 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
CAN, LIN, and SCI Interfaces
9 25
___ ___X
P23
HDR_1X2
12
C6330.1UF
C1040.1UF
R79 1K
C970.1UF
P25
CON PLUG 4
1234
P27
HDR_1X4
1234
C980.1UF
DD8BAV99
1
3
2
C1020.1UF
C6350.1UF
TPV32
P26
DB9
594837261
M2
M1
C6340.1UF
U10
TR3221
MAX3221ECAE+
V+3
C1+2
C1-4
EN1
FORCEOFF16
VCC15
GND14
V-7
C2+5
C2-6
T1OUT13
R1IN8
T1IN11
R1OUT9
INVALID10
FORCEON12
U9
MC33661PEF
RXD1
EN2
WAKE3
TXD4
GND5LIN6VSUP7INH8
J17
1
2
3
P21
HDR_1X2
12
C6320.1UF
R91120 OHM
R6195.1K
P24
HDR_1X2
12
J16
1
2
3
U512
TJA1051T/3
TXD1
GN
D2
VC
C3
RXD4
VIO
5
CANL6
CANH7
S8
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAC (Ethernet) Connections
(ENET_RST_B)
8-bit I2C address:- 0xD1 for Read,- 0xD0 for Write.
Reset pulled low to hold PHY in reset and its TXpins into Hi-Z until activelyreleased by MCU via GPIO(DNP since main option ishaving it on ENET card).
Critical for RCON operation.
Note: Modifications from Rev.D 27419:- On-board PHY replaced with standard ENET board-to-board connector,- PHY reset changed from SCI0_RTS (now used by Bluetooth) to FB_AD[21] (SCI2_RTS),- Vybrid's TRACED2 pin now used as IO for ENET_CARD_DET_B (after ARM ETM connector got removed).
Layout note: all bus and clock traces 50-ohm.
(I2C_SCL_ENET_ID)
(I2C_SDA_ENET_ID)
(ENET_MDC)
(ENET_MDIO)
(ENET_CARD_DET_B)
(RMII_REF_CLK)
Board-to-Board MAC (Ethernet) Connector (Standard)
MII0_RX_COL
5V_OPTIONAL
ENET_INT_B
MII0_TXC
WOL_INT_BMII0_TX_ER
P3V3_ENET
MII0_RX_CRS
MII0_RXC
MII0_RXD2MII0_RXD3
MII0_TXD2MII0_TXD3
GND GND
GND
3V3_SR
3V3_SR
5V0_SR
3V3_SR
RMII0_MDIO 5,7RMII0_MDC 5,7
MLB_I2C3_SCL 5,17,23MLB_I2C3_SDA 5,17,23
RMII_CLKOUT 5
RMII0_TXD05RMII0_TXD15
FB_AD21 5
RMII0_TXEN5
RMII0_CRS_DV5,7
RMII0_RXD05RMII0_RXD15
VIU_PIX_CLK 5,22
RMII0_RXER5
ENET_CARD_DET_B5
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
MAC (Ethernet) Connections
10 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
MAC (Ethernet) Connections
10 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
MAC (Ethernet) Connections
10 25
___ ___X
SH13SOLDER SHORTSH0805_40
R37 0DNP TP39
R2710KDNP
TP36
TP25
TP31
TP24
J10
QSH-030-01-L-D-A-K-TR
1 23 45 67 89 10
11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 60
SH1 SH2
SH3 SH4
TP23
TP37
TP32
TP28
R411.5K
TP35
R40 0DNP
R361.5KDNP
R351.5K
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB Interfaces
(040216v)
(0402 50V)
Layout note:Use wide traces for:- USB power (5V0_SR, USB_SW_OUTA, USB_SW_OUTB, USB0_OUT, and USB1_OUT),- ESD protection.
Place USB-signal ferrite beads adjacent to their USB connectors.
(0603 10V)
(0603 10V)
Default state: 5V OFF --->on OTG micro-AB connector
<-- Default state: 5V ON on Type A Host connector
(0603 1%)
Standard Type A (Host) connector
USB OTG Micro AB
(0805 16V)
Note: Modifications from Rev.D 27419:- P9 and P1 swapped to make USB0 used forserial boot mode (OTG Micro AB connector needed),- configuration made similar to standardized one,- 1000pF replaced with 1500pF for unification,- ESD protection scheme modified,- ferrite bead added into USB signal lines (for EMI compliance),- ferrite bead types optimized.
(0402 50V)
(0603 1%)
(0402 50V)
(0402 50V)
USB OTG Micro ABStandard Type A (Host) connector
ESD Protection
USB0_OUT
FLGB
USB_SW_OUTB
USB1_VBUS_A_EN
USB_SW_OUTA
USB1_OUT
USB1_VBUS_OC
USB0_ID
USB1_DNUSB1_DP USB0_DNUSB0_DP
USB0_ID_AB
USB0_OUTUSB1_OUT
ESD_3.3V
USB0_ID_AB
GND
GND
GND
GND
GND
GND
GNDGND
GND
GND
3V3_SR5V0_SR
GND
GND
GND
GND
USB0_DP5
USB1_DN5
USB0_DN5
USB1_DP5
USB1_VBUS_DETECT4,5
USB0_VBUS_DETECT4,5
SDHC1_CMD5,14,23
USB0_VBUS_OC5
USB0_VBUS_EN5
SDHC1_CLK5,14,23
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
USB Interfaces
11 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
USB Interfaces
11 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
USB Interfaces
11 25
___ ___X
SH2SH0805_40
DD503BAV99
1
3
2
FB3120 OHM
1 2
C11500pF
C24.7uF
DNP
R521100SH4
SH0805_40
TZ2ESD5V0D9-TP
AC
R52610KDNP
R584 0DNP
R310K
R1100KDNP
C533
1500pF
R500100
DD500BAV99
1
3
2
TZ
500
ES
D3V
3D
9-T
P
AC
DD502BAV99
1
3
2
C200.1UF
C31500pF
DD501BAV99
1
3
2
DD1BAV99 DNP
1
3
2
V D- D+ G
USB_TYPE_A_FEMALE
P1
S1
A1A2A3A4
S2C500
1500pF
R410K
R580 0DNP
U3
MIC2026-1YM
ENA1
FLGA2
FLGB3
ENB4
OUTB5
GND6
IN7
OUTA8
TPV1
FB2
120 OHM
DNP1 2
C64.7uF
C29100UF
R510K
TZ1ESD5V0D9-TP
AC
R52710KDNP
FB1120 OHM
1 2
P9USB AB 5
VBUS1
D-2
D+3
ID4
GND5
SH
ELL1
6
SH
ELL2
7S
HE
LL3
8
SH
ELL4
9
R610K
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Layout note:Place as close as possible to DDR power pins.
DDR3 MCU Connections and Memory
(0402 16v)
(0402 16v)
(0402 16v)(0402 16v)
(0402 16V)
(Resistorneeded forpower-upcondition)
0.75V Reference
(0402 16V)
Clock Termination
(0805 16V)
(0805 16V)
Note: Modifications from Rev.D 27419:- In 0.75V Reference circuit 240 1% instead of 470 5% (precision improvement and BOM consolidation),- pull-up added on DDR_RST line to support DDR3 Self-Refresh when Vybrid in LPSTOP modes.
Layout note:Place DDR CLK termination resistor close to DDR3 chip.
DDR_BA1DDR_BA1DDR_BA0DDR_BA0
DDR_BA2DDR_BA2
DDR_A5
DDR_A10
DDR_A6DDR_A7DDR_A8DDR_A9
DDR_A11DDR_A12
DDR_A0DDR_A1DDR_A2DDR_A3DDR_A4
DDR_A[0..13]
DDR_D5
DDR_D10
DDR_D6DDR_D7DDR_D8DDR_D9
DDR_D15
DDR_D11DDR_D12DDR_D13DDR_D14
DDR_D0DDR_D1DDR_D2DDR_D3DDR_D4
DDR_D[0..15]
DDR_CS_bDDR_CS_bDDR_RAS_bDDR_RAS_bDDR_CAS_bDDR_CAS_bDDR_WE_bDDR_WE_b
DDR_CLKDDR_CLKDDR_CLKbDDR_CLKbDDR_CKE
DDR_RST
MCU_ZQ DDR_ZQDDR_ODTDDR_ODT
DDR_DQM0DDR_DQM0DDR_DQM1DDR_DQM1
DDR_VrefDDR_Vref
DDR_DQS1_b
DDR_DQS1_b
DDR_DQS1
DDR_DQS1DDR_DQS0_b
DDR_DQS0_bDDR_DQS0
DDR_DQS0
DDR_Vref
DDR_CKE
DDR_A14DDR_A15
DDR_A5
DDR_A10
DDR_A6DDR_A7DDR_A8DDR_A9
DDR_A11DDR_A12
DDR_A0DDR_A1DDR_A2DDR_A3DDR_A4
DDR_A13
DDR_D5
DDR_D10
DDR_D6DDR_D7DDR_D8DDR_D9
DDR_D15
DDR_D11DDR_D12DDR_D13DDR_D14
DDR_D0DDR_D1DDR_D2DDR_D3DDR_D4
DDR_CLK
DDR_CLKb
DDR_RST
GND
GNDGND
GNDGND
GNDGNDGND
GND
VCC_1V5
VCC_1V5
VCC_1V5
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
DDR3 MCU Connections and Memory
12 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
DDR3 MCU Connections and Memory
12 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
DDR3 MCU Connections and Memory
12 25
___ ___X
TPV17
C6100.22uF
R564 240 1%
C6120.22uF
C6130.22uF
R5612400603_CC
1%
R566
100
C6090.22uF
C6140.22uF
C6234.7uF
C5960.1UF
TPV19
R559 240 1%
C6210.22uF
C6250.22uF
Vybrid 364 BGA
Package 3of4 DDR Interface
U5C
SVF522R3K1CMK4
DDR_D15D2DDR_D14H2DDR_D13C1DDR_D12G1DDR_D11E2DDR_D10H1DDR_D9D1DDR_D8J1DDR_D7G3DDR_D6C3DDR_D5J3DDR_D4F3DDR_D3G4DDR_D2D4DDR_D1H3DDR_D0F4
DDR_BA2D8DDR_BA1C9DDR_BA0C8
DDR_CASB4
DDR_CKE0A5
DDR_CLK0A2
DDR_CLK0B2
DDR_CS0C5
DDR_DQS1E1
DDR_DQS0D3
DDR_DQS1F1
DDR_DQS0E3
DDR_RASA4
DDR_WEC6
DDR_ODT0C4
DDR_ODT1B1
DDR_VREFG5
DDR_ZQA3
DDR_RESETD6
DDR_A15B10DDR_A14D9DDR_A13A10DDR_A12C10DDR_A11D10DDR_A10D7DDR_A9B9DDR_A8A11DDR_A7A7DDR_A6A9DDR_A5B6DDR_A4A6DDR_A3B7DDR_A2A8DDR_A1C11DDR_A0C7
DDR_DQM1G2DDR_DQM0J4
C6070.1UF
R56210K
C6200.22uF
C6190.22uF
TPV20
C6170.22uF
C6260.22uF
C6060.1UF
DNP
C6220.22uF
C6240.1UF
R5602400603_CC
1%
1G_DDR3_SDRAM_64MX16 MT41J64M16LA-15E
U6
MT41J64M16JT-15E AAT
A0N3
A1P7
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
BA0M2
BA1N8
BA2M3
VD
D1
B2
VD
D2
D9
VD
D3
G7
VD
D4
K2
VD
D5
K8
VD
D6
N1
VD
D7
N9
VD
D8
R1
VD
D9
R9
VD
DQ
1A
1
VD
DQ
2A
8
VD
DQ
3C
1
VD
DQ
4C
9
VS
S1
A9
VS
S2
B3
VS
S3
E1
VS
S4
G8
VS
S5
J2
VS
S6
J8
VS
S7
M1
VS
S8
M9
VS
S9
P1
VS
S10
P9
VS
S11
T1
VS
S12
T9
VS
SQ
1B
1
VS
SQ
2B
9
VS
SQ
3D
1
VS
SQ
4D
8
VS
SQ
5E
2
NC_L1L1
NC_L9L9
NC_M7M7
NC_T7T7
DQ0E3
DQ1F7
DQ2F2
DQ3F8
DQ4H3
DQ5H8
DQ6G2
DQ7H7
A10/APL7
A11R7
A12/BCN7
LDQSF3
LDQSG3
UDQSC7
UDQSB7
DQ8D7
DQ9C3
DQ10C8
DQ11C2
DQ12A7
DQ13A2
DQ14B8
DQ15A3
VD
DQ
5D
2
VD
DQ
6E
9
VD
DQ
7F
1
VD
DQ
8H
2
VD
DQ
9H
9V
SS
Q6
E8
VS
SQ
7F
9
VS
SQ
8G
1
VS
SQ
9G
9
NC_T3T3
NC_J9J9NC_J1J1CK
J7
CKK7
CKEK9
CSL2
RASJ3
CASK3
WEL3
RESETT2
ODTK1
VREFCAM8
VREFDQH1
ZQL8
LDME7
UDMD3
R56310K
C6160.22uF
C6084.7uF
C6110.22uF
C6180.22uF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
QuadSPI Flash
(QSPI1_A_DQS)
(QSPI1_A_DATA0)
(QSPI1_A_DATA1)
(QSPI1_A_DATA2)
(QSPI1_A_DATA3)
DQSx signal not used on SPANSION Flash, so may be used for GPIO in this instance.
Flash size 32MB, Sector size 64KB.
(0402 16v)
Flash devices have internal pull-up on CS line, so no need for external pull resistors.
(QSPI1_A_CS0)
QSPI0 - Flash A
QSPI0 - Flash B
QSPI1 - Flash C
Do if RCON operationproblems (Flash C - FTM0CH0 & FTM0CH1)
(0805 16V)
(0805 16V)
(0805 16V)
(0402 16v)
(0402 16v)
QSPI0_B_DATA0
QSPI0_B_CS0
QSPI0_B_DATA1QSPI0_B_DATA2QSPI0_B_DATA3
QSPI0_B_SCK
QSPI0_A_CS0
QSPI0_A_DATA1
QSPI0_A_SCK
QSPI0_A_DATA2QSPI0_A_DATA3
QSPI0_A_DATA0
FTM0CH3FTM0CH2FTM0CH1
FTM0CH4
DQS0
DQS1
DQS2
FTM0CH5
QSPI_RST
QSPI_RST
QSPI_RST
QSPI1_A_SCKFTM0CH0
GND
GND
GND
GND
GND
GND
GND
3V3_SR
3V3_SR
3V3_SR
3V3_SR
QSPI0_A_CS05
QSPI0_B_CS05QSPI0_B_SCK5
QUADSPI_RST_B(IO4)6
QSPI0_A_SCK5
QSPI1_SCK5
QSPI0_A_DQS5,18
QSPI0_B_DQS5,18
QSPI0_B_DATA[0..3]5
QSPI0_A_DATA[0..3]5
FTM0CH[0..7]5,7,18,20
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
QuadSPI Flash
13 25
___ ___XDrawing Title:
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B
Thursday, November 20, 2014
QuadSPI Flash
13 25
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B
Thursday, November 20, 2014
QuadSPI Flash
13 25
___ ___X
C230.1UF
C240.1UF
SH505SH0805_40
R16 0 DNP
C210.1UFU509
S25FL256SDPMFV011
HOLD/IO31
VC
C2
CS7
WP/IO29
VS
S10
NC13
VIO/RFU14
SCK16
DNU14
DNU25
DNU311
DNU412
SO/IO18 SI/IO0
15
RFU6
RESET/RFU3SH10
SH0805_40
U507
S25FL256SDPMFV011
HOLD/IO31
VC
C2
CS7
WP/IO29
VS
S10
NC13
VIO/RFU14
SCK16
DNU14
DNU25
DNU311
DNU412
SO/IO18 SI/IO0
15
RFU6
RESET/RFU3
U508
S25FL256SDPMFV011
HOLD/IO31
VC
C2
CS7
WP/IO29
VS
S10
NC13
VIO/RFU14
SCK16
DNU14
DNU25
DNU311
DNU412
SO/IO18 SI/IO0
15
RFU6
RESET/RFU3
R1110KDNP
R155.1K
R13 0 DNP
R14 0 DNP
C2610UF
C2810UF
C2710UF
SH509SH0805_40
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SD Card Slot
Note: Modifications from Rev.D 27419:- SD socket changed to type with card detection switch, routed to pin FB_AD[20],- Series 20-Ohm in SDHC1_CLK line deleted.
Amphenol 101-00565-64 SD / MMC socket with card detection switch.
(SDHC1_CLK)
(SDHC1_CMD)
(SDHC1_DATA0)
(SDHC1_DATA1)
(SDHC1_DATA2)
(SDHC1_DATA3)
(0402 16v)
(SCI2_CTS but used as GPIO)
(0805 16V)
SD_DETECT_B
SDHC1_CMD
SDHC1_DATA2SDHC1_DATA1
SDHC1_CLK
SDHC1_DATA3
SDHC1_DATA0
SDHC1_A_CLKSDHC1_A_CMD
GND
GND
GND
3V3_SR
FB_AD205,23
SDHC1_DATA05,23SDHC1_DATA15,23SDHC1_DATA25,23SDHC1_DATA35,23
SDHC1_CLK5,11,23SDHC1_CMD5,11,23
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Thursday, November 20, 2014
SD Card Slot
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Thursday, November 20, 2014
SD Card Slot
14 25
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B
Thursday, November 20, 2014
SD Card Slot
14 25
___ ___X
C6310.1UF
C63010UF
SH516SH0805_40
SH513SH0805_40
R57910KDNP
R58210KDNP
R7610KDNP
P500
MMC_SD_CARD
WP_SW1
CD_SW2
DAT13 DAT04
DAT75
GND/VSS26DAT6
7
CLK8
VCC/VDD9
VSS110DAT5
11
CMD12
DAT413 DAT314 DAT215
GND1S1
GND2S2
GND3S3
GND4S4
R61710K
R7810KDNP
R6710KDNP
SH512SH0805_40
R6910K DNP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Video ADC (VADC) Inputs
75 OhmImpedenceMatching
75 OhmImpedenceMatching
75 OhmImpedenceMatching
75 OhmImpedenceMatching
Note: Modifications from Rev.D 27419:- for 75-Ohm impedence matching, changed to series "Short" (was 36R resistor) with 75R pull-down (was 39R),- 3.3V unidirectonal TVSs instead of 30V bidir. ones,- series 0.1uF instead of 47nF (value unification).
(0402 16V)
(0402 16V)
(0402 16V)
(0402 16V)
Video In 0
Video In 1
Video In 2
Video In 3
RCA Connectors
VADCSE0
VADCSE1
VADCSE2
VADCSE3
GND GND
GND GND
GND GND
GND GND
VADCSE[0..3] 5
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Thursday, November 20, 2014
Video ADC (VADC) Inputs
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Thursday, November 20, 2014
Video ADC (VADC) Inputs
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Thursday, November 20, 2014
Video ADC (VADC) Inputs
15 25
___ ___X
SH502SH0805_40
R51375
P2
RCJ-014
2
1_11_21_3
TZ
503
ES
D3V
3D
9-T
P
AC
C5230.1UF
C5270.1UF
SH503SH0805_40
P3
RCJ-014
2
1_11_21_3
P4
RCJ-014
2
1_11_21_3
P5
RCJ-014
2
1_11_21_3
C5240.1UF
C5280.1UF
R51275
TZ
504
ES
D3V
3D
9-T
P
AC
R51475
TZ
501
ES
D3V
3D
9-T
P
AC
SH500SH0805_40
R51575
SH501SH0805_40
TZ
502
ES
D3V
3D
9-T
P
AC
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DCU Interface
0
1
3
21 & 2 Require ADC input plusability to drive HIGH
0 & 3 Need ability to driveHIGH or LOW
(ADC1SE5)
(GPIO)
(I2C1_SDA)
(I2C1_SCL)
(ADC1SE7)
(BOOTMOD[0])
(BOOTMOD[1])
24-bit DCU Daughtercard Connector (Standard)
Prevent resistive touch panel from being touched while booting up.Critical for RCON operation (I/Os shared).
Note: Modifications from Rev.D 27419:- Universal DCU daughter-card connector used,- Vybrid's TRACED4 pin used as optional RESET_B.
I2C Input (alternative)
Routed to RCONPull-Up / -Down
To read resitive touch panel:
(GPIO)
Reset pulled low to hold connected device in reset and its TX pins(if relevant) into Hi-Z until actively released by MCU via GPIO.Critical for RCON operation of shared DCU lines.
Layout note: all DCU traces 50-ohm.
(RESET_B)
(DISP_CLOCKIN)
(DISP_TOP)
(DISP_BOTTOM)
(DISP_LEFT)
(DISP_RIGHT)
(DISP_VSYNC)
(DISP_BRIGHTN.)
(DISP_HSYNC)
(DISP_DRDY)
Bus speed ~35MHz max.
External reset:- Valid for HDMI card,- Invalid for MX51 LCD panel.
(DISP_DAT1)
(DISP_DAT2)
(DISP_DAT3)
(DISP_DAT4)
(DISP_DAT5)
(DISP_DAT6)
(DISP_DAT7)
(DISP_DAT8)
(DISP_DAT9)
(DISP_DAT10)
(DISP_DAT11)
(DISP_DAT12)
(DISP_DAT13)
(DISP_DAT14)
(DISP_DAT15)
(DISP_DAT0)
(DISP_DAT16)
(DISP_DAT17)
(DISP_DAT18)
(DISP_DAT19)
(DISP_DAT20)
(DISP_DAT21)
(DISP_DAT22)
(DISP_DAT23)
(HDMI_I2C_SDA)
(HDMI_I2C_SCLK)
(SPDIF_OUT)
Label "DVI_DET_L"
Label "DVI_DET_H"
(0603 5%)
(0603 35mcd)
(0603 35mcd)
Compatible graphic devices / daughtercards:- HDMI (FSL # MCIMXHDMICARD/ # 26673),- Display (FSL # LCD-WVGA-7IN-1 / # 28239).
Default: 1-2
Default: 1-2
DCU0_B0DCU0_B1DCU0_B2DCU0_B3DCU0_B4DCU0_B5DCU0_B6DCU0_B7
DCU0_G0DCU0_G1DCU0_G2DCU0_G3DCU0_G4DCU0_G5DCU0_G6DCU0_G7
DCU0_R0DCU0_R1DCU0_R2DCU0_R3DCU0_R4DCU0_R5DCU0_R6DCU0_R7
DCU0_VSYNCDCU0_HSYNC
DCU0_DE
DCU0_PCLK
DCU_XR
DCU_YU_J
DCU_XL_J
DCU_YD
CAN1_TX
CAN1_RX
DCU_XL
DCU_YU
DCU0_TAG
DCU0_TAG
DCU0_R2DCU0_R3DCU0_R4DCU0_R5DCU0_R6DCU0_R7
DCU0_G2DCU0_G3DCU0_G4DCU0_G5DCU0_G6DCU0_G7
DCU0_B2DCU0_B3DCU0_B4DCU0_B5DCU0_B6DCU0_B7
DCU0_VSYNC
DCU0_HSYNCDCU0_DE
DCU_XR
DCU0_PCLK
DCU_YUDCU_YDDCU_XL
D_BRIGHT
INT
PWR_EN
DCU0_B4DCU0_B5DCU0_B6DCU0_B7DCU0_G0DCU0_G1DCU0_G2DCU0_G3DCU0_G4DCU0_G5DCU0_G6DCU0_G7
DCU0_B0DCU0_B1DCU0_B2DCU0_B3
DCU0_R0DCU0_R1DCU0_R2DCU0_R3DCU0_R4DCU0_R5DCU0_R6DCU0_R7
DCU_XLDCU_YU
HDMI_SCLKHDMI_SPDIF
HDMI_SD0HDMI_WS
GND
GND
GND
GND
1V8_LR
5V0_SR
5V0_SR
3V3_SR
3V3_SR
3V3_SR
3V3_SR
3V3_SR
5V0_SR
5V0_SR
3V3_SR
CAN1_TX5,6,22
CAN1_RX5,6,22
DCU0_VSYNC7DCU0_HSYNC7
DCU0_R27DCU0_R37DCU0_R47DCU0_R57DCU0_R67DCU0_R77
DCU0_G27DCU0_G37DCU0_G47DCU0_G57DCU0_G67DCU0_G77
DCU0_B27DCU0_B37DCU0_B47DCU0_B57DCU0_B67DCU0_B77
RESET_B5
DCU0_B[0..7] 7
DCU0_G[0..7] 7
DCU0_R[0..7] 7
SAI1_TX_SYNC5,7
SAI1_TX_DATA5,7
RMII1_TXEN5
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Thursday, November 20, 2014
DCU Interface
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Thursday, November 20, 2014
DCU Interface
16 25
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Thursday, November 20, 2014
DCU Interface
16 25
___ ___X
J18
1
2
3
R7110K
R8610K
SH515SH0805_40
SH514
SH0805_40
TP49
R61810K
TP46
R88 0
TPV29
Vybrid 364 BGA
Package 4of4 DCU Pins
U5D
SVF522R3K1CMK4
PTE0/DCU0_HSYNC/DCU0_TCON1/BOOTMOD1N16
PTE1/DCU0_VSYNC/DCU0_TCON2/BOOTMOD0N18
PTE2/DCU0_PCLKN19
PTE3/DCU0_TAG/DCU0_TCON0/ADC0SE5Y15
PTE4/DCU0_DE/DCU0_TCON3N20
PTE5/DCU0_R0T16
PTE6/DCU0_R1W16
PTE7/DCU0_R2/RCON0M20
PTE8/DCU0_R3/RCON1M19
PTE9/DCU0_R4/RCON2M17
PTE10/DCU0_R5/RCON3M16
PTE11/DCU0_R6/RCON4L16
PTE12/DCU0_R7/DSPI1_PCS3/RCON5/LPT_ALT0L17
PTE13/DCU0_G0Y16
PTE14/DCU0_G1W15
PTE15/DCU0_G2/RCON6L18
PTE16/DCU0_G3/RCON7L20
PTE17/DCU0_G4/RCON8K20
PTE18/DCU0_G5/RCON9K19
PTE19/DCU0_G6/RCON10K18
PTE20/DCU0_G7/RCON11/EWM_inA12
PTE21/DCU0_B0V16
PTE22/DCU0_B1W17
PTE23/DCU0_B2/RCON12J17
PTE24/DCU0_B3/RCON13D19
PTE25/DCU0_B4/RCON14C19
PTE26/DCU0_B5/RCON15C20
PTE27/DCU0_B6/RCON16B20
PTE28/DCU0_B7/RCON17/EWM_outK16
TP48
R83 560
TPV33
R90 0
TP47
R7010KDNP
R96 1KDNP
P20
QSH-060-01-L-D-A
1 23 45 67 89 10
11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 60
SH1 SH2
SH3 SH4
SH5 SH6
SH7 SH8
61 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100
101 102103 104105 106107 108109 110111 112113 114115 116117 118119 120
DS8LED_GREEN
DNP
AC
R87 560
J19
1
2
3
DS7LED_GREEN
DNP
AC
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
(12v)
(3.3v)
(3.3v)
(3.3v)
(RSVD)
(RSVD) (SDA)
(INT_B) (SCLK) (I2C3_SCL)
(I2C3_SDA)
(TDO/DINT)
(TCK/DSCL)
(TDI/DSDA)
(TMS)
(MCK_IN)
(RSOUT)
(ERR/BOOT)
(RST)
MOST (MLB) Daughtercard Connections
(PWROFF)
(PS1)
(STATUS)
(PS0)
(RSVD)
(RSVD)(SR0)
(RMCK)
(SX0)
(RSVD)
(RSVD)
(FSY)
(SCK)
(ID2)
(MLBDAT)
(ID1)
(MLBSIG)
(ID3)
(ID4)
(ID0)
(MLBCLK)
(RSVD)
(RSVD)
Debug - Not RQD
Misc. Signals
(CARD INTERRUPTING MCU)
(MLB_PWROFF)
Note: Modifications from Rev.D 27419:- INT line pull-up added,- Series resistor into RST line added.
Compatible with Physical+ Interface Board 'OS81050 / 2+0' by SMSC .
Layout note:Refer to 'OS81050 / 2+0' mechanical data for keepout on board.
MLB_MCKIN
MLB_CLK
MLB_SIG
MLB_DAT
MLB_RSTOUT
FB_AD17
FB_AD16
GND
P12V 3V3_SR3V3_SR 3V3_SR
GND
JTCLK5,8
JTDO5,8
MLB_RST_B(IO3) 6
JTMS5,8
FB_AD[16..31]5,6,9,10,14,18,23MLB_I2C3_SDA 5,10,23MLB_I2C3_SCL 5,10,23
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Thursday, November 20, 2014
MOST (MLB) Daughtercard Connections
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MOST (MLB) Daughtercard Connections
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Thursday, November 20, 2014
MOST (MLB) Daughtercard Connections
17 25
___ ___X
TPV31
R990
R85 0
R8910K
DNP
R970
R82 0
R80 0
R9310K
R630
1.5K
R980
R950
R627 10K
R9210K
R9410K
TPV30
P22
QSH-020-01-L-D-DP-A
13
57
911
1315
1719
2123
2527
2931
3335
3739
24
68
1012
1416
1820
2224
2628
3032
3436
3840
4142
4344
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
User Peripherals, Audio Controls, and GPIOs
ADC Input Potentiometerand Test Point
(Ideally run from linear 3.3V regulator to provide stable input voltage).
(FTM2_QD_PHA)
(FTM2_QD_PHB)
(FTM1_QD_PHA)
(FTM1_QD_PHB)
Incremental Encoders (Volume and Tuning)
Push Buttons for Presets
B3WN-6002 Switches
Header for Analog Accessible GPIOs
Caution:SW3 is also an RCONpin controlled via switches onpage 9. If Pulled high forRCON, this switch will have noeffect.
(0402 16V)
Header for Digital Accessible GPIOs
ADC0SE8
FB_AD18
FB_AD25
FB_AD24
FTM1CH1
FB_AD25
FB_AD31
FB_AD24FB_AD17FB_AD16FB_AD25
FB_AD26 FB_AD29FB_AD30 FB_AD31
ADC0SE9ADC0SE8 ADC1SE8
ADC1SE9DACO0
DACO1
DACO1
FB_AD19
FB_AD29
FB_AD30
FTM0CH5
LVDS0_DPLVDS0_DN
FB_AD[16..31]
SAI0_RX_SYNC
FTM1CH0
GND
GND
GND
GND
GND
GND
GND GND
3V3_SR
GND
GND GND
VCC_3V3_AN
FTM1CH[0..1]5
LVDS0_DP5FTM0CH55,13
LVDS0_DN5
QSPI0_B_DQS5,13QSPI0_A_DQS5,13SAI0_RX_BCLK5
ADC0SE[8..9]5
DACO[0..1]5
FB_AD[16..31]5,6,9,10,14,17,23
ADC1SE[8..9]5
SAI0_RX_SYNC5,7
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Thursday, November 20, 2014
User Peripherals, Audio Controls, and GPIOs
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Thursday, November 20, 2014
User Peripherals, Audio Controls, and GPIOs
18 25
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Thursday, November 20, 2014
User Peripherals, Audio Controls, and GPIOs
18 25
___ ___X
SW5
1 2
SW1
PEC11-4220F-S0012
CHAA
CHBB
COMMONC
GN
D1
S1
GN
D2
S2
11
22
SW2
PEC11-4220F-S0012
CHAA
CHBB
COMMONC
GN
D1
S1
GN
D2
S2
11
22
RV1 2K13
2
P11
HDR_2X4
1 23 4
657 8
P14
HDR_2X8
1 23 4
657 89 10
11 1213 1415 16
SW6
1 2
SW3
1 2
SH7
SH0805_40
TP8DNP
1
SW4
1 2
C17 0.1UF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Audio 1: Line and Microphone Inputs
(AUDIO_MCLK)
(EASI_FST)
(EASI_SCKT)
(ESAI_SDI0)
Layout note: Should have clean GNDs - tips in Datasheet.
Timing inputs from ESAI.
Output to Vybrid or DSP
Attenuation factor of 0.5. 0.5*Vpeak < 1.914V.
(040250V) (0402
50V)
(0402 50V)
(0402 50V)
(0402 16V)
Left Channel ("Low")
(0402 16V)
RightChannel ("High")
(0603 1%)
(0603 1%)
Microphone Input (Right)
AUX IN Connector
Input Filter ADC
Microphone Input (Left)
(0603 25V)
(0603 25V)
(0603 25V)
(0603 25V)
Label "LINE IN"
3.5mm Stereo Jack
Label "AUDIO IN"
Note: Modifications from Rev.D 27419:- Separate AUX_IN_GND created.
(040250V)
(0603 1%)
(0603 1%)
(0603 25V)
Default: 1-2
AUX_IN_R
AUX_IN_LAUX_FILT_L
AUX_FILT_R SDOUT1
FILT+1
VQ1
SAI1_RX_DATA
SAI1_RX_SYNC
SAI1_RX_BCLK
SAI1_RX_DATA
SAI1_RX_SYNC
SAI1_RX_BCLK
GND
GND
GND
GNDGND
GND
3V3_Audio 3V3_Audio
3V3_Audio
GNDAUX_IN_GND
AUX_IN_GND
AUX_IN_GND
AUX_IN_GND
GND
DSPI0_PCS1 5,7,20,21
RMII1_MDIO 5,20,22
RMII1_MDC 5,20,22
SAI1_RX_BCLK5,7
SAI1_RX_SYNC5,7
SAI1_RX_DATA5,7
AUX_IN_DSP 20
RMII1_TXD1 5
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Thursday, November 20, 2014
Audio 1: Line and Microphone Inputs
19 25
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ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Audio 1: Line and Microphone Inputs
19 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Audio 1: Line and Microphone Inputs
19 25
___ ___X
C5390.1UF
J1
1
2
3
R5065.1K
C503 1UF
C5320.1UF
ADMP441ACEZ-RL7
U504
SCK1
SD2
WS3
L/R4
GN
D1
5
GN
D2
6V
DD
7
CHIPEN8
GN
D3
9
C5111UF
C520180pF C514
0.1UF
R52010K
ADMP441ACEZ-RL7
U503
SCK1
SD2
WS3
L/R4
GN
D1
5
GN
D2
6V
DD
7
CHIPEN8
GN
D3
9
R525100K
C5130.1UF
C5311UF
C5081UF
C504180pFR502
5.1K
R505 5.1K
R
L
P6
AUD 4
1
2
3
4
C517 1UF
R524100KDNP
U502
CS5343
FILT+5
VQ7
AINL6
VA
10
LRCK3
SCLK2
GN
D9
SDOUT1
AINR8
MCLK4
SH504SH0805_40
R501 5.1K
C5380.1UF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
(AUDIO_MCLK)
(EASI_FST)
(EASI_SCKT)
(EASI_SDO0)
(EASI_SDO1)
(EASI_SDO2)
(EASI_SDO3)
Audio 2: DSP Inputs from Vybrid
Vybrid DSPESAI_SDO0 ---> DAI1_DATA0ESAI_SDO1 ---> DAI1_DATA1ESAI_SDO2 ---> DAI1_DATA2ESAI_SDO3 ---> DAI1_DATA3AUX_IN ---> DAI2_DATA0ESAI_SCKT ---> DAI1_SCLKESAI_FST ---> DAI1_LRCLKEXT_AUDIO_MCLK <--- XTAL_OUT
AUX_IN ---> DAI2_DATA0
DSPI0_SIN ---> SCP_MISODSPI0_SOUT ---> SCP_MOSIDSPI0_SCK ---> SCP_CLKDSPI0_PCS0 ---> SCP_CSDSPI0_PCS5 ---> MEM_CS
(MCU_MEM_CS)
(DSPI0_PCS5)
(DSPI0_PCS5)
(0402 16V)
(0402 16v)
(0402 16v)
(Both Resistors 0603_CC)
(0402 16V)
(0402 50V)
(D_ACT)
(AUDIO_MCLK)
HS0 (1)
HS1 (0)
HS2 (1/0)
Mode Select HS[3..0]0bx101 - Slave Mode (default)0b1001 - Master Mode
HS3 (1)
Optional Flash DSP Debug Header Label "D_ACT"
(0603 1%)
DSP
(0805 16V)
(0805 16V)
(0805 16V)
Default: 1-2
Default: 1-2
XTOXTI
SCP_CLK
SCP_MISO
SCP_IRQ
HS2
HS3
DBDADBCK
SCP_MOSI
SCP_CS
SCP_BSY
DSP_RST(IO1)SCP_MISOSCP_CLKSCP_IRQSCP_MOSISCP_CSSCP_BSY
SAI1_TX_BCLK
DBDADBCK
SCP_MISO
SCP_MOSI
SCP_CLK
XOUT
SCP_BSY
GND
GND
GND
GND
GND
GND
GNDGND
GND
GND
GND
GND
GND
1V8_LR 3V3_SR
3V3_SR
3V3_SR
3V3_SR
3V3_SR
3V3_SR
3V3_SR
3V3_Audio
DSP_RST_B(IO1)6DSPI0_SCK 5DSPI0_SOUT 5DSPI0_SIN 5DSPI0_PCS0 5,7
RMII1_CRS_DV5RMII1_RXD15RMII1_RXD05RMII1_RXER5
RMII1_MDC5,19,22RMII1_MDIO5,19,22
DSPI0_PCS1 5,7,19,20,21AUX_IN_DSP19
SAI1_TX_BCLK5,7
DSP_DAO_LRCLK 21DSP_DAO_SCLK 21DSP_DAO1_DATA0 21
DSP_DAO1_DATA1 21
FTM0CH6 5FTM0CH7 5
CD_MCLK23
DSPI0_PCS15,7,19,20,21
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Audio 2: DSP
20 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Audio 2: DSP
20 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Audio 2: DSP
20 25
___ ___X
R2110K
R1210K
0603_CC
J31
2
3
R53010K0603_CC
SH
510
SH
0805_40
TP14
C310.1UF
CS48560
U510
TEST1
RESET2
DBDA3
GN
D1
4
DBCK5
DAI1_LRCLK/DAI1_DATA4/DSD56
GN
DIO
17
DAI1_SCLK/DSD-CLK8
GN
D2
9
GPIO16/DAI1_DATA0/TM0/DSD010
GPIO0/DAI1_DATA1/TM1/DSD111
VD
DIO
112
GPIO1/DAI1_DATA2/TM2/DSD213
GPIO2/DAI1_DATA3/TM3/DSD314
GPIO17/DAI2_DATA0/DSD415
VD
D1
16
GPIO14/DAI2_LRCLK17
GPIO15/DAI2_SCLK18
GN
DIO
219
DAO1_DATA0/HS020
DAO_LRCLK21
GN
D3
22
DAO_SCLK23
VD
DIO
224
GPIO18/DAO_MCLK25
GPIO4/DAO1_ DATA2/HS226
GPIO3/DAO1_ DATA1/HS127
VD
D2
28
GPIO5/DAO1_DATA3/XMTA29
GN
DIO
330
GPIO6/DAO2 _DATA0/HS331
GPIO7/DAO2_D ATA1/HS432
GN
D4
33
GPIO9/SCP_MOSI34
GPIO10/SCP_MISO/SDA35
GPIO11/SCP_CLK36
VD
DIO
337
GPIO8/SCP_CS38
GPOI12/SCP_IRQ39
GN
DIO
440
GPIO13/SCP_BSY/EE_CS41
VD
D3
42
XTAL_OUT43
XTI44
XTO45
GN
DA
46
PLL_REF_RES47
VD
DA
_3.3
V48
R103.3K
SH508 SH0805_40
R5360 DNP
C340.1UF
C320.1UF
R53910K
TP11
U2
SST25VF032B-80-4I-S2AF
CE1
SO2
WP3
VSS4
SI5
HOLD7
SCK6
VDD8
R52910K0603_CC
R54010K
C5470.1UF
C2510UF
SH11 SH0805_40SH9 SH0805_40SH8 SH0805_40
R53110K0603_CC
R533 0 DNP
C54933PF
R710K
C300.1UF
R528 10K
C54833PF
P10
HDR2X15
DNP
1 23 4
657 89 10
11 1213 1415 1617 1819 2021 2223 2425 2627 2829 30
R5370 DNP
C3810UF
C420.1UF
SH507 SH0805_40
R53210K0603_CC
TP13
R535 1.0M
C400.1UF
R183.3K
C3910UF
TP15
R534 0
R910K
SH506 SH0805_40
TP12
24.5760MHzY500
12
R5385.1K
J2
1
2
3
R221.5K
C370.1UF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Filter calculated for 20KOhm Impedence of WM9010
(0402 50V)
(0402 16V)
All Resistors 0603_CC
(04026.3V)
(04026.3V)
(04026.3V)
(0402 6.3V)
(0402 16V)(0402 16V)
(0402 16V)
(AUDIO_MCLK)
(AUDIO_MCLK)
(0402 16V)
(0402 6.3V)
(0402 16V)
(04026.3V)
(04026.3V)
(0402 16V)
(0402 16V)
(0402 6.3V)
(040216V)
(0402 50V)
(0402 50V)
DAC
DAC
FILTER
FILTER
Power & GND
Headphone Amplifier and Output Socket
Headphone Amplifier and Output Socket
(0805 16V)
(0805 16V)
(0805 16V)
(0805 16V)
(0805 16V)
(0603 25V)
(0603 25V)
(0603 25V)
(0603 25V)
(0603 25V)
(0603 25V)
3.5mm StereoJack
3.5mm StereoJack
Label "OUT1"
Label "OUT2"
Note: Modifications from Rev.D 27419:- In FILTER circuit 560 and 2700pF instead of 470 and 3300pF (BOM consolidation).
Layout note:- Connect AMP_GND "island" to GND as close to pins 8 of U505 and U506 as possible, with 1 "Short" per IC.
(0402 50V)
(0402 50V)
(0402 50V)
All Resistors 0603_CC
Filter calculated for 20KOhm Impedence of WM9010
Audio 3: DACs & Amplifier Outputs
OUT1_CPCA
OUT1_CPCB
CPVOUTN_OUT1
CPVOUTP_OUT1
OUT1_HPOUTL
OUT1_HPOUTR
AOUTR1_CAP
AOUTL1
AOUTR1
AINL1
AINR1
FILT1
OUT1_ENA
AOUTL1_CAP
AOUTL2_CAP
AOUTR2_CAP
OUT2_ENA
OUT2_CPCA
OUT2_CPCB
CPVOUTN_OUT2
CPVOUTP_OUT2
OUT2_HPOUTL
OUT2_HPOUTRAOUTL2
AOUTR2
AINL2
AINR2
FILT2
GND
GND
GND
GND
GND
AMP_GND
AMP_GND
AMP_GND
AMP_GND
AMP_GND
GND
1V8_Audio
1V8_LR 1V8_Audio
3V3_SR 3V3_Audio
1V8_Audio
3V3_Audio
3V3_Audio
AMP_GND
AMP_GNDAMP_GND
AMP_GND
AMP_GND
AMP_GND
DSP_DAO1_DATA120DSP_DAO_SCLK20,21DSP_DAO_LRCLK20,21
DSPI0_PCS15,7,19,20,21
DSP_DAO_LRCLK20,21DSP_DAO_SCLK20,21DSP_DAO1_DATA020
DSPI0_PCS15,7,19,20,21
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Audio 3: DACs & Amplifier Outputs
21 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Audio 3: DACs & Amplifier Outputs
21 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Audio 3: DACs & Amplifier Outputs
21 25
___ ___XSH3SH0805_40
C5252700PF
C90.1UF
WM9010
U501
INLA1
INRA2
VD
DA
3
GN
DA
4
INREFB1
ENAB2
CPCAB3
CPCBB4
HPOUTLC1
HPOUTRC2
CPVOUTPC3
CPVOUTNC4
WM9010
U500
INLA1
INRA2
VD
DA
3
GN
DA
4
INREFB1
ENAB2
CPCAB3
CPCBB4
HPOUTLC1
HPOUTRC2
CPVOUTPC3
CPVOUTNC4
C510.1UF
C5341UF
TP6
TP1
C5062.2UF
C5052.2UF
R50420
C5262700PF
C54210UF
C502
0.1UF
FB8120 OHM
1 2
R
L
P8
AUD 4
1
2
3
4C5302700PF
C5292700PF
TP2 TP3
TP4
R50320
C5371UF
R
L
P7
AUD 4
1
2
3
4
C5162.2UF
C5090.1UF
C501
0.1UF
C5152.2UF
R519560
C5351UF
C80.1UF
U506
CS4344
SDIN1
DEM/SCLK2
LRCK3
MCLK4
VQ5
FILT+6
AOUTL7
GN
D8
VA
9
AOUTR10
C5361UF
C5180.1UF
C5212.2UF
C5310UF
C54110UF
C54510UF
R518560
R50910K
R51010K
TP5
U505
CS4344
SDIN1
DEM/SCLK2
LRCK3
MCLK4
VQ5
FILT+6
AOUTL7
GN
D8
VA
9
AOUTR10
SH6SH0805_40
C151UF
C141UF
R517560
R50820 1%
SH5SH0805_40
C5122.2UF
C5102.2UF
C5430.1UF
C5190.1UF
C5070.1UF
C5440.1UF
R516560
C5222.2UF
C54610UF
R50720 1%
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
(EASI_FST)(EASI_SCKT)
(ESAI_SDI1)
I2C address 0xC4
Samtec TFM-130-02-S-D-A
(I2C1_SDA)(I2C1_SCL)
RF Tuner Daughtercard Interface
(0402 16V)
(0402 16V)
(0402 16V) (0402 16V)
(0805 16V)
Compatible with "Si476x LNA-Balun Rev4.0" RF tuner daughtercard by Silicon Labs.
DCLK1
TP_P24_41TP_P24_40
TP_IQFS_IBOC1TP_IQCLK_IBOC1
3V3_R153_SR
TP_IOUT_IBOC1
INTB1
DOUT1
TP_P24_44
TP_P24_42
TP_QOUT_IBOC1
TP_P24_39TP_P24_40
TP_P24_41
TP_P24_35
TP_P24_42
TP_P24_38
XOUT1XIN1
TP_P24_43
TP_P24_45
5V0_FB_SR
GND GND
GND GND
GND
3V3_SR
3V3_SR
3V3_SR
3V3_SR
3V3_SR
5V0_SR
3V3_SR
GND
RMII1_MDIO 5,19,20RMII1_MDC5,19,20RMII1_TXD05
CAN1_RX5,6,16TUNER_RST_B(IO2)6
CAN1_TX 5,6,16VIU_PIX_CLK 5,10
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
RF Tuner Daughtercard Interface
22 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
RF Tuner Daughtercard Interface
22 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
RF Tuner Daughtercard Interface
22 25
___ ___X
TP19
P13
CON 2X30 PLUG
2468
1012141618202224262830323436384042444648505254565860
1357911131517192123252729313335373941434547495153555759
R31
10KDNP
XIN1
TP18
C360.1UF
TP33
C700.1UF
TP_IOUT_IBOC1TP_QOUT_IBOC1
TP16
R43 0
C350.1UF
R629
1.5KTP38
XOUT1
C720.1UF
DOUT1
TP_IQCLK_IBOC1TP_IQFS_IBOC1
TP30
FB500120 OHM
1 2
EEPROM_SDA1
TP34 TP29
TP17
DCLK1
C3310UF
EEPROM_SCK1
TP27
R30 0
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Layout note:Place connector close to board edge.
(I2C3_SDA)
(I2C3_SCL)
I2C, CD, and Bluetooth Headers
I2C2_SCL
I2C2_SDA
VCC
Note: Modifications from Rev.D 27419:- SCI0_CTS (TRACE_CTL) now used for Bluetooth SCI.- Bluetooth is now connected to SCI0 rather than SCI2. - Added LCD 4-pin header (I2C3 interface).- Connector for different Bluetooth daughtercard type.
Generic CD Header
I2C (Authentication) Daughtercard Header
4-Pin Header (I2C3)
Vybrid UART defines RTS asinput and CTS as output
(SDHC1_CD)
Bluetooth Daughtercard Header
(compatible with Freescale part number FD-B-TOOTH-DC)
(5V power)
(3.3V power)
MLB_I2C3_SDAMLB_I2C3_SCL
SAI2_RX_DATASAI2_RX_BCLK
SAI2_RX_SYNCCD_MCLK
I2C_RST_AV
FB_AD27
SDHC1_B_CMD
MLB_I2C3_SDAMLB_I2C3_SCL
TP_J60_1
FB_AD28
SDHC1_A_DATA3
SDHC1_A_DATA2SDHC1_A_DATA0
SDHC1_A_DATA1
SDHC1_A_CLK
TP_J62_23TP_J62_25
TP_J62_24TP_J62_26
TP_J62_18
GND GND
GND
GND
GND
3V3_SR
5V0_SR
3V3_SR
3V3_SR
5V0_SR
GND GND
3V3_SR
3V3_SR
GND
GND
CD_RST_B(IO6)6
CD_MCLK20
I2C_RST_B(IO7) 6
FB_AD[16..31]5,6,9,10,14,17,18
SDHC1_CMD 5,11,14SCI0_RTS5
SCI0_TX 5SCI0_RX5
BT_RST_B(IO5)6
SAI0_TX_DATA 5,7
SAI0_TX_BCLK 5
SAI0_TX_SYNC 5,7SAI0_RX_DATA 5
SDHC1_DATA1 5,14SDHC1_DATA3 5,14
SDHC1_DATA0 5,14SDHC1_DATA2 5,14
SDHC1_CLK 5,11,14
FB_AD20 5,14
SCI0_CTS 5
MLB_I2C3_SDA5,10,17MLB_I2C3_SCL5,10,17
SAI2_RX_BCLK5SAI2_RX_DATA5SAI2_RX_SYNC5
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
I2C, CD, and Bluetooth Headers
23 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
I2C, CD, and Bluetooth Headers
23 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
I2C, CD, and Bluetooth Headers
23 25
___ ___X
R6311.5K
R68 0
J5
HDR_2X15_M
1 23 4
657 89 10
11 1213 1415 1617 1819 2021 2223 2425 2627 2829 30
R581 0
TPV8 TPV6
R568 10K
DNP
TPV5TPV3
P19
HDR 2X2
1 23 4
P18
HDR_2X6
1 23 4
657 89 10
11 12
R6391.5K
R72 0
R583 0
R77 0
TPV9
R45 0DNP
R441.5K
R565
10K
R567
10K
P17
CON_2X5
1 23 4
657 89 10
J13
HDR_1X1DNP
1
R578 0
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Appendix 1: Customer EVB Block Diagram
I2C address of MCIMXHDMICARD/ Agile # 26673, SiI9022A-based HDMI card:
MLB1 400kHz
3 Generic CD 400kHz
I2C card (3.3V, 8pin)1 400kHz
2 IOmux (Reset) 0x30 0x31 400kHz
1 400kHz
1 Tuner 0xc4 0xc5 400kHz
Touch Screeen
Most = MLB1 400kHz
3 Ethernet Card 0xD1 0xD2 400kHz
0x40 0x41
I2C Device Write Read SpeedBranch
400kHz1 DCU
Note: Modifications from Rev.D 27419:- I2C1 also used for DCU daughtercard connector.- I2C3 also used for Ethernet daughtercard connector.
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Appendix 1: EVB Block Diagram
24 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Appendix 1: EVB Block Diagram
24 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Appendix 1: EVB Block Diagram
24 25
___ ___X
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Appendix 2: Audio Routing Diagram
Drawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Appendix 1: Audio Routing Diagram
25 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Appendix 1: Audio Routing Diagram
25 25
___ ___XDrawing Title:
Size Document Number Rev
Date: Sheet of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-28141 PDF: SPF-28141 B2
EVB-VF522R3
B
Thursday, November 20, 2014
Appendix 1: Audio Routing Diagram
25 25
___ ___X