vsc-hvdc technology for the connection of offshore windfarms

Factors Affecting the Reliability of VSC-HVDC

for the Connection of Offshore Windfarms

A thesis submitted to The University of Manchester for the degree of

Doctor of Philosophy

in the Faculty of Engineering and Physical Sciences

2014

Antony James Beddard

School of Electrical and Electronic Engineering

Table of Contents

2

Table of Contents

Table of Contents ................................................................................................................. 2

List of Figures ....................................................................................................................... 7

List of Tables ...................................................................................................................... 14

Nomenclature...................................................................................................................... 17

Abstract ............................................................................................................................... 22

Declaration .......................................................................................................................... 23

Copyright Statement .......................................................................................................... 23

Acknowledgements ............................................................................................................. 24

1 Introduction ................................................................................................................. 25

1.1 Background .............................................................................................................. 25

1.2 The Connection of Round 3 Windfarms ................................................................... 25

1.3 Impact Factors on the Connection’s Reliability ...................................................... 27

1.3.1 Availability Analysis ...................................................................................... 28

1.3.2 HVDC Circuit Breakers .................................................................................. 28

1.3.3 Accurate Electromagnetic Transient Models for Radial and MT VSC-HVDC

Connections ....................................................................................................... 28

1.4 Aims and Objectives ................................................................................................. 29

1.5 Main Thesis Contributions ....................................................................................... 30

1.6 Publications .............................................................................................................. 31

1.7 Thesis Structure ........................................................................................................ 32

2 Availability Analysis ................................................................................................... 35

2.1 Radial System ........................................................................................................... 36

2.2 Component Availability ............................................................................................ 38

2.2.1 Converter Reactor ........................................................................................... 41

2.2.2 MMC with Cooling System and Ventilation System ..................................... 42

2.2.3 Control System ............................................................................................... 43

2.2.4 GIS and Transformer ...................................................................................... 43

2.2.5 DC Switchyard ................................................................................................ 45

2.2.6 DC Cable ......................................................................................................... 46

2.3 Radial VSC-HVDC Scheme Availability Analysis ................................................... 47

2.3.1 Offshore System Availability Analysis (subsystem 1) ................................... 47

Table of Contents

3

2.3.2 Onshore System Availability Analysis (subsystem 3) .................................... 50

2.3.3 DC System Availability Analysis (subsystem 2) ............................................ 51

2.3.4 Radial VSC-HVDC Scheme Availability ....................................................... 52

2.4 MT HVDC Network Availability Analysis ................................................................ 54

2.5 Cost-benefit Analysis ................................................................................................ 60

2.6 Summary ................................................................................................................... 63

2.7 Conclusion ................................................................................................................ 63

3 HVDC Protection ........................................................................................................ 65

3.1 Basic Circuit Breaker Theory .................................................................................. 67

3.1.1 The Electric Arc .............................................................................................. 67

3.1.2 Arc Interruption .............................................................................................. 68

3.2 HVDC Circuit Breaker Topologies .......................................................................... 69

3.2.1 Review of HVDC Circuit Breaker Topologies ............................................... 69

3.2.2 Hybrid Commutation HVDC Breaker (New) ................................................. 74

3.2.3 Latest HVDC Circuit Breaker Designs ........................................................... 78

3.3 Comparison of HVDC Circuit Breakers .................................................................. 80

3.4 Protection Strategies ................................................................................................ 81

3.4.1 Protection System Requirements .................................................................... 81

3.4.2 Detection and Selection .................................................................................. 83

3.4.3 Back-up Protection ......................................................................................... 87

3.4.4 Seamless and Robust Protection System ........................................................ 89

3.5 Conclusion ................................................................................................................ 90

4 MMC-HVDC ............................................................................................................... 91

4.1 MMC Structure and Operation ................................................................................ 91

4.2 MMC Parameters ..................................................................................................... 94

4.2.1 Number of MMC Levels ................................................................................. 94

4.2.2 SM Capacitance .............................................................................................. 96

4.2.3 Limb Reactance .............................................................................................. 97

4.2.4 Arm Resistance ............................................................................................... 98

4.3 Onshore AC Network ............................................................................................... 99

4.4 DC system ............................................................................................................... 100

4.4.1 Cable ............................................................................................................. 100

4.4.2 DC Braking Resistor ..................................................................................... 100

Table of Contents

4

4.5 Offshore AC Network ............................................................................................. 101

4.6 Control Systems ...................................................................................................... 102

4.6.1 Control Systems for an MMC Connected to an Active Network ................. 102

4.6.2 dq Current Controller .................................................................................... 103

4.6.3 Outer Controllers .......................................................................................... 112

4.6.4 Tap-Changer Controller ................................................................................ 117

4.6.5 Control System for MMC Connected to a Windfarm ................................... 118

4.6.6 Inner MMC Controllers ................................................................................ 119

4.7 Windfarm Control .................................................................................................. 125

4.8 Conclusion .............................................................................................................. 126

5 MMC-HVDC Link Performance ............................................................................. 127

5.1 Radial MMC-HVDC Link for a Round 3 Windfarm .............................................. 127

5.1.1 Start-up .......................................................................................................... 127

5.1.2 Windfarm Power Variations ......................................................................... 128

5.1.3 MMC ............................................................................................................. 130

5.1.4 Onshore AC Fault Ride-through ................................................................... 133

5.1.5 DC Faults ...................................................................................................... 141

5.2 VSC-HVDC Interconnector .................................................................................... 146

5.2.1 Power Reversal ............................................................................................. 146

5.2.2 AC Faults ...................................................................................................... 146

5.2.3 DC Faults ...................................................................................................... 147

5.3 Variable Limit DC Voltage Controller ................................................................... 151

5.4 Conclusion .............................................................................................................. 152

6 Comparison of MMC Modelling Techniques ......................................................... 153

6.1 MMC Modelling Techniques .................................................................................. 154

6.1.1 Traditional Detailed Model ........................................................................... 154

6.1.2 Detailed Equivalent Model ........................................................................... 154

6.1.3 Accelerated Model ........................................................................................ 159

6.2 Simulation Models .................................................................................................. 160

6.3 Results .................................................................................................................... 160

6.3.1 Accuracy ....................................................................................................... 160

6.3.2 AM Simulation Limitation ............................................................................ 165

6.3.3 Simulation Speed .......................................................................................... 166

Table of Contents

5

6.3.4 Enhanced AM Model .................................................................................... 167

6.4 Analysis and Recommendations ............................................................................. 168

6.5 Conclusion .............................................................................................................. 170

7 HVDC Cable Modelling ........................................................................................... 171

7.1 The Cable ............................................................................................................... 171

7.2 Multi-conductor Analysis ....................................................................................... 174

7.3 HVDC Cable Models .............................................................................................. 176

7.4 System Model .......................................................................................................... 177

7.5 Results .................................................................................................................... 178

7.5.1 Accuracy ....................................................................................................... 178

7.5.2 Simulation Speed .......................................................................................... 180

7.6 Conclusion .............................................................................................................. 180

8 MTDC MMC Modelling ........................................................................................... 182

8.1 MTDC Test Topology ............................................................................................. 182

8.2 MTDC Control Methods ......................................................................................... 184

8.2.1 Centralised DC Slack Bus ............................................................................. 184

8.2.2 Voltage Margin Control ................................................................................ 184

8.2.3 Droop Control ............................................................................................... 185

8.2.4 Control Methods Investigated ....................................................................... 187

8.3 MTDC System Model ............................................................................................. 187

8.3.1 Windfarm Power Variations ......................................................................... 188

8.3.2 Three-phase Line-to-Ground Fault at PCC1 ................................................. 190

8.3.3 Converter Disconnection .............................................................................. 195

8.4 Conclusion .............................................................................................................. 199

9 Conclusion and Future Work .................................................................................. 200

9.1 Conclusion .............................................................................................................. 200

9.1.1 Availability Analysis .................................................................................... 200

9.1.2 HVDC Protection .......................................................................................... 201

9.1.3 VSC-HVDC System Modelling.................................................................... 202

9.2 Future Work ........................................................................................................... 204

9.2.1 Availability Analysis .................................................................................... 204

9.2.2 HVDC Breakers ............................................................................................ 205

Table of Contents

6

9.2.3 MMC Modelling ........................................................................................... 206

10 References .................................................................................................................. 207

APPENDIX 1A – HVDC TRANSMISSION SYSTEMS .............................................. 216

APPENDIX 2A – COMPONENT RELIABILITY INDICES ..................................... 237

APPENDIX 2B – RELIABILITY CONCEPTS AND DEFINITIONS ....................... 252

APPENDIX 2C – MTDC GRID ANALYSIS ................................................................ 256

APPENDIX 3A – HVDC CIRCUIT BREAKER REVIEW ......................................... 260

APPENDIX 4A – SUB-MODULE CAPACITANCE DERIVATION ........................ 268

APPENDIX 4B – ARM INDUCTANCE DERIVATION ............................................. 276

APPENDIX 4C – SHORT-CIRCUIT RATIO CALCULATION ............................... 285

APPENDIX 4D – ABC TO DQ TRANSFORMATION DERIVATION .................... 286

APPENDIX 4E – POWER CONTROLLER TRANSFER FUNCTION

DERIVATION .................................................................................................................. 288

APPENDIX 4F – DC VOLTAGE CONTROLLER TRANSFER FUNCTION

DERIVATION .................................................................................................................. 289

APPENDIX 4G – AC VOLTAGE CONTROL ............................................................. 291

APPENDIX 4H – KEY PARAMETERS FOR THE MMC-HVDC LINK ................. 292

APPENDIX 5A – DC POLE-TO-GROUND FAULT ................................................... 293

APPENDIX 6A – PARAMETERS FOR MMC COMPARISON MODEL ............... 295

APPENDIX 7A – HVDC CABLE PARAMETERS, BONDING AND SENSITIVITY

ANALYSIS ....................................................................................................................... 296

Word count: 53,083 (72,601 with appendix)

List of Figures

7

List of Figures

Figure 1.1: Connection diagram for the UK’s windfarms ................................................... 26

Figure 1.2: Accelerated growth 2030 transmission system scenario – potential connection

diagram, ............................................................................................................. 27

Figure 2.1: 1GW VSC-HVDC point-to-point offshore connection overview diagram ....... 36

Figure 2.2: 1GW point-to-point VSC-HVDC scheme ........................................................ 36

Figure 2.3: VSC-HVDC availability model for a point-to-point link .................................. 37

Figure 2.4: Image of a MMC sub-module ........................................................................... 39

Figure 2.5: Image of a 245kV GIS bay ................................................................................ 40

Figure 2.6: Image of a 150kV, 140MVA transformer and offshore platform ..................... 40

Figure 2.7: Offshore GIS and transformer configuration (Subsystem 4)............................ 44

Figure 2.8: Onshore GIS and transformer configuration (Subsystem 5) ............................. 44

Figure 2.9: Image of a MMC VSC DC Switchyard ............................................................. 46

Figure 2.10: Availability model for offshore system (Subsystem 1) ................................... 48

Figure 2.11: Simplified availability model for offshore system (Subsystem 1) .................. 48

Figure 2.12: Offshore transformers and GIS configuration (Subsystem 4) ......................... 48

Figure 2.13: Availability model of subsystem 2 .................................................................. 52

Figure 2.14: Availability model for the VSC-HVDC scheme ............................................. 52

Figure 2.15: Component importance for availability ........................................................... 53

Figure 2.16: MT HVDC system ........................................................................................... 55

Figure 2.17: Onshore and offshore nodes ............................................................................ 56

Figure 2.18: Block diagram of MTDC network................................................................... 56

Figure 2.19: Simplified two-state block diagram of a MTDC network ............................... 57

Figure 3.1: Single line diagram for a four-terminal HVDC system ..................................... 66

Figure 3.2: Passive resonance circuit breaker ...................................................................... 69

Figure 3.3: Conventional hybrid circuit breaker .................................................................. 71

Figure 3.4: Hybrid breaker with forced commutation circuit ............................................. 73

Figure 3.5: Solid-state circuit breaker .................................................................................. 73

Figure 3.6: Hybrid commutation HVDC circuit breaker ..................................................... 74

Figure 3.7: PSCAD schematic for the hybrid commutation HVDC circuit breaker ............ 77

Figure 3.8: Example simulation results for the hybrid commutation HVDC circuit breaker

........................................................................................................................... 77

Figure 3.9: Proactive hybrid DC breaker ............................................................................. 78

List of Figures

8

Figure 3.10: Hybrid circuit breaking device ........................................................................ 80

Figure 3.11: Single line diagram for a four-terminal HVDC system ................................... 83

Figure 3.12: Cable directional protection............................................................................. 84

Figure 3.13: STFT (left) and Wavelet (right) views of signal analysis ............................... 85

Figure 3.14: DC current direction before (left) and after (right) cable fault ........................ 87

Figure 3.15: Fault on cable C2 ............................................................................................. 87

Figure 3.16: Back-up protection strategies .......................................................................... 89

Figure 4.1: MMC VSC-HVDC link for Round 3 windfarm ................................................ 91

Figure 4.2: Three-phase MMC ............................................................................................. 92

Figure 4.3: SM conduction states ......................................................................................... 92

Figure 4.4: Equivalent circuit for phase A ........................................................................... 93

Figure 4.5: Onshore AC system ......................................................................................... 100

Figure 4.6: DC braking resistor .......................................................................................... 100

Figure 4.7: Simplified diagram of a full scale converter wind turbine .............................. 101

Figure 4.8: Representation of the offshore network........................................................... 102

Figure 4.9: MMC control system basic overview .............................................................. 103

Figure 4.10: MMC phase A connection to AC system ...................................................... 103

Figure 4.11: Equivalent dq circuit diagrams ...................................................................... 104

Figure 4.12: State-block diagram for system plant in dq reference frame ......................... 105

Figure 4.13: State-block diagram with feedback nulling ................................................... 105

Figure 4.14: Decoupled d and q current control loops ....................................................... 105

Figure 4.15: d-axis current loop without d-axis system voltage disturbance ..................... 106

Figure 4.16: Simplified d-axis current control loop ........................................................... 106

Figure 4.17: Current controller step response for a bandwidth of 80Hz ............................ 108

Figure 4.18: Current controller step response for a bandwidth of 160Hz .......................... 109

Figure 4.19: Current controller step response for a bandwidth of 320Hz .......................... 109

Figure 4.20: Current controller step response for a bandwidth of 320Hz with tap-changer

ratio increased ................................................................................................. 110

Figure 4.21: Current controller step response for a bandwidth of 320Hz with increased SM

capacitance ...................................................................................................... 111

Figure 4.22: dq current controller implementation ............................................................ 111

Figure 4.23: System response for a 10% change in active power ...................................... 113

Figure 4.24: System response for a 10% change in reactive power................................... 113

List of Figures

9

Figure 4.25: DC side plant ................................................................................................. 114

Figure 4.26: System response for a 1kV step change about the operating point, Kv=0.5 .. 115

Figure 4.27: System response for a ramped injected noise current of 1.6kA in 1 second . 115

Figure 4.28: MMC phase A connection to the AC network with the system resistances

neglected.......................................................................................................... 115

Figure 4.29: System response for weak AC network with reactive power set to zero ...... 117

Figure 4.30: System response for weak AC network with AC voltage control ................. 117

Figure 4.31: MMC output voltage THD when exporting 300MVAr with no tap-changer 118

Figure 4.32: MMC output voltage THD when exporting 300MVAr with tap-changer .... 118

Figure 4.33: Implementation of the AC voltage controller for the offshore network ........ 119

Figure 4.34: Equivalent circuit for a single phase of a MMC ............................................ 119

Figure 4.35: CCSC plant state-block diagram ................................................................... 121

Figure 4.36: CCSC response to active power ramped at 1GW/s for 1s starting at 2s with a

BW of 10Hz .................................................................................................... 122

Figure 4.37: CCSC response to active power ramped at 1GW/s for 1s starting at 2s with a

BW of 30Hz .................................................................................................... 122

Figure 4.38: Block diagram of CCSC implementation ...................................................... 122

Figure 4.39: Simplified diagram of the capacitor balancing controller ............................. 124

Figure 4.40: NLC block diagram ....................................................................................... 124

Figure 4.41: Block diagram for the windfarm power controller ........................................ 125

Figure 4.42: Implementation of the windfarm power controller ........................................ 125

Figure 5.1: MMC VSC-HVDC link for a Round 3 windfarm ........................................... 127

Figure 5.2: Start-up procedure; capacitor voltages are for the upper arm of phase A for

MMC1 ............................................................................................................. 128

Figure 5.3: Link response to variations in windfarm power .............................................. 129

Figure 5.4: Link response at steady-state for Pw =1GW .................................................... 130

Figure 5.5: THD for the line-to-line voltages at PCC1 for Pw = 1GW .............................. 130

Figure 5.6: Phase voltages, arm currents and difference currents for onshore MMC with Pw

=1GW .............................................................................................................. 131

Figure 5.7: Phase voltages, arm currents and difference currents for onshore MMC with Pw

=1GW and CCSC disabled .............................................................................. 131

Figure 5.8: Rms value of the upper arm current for phase A with Pw=1GW and CCSC

enabled ............................................................................................................ 132

List of Figures

10

Figure 5.9: Rms value of the upper arm current for phase A with Pw=1GW and CCSC

disabled............................................................................................................ 132

Figure 5.10: THD for the line-to-line voltages at PCC1 for Pw = 1GW and CCSC disabled

......................................................................................................................... 132

Figure 5.11: SM capacitor ripple voltages for the upper arm of phase A with Pw=1GW .. 133

Figure 5.12: SM capacitor ripple voltages for the upper arm of phase A with Pw=1GW and

CCSC disabled ................................................................................................ 133

Figure 5.13: Supergrid voltage dip to 0.3p.u. with no MMC reactive current support...... 137

Figure 5.14: Supergrid voltage dip to 0.3p.u. with MMC reactive current support........... 138

Figure 5.15: Phase A to ground fault at 3s and phase A to phase B fault at 4s ................. 139

Figure 5.16: Three-phase to ground fault at 3s .................................................................. 140

Figure 5.17: DC line-to-line fault at the terminals of MMC1 at 3s ................................... 143

Figure 5.18: Positive pole-to-ground fault at MMC1 ........................................................ 144

Figure 5.19: Positive pole-to-ground fault at MMC1 with under voltage protection ........ 145

Figure 5.20: MMC VSC-HVDC interconnector ................................................................ 146

Figure 5.21: System response for a wide range of active and reactive power orders ........ 148

Figure 5.22: Three-phase fault for 140ms at 3s ................................................................. 149

Figure 5.23: DC line-to-ground fault ................................................................................. 150

Figure 5.24: Comparison of active power response for a 140ms three-phase AC fault using

fixed and variable limits .................................................................................. 151

Figure 6.1: SM circuit (left) SM equivalent circuit (right) ................................................ 156

Figure 6.2: String of SM Thevenin equivalent circuits (left) Converter arm Thevenin

equivalent circuit (right) .................................................................................. 158

Figure 6.3: PSCAD half-bridge MMC arm component ..................................................... 158

Figure 6.4: Implementation steps for the accelerated model ............................................. 159

Figure 6.5: Basic simulation model structure .................................................................... 160

Figure 6.6: Steady-state simulation results for the three models ....................................... 161

Figure 6.7: DC line-to-line fault applied at 4.5s ................................................................ 163

Figure 6.8: Line-to-ground fault for phase A applied at 4.5s............................................. 164

Figure 6.9: Phase A output voltage for the three models when the converter is blocked at

3s. .................................................................................................................... 165

Figure 6.10: Blocked SM test circuit ................................................................................. 165

Figure 6.11: Implementation of blocked SM test circuit based on AM principles ............ 166

List of Figures

11

Figure 6.12: Simulation times of the three models for different MMC levels. .................. 167

Figure 6.13: Line-to-ground fault for phase A applied at 4.5s for the TDM, AM and AM30

models. ............................................................................................................ 168

Figure 7.1. Image of a submarine XLPE HVDC cable ...................................................... 171

Figure 7.2: MTDC test model ............................................................................................ 177

Figure 7.3: Onshore AC power response to windfarm power variations ........................... 179

Figure 7.4: DC voltage response at MMC2 for a DC line-to-line fault at the terminals of

MMC1 ............................................................................................................. 179

Figure 7.5: DC current response at MMC2 for a DC line-to-line fault at the terminals of

MMC1 ............................................................................................................. 179

Figure 7.6: AC power response at PCC1 for a three-phase line-to-ground fault at PCC1.180

Figure 7.7: DC voltage response at MMC1 for a three-phase line-to-ground fault at PCC1

......................................................................................................................... 180

Figure 8.1: Accelerated growth 2030 transmission system scenario – potential connection

diagram ............................................................................................................ 183

Figure 8.2: MTDC test topology ........................................................................................ 183

Figure 8.3: Standard Vdc-Idc characteristic; DC slack bus (Left) voltage margin control

(Right) ............................................................................................................. 185

Figure 8.4: Implementation of the voltage margin controller ............................................ 185

Figure 8.5: Standard Vdc-Idc characteristic for voltage droop control ................................ 186

Figure 8.6: Implementation of voltage droop controller .................................................... 186

Figure 8.7: Vdc-Idc characteristic for voltage droop control with dead band ...................... 187

Figure 8.8: MTDC test model ............................................................................................ 188

Figure 8.9: MTDC system response to windpower variations when employing a centralised

DC slack bus.................................................................................................... 189

Figure 8.10: MTDC system response to windpower variations when employing voltage

margin control bus ........................................................................................... 190

Figure 8.11: MTDC system response to windpower variations when employing standard

droop control bus ............................................................................................. 190

Figure 8.12: MTDC system response to a three-phase to ground fault when employing a

centralised DC slack bus ................................................................................. 192

Figure 8.13: MTDC system response to a three-phase to ground fault when employing

voltage margin control .................................................................................... 193

List of Figures

12

Figure 8.14: MTDC system response to a three-phase to ground fault when employing

standard droop control ..................................................................................... 194

Figure 8.15: Impact of MTDC control methods on the upper arm current for phase A of

MMC1 for a three-phase to ground fault ........................................................ 195

Figure 8.16: MTDC response for MMC3 disconnected at approximately 2s and for MMC1

disconnected at approximately 3s when employing a centralised DC slack bus

......................................................................................................................... 196


disconnected at approximately 3s when employing voltage margin control .. 197


disconnected at approximately 3s when employing standard droop control .. 198

Figure A.1: Overview of a HVDC connection and a HVAC connection .......................... 216

Figure A.2: CSC-HVDC monopole scheme with metallic return ..................................... 218

Figure A.3: Six-pulse converter ......................................................................................... 218

Figure A.4: PSCAD simulation of CSC converter switching waveforms for a firing angle

of 0° ................................................................................................................. 219

Figure A.5: PSCAD simulation of CSC converter switching waveforms for a firing angle

of 25° ............................................................................................................... 220

Figure A.6: PSCAD simulation of switching waveforms for CSC converter with AC side

reactance and firing angle of 0° ...................................................................... 222

Figure A.7: PSCAD simulation of phase current for six-pulse converter (left) and twelve-

pulse converter (right) ..................................................................................... 223

Figure A.8: VSC-HVDC scheme ....................................................................................... 224

Figure A.9: Three-phase two-level voltage source converter ............................................ 225

Figure A.10: Sinusoidal voltage synthesised from a two-level converter with PWM ....... 225

Figure A.11: Single phase of a diode neutral clamped voltage source converter .............. 227

Figure A.12: Sinusoidal voltage synthesised from a three-level converter with PWM ..... 227

Figure A.13: Single phase of an active neutral clamped voltage source converter ........... 229

Figure A.14: Three-phase MMC ........................................................................................ 230

Figure A.15: Sinusoidal voltage synthesised from a MMC ............................................... 230

Figure A.16: Sinusoidal voltage synthesised from a 400MW MMC with 200 modules per

arm ................................................................................................................... 230

List of Figures

13

Figure A.17: Single phase of a two-level cascaded converter ........................................... 232

Figure A.18: CTL Converter voltage for a fundamental frequency of 50Hz..................... 233

Figure A.19: Image of a MMC VSC DC switchyard ........................................................ 248

Figure A.20: Relationship between MTBF, MTTF and MTTR ........................................ 253

Figure A.21: Product lifecycle ........................................................................................... 254

Figure A.22: Mechanical breaker with turn-off snubber ................................................... 260

Figure A.23: DC/DC resonance converter ......................................................................... 261

Figure A.24: HVDC circuit breaker arrangement and method (ABB, Nov 2008) ............ 262

Figure A.25: Transformer arrangement ............................................................................. 263

Figure A.26: GTO thyristor circuit breaker ....................................................................... 266

Figure A.27: IGBT circuit breaker ..................................................................................... 267

Figure A.28: Single-phase equivalent circuit for MMC .................................................... 268

Figure A.29: DC side plant ................................................................................................ 289

Figure A.30: SFSB for DC voltage control loop ............................................................... 290

Figure A.31: MMC phase A connection to the AC network with the system resistances

neglected.......................................................................................................... 291

Figure A.32: Positive pole-to-ground fault at MMC1 with under voltage protection and a

star-point reactor ............................................................................................. 293

Figure A.33: Positive pole-to-ground fault at MMC1 with under voltage protection and DC

surge arresters (no star-point reactor) .............................................................. 294

Figure A.34: Cable parameter sensitivity test model ......................................................... 301

Figure A.35: Effect of semi-conductor screen thickness on the receiving end voltage ..... 302

Figure A.36: Effect of insulation design on the receiving end voltage .............................. 302

Figure A.37: Effect of sheath design on the receiving end voltage ................................... 303

Figure A.38: Effect of armour design on the receiving end voltage .................................. 303

Figure A.39: Effect of inner jacket design on the receiving end voltage ........................... 304

Figure A.40: Effect of outer jacket design on the receiving end voltage ........................... 304

Figure A.41: Effect of sea-return impedance on the receiving end voltage ....................... 304

List of Tables

14

List of Tables

Table 2.1: Mean time to access the offshore platform based on components/spare part size

........................................................................................................................... 39

Table 2.2: Estimated reliability indices for converter reactors ............................................ 42

Table 2.3: Estimated reliability indices for MMC with ventilation system and cooling

system ................................................................................................................ 43

Table 2.4: Estimated reliability indices for control system ................................................. 43

Table 2.5: Estimated reliability indices for GIS .................................................................. 45

Table 2.6: Estimated reliability indices for transformers ..................................................... 45

Table 2.7: Estimated reliability indices for DC switchyard ................................................. 46

Table 2.8: Estimated submarine cable reliability indices ..................................................... 47

Table 2.9: Availability of offshore components .................................................................. 48

Table 2.10: Example GIS failure modes and consequences ................................................ 49

Table 2.11: Available capacity table for subsystem 4.......................................................... 50

Table 2.12: Available capacity table for the offshore subsystem (Subsystem 1) ................ 50

Table 2.13: Availability of onshore components ................................................................. 51

Table 2.14: Available capacity table for subsystem 5.......................................................... 51

Table 2.15: Available capacity table for the onshore system (Subsystem 3)....................... 51

Table 2.16: Available capacity table for the DC system (Subsystem 2) .............................. 52

Table 2.17: Available capacity table of radial VSC-HVDC scheme ................................... 52

Table 2.18: Cable sensitivity analysis .................................................................................. 54

Table 2.19: Equivalent available capacity table for subsystem 1 ........................................ 57

Table 2.20: Two-state capacity availability tables ............................................................... 58

Table 2.21: Truth table for MTDC network......................................................................... 58

Table 2.22: Probability table for MTDC network ................................................................ 58

Table 2.23: Capacity table for MTDC network with Sub6=Sub7=900MW ........................ 58

Table 2.24: Capacity availability table for MTDC network with Sub6=Sub7=900MW ..... 59

Table 2.25: Capacity availability table for regional MTDC network with

Sub6=Sub7=1200MW ....................................................................................... 59

Table 2.26: Capacity availability table for MTDC network with Sub6=Sub7=1800MW ... 59

Table 2.27: VSC converter costs .......................................................................................... 60

Table 2.28: HVDC extruded cable costs .............................................................................. 60

Table 2.29: Cable installation costs ..................................................................................... 60

List of Tables

15

Table 2.30: HVDC transmission scheme costs excluding offshore nodes........................... 61

Table 2.31: Economic cost-benefit analysis......................................................................... 62

Table 3.1: Comparison of HVDC breaker types .................................................................. 80

Table 4.1: IEC 61000-3-6 harmonic voltage limits for high voltage systems ..................... 96

Table 4.2: IEEE519 harmonic voltage limits ....................................................................... 96

Table 4.3: Nominal transformer parameters ........................................................................ 99

Table 4.4: Calculated time constants for commercial wind turbines ................................. 125

Table 6.1: Normalised MAE for the DEM and AM waveforms when operating in steady-

state at 1GW .................................................................................................... 162


state at 500MW ............................................................................................... 162


state at 100MW ............................................................................................... 162

Table 6.4: Normalised mean absolute error for the DEM and AM waveforms for a DC line-

to-line fault. ..................................................................................................... 163

Table 6.5: Normalised mean absolute error for the DEM and AM waveforms for a line-to-

ground AC ....................................................................................................... 164

Table 6.6: Comparison of run times for the three models for a 5 second simulation ........ 166

Table 6.7: Comparison of run times for different AM models .......................................... 168

Table 6.8: Normalised mean absolute error for the AM and AM10 waveforms for a line-to-

ground AC fault. .............................................................................................. 168

Table 7.1: Physical data for a 300kV 1GW submarine HVDC cable ................................ 172

Table 8.1: Control methods investigated ........................................................................... 187

Table 8.2 : Maximum and rms values for Figure 8.15. ...................................................... 195

Table A.1: Evolution of VSC-HVDC technology ............................................................. 234

Table A.2: Circuit breaker MTTF and MTTR values given in sources 1 to 4 ................... 237

Table A.3: Cigre high voltage circuit breaker reliability data ........................................... 238

Table A.4: Failure statistics from the 1996 survey for GIS commissioned after 1985 ...... 238

Table A.5: Estimated reliability indices for GIS ................................................................ 240

Table A.6: Transformer failure statistics given in sources 1 to 4 ...................................... 240

Table A.7: Estimated reliability indices for transformer ................................................... 242

Table A.8: Converter reactor reliability values given in sources 1 to 4 ............................. 242

List of Tables

16

Table A.9: Murraylink energy availability ........................................................................ 242

Table A.10: Estimated converter reactor reliability indices............................................... 243

Table A.11: MMC failure statistics given in sources 1 to 4............................................... 243

Table A.12: Estimated MMC reliability indices ................................................................ 245

Table A.13: Control and protection failure statistics given in sources 1 to 4 .................... 245

Table A.14: Availability of DNV duplicated control system ............................................ 245

Table A.15: Estimated control system reliability indices .................................................. 247

Table A.16: DC equipment failure statistics given in sources 1 to 4 ................................. 247

Table A.17: Analysis of the DC equipment failure statistics from the World 2007-2008

HVDC survey .................................................................................................. 249

Table A.18: Estimated reliability indices for DC switchyard ............................................ 250

Table A.19: DC cable failure statistics given in sources 1 to 4 ......................................... 250

Table A.20: Estimated reliability indices for submarine cable .......................................... 251

Table A.21: Truth table for the simplified MTDC system ................................................ 257

Table A.22: Capacity probability tables for MTDC with 900MW paths back to shore .... 259

Table A.23: Key parameters for the MMC-HVDC link .................................................... 292

Table A.24: Parameters for MMC comparison model ....................................................... 295

Table A.25: Submarine HVDC Light 320kV cable with copper conductor in a moderate

climate with close laying ................................................................................. 296

Table A.26: XLPE land cable systems ............................................................................... 296

Nomenclature

17

Nomenclature

List of Acronyms

AC Alternating Current

AM Accelerated Model

CBC Capacitor Balancing Controller

CCSC Circulating Current Suppressing Controller

CEPIM Coupled Equivalent PI Model

COPT Capacity Outage Probability Table

CSC Current Source Converter

DC Direct Current

DCCB Direct Current Circuit Breaker

DC-XLPE Direct Current Cross-Linked Polyethylene

DEM Detailed Equivalent Model

DNV Det Norske Veritas

EAM Enhanced Accelerated Model

EMT Electromagnetic Transient

EMTDC Electromagnetic Transients Including DC

EMTP-RV Electromagnetic Transients Program – Restructured Version

FDMM Frequency Dependent Mode Model

FDPM Frequency Dependent Phase Model

FS Firing Signal

GIS Gas-insulated Switchgear

GTO Gate Turn-off Thyristor

HVAC High Voltage Alternating Current

HVDC High Voltage Direct Current

IGBT Insulated Gate Bipolar Transistor

LCC Line Commutated Converter

MAE Mean Absolute Error

MMC Modular Multi-level Converter

MOAT Mean Offshore Access Time

MRTB Metallic Return Transfer Breaker

MT Multi-terminal

MTDC Multi-terminal Direct Current

Nomenclature

18

MTTF Mean Time To Failure

MTTR Mean Time To Repair

NETS SQSS National Electricity Transmission System Security and Quality of Supply

Standard

NFSS Nested Fast and Simultaneous Solution

NLC Nearest Level Control

ODIS Offshore Development and Information Statement

PCC Point of Common Coupling

SCR Short-circuit Ratio

SM Sub-module

STFT Short-time Fourier Transform

TDM Traditional Detailed Model

THD Total Harmonic Distortion

TRV Transient Recovery Voltage

VSC Voltage Source Converter

XLPE Cross-Linked Polyethylene

List of Main Symbols

Symbol Definition S.I. Units

A Availability p.u./%

B DC Breaker -

BRK AC Breaker -

BWic Bandwidth of inner current controller rad/s

BWp Bandwidth of power controller rad/s

C Capacitance F

Ceq MMC equivalent capacitance F

CSM Sub-module capacitance F

G Conductance S

I Current A

I2f Circulating current (appendix) A

I(abc) Phase currents A

Iarm Arm current A

Nomenclature

19

Ib Current through breaker / phase b current A

Ic Current through commutation path / phase c current A

Icap Capacitor current A

Icirc Circulating current A

Idc DC current A

Idiff Difference current A

Idq dq current A

Ig DC current per phase leg A

IL Line current A

Il(abc) Lower arm phase currents A

Is Current through surge arrester A

Ism Sub-module current A

Isx(abc) Phase currents at PCC x where x = 1 to 4 A

Iu(abc) Upper arm phase currents A

Ki Integral gain -

Kp Proportional gain -

L Inductance H

Larm Arm inductance H

Ls System inductance H

LT Transformer inductance H

N Number of sub-modules -

NL Number of levels -

Np Number of turns on the primary winding -

Ns Number of turns on the secondary winding -

p d/dt -

P Active power W

Pd DC power W

Pdrated DC rated power W

Pi Input power W

Ptf Power transfer function W

Pw Windfarm active power W

Q Reactive power VAr

Qw Windfarm reactive power VAr

Nomenclature

20

R Resistance Ω

Rarm Arm resistance Ω

Rbrak Braking resistor Ω

Req Equivalent resistance Ω

Roff IGBT/diode off-state resistance Ω

Ron IGBT/diode on-state resistance Ω

RT Transformer resistance Ω

S Switch / Apparent power -/VA

s Laplace operator -

SA Surge arrester -

Sdq dq apparent power VA

τ time constant S

T Semi-conductor switch with turn-off capability -

Ti Integral time constant S

ν Wind speed m/s

V Voltage V

Vc(abc) Internal converter phase voltages V

Vcap Capacitor voltage V

Vc(dq) dq converter voltage V

Vdc DC voltage V

Vdcnom DC nominal voltage V

Vdiff Difference voltage V

Vdq dq voltage V

Veq Equivalent voltage V

Vl(abc) Lower arm phase voltages V

Vn(abc) Network phase voltages V

Vs(dq) dq voltages at PCC referred to primary converter winding V

VSM Sub-module voltage V

Vsx(abc) Phase voltages at PCC x where x = 1 to 4 V

VTp Transformer primary winding voltage V

VTs Transformer secondary winding voltage V

Vu(abc) Upper arm phase voltages V

Vw(dq) dq windfarm voltage V

Nomenclature

21

Vx(abc) Output phase voltages for converter x, where x = 1 to 4 V

W Energy J

*x Set-point -

x Error -

x Peak -

X Reactance Ω

XT Transformer leakage reactance Ω

Y Admittance S

Z Impedance Ω

Zn Network impedance Ω

δc Converter angle Rad

ΔWSM Variation in sub-module stored energy J

ζ Damping ratio -

ω System frequency rad/s

ωn Natural frequency rad/s

ε Capacitance ripple voltage factor -

θ Angle rad

Abstract

22

Abstract

Name of University: The University of Manchester

Candidate’s name: Antony James Beddard

Degree Title: Doctor of Philosophy

Thesis Title: Factors Affecting the Reliability of VSC-HVDC for the Connection of

Offshore Windfarms

Date: April 2014

The UK Government has identified that nearly 15% of the UK’s electricity generation

must come from offshore wind by 2020. The reliability of the offshore windfarms and their

electrical transmission systems is critical for their feasibility. Offshore windfarms located

more than 50-100km from shore, including most Round 3 offshore windfarms, are likely to

employ Voltage Source Converter (VSC) High Voltage Direct Current (HVDC)

transmission schemes. This thesis studies factors which affect the reliability of VSC-

HVDC transmission schemes, in respect to availability, protection, and system modelling.

The expected availability of VSC-HVDC systems is a key factor in determining if Round 3

offshore windfarms are technically and economically viable. Due to the lack of

publications in this area, this thesis analyses the energy availability of a radial and a Multi-

Terminal (MT) VSC-HVDC system, using component reliability indices derived from

academic and industrial documentation, and examining the influence of each component

on the system’s energy availability. An economic assessment of different VSC-HVDC

schemes is undertaken, highlighting the overall potential cost savings of HVDC grids.

The connection of offshore windfarms to a MT HVDC system offers other potential

benefits, in comparison to an equivalent radial system, including a reduction in the volume

of assets and enhanced operational flexibility. However, without suitable HVDC circuit

breakers, a large MT HVDC system would be unviable. In this thesis, a review of potential

HVDC circuit breaker topologies and HVDC protection strategies is conducted. A HVDC

circuit breaker topology, which addresses some of the limitations of the existing designs,

was developed in this thesis, for which a UK patent application was filed.

Accurate simulation models are required to give a high degree of confidence in the

expected system behaviour. Modular Multi-level Converters (MMCs) are the preferred

HVDC converter topology, however modelling MMCs in Electromagnetic Transient

(EMT) simulation programs has presented a number of challenges. This has resulted in the

development of new modelling techniques, for which the published validating literature is

limited. In this thesis these techniques are compared in terms of accuracy and simulation

speed and a set of modelling recommendations are presented. Cable models are the other

main DC component which, upon analysis, is found to have a significant impact on the

overall model’s simulation results and simulation time. A set of modelling

recommendations are also presented for the leading cable models.

Using the modelling recommendations to select suitable MMC models, radial and MT

EMT MMC-HVDC models for the connection of typical Round 3 windfarms are

developed in this thesis. These models are used to analyse the steady-state and transient

performance of the connections, including their compliance to the GB grid code for AC

disturbances and reactive power requirements. Furthermore, the MT model is used to

investigate the effect of MT control strategies on the internal MMC quantities.

Declaration and Copyright Statement

23

Declaration

No portion of the work referred to in the thesis has been submitted in support of an

application for another degree or qualification of this or any other university or other

institute of learning.

Copyright Statement

The author of this thesis (including any appendices and/or schedules to this thesis) owns

certain copyright or related rights in it (the “Copyright”) and s/he has given The University

of Manchester certain rights to use such Copyright, including for administrative purposes.

Copies of this thesis, either in full or in extracts and whether in hard or electronic copy,

may be made only in accordance with the Copyright, Designs and Patents Act 1988 (as

amended) and regulations issued under it or, where appropriate, in accordance with

licensing agreements which the University has from time to time. This page must form part

of any such copies made.

The ownership of certain Copyright, patents, designs, trade marks and other intellectual

property (the “Intellectual Property”) and any reproductions of copyright works in the

thesis, for example graphs and tables (“Reproductions”), which may be described in this

thesis, may not be owned by the author and may be owned by third parties. Such

Intellectual Property and Reproductions cannot and must not be made available for use

without the prior written permission of the owner(s) of the relevant Intellectual Property

and/or Reproductions.

Further information on the conditions under which disclosure, publication and

commercialisation of this thesis, the Copyright and any Intellectual Property and/or

Reproductions described in it may take place is available in the University IP Policy

(seehttp://documents.manchester.ac.uk/DocuInfo.aspx?DocID=487), in any relevant Thesis

restriction declarations deposited in the University Library, The University Library’s

regulations (see http://www.manchester.ac.uk/library/aboutus/regulations) and in The

University’s policy on Presentation of Theses.

Acknowledgements

24

Acknowledgements

First and foremost, I would like to express my gratitude to my supervisor, Professor Mike

Barnes. This PhD would not have been possible without his excellent guidance and

unparalleled support and it has been a privilege working with him over the past 3.5 years.

It would also not have been possible for me to undertake this research without financial

support and I therefore wish to acknowledge the UK Engineering Physical Sciences

Research Council and National Grid plc for their assistance in this area.

During this PhD I have had many fantastic opportunities to meet, work and discuss ideas

with some inspiring and knowledgeable engineers and I would like to recognise the

members of the “Supergen Wind Energy Consortium” and the “Cigre B4-57 Working

Group”, for aiding my professional development. In terms of inspiration, a special mention

must be made to my previous college tutor Mr Hubert Ward. His dedicated, enthusiastic

and exhaustive approach to teaching electrical engineering principles was invaluable and I

thank him for encouraging me to follow a career in this field.

For their kind support and humorous discussions during my time undertaking this research,

I would like to thank the members of the Power Conversion Group, Dr Robin Preece and

Dr Luke Livermore. A special thank you goes to Dr Steven Jordan, for taking time out

from his travels to review this thesis.

Finally, to family and friends, including those already mentioned, your encouragement has

made this PhD possible, and far more enjoyable than it may have otherwise been. I would

especially like to thank Angela for her time, effort and support throughout this research.

Chapter 1 Introduction

25

1 Introduction

1.1 Background

Offshore wind power generation is a critical component in the production of a clean,

secure and sustainable energy supply for the future. The amount of offshore generation is

increasing worldwide. In the UK alone, the Crown Estate has leased enough offshore wind

development sites to provide a potential capacity of 47GW [1]. Considering that the UK’s

current total power station capacity is approximately 80GW [2], it is clear that offshore

wind will become a major contributor to the UK’s generation mix.

The lease of the potential offshore wind development sites in the UK has been through a

series of allocation rounds, designed to increase in scale and technical complexity as the

industry has developed. Round 1 and Round 2 sites have a capacity of 8GW and are

already in operation, under construction or in development [1, 3] . The Round 3 windfarms

have a potential capacity of 32GW, and construction of these projects is expected to start

from 2015 [1, 3]. These windfarm sites are significantly larger than the Round 1 and

Round 2 sites and are located much further from the shore, as shown in Figure 1.1. The

connection of Round 3 windfarms therefore creates a number of new challenges.

The EPSRC Supergen Wind Project Consortium, which consists of a number of research

institutions and industrial partners, are undertaking research to help assist with these

challenges [4]. This PhD formed part of that research. The Consortium’s principle

objective is to undertake research to achieve an integrated, cost-effective, reliable and

available offshore wind power station. The research documented in this thesis was carried

out in alignment with the consortium’s principle objective.

1.2 The Connection of Round 3 Windfarms

The connection of a windfarm can be either via a High Voltage Alternating Current

(HVAC) or a High Voltage Direct Current (HVDC) transmission system. The choice of

transmission system is largely dependent upon how far the windfarm is located from shore.

HVDC technology is typically more favourable for windfarms located more than 50-

100km from shore [1, 5]. This is primarily because in a HVAC system a large proportion

of a cable’s current carrying capacity is required to charge and discharge the cable’s

capacitance every cycle. Whereas in a HVDC system, once the cable is charged almost its

entire current carrying capacity is available for active power transfer. National Grid’s


26

Offshore Development Information Statement (ODIS) has identified that the vast majority

of the Round 3 windfarm potential capacity is likely to employ HVDC systems due to the

sites’ location [1].

Current Source Converters (CSC) and Voltage Source Converters (VSC) are the two main

types of converter technology used in HVDC transmission systems. VSC-HVDC is more

suited for offshore windfarms because it does not require a strong AC system and has a

smaller footprint in comparison to CSC-HVDC [6].

Since its inception in 1997, and until 2010, all VSC-HVDC schemes employed two or

three-level VSCs [7]. In 2010, the Trans Bay Cable project became the first VSC-HVDC

scheme to use Modular Multi-level Converter (MMC) technology. The MMC has

numerous benefits in comparison to two or three-level VSCs; chief among these is reduced

converter losses [7]. Today, the three largest HVDC manufacturers offer a VSC-HVDC

solution which is based on multi-level converter technology [7]. This thesis therefore

focuses on MMC VSC-HVDC schemes. For further information, a comparative review of

HVAC and HVDC technologies, as well as the different HVDC converter configurations,

is given in Appendix 1A.

Figure 1.1: Connection diagram for the UK’s windfarms [8]


27

With the exception of the recently commissioned (December 2013) Nan’ao island project,

all operational windfarms employing VSC-HVDC connections are radial (point-to-point).

There have however been a number of proposals to interconnect offshore generation to a

common VSC-HVDC Multi-Terminal (MT) system such as the European Super Grid and

National Grid’s Integrated Network, as shown in Figure 1.2. The connection of offshore

windfarms to a common grid has the potential to reduce the volume of assets installed

offshore and improve operational flexibility and network security [1]. It should be noted

that the terms “HVDC grid”, “MT HVDC system” and “Integrated HVDC network” in this

thesis are all HVDC systems which contain three or more HVDC converters and share a

common HVDC connection.

Figure 1.2: Accelerated growth 2030 transmission system scenario – potential connection diagram,

modified from [9]

1.3 Impact Factors on the Connection’s Reliability

This section identifies factors which require further research to reduce the negative impact

they may have on the reliability of VSC-HVDC schemes and therefore the development of

Round 3 windfarms.


28

1.3.1 Availability Analysis

Availability in this work is defined as the probability of finding the component, device or

system in the operating state during its useful life. The expected availability of the VSC-

HVDC systems (radial and MT), which connect the Round 3 offshore windfarms is a key

factor in determining if these windfarms are technically and economically viable.

Availability figures affect the profitability of the system and therefore have a major impact

on potential investors as well as the operation of the onshore National Grid. Availability

analysis can also enable the key components which affect the reliability of the link to be

identified. Strategies can therefore be developed to improve the availability of these

components if required. At the time of investigation no publications existed in the public

domain which estimates the expected availability of the VSC-HVDC systems which may

be employed to connect a typical Round 3 windfarm. Further work is therefore required in

this area.

1.3.2 HVDC Circuit Breakers

A key problem for the development of large HVDC grids (>1.8GW) is the lack of

commercially available HVDC circuit breakers. In order for a large HVDC grid to be

technically and commercially viable, the ability to isolate parts of the grid due to a fault, or

to perform maintenance without de-energising the entire grid, must be achieved.

Currently, offshore windfarms connected to radial VSC-HVDC schemes deal with DC

faults by blocking the Insulated Gate Bipolar Transistor (IGBT) devices in the

converter and by tripping the AC circuit breakers, so that the converter’s anti-parallel

diodes do not conduct. Applying this approach to a DC grid would effectively mean de-

energising the entire DC grid to isolate the faulted section. This is generally considered an

unacceptable solution for relatively large HVDC grids. Further work is therefore required

to produce a HVDC breaker so that this stumbling block is removed from the path of

developing a HVDC grid.

1.3.3 Accurate Electromagnetic Transient Models for Radial and MT VSC-HVDC

Connections

Simulation models are a vital tool in the research and development of VSC-HVDC

systems. Highly accurate models are required in order to give a high degree of confidence

in the simulation results and therefore ensure that the system operates in the expected way.


29

The use of MMC converters in VSC-HVDC systems has presented a number of challenges.

Applying traditional modelling techniques to MMC VSC-HVDC systems is

computationally intensive and impractical in many cases. This has led to the development

of new modelling techniques for MMC converters [10, 11]. The published literature

validating these techniques are however, very limited in some areas, and non-existent in

others [12]. More research is therefore required in this area to give a higher degree of

confidence to these models and also to assess which models are suitable for which studies.

The potential development of HVDC grids has led to the need to produce highly accurate

EMT grid models which are valid for a range of studies. The issue of accuracy vs.

computational efficiency is of greater concern for grids than radial systems due to the

increased size of the model. In addition to the MMC models, cable models are the other

main DC component which may have a significant impact on the overall model’s

simulation results and simulation time. The fidelity of cable models is of particular

importance for HVDC grids due to the need to locate the faulty section of the grid within

approximately 1-2ms, which requires accurate representation of the DC quantities.

Publications regarding the impact of different cable models, in terms of their accuracy and

speed, for typical VSC-HVDC studies are however very limited. The opportunity therefore

exists for further research, so that recommendations can be made as to which cable models

are appropriate for particular studies.

1.4 Aims and Objectives

This thesis aims to address some of the issues raised in the previous section. In order to

achieve these aims the following objectives have been identified:

1. Conduct an availability study for a radial VSC-HVDC system and identify the key

components which affect the system’s overall availability.

2. Identify the key issues in the development of a HVDC breaker and present potential

solutions.

3. Develop a high fidelity EMT model of a radial VSC-HVDC system employed for

the connection of a typical Round 3 windfarm and compare the leading MMC

modelling techniques.


30

4. Develop a high fidelity EMT model of a MT VSC-HVDC system employed for the

connection of a typical Round 3 windfarm and compare the leading cable


1.5 Main Thesis Contributions

The work contained within this thesis has made a number of contributions. References with

the prefix ‘B’ ‘C’, ‘J’, ‘P’ and ‘S’ refer to books, conference publications, journal

publications, patents and Supergen reports respectively. A full list of publications is given

in Section 1.6. The main contributions can be summarised as follows:

An availability study of a radial VSC-HVDC scheme for the connection of a typical

Round 3 windfarm was conducted. This study involved the derivation of a new set

of reliability indices for MTTF and MTTR1, for the key components in a VSC-

HVDC scheme and the production of overall availability figures for the scheme.

The key components which have the greatest impact on the scheme’s overall

availability were also identified. Furthermore, this study analysed the overall

availability of a MT HVDC system which may be employed for the connection of

Round 3 windfarms and assessed the effect of varying the cable’s capacity on the

grid’s availability. In addition, an economic assessment of radial and selected grid

schemes was carried out to determine the impact of the scheme’s availability on the

profitability of the scheme. [B1, C1, J1, S1].

A review of existing HVDC circuit breaker topologies was conducted in order to

identify the limitations of each design. From this review a new type of HVDC

circuit breaker topology was designed which addressed some of the key limitations

of the previous designs. A UK patent application has been filed for this topology.

[J1, P1, S2].

An MMC VSC-HVDC test simulation model was developed in PSCAD and the

three leading detailed MMC modelling techniques were compared in terms of their

accuracy and simulation speed. This work identified limitations of the models and

presented an enhancement to one of the models to reduce the simulation time. The

findings of this were used to propose MMC modelling recommendations [J3].

1 MTTF – Mean Time To Failure, MTTR – Mean Time To Repair.


31

The test MMC VSC-HVDC simulation model was further developed using the

most suitable MMC modelling technique to produce a detailed EMT model for a

radial VSC-HVDC link for the connection of a typical Round 3 windfarm. Another

radial model was also developed for the interconnection of two active networks.

The AC fault ride-through performance of both radial models was assessed against

the UK grid code. This led to the standard DC voltage controller being modified in

order to improve the system’s fault recovery performance. Furthermore the radial

model for the interconnection of active networks was used in a collaborative effort

with another PhD student [J2] to investigate the key dynamics of active power

controllers for VSC-HVDC, regarding stability, performance and robustness. [C2,

J2, S3].

A four-terminal EMT VSC-HVDC model was developed based on a subsection of

a potential scenario outlined in National Grid’s 10 year statement. This model was

used to perform converter co-ordination studies and to compare different types of

cable model in terms of their accuracy and speed, for a range of typical VSC-

HVDC studies which has led to a set of modelling recommendations being

produced [C3, S4].

1.6 Publications

Books [B]:

1. Reliability indices for the VSC-HVDC components derived in this thesis have

been published in: G. Migliavacca “Advanced Technologies for Future

Transmission Grids”, Springer, 2012.

Cigre Working Groups:

1. Contribution to “Cigre WG B4-57 - Guide for the Development of Models for

HVDC Converters in a HVDC Grid”, as an observer.

2. Supergen report [S2] was used as a reference document for “Cigre WG B4-60 -

Designing HVDC Grids for Optimal Reliability and Availability Performance”.

Conference Papers [C]:

1. A. Beddard and M. Barnes, “Availability analysis of VSC-HVDC schemes for

offshore windfarms”, IET PEMD Conference, Bristol, UK, 2012.


32

2. A. Beddard and M. Barnes, “AC Fault Ride-through of MMC VSC-HVDC

Systems” IET PEMD Conference, Manchester, UK, 2014.

3. A. Beddard and M. Barnes, “HVDC Cable Modelling for VSC-HVDC Systems”

Accepted for publication in IEEE PES GM Conference, Washington DC, 2014.

Journal Papers [J]:

1. M. Barnes and A. Beddard, “Voltage Source Converter HVDC Links – The State

of the Art and Issues Going Forward” Energy Procedia, 2012.

2. W. Wang, A. Beddard, M. Barnes and O. Marjanovic, “Analysis of Active Power

Control for VSC-HVDC”, Accepted for publication in IEEE Transactions on

Power Delivery, 2014.

3. A. Beddard, M. Barnes and R. Preece, “Comparison of Detailed Modelling

Techniques for MMC Employed on VSC-HVDC Schemes”, Accepted for

publication in IEEE Transactions on Power Delivery, 2014.

4. Patents [P]:

1. A. Beddard and M. Barnes, “Conduction path of a DC breaker” Patent No.

GB2993911, 2011.

Supergen Reports [S]:

1. Supergen Report 3.3.1b entitled “Radial HVDC availability analysis”, 2011.

2. Supergen Report 3.3.2b entitled “DC circuit breaker technology”, 2012.

3. Supergen report 4.1.6 entitled “Detailed Modelling of MMC VSC-HVDC Links

for the Connection of Offshore Windfarms”, 2013.

4. Supergen report 4.1.5 entitled “Investigation of converter co-ordination”, 2013.

1.7 Thesis Structure

Chapter 2 – Availability Analysis

This chapter outlines the importance of availability analysis in determining the technical

and economic viability of the UK’s Round 3 windfarms. An availability model of a radial

VSC-HVDC system for the connection of a typical Round 3 windfarm is developed and

analysed using reliability indices derived from academic papers and industrial

documentation. This analysis determines the overall energy availability of the system and

identifies the key components which influence its value. An availability model for a MT

http://www.sciencedirect.com/science/article/pii/S1876610212011320

http://www.sciencedirect.com/science/article/pii/S1876610212011320


33

DC network is also developed and analysed for different levels of additional capacity in the

transmission paths back to shore. A cost-benefit availability analysis is performed to show

the relationship between the transmission scheme’s availability and its profitability.

Chapter 3 – HVDC Protection

In this chapter, the fundamental challenges associated with isolating faults in a HVDC grid

as opposed to a HVAC grid, are highlighted. A review of potential HVDC circuit breaker

topologies at the time of investigation is given and a new HVDC circuit breaker topology

is presented. In addition, the key requirements of a DC cable protection system for a

HVDC grid are outlined and a review of potential protection strategies is conducted.

Chapter 4 – MMC-HVDC

This chapter describes the modelling process for a MMC-HVDC link for a typical

Round 3 offshore windfarm, including the analysis to determine the value of key

parameters of the MMC and associated AC and DC networks, and the tuning and

implementation of the required control functions. It also describes the modelling process

for a MMC-HVDC link used to interconnect two AC networks. The MMCs are modelled

using the Detailed Equivalent Modelling (DEM) technique as a result of the work carried

out in Chapter 6.

Chapter 5 – MMC-HVDC Link Performance

This chapter assesses the steady-state and transient performance of the MMC-HVDC link

models developed in chapter 4 for the connection of a typical Round 3 windfarm and for

the interconnection of two active AC networks. The results are compared with those

derived from theory. The systems’ ability to comply with the GB grid code for AC

disturbances and reactive power requirements are investigated and a modification to the

standard DC voltage controller is proposed to improve the system’s active power recovery

response. The models’ response to DC faults are also investigated and the differences

between a MMC-HVDC link employed for the connection of a windfarm and a MMC-

HVDC link employed for the interconnection of two active networks are examined.

Chapter 6 – Comparison of MMC Modelling Techniques

The three leading detailed MMC modelling techniques are described and compared in

terms of their accuracy and simulation speed in this chapter. The findings of this study are


34

used to propose a set of modelling recommendations which offer technical guidance on the

state-of-the-art of detailed MMC modelling.

Chapter 7 – HVDC Cable Modelling

This chapter focuses on HVDC cable modelling for VSC-HVDC systems. The complex

structure of a submarine Cross-Linked Polyethylene (XLPE) HVDC cable is detailed and

parameters to represent a 1GW 300kV cable are derived from academic and commercial

documentation. Types of commercially available cable models are discussed and four of

these models are compared in terms of their accuracy and simulation speed for a range of

studies. The chapter concludes with a set of cable modelling recommendations.

Chapter 8 – Multi-terminal MMC Co-ordination

In this chapter a four-terminal high fidelity MTDC model for the connection of two 1GW

Round 3 offshore windfarms is developed and is used to investigate the performance of

selected MTDC control strategies for different scenarios. This chapter highlights the

importance of high fidelity MMC models when comparing MT control methods.

Chapter 9 – Conclusion and Future Work

The work contained in this thesis is summarised, and the main conclusions are discussed in

this chapter. A number of recommendations for further work are also presented.

Chapter 2 Availability Analysis

35

2 Availability Analysis

Availability can be defined as the probability of finding the component/device/system in

the required operating state at some point in the future [13]. The availability of a VSC-

HVDC system may therefore be defined as the percentage of time that the system is

expected to be operational. From a commercial point of view it is the scheme’s ‘energy

availability’ which is most important as this has the greatest impact on revenue. The

scheme’s energy availability is the measure of energy which could be transmitted through

the VSC-HVDC scheme except for limitations in capacity due to outages. Assessing the

expected energy availability of VSC-HVDC transmission systems used for the connection

of Round 3 windfarms is therefore essential in determining if these windfarms are

economically viable.

At the time of investigation there were a small number of publications which had assessed

the availability of VSC-HVDC transmission systems for different applications [2-4].

However, there were no publications which assessed the energy availability of VSC-

HVDC schemes for the connection of a typical Round 3 windfarm. Furthermore, the

justification for the component reliability indices, particularly the offshore components,

was very limited.

In this chapter, an availability model of a radial VSC-HVDC link and a MT VSC-HVDC

system for the connection of a Round 3 windfarm is developed. The availability model is

broken down into subsystems and then into components. Reliability data for each of these

components is gathered from academic papers, commercial documentation and

international surveys. Using this data, and engineering judgement, reliability indices for

each of the components are derived and justification for the indices is given along with

discussion of the assumptions used. Analytical availability techniques are then used to

assess the availability of each component and the energy availability of the scheme. Each

component’s influence on the scheme’s energy availability is also analysed.

An economic assessment of different VSC-HVDC schemes is carried out which calculates

the profitability of each of these schemes. This economic analysis demonstrates the link

between a scheme’s energy availability and profitability.


36

2.1 Radial System

The most important aspect of evaluating the availability of a system is to understand the

way that the system operates and fails, and the consequence of a failure. Only through a

good understanding of the system can an availability model, which accurately represents

the system, be developed. The accuracy of the reliability data and the complexity of the

availability analysis techniques are irrelevant if a poor model is used.

National Grid has presented three different strategies for the connection of the UK’s Round

3 windfarms in their Offshore Development Information Statement (ODIS) [1, 14]. The

radial strategy requires more than twenty five 1GW VSC-HVDC point-to-point schemes.

A simplified diagram for the offshore connection design of a Round 3 windfarm

employing a 1GW VSC-HVDC point-to-point scheme is shown in Figure 2.1. Figure 2.2

shows the key components of the VSC-HVDC system.

Wind Farm

500MW AC

Substation

500MW AC

Substation

1000MW VSC-

HVDC Scheme

400kV AC Grid

220kV AC

33kV AC

Figure 2.1: 1GW VSC-HVDC point-to-point offshore connection overview diagram

Figure 2.2: 1GW point-to-point VSC-HVDC scheme

According to National Grid a typical VSC-HVDC link for the connection of a Round 3

windfarm has a power rating of 1GW at ± 300kV. The VSC-HVDC link is connected to

the two 500MW AC substations via a 220kV busbar. The configuration of the link is based

on the use of MMCs as it is expected that any VSC-HVDC link employed for the

connection of a Round 3 windfarm will be based on a form of MMC, due to their superior

efficiency in comparison to other VSC topologies. MMC-HVDC schemes require

165km ±300kV DC Cable

165km ±300kV DC Cable

Idc

Idc

400kV AC Grid220kV AC

Convertor

Reactor

MMCTransformer

GIS

Subsystem 1 – Offshore System

Subsystem 2 – DC System

Subsystem 3 – Onshore System

Offshore

Cooling

System

Control

System

Offshore

Cooling

System

Control

System

Subsystem 4 Subsystem 5

Ventilation

System

Ventilation

System

DC

Switchyard

DC

Switchyard


37

limb/converter/arm reactors that are connected in series to each arm of the converter but

which are normally located outside the valve hall. The length of the HVDC cables are

taken as 165km, as this is the average straight line connection distance to shore of the

Round 3 windfarms which are likely to require HVDC transmission schemes. The onshore

MMC is connected to the 400kV onshore grid via two 500MW transformers and Gas-

insulated Switchgear (GIS).

The VSC-HVDC transmission scheme is broken down into three subsystems as shown in

Figure 2.2 and Figure 2.3. The scheme can only facilitate power transmission if all of the

three subsystems are in service. The complete failure of any one of the series-connected

subsystems results in an outage. This is the concept of series dependent systems.

Subsystems 1 and 3 are able to operate at 50% of their capacity due to the parallel

transformer configuration. The capacity of the VSC-HVDC link is therefore reduced to

50% of its rating if one or both of these subsystems are operating at 50% of their capacity.

The effect that the failure of each component has on its subsystem, and hence the overall

scheme, is discussed in Sections 2.2 and 2.3.

Figure 2.3: VSC-HVDC availability model for a point-to-point link

Analytical and Monte Carlo simulation are the two main categories of availability

evaluation techniques [13]. Analytical techniques represent the system by a mathematical

model and use mathematical solutions to evaluate the availability indices, whereas Monte

Carlo simulation techniques estimate the availability indices by simulating the process and

random behaviour of the system. Both analytical and Monte Carlo simulation techniques

have been used to determine the availability of the VSC-HVDC systems [15-17]. There

are advantages and disadvantages to each method and neither approach can be considered

superior to the other [13]; however, simulation techniques are typically employed in cases

where the required availability indices cannot be readily obtained using suitable analytical

techniques.

The energy availability of the system in this work can be evaluated in a relatively

straightforward manner by employing a widely used analytical technique which is referred

to as Capacity Outage Probability Tables (COPT) [15, 18]. The COPT-based technique is

Subsystem 2 –

DC System

Subsystem 3 -

Onshore System

Subsystem 1 –

Offshore System


38

therefore used to evaluate the energy availability of the VSC-HVDC scheme. This

technique is implemented for the system in Section 2.3.

2.2 Component Availability

A brief explanation of each component and their reliability indices is given here. A

thorough explanation for the derivation of the Mean Time To Failure (MTTF) and Mean

Time To Repair (MTTR) indices of each component is contained in Appendix 2A and 2B.

The availability, A, of each component can be calculated directly from equation (2.1).

MTTF

AMTTF MTTR

(2.1)

The components in the offshore system are very similar to the components in the onshore

system. The key difference is that the onshore transformers and GIS bays are connected to

the 400kV grid whereas the offshore transformer and GIS bays are connected at 220kV, as

shown in Figure 2.2. The voltage rating of equipment could affect their likelihood to fail

and the time it takes to repair the component in the event of a failure. This is taken into

consideration in this availability analysis.

The crucial difference between a component being located offshore and a component being

located onshore, is the time it takes to repair the component. This is because it takes longer

to access the offshore platform. The time it takes varies significantly depending on the

following factors:

Method of transport (small vessel/large vessel/helicopter)

Availability of transport

Weather conditions

Location of offshore platform

Location of air field/port/offshore maintenance platform

Availability of required personnel

The access time could be as little as one day, based on travel via a helicopter in good

weather conditions with the correct administration procedures in place to enable rapid

deployment of personnel and equipment. However, it could also be as long as three months

[19] or more due to very bad weather conditions and unavailability of a suitably large

vessel.


39

The mean time to access the offshore platform with different sized components or spare

parts has been estimated, as shown in Table 2.1. Pictures of the example components/spare

parts in Table 2.1 are shown in Figure 2.4, Figure 2.5 and Figure 2.6 to give an indication

of their size.

Component Size

Example Component Mean Offshore Access

Time (hr) Transportation

Method

Small MMC Sub-module 48 Helicopter/Small

Vessel Medium Gas-insulated Switchgear 168 Medium Vessel

Large Transformer 504 Large Vessel

Table 2.1: Mean time to access the offshore platform based on components/spare part size

Figure 2.4: Image of a MMC sub-module from [20]

The MMC Sub-module (SM), depicted in Figure 2.4, is approximately 0.6x1.5x0.3m

(HxWxD) and weighs approximately 165kg [20].


40

Figure 2.5: Image of a 245kV GIS bay from [21]

The 245kV GIS bay, depicted in Figure 2.5, has a footprint of about 12m2 and weighs

approximately 5-6 tonnes [22].

Figure 2.6: Image of a 150kV, 140MVA transformer and offshore platform modified from [23]


41

A 150kV, 140MVA transformer, as shown in Figure 2.6, is a relatively small transformer

in terms of its rating, but still weighs approximately 90 tonnes [22]. Larger transformers

are significantly heavier.

In order to accurately estimate the MTTR for an offshore component, the size of the spare

part that the component would require in the event of a failure must be estimated. From

this estimation, the Mean Offshore Access Time (MOAT) for the component can be

calculated. Calculating the MTTR for a component located offshore is not as simple as

adding the MTTR for the component located onshore to the MOAT for that component.

This is because some tasks, which affect the MOAT, may be performed in parallel with

tasks included in the MTTR for the onshore component. To give greater clarity to these

two aspects consider the following example:

In this availability analysis it is estimated that 70% of GIS failures require a small sized

spare part and that 30% require a medium sized spare part. From Table 2.1 the MOAT to

repair a GIS bay would be 84 hours (70% helicopter/small vessel and 30% medium

vessel). The MTTR for a GIS bay located onshore is estimated to be 120 hours. It is also

estimated that 20 hours of the offshore access time is spent performing administration

related tasks, which could be done concurrently with the time spent obtaining spare parts

(included in the onshore MTTR). Therefore the MTTR of an offshore GIS bay is the

MTTR of an onshore GIS bay, plus the MOAT, minus the mean time spent performing

concurrent tasks (i.e. 120+84-20=184hrs). Further information on this topic is contained in

Appendix 2A.

2.2.1 Converter Reactor

The converter reactors, also known as limb reactors or arm reactors, are connected in series

with each arm of the MMC. At the time of investigation, there was only one commercial

MMC in operation (commissioned 2010) [24] and therefore, published reliability indices

for MMC converter reactors are non-existent. Det Norske Veritas (DNV) is the only

known source to have published reliability indices for a VSC-HVDC converter reactor.

These reliability indices are likely to be for the converter reactors employed on a two-level

VSC scheme. Nonetheless the reliability indices for these reactors are taken to be similar to

the converter reactors used in MMC-HVDC schemes. The reliability indices published by


42

DNV were used to estimate the reliability indices for a converter reactor, as given in Table

2.2.

Table 2.2: Estimated reliability indices for converter reactors

2.2.2 MMC with Cooling System and Ventilation System

The cooling system is required to ensure that the components within the MMC, such as the

IGBTs, do not exceed their rated temperature. The ventilation system is needed amongst

other functions to ensure that the valve hall temperature and moisture does not exceed set

limits. Failure of either the cooling system or ventilation system is likely to result in the

converter being tripped. It is for these reasons that critical parts in the cooling system are

duplicated [25].

As discussed in Section 2.2.1, failure statistics for MMCs are non-existent. The first two-

level VSC-HVDC scheme was commissioned in 1997 and since then many more schemes

have been commissioned. That said, no VSC-HVDC schemes have been included in the

Cigre World survey of HVDC schemes which is published biannually [26]. There are a

small number of sources which have published reliability indices for HVDC VSCs2. One

of these sources estimated the VSC’s reliability indices based on data from the Cigre

survey of Line Commutated Converter (LCC)-HVDC schemes. This survey publishes

reliability indices for the HVDC converter with the cooling system and the ventilation

system included. It is expected, although not explicitly stated, that reliability indices for the

converter from the other sources (see appendix) also include the cooling system and the

ventilation system. Estimating the reliability indices for the MMC from these sources

would therefore also include the cooling system and the ventilation system. The

disadvantage of this would be that the individual effect of the cooling system and

ventilation system on the scheme’s availability would be obscured.

The converter, cooling system and ventilation system were analysed as individual

components in [17]. However, the components used in the offshore cooling system and

onshore cooling system were inconsistent with each other. As an example, the offshore

2 Although it is not stated explicitly, it appears that the reliability indices are for two-level VSCs.

Component MTTF (yr) MTTR (hr) Availability

Onshore Converter Reactor 7 24 0.99961

Offshore Converter Reactor 7 192 0.99688


43

cooling system did not account for instrumentation, whereas the onshore cooling system

did and neither accounted for the failure rates of the cooling system’s control system. The

same inconsistency seems to apply to the ventilation systems. There may well be very

good reasons to explain these inconsistencies, however without this knowledge it would be

unwise to use the data from this paper for the cooling system and ventilation system as the

resultant availability could be very inaccurate. It is believed, therefore, that more accurate

reliability indices would be obtained by estimating the MTTF and MTTR for the MMC

from the sources which have factored in the cooling system and ventilation system3. The

reliability indices for the MMC including the cooling system and ventilation system are

given in Table 2.3.

Table 2.3: Estimated reliability indices for MMC with ventilation system and cooling system

2.2.3 Control System

The HVDC control system is fully duplicated to ensure a high level of reliability. The

reliability indices for HVDC control systems used in academic and industry publications

are for two-level VSC-HVDC schemes and LCC-HVDC schemes. The control algorithms

for MCC-HVDC schemes are more complex than other HVDC schemes. The hardware,

with the exception of the valve based electronics, is similar. These were two of the factors

which were taken into consideration when estimating the MTTF and MTTR for the control

system. The reliability indices for this component are given in Table 2.4.

Table 2.4: Estimated reliability indices for control system

2.2.4 GIS and Transformer

The reliability indices for the GIS have been mainly estimated from the GIS failure

statistics contained in the 1996 Cigre GIS survey [27]. Cigre surveys for AC circuit

breakers, and reliability indices for AC circuit breakers from other sources, were also used.

3 Sources one and two (see appendix) have not explicitly stated that they have included the cooling and

ventilation system, however the data suggest that this was the case.


Onshore MMC 1.9 12 0.99928

Offshore MMC 1.9 60 0.99641


Onshore Control System 1.6 3 0.99979

Offshore Control System 1.6 17 0.99879


44

GIS failure statistics are categorised based on the voltage rating of the equipment. The GIS

voltage ratings are determined by the rating of the busbar to which they are connected. The

offshore GIS connected to the windfarm side (Busbar 1) as shown in Figure 2.7, would

need to be rated at 220kV, whereas the GIS connected to the converter side (Busbar 2)

would need to be rated at about 275kV4. This places the offshore GIS within the Cigre

survey’s 200-300kV voltage category.

Figure 2.7: Offshore GIS and transformer configuration (Subsystem 4)

The onshore GIS connected to the converter side (Busbar 3) as shown in Figure 2.8 would

need to be rated at approximately 275kV5, whereas the GIS connected to the AC grid

(Busbar 4) would need to be rated at 400kV. Therefore, the GIS connected to Busbar 3

would be within the 200-300kV category and the GIS connected to Busbar 4 would be

within the 300-500kV category. The reliability indices for the offshore and onshore GIS

are given in Table 2.5

Figure 2.8: Onshore GIS and transformer configuration (Subsystem 5)

4 This value is based on the peak AC converter voltage being 0.75 times half of the DC voltage (0.75*300kV)

which gives a converter side line-to-line voltage of 275.57kV rms. The 0.75 is based on simulation results from the Trans Bay Cable project which has a peak AC converter voltage of 150kV and a DC voltage of ±200kV [28] It should be noted, that based on information which was not known at the time of investigation, the converter side voltage may be as high as 367.42kVrms, due to the MMC utilising the full DC link voltage. The potential impact this may have on the availability results is discussed in Section 2.3.4. 5 Based on information which was not known at the time of investigation, the converter side GIS would

most likely need to be rated for 367.42kV rms. The potential impact this may have on the availability results is discussed in Section 2.3.4.

GIS

Switchbay

500MW

500MW

1000MW

T1

T2

GIS 1

GIS 3

GIS 2

GIS 4

Busbar 1

Busbar 2

GIS

Switchbay

1000MW1000MW

T1

T2

GIS 1

GIS 3

GIS 2

GIS 4

Busbar 3

Busbar 4


45

Table 2.5: Estimated reliability indices for GIS

The reliability indices for the power transformer have been estimated from a number of

sources including Cigre surveys, academic papers and industry publications. The failure

statistics are categorised based on the transformer’s highest winding voltage. The highest

winding voltage for the offshore transformers is within the 100-300kV category,

irrespective of whether a delta or star connected transformer is employed. However, a delta

connected onshore transformer would have a winding voltage of 400kV, whereas a star

connected transformer would be approximately 230kV. This availability analysis assumes

that the onshore transformer is connected to the grid via a star winding, placing the onshore

transformers in the 100-300kV6 category. The reliability indices for the offshore and

onshore transformers are given in Table 2.6.

Table 2.6: Estimated reliability indices for transformers

2.2.5 DC Switchyard

The major equipment in a DC VSC switchyard consists of HV capacitor banks, line

reactors, measurement transducers and switchgear [29]7. The major equipment in a LCC

DC switchyard consists of DC harmonic filters, smoothing reactors, measurement

transducers and switchgear [30]. Figure 2.9 shows images of a MMC DC switchyard (left)

and a LCC DC switchyard (right).

6 Based on information which was not known at the time of investigation, the onshore transformer and

possibly the offshore transformer would most likely need to be rated for 367.42kV rms. The potential impact this may have on the availability results is discussed in Section 2.3.4. 7 HV capacitor banks are not necessarily required for MMCs.

Component MTTF (yr) MTTR(hr) Availability

Offshore switchbay 250 184 0.99992

400kV onshore switchbay 100 120 0.99986

275kV onshore switchbay 250 120 0.99995

Component MTTF(yr) MTTR(hr) Availability

Offshore Transformer 95 1512 0.99819

Onshore Transformer 95 1008 0.99879


46

Figure 2.9: Image of a MMC VSC DC Switchyard (left, modified from [29]), Image of a LCC DC

Switchyard (right modified from [31])

Since there is significant similarity between the DC switchyards, the failure statistics from

the World HVDC survey (LCC) is used to estimate the reliability indices for the MMC

VSC-HVDC DC switchyard. The latest World HVDC survey was published in 2010,

which at the time of the study contained data collected on LCC-HVDC schemes during

2007-2008 [26]. Back-to-back HVDC schemes do not normally require smoothing reactors

or DC filters [30], therefore only the data from transmission schemes is considered. The

reliability indices for a DC switchyard are given in Table 2.7.

Table 2.7: Estimated reliability indices for DC switchyard

2.2.6 DC Cable

Submarine cable failure rates are very subjective. They are heavily influenced by many

factors including: fishing activity, installation protection method, awareness of cable

routes, water depth, and hardness of the sea-bed. Reliability indices for submarine cables

should therefore be used with a high level of caution and ideally estimated on a case by

case basis.

The latest survey for failures of submarine cables, at the time of the study, was published

in 2009 by Cigre for data collected between 1990 and 2005 [32]. Unfortunately failure

rates for the most common type of submarine cable used in VSC-HVDC schemes (DC-

XLPE) were not given in the report. The majority of known cable failures were due to


Onshore DC Switchyard 4.02 26.06 0.99926

Offshore DC Switchyard 4.02 98.06 0.99722

Line Reactor


47

external damage, which is likely to be independent of cable type and voltage rating8. The

average failure rate of all cable types and voltages was therefore used to estimate failure

for DC-XLPE submarine cable. The average failure rate of submarine cables with some

form of installation protection was calculated to be approximately 0.1. Based on this figure

and the value given by DNV, it was estimated that the annual failure of a submarine cable

is 0.07 failures per 100km. The circuit length in this work is defined as the distance

between the onshore and offshore converter (i.e. 165km not 330km).

The average repair time for submarine cables in the Cigre survey was approximately 60

days, which is the same as the MTTR used by DNV in their availability analysis. Therefore

a MTTR of 60 days will be assumed in this chapter. The reliability indices and calculated

availability for this component are given in Table 2.8.

Table 2.8: Estimated submarine cable reliability indices

2.3 Radial VSC-HVDC Scheme Availability Analysis

The availability for the radial VSC-HVDC scheme as shown in Figure 2.3 will be

calculated in this section. First, the availability of subsystems 1, 2 and 3 are calculated and

then the availability of the overall system can be calculated.

2.3.1 Offshore System Availability Analysis (subsystem 1)

The offshore system is broken down into subsystems and components. The offshore

system has series dependency as shown in Figure 2.10. The failure of any one component

from subsystem 4 to the control system will result in the failure of the offshore system and

therefore the failure of the transmission scheme. Subsystem 4 (transformers and GIS) can

operate at 100% or 50% capacity. Due to the series dependency, if subsystem 4 is

operating at 50% capacity then the offshore subsystem, and consequently the transmission

scheme, can only operate at 50% capacity.

8 Only 4 of the 49 reported failures were classed as internal failures which were all for self-contained oil

filled cables.

Component Failure rate (occ/yr/100km) Circuit Length (km) MTTF (yr) MTTR (hr) Availability

DC Cable 0.07 165 8.493625 1440 0.98101


48

Subsystem 4

(100%,50%)

Converter Reactor

(100%)

MMC

(100%)

Offshore Cooling

System

(100%)

Control System

(100%)

Ventilation System

(100%)

Simplified to a single component (MMC)

Figure 2.10: Availability model for offshore system (Subsystem 1)

The calculated availability of all the components in the offshore subsystem is given in

Table 2.9.

Table 2.9: Availability of offshore components

The simplified offshore subsystem availability diagram is shown in Figure 2.11.

Subsystem 4

(100%,50%)

Converter Reactor

(100%)

MMC

(100%)

Control System

(100%)

Figure 2.11: Simplified availability model for offshore system (Subsystem 1)

Subsystem 4 contains two parallel branches as shown in Figure 2.2, and repeated here in

Figure 2.12 . If both branches are in service subsystem 4 operates at full capacity. If only

one branch is in service subsystem 4 operates at 50% capacity.

Figure 2.12: Offshore transformers and GIS configuration (Subsystem 4)

The protection of the equipment before, and including, Busbar 1 is assumed to be the

responsibility of the AC substation manufacturer. As a result, the failure of this equipment


Offshore GIS Switchbay 250 184 0.99992

Offshore Transformer 95 1512 0.99819

Offshore Converter Reactor 7 192 0.99688

Offshore MMC 1.9 60 0.99641

Offshore Control System 1.6 17 0.99879

GIS

Switchbay

500MW

500MW

1000MW

T1

T2

GIS 1

GIS 3

GIS 2

GIS 4

Busbar 1

Busbar 2


49

will not be included in this availability analysis. It is also assumed that permanent faults on

Busbar 2 are very rare and can therefore be neglected.

There are many components which make up a GIS switchbay including circuit breakers,

disconnectors and instrumentation. The component which fails and the mode in which that

component has failed determines the available capacity of the system. To demonstrate this,

three example GIS failure modes and consequences are shown in Table 2.10.

Failure Mode Immediate Effect Number of Branches Affected

Capacity Outage (MW)

Disconnector opens inadvertently Isolates the connected

branch 1 500

Circuit fails to open on command Cannot clear transformer

fault 2 1000

Insulation breakdown to earth Short-circuit connected

busbar 2 1000

Table 2.10: Example GIS failure modes and consequences

There are many different failure modes of a GIS switchbay. In order to take into account

each failure mode, and its effect on the capacity of the system, complex analysis could be

conducted. However, without accurate failure mode input data even the most sophisticated

availability analysis method will produce inaccurate results.

Data to determine the failure rate of a GIS switchbay as a single unit is limited; data to

estimate with any real degree of accuracy what component within a modern GIS switchbay

will fail, and how that component will fail, is near enough non-existent. It is worth noting

that in [27] there is some data from the Cigre 1996 GIS survey for the symptoms of GIS

failures. This includes symptoms such as “loss of mechanical function” and “failure to

operate switching device”. Such symptoms however, do not indicate the failure mode of

the GIS. The biggest single failure symptom (>30%) was an insulation breakdown to earth,

which indicates the third failure mode in Table 2.10.

From the research conducted into failure mode statistics for GIS, it has been established

that the biggest single failure symptom for GIS was a “breakdown to earth”. It is therefore

assumed that the failure of any GIS bay results in full capacity outage, which is the worst

case scenario. There are 64 possible combinations of component states in Figure 2.12,

when considering each component as either being available or unavailable. Only the

combinations that result in some available capacity are calculated, since the majority of


50

combinations result in no available capacity, due to assumption that any GIS failure results

in full capacity outage.

In order for subsystem 4 to operate at full capacity, all of the components (GIS1-4 and T1-

2) must be available. The failure of any one transformer, providing that all of the GIS bays

are available, would result in an available capacity of 500MW. All other component

combinations result in full capacity outage.

Table 2.11: Available capacity table for subsystem 4

From equation (2.2) the available capacity of the offshore system (subsystem 1) can be

calculated. The results are given in Table 2.12.

1(100%) 4(100%) Re (100%) (100%) (100%)

1(50%) 4(50%) Re (100%) (100%) (100%)

1(0%) 1(100%) 1(50%)1

Sub Sub actor MMC Control


Sub Sub Sub

A A A A A

A A A A A

A A A

(2.2)

Table 2.12: Available capacity table for the offshore subsystem (Subsystem 1)

Table 2.12 shows that the offshore subsystem is operating at full capacity approximately

98.8%, half capacity 0.4% and is completely out of service 0.8% of the time.

2.3.2 Onshore System Availability Analysis (subsystem 3)

The analysis of the onshore system, subsystem 3, is the same as for the offshore system.

The availability of all of the components in the onshore system is given in Table 2.13.

Available Capacity GIS1 GIS2 GIS3 GIS4 T1 T2 Probability Availability

100% 1 1 1 1 1 1 0.99604 0.99604

1 1 1 1 1 0 0.00181

1 1 1 1 0 1 0.00181

0 0.00034 0.00034

50% 0.00362

All other combinations

1= available, 0= unavailable

Capacity Availability

100% 0.98817

50% 0.00359

0% 0.00824

Subsystem 1

0%


51

Table 2.13: Availability of onshore components

The available capacity of subsystem 5 is given in Table 2.14.

Table 2.14: Available capacity table for subsystem 5

From equation (2.3) the available capacity of subsystem 3 can be calculated. The results

are given in Table 2.15.

3(100%) 5(100%) Re (100%) (100%) (100%)

3(50%) 5(50%) Re (100%) (100%) (100%)

3(0%) 3(100%) 3(50%)1



Sub Sub Sub

A A A A A

A A A A A

A A A

(2.3)

Table 2.15: Available capacity table for the onshore system (Subsystem 3)

Table 2.15 shows that the onshore system is operating at full capacity approximately

99.6%, half capacity 0.2% and is completely out of service 0.2% of the time.

2.3.3 DC System Availability Analysis (subsystem 2)

The DC system is broken down into three series dependent components as shown in Figure

2.13.


400kV Onshore GIS Switchbay 100 120 0.99986

275kV Onshore GIS Switchbay 250 120 0.99995

Onshore Transformer 95 1008 0.99879

Onshore Converter Reactor 7 24 0.99961

Onshore MMC 1.9 12 0.99928

Onshore Control System 1.6 3 0.99979

Available Capacity GIS1 GIS2 GIS3 GIS4 T1 T2 Probability Availability

100% 1 1 1 1 1 1 0.99720 0.99720

1 1 1 1 1 0 0.00121

1 1 1 1 0 1 0.00121

0% 0.00038 0.00038

50% 0.00242

All other combinations

1= available, 0= unavailable


100% 0.99588

50% 0.00241

0% 0.00171

Subsystem 3


52

Figure 2.13: Availability model of subsystem 2

Subsystem 2 operates at full capacity if all three series dependent components are in

service. If any one component is out of service, then subsystem 2 is completely

unavailable. The same approach which was used for subsystems 1 and 3 is used to analyse

this subsystem. The results are given in Table 2.16.

Table 2.16: Available capacity table for the DC system (Subsystem 2)

2.3.4 Radial VSC-HVDC Scheme Availability

The availability diagram of the VSC-HVDC scheme is shown in Figure 2.14. The available

capacity of the overall VSC-HVDC scheme is calculated in Table 2.17.

Subsystem 2 - DC

System (100%)

Subsystem 3 -

Onshore System

(100%,50%)

Subsystem 1 –

Offshore System

(100%,50%)

Figure 2.14: Availability model for the VSC-HVDC scheme

Table 2.17: Available capacity table of radial VSC-HVDC scheme

The radial VSC-HVDC scheme operates at full capacity approximately 96.2% of the time,

half capacity 0.6% of the time and zero capacity 3.2% of the time. The scheme’s energy

availability is therefore approximately 96.5%9. The target annual scheduled outage for

9 Energy availability (EA) is defined in this chapter as “the maximum amount of energy which could have

been transmitted except for forced outages”.

Offshore DC

Switchyard

(100%)

DC Cable (100%)

Onshore DC

Switchyard

(100%)


100% 0.97757

0% 0.02243

Subsystem 2

Capacity (%) Subsystem1 Subsystem 2 Subsystem 3 Probability Availability

100 1 1 1 0.96202 0.96202

0.5 1 1 0.00350

1 1 0.5 0.00233

0.5 1 0.5 0.00001

0 0.03215 0.03215Any Other Combination

50 0.00583


53

maintenance is typically 0.82% (72 hours) for a VSC-HVDC scheme10

. The overall energy

availability for the VSC-HVDC scheme analysed in this work would therefore be

approximately 95.7%11

. The only known availability statistics for VSC-HVDC schemes

are for the Murraylink and the Cross Sound Cable project. The average overall energy

availability for the Murraylink and the Cross Sound Cable project are 96.5% and 96.9%

respectively [33]. These figures include forced and scheduled outages. Considering that the

VSC-HVDC scheme in this work is for an offshore windfarm, and therefore one converter

station is based offshore, an overall energy availability of 95.7% seems to be within

reasonably expected limits.

A component’s influence on the availability of the scheme can be assessed by setting that

component’s failure rate to zero and noting the change in the scheme’s availability. Figure

2.15 shows that the DC cable has the greatest effect on the availability of the VSC-HVDC

link.

Figure 2.15: Component importance for availability

As mentioned previously the failure rate of submarine cables is dependent upon many

factors. The annual failure rate used in this availability analysis was 0.07 failures per

100km circuit. The effect of the submarine cable failure rate on the energy availability of

the VSC-HVDC scheme excluding scheduled maintenance is shown in Table 2.18.

10

The manufacturer’s target scheduled outage rate for the VSC-HVDC Cross Sound Cable project was 0.82% [33] 11

Overall energy availability (OEA) is defined in this chapter as “the maximum amount of energy which could have been transmitted except for forced and scheduled outages”.

DC Cable 54%

Offshore MMC 10%

Offshore Reactor

9%

Offshore DC Switchyard

8%

Other Offshore Equipment

9%

Onshore Equipment

10%


54

Table 2.18: Cable sensitivity analysis

Table 2.18 indicates that if the true annual failure rate of submarine VSC-HVDC cables is

in the vicinity of 0.7 failures per 100km of circuit then VSC-HVDC schemes for the

connection of the UK’s Round 3 offshore windfarms are unlikely to be commercially

viable. This would in fact make the Round 3 windfarms altogether unviable as any

technology which requires submarine cables would have a similar availability.

The results presented in this chapter are based on the GIS and the transformer windings

connected to the converter being rated for a phase-to-phase voltage of approximately

275kVrms. Based on information which was not known at the time of investigation, the

converter side GIS and transformers with delta windings would most likely need to be

rated for 367kVrms. A decrease in energy availability of 0.2% is calculated when adjusting

the reliability data for the scheme’s four transformers to the 300-700kV voltage class and

the data for the converter side GIS to the 300-500kV class. Taking into account that a

voltage rating of 367kV for the GIS and the transformers is at the lower end of the 300-

500kV and the 300-700kV voltage classes respectively, and that the difference in the

energy availability is 0.2%, the results presented in this chapter are still considered to be

representative of a typical VSC-HVDC link for a Round 3 windfarm.

2.4 MT HVDC Network Availability Analysis

Many potential benefits have been identified from interconnecting offshore windfarms via

a MTDC network. These benefits include a reduction in the volume of assets installed

offshore, improved operational flexibility and network security [1]. A simplified diagram

of the MTDC network, which will be analysed in this chapter, is shown in Figure 2.16.

Cable Failure Rate (occ/yr/100km) Energy Availability (%)

0.007 98.2

0.07 96.5

0.7 79.7


55

Figure 2.16: MT HVDC system

The three offshore nodes are rated at 600MW each, giving a total grid capacity of 1.8GW,

which is the maximum in-feed loss permitted by the National Electricity Transmission

System Security and Quality of Supply Standard (NETS SQSS) [14]. A fault on the DC

grid could temporarily cause the entire 1.8GW to be disconnected from the AC grid, while

the faulty section of the grid is isolated. The installation of HVDC circuit breakers with a

suitable protection system would enable DC faults to be cleared without de-energising the

entire DC grid and therefore the grid’s maximum capacity could be greater than 1.8GW.

However, there are currently no HVDC circuit breakers commercially available. The MT

network analysed in this chapter does not contain HVDC circuit breakers and hence its

maximum capacity is limited to 1.8GW.

The DC cables connected between the onshore and offshore converters have a length of

165km. This length of cable is approximately the average straight line connection distance

for the radial HVDC schemes outlined in ODIS. The offshore converters are connected

together via 60km of DC cable. This length of DC cable was chosen as it may be more

suitable to connect the windfarms together using HVAC for connection distances less than

60km. This analysis neglects the grid’s downtime due to isolating a DC side fault, as this

time is insignificant for the calculation of the grid’s availability.

Wind

Farm 3

165km DC Cable

AC Grid

Wind

Farm 1

DC

Shore

Wind

Farm 2

165km DC Cable

600MW Offshore

AC Substation

600MW Offshore

AC Substation

600MW Offshore

AC Substation

600MW Offshore

Node C (OFNC)

600MW Offshore

Node B (OFNB)

600MW Offshore

Node A (OFNA)

Onshore Node A

(ONNA)

Onshore Node B

(ONNB)

60km DC Cable

60km DC Cable


56

Each offshore node consists of an offshore DC switchyard connected in series with

subsystem 1 and each onshore node contains an onshore DC switchyard connected in

series with subsystem 3, as shown in Figure 2.17.

Subsystem 1 –

Offshore System

(100%,50%)

Offshore DC

Switchyard

(100%)

Offshore Node (OFN)

Subsystem 3 –

Onshore System

(100%,50%)

Onshore DC

Switchyard

(100%)

Onshore Node (ONN)

Figure 2.17: Onshore and offshore nodes

600MW Offshore

Node A – OFNA

(100%,50%)

600MW Offshore

Node B - OFNB

(100%,50%)

600MW Offshore

Node C – OFNC

(100%,50%)

Onshore Node A-

ONNA

(100%,50%)

Onshore Node B –

ONNB

(100%,50%)

165km DC Cable -

C3 (100%)

60km 1200MW

DC Cable – C1

(100%)

60km 1200MW

DC Cable – C2

(100%)

165km DC Cable–

C4 (100%)

Subsystem 6 Subsystem 7

Figure 2.18: Block diagram of MTDC network

The onshore nodes and their series-connected DC cable can be combined into a single

subsystem as shown in Figure 2.18 and Figure 2.19. The offshore nodes, as well as

subsystem 6 and subsystem 7, can be in one of three states (100%, 50% or 0%), due to the

dual transformers in subsystems 1 and 3. The DC cables (C1 and C2) can be in one of two

states (100% or 0%). The HVDC grid as shown in Figure 2.18 therefore has 972 ( 5 23 2 )

possible states. Simplifying these nodes/subsystems to two states would reduce the number

of possible HVDC grid states to 128 (27). The probability that subsystem 1 or subsystem 3

is operating at 50% capacity is negligible, as shown in Table 2.12 and Table 2.15. In this

case, the 50% state may therefore be eliminated without introducing any significant error

in the overall availability analysis of the HVDC grid. The probability of the subsystem


57

operating at 100% capacity is increased accordingly to account for the exclusion of the

50% state. As an example, subsystem 1 which has three states, can be simplified to two

states of equivalent available capacity as shown in Table 2.19.

Table 2.19: Equivalent available capacity table for subsystem 1

Subsystem 1 in the MTDC grid is rated at 600MW. The equivalent capacity of subsystem 1

can therefore be calculated as follows:

3

2

1 600 0.988167 300 0.003591 593.978

1 600 0.98996 593.978

Cap State

Cap State

Sub MW MW MW

Sub MW MW

(2.4)

Equation (2.4) shows that there is no difference between the three-state model and the

simplified two-state model in terms of the overall capacity of subsystem 1. The energy

transmitted through subsystem 1 when considered as a standalone system is therefore the

same whether it is represented by a three-state model or a two-state model. The calculated

availability of a system containing several three-state models is not strictly equal to the

calculated availability of a system with equivalent simplified two-state models, however

since the probability of the node/subsystem operating in the eliminated state is very small,

the error is insignificant for the cases analysed.

600MW Offshore

Node A – OFNA

(100%)

600MW Offshore

Node B - OFNB

(100%)

600MW Offshore

Node C – OFNC

(100%)

Subsystem 6

(100%)

Subsystem 7

(100%)

60km 1200MW

DC Cable – C1

(100%)

60km 1200MW

DC Cable – C2

(100%)

Figure 2.19: Simplified two-state block diagram of a MTDC network

The simplified two-state capacity availability tables for the onshore and offshore nodes as

well as subsystem 6 and subsystem 7 are shown in Table 2.20.

Capacity Availability Equivalent Availability

100% 0.988167 0.989963

50% 0.003591

0% 0.008242 0.010037

Subsystem 1


58

Table 2.20: Two-state capacity availability tables

The seven components/nodes/subsystems in Figure 2.19 operate in one of two states giving

a possible 128 grid states. VBA code was written in Excel to produce a 7x128 truth table.

Only the first four states are shown here in Table 2.21. The full table is contained in

Appendix 2C.

Table 2.21: Truth table for MTDC network

Each ‘1’ and ‘0’ in the truth table is replaced with the probability of that subsystem/node

being available and unavailable respectively. The probability of each state is then

calculated by multiplying the seven columns together as shown in Table 2.22.

Table 2.22: Probability table for MTDC network

In order to calculate the HVDC grid’s overall availability, the grid’s capacity associated

with each of the 128 states must be deduced. VBA code was written to calculate the grid’s

capacity for each of the 128 states. Table 2.23 shows the available capacity for the first 4

states with subsystem 6 and subsystem 7 having a capacity rating of 900MW each.

Table 2.23: Capacity table for MTDC network with Sub6=Sub7=900MW

Summing the probabilities of each state for each grid capacity level gives the grid’s

available capacity as shown in Table 2.24.


100% 0.98721

0% 0.01279

Offshore Node


100% 0.99635

0% 0.00365

Onshore Node


100% 0.97743

0% 0.02257

Subsystem 6 and7

State OFNA OFNB OFNC C1 C2 Sub 6 Sub 7

1 1 1 1 1 1 1 1

2 1 1 1 1 1 1 0

3 1 1 1 1 1 0 1

4 1 1 1 1 1 0 0

State OFNA OFNB OFNC C1 C2 Sub 6 Sub 7 Probability

1 0.98721 0.98721 0.98721 0.99310 0.99310 0.97743 0.97743 0.90654

2 0.98721 0.98721 0.98721 0.99310 0.99310 0.97743 0.02257 0.02093

3 0.98721 0.98721 0.98721 0.99310 0.99310 0.02257 0.97743 0.02093

4 0.98721 0.98721 0.98721 0.99310 0.99310 0.02257 0.02257 0.00048

State OFNA OFNB OFNC C1 C2 Sub 6 Sub 7 Capacity (MW)

1 1 1 1 1 1 1 1 1800

2 1 1 1 1 1 1 0 900

3 1 1 1 1 1 0 1 900

4 1 1 1 1 1 0 0 0


59

Table 2.24: Capacity availability table for MTDC network with Sub6=Sub7=900MW

The MTDC network shown in Figure 2.19, with each path to shore (sub6 & sub7) rated at

900MW, has an energy availability of 0.963. The energy availability was 0.965 for a radial

HVDC link as shown in Section 2.3. This indicates that three 600MW radial links would

have a higher energy availability than an 1800MW HVDC grid with each path to shore

rated at 900MW. Upgrading subsystems 6 and 7 to 1200MW increases the grid’s

availability as shown in Table 2.25.

Table 2.25: Capacity availability table for regional MTDC network with Sub6=Sub7=1200MW

The grid’s availability can be increased further by rating each path to shore equal to the

grid’s maximum capacity, as shown in Table 2.26.

Table 2.26: Capacity availability table for MTDC network with Sub6=Sub7=1800MW

It should be noted that the availability figures given in Table 2.26 are calculated from

component reliability indices for a DC voltage of ±300kV, however it is likely that any

1800MW VSC-HVDC scheme would be built at a voltage greater than this. Data on such

systems are even sparser than for ±300kV systems, and so this study has focused on

±300kV.

Capacity (MW) Availability Energy Availability

1800 0.90654

1500 0.01260

1200 0.03560

900 0.04395

600 0.00079

0 0.00052

Sub 6&7 =900MW

0.96302


1800 0.91915

1200 0.07954

600 0.00079

0 0.00052

Sub 6 & Sub 7 = 1200MW

0.97244


1800 0.96101

1200 0.03768

600 0.00079

0 0.00052

Sub 6 & Sub 7=1800MW

0.98640


60

2.5 Cost-benefit Analysis

This section compares the required capital investment against the calculated availability of

each of the following schemes:

1. 1800MW MTDC network with each path to shore rated at 900MW

2. Three 600MW radial HVDC links

3. 1800MW MTDC network with each path to shore rated at 1200MW

Since the schemes are being compared with one another, the components which are

common to all schemes can be ignored as the cost of these components would be the same

regardless. All of the schemes require three 600MW offshore nodes; hence the cost of

these items has been neglected. The costs of components used in this cost-benefit analysis

are from the ODIS 2011 annex and are for indicative purposes only [22].

Table 2.27: VSC converter costs12

Table 2.28: HVDC extruded cable costs13

Table 2.29: Cable installation costs

12

It is assumed that the VSC converter cost is for a single converter including AC and DC switchyard. 13

It is assumed the cost is per km of cable not per km of route (i.e one radial link requires 2x165km of cable).

Rating Min Max Average

300kV 500MW 65 80 72.5

320kV 850MW 85 105 95

500kV 1250MW 105 130 117.5

500kV 2000MW 125 175 150

VSC Converter Costs (£m)

Extruded HVDC Cable

Cross sec area Min Max Average Min Max Average

mm2 £k/km £k/km £k/km £k/km £k/km £k/km

1200 200 400 300 300 450 375

1500 250 400 325 300 450 375

1800 300 450 375 300 500 400

2000 300 500 400 350 550 450

±150kV ±320kV

Cable Installation Type Min Max Average

Twin Cable in Single Trench 0.5 0.9 0.7

Cable Installation Costs (£m/km)


61

From Table 2.27, Table 2.28 and Table 2.29, the cost of the three transmission schemes

(excluding the offshore nodes) can be estimated. The required cross sectional area for

HVDC submarine cables of different power ratings was estimated from data given in [34].

It is estimated that the 600MW, 900MW and 1200MW cables would require cross

sectional areas of approximately 630mm2, 1400mm

2 and 2200mm

2 respectively

14. The

costs of each scheme excluding the offshore nodes are given in Table 2.30.

Table 2.30: HVDC transmission scheme costs excluding offshore nodes

The HVDC grid with each path back to shore rated at 900MW (scheme 1) is the least

expensive scheme, but also has the lowest energy availability. The radial scheme (scheme

2) and the HVDC grid with each path back to shore rated at 1200MW (scheme 3) are more

expensive than scheme 1, but their energy availability is higher. Since higher availability

equates to greater revenue, it may make more economic sense to invest a greater amount of

capital to obtain a scheme with a higher availability.

The revenue lost each year due to a transmission scheme being unavailable can be

calculated using equation (2.5).

8760( )R F pLoss U P C hrs S (2.5)

£ /

R

F p

U Unavailability P Rated power in MW

C Capacity factor S Electricty sale pricein MW

14

Figures are based on a ±300kV submarine cable with a copper conductor in a moderate climate spaced closely together. These figures are indicative only.

Scheme Item Cost £m Total Cost £m

900km ±300kV 900MW Cable 337.5

Cable Installation 315

2 x 900MW Onshore Converter 200

990km ±300kV 600MW Cable 321.75

Cable Installation 346.5

3 x 600MW Onshore Converter 240

900km ±300kV 1200MW Cable 427.5

Cable Installation 315

2 X1200MW Onshore Converter 240

1. 900MW 852.50

2. Radial 908.25

3. 1200MW 982.5


62

The capacity factor for the three schemes is assumed to be 0.415

. This means that over the

course of the year the transmission scheme is only required to operate at 40% of its rated

power. The electricity sale price is assumed to be £150/MWh16

.

The annual savings for scheme 2 and scheme 3 compared with scheme 1 is calculated by

subtracting the annual loss of each scheme from the annual loss of scheme 1.

Table 2.31: Economic cost-benefit analysis

Dividing the additional capital investment of a scheme by that scheme’s additional annual

revenue is one way to calculate the number of years it takes to repay the additional

investment. If the number of years to repay the investment is less than the life expectancy

of the scheme, then it would suggest that it is worth investing the additional capital.

HVDC schemes can have a life expectancy in excess of 40 years [40]. This cost-benefit

availability analysis indicates that scheme 3 offers the best potential return for the investor.

Variations in capital costs, capacity factor and electricity price could significantly impact

on these results. This type of economic cost-benefit analysis is simplistic and should only

be used as an indication. An extensive cost-benefit analysis would need to consider the

projected inflation rates, interest rates, and electricity prices over the next 40 years as well

as taxation, exchange rates and commodity prices such as copper. This type of economic

forecasting is outside the scope of this work.

The purpose of this cost-benefit availability analysis is to clearly show the strong link

between the transmission scheme’s availability and its economic feasibility. Other factors,

such as system losses, must be taken into consideration when evaluating which

transmission scheme configuration offers the greatest financial reward.

15

Capacity factors of 0.35-0.45 are typical for offshore windfarms [35]. 16

This figure is based on 1MWh of energy generated by an offshore windfarm being equal to the electricity wholesale price plus two renewable obligations certificates (ROC) plus one levy exemption certificate (LEC). The electricity wholesale price is approximately £60/MWh [36] Accredited offshore windfarms are currently awarded two ROC’s per MWh [37] , where each ROC is worth £38.69 plus 10% for headroom [38] . One LEC has a value of £4.85 [39] .

Scheme Capital Cost

£m

Availability Loss

£m/yr

Saving

£m /yr

Additional Capital

Cost £m

Payback

(yr)

1 852.5 0.963 34.990 0 0 0

2 908.25 0.965 33.174 1.816 55.75 31

3 982.5 0.972 26.073 8.917 130 15


63

2.6 Summary

The most suitable transmission technology for the connection of large offshore windfarms

located more than approximately 50km from shore is VSC-HVDC. The technical and

commercial viability of connecting vast amounts of the UK’s generating capacity long

distances from shore is dependent upon the availability of VSC-HVDC schemes.

A radial VSC-HVDC scheme has been constructed for the purpose of performing

availability analysis. The scheme was based on the potential radial VSC-HVDC designs

outlined in National Grid’s ODIS, to ensure that the scheme represents a typical VSC-

HVDC link. Availability analysis, independent of methodology, can only ever be as good

as the input data. Unfortunately there are no true failure statistics for VSC-HVDC

components available in the public domain. The reliability indices for each component

within the scheme have therefore been estimated based on the most credible information

available.

The availability analysis for the radial VSC-HVDC scheme has shown the energy

availability due to forced outages to be approximately 96.5%. The DC submarine cable

was identified to be the key component which affects the availability of the transmission

scheme. Every effort must therefore be made to ensure failures of submarine cables are

minimised.

Availability analysis was carried out on a MTDC network with each of its two paths back

to shore rated at 900MW, 1200MW and 1800MW. This analysis showed that the

availability of the MTDC network is highly dependent upon the rating of the network’s

paths back to shore and that the grid with paths rated at 1200MW and 1800MW had a

higher availability than an equivalent radial system.

The strong link between a HVDC transmission scheme’s availability and economic

feasibility has also been established.

2.7 Conclusion

Connecting large amounts of offshore wind far from the shore is a clear way to increase

renewable energy generation. However, if the availability of the transmission systems

which facilitate the power transfer back to shore is poor, then the cost of energy to the

consumer will increase and will have a negative impact on the economy. Work to ensure a


64

high availability of these transmission schemes is therefore of paramount importance.

Availability analysis is a good tool to calculate the availability of these schemes and to

identify key components which have the greatest impact on this value. This would allow

mitigation strategies, which would improve the scheme’s availability, to be put in place

before the schemes are built. With the current lack of reliability data for VSC-HVDC

components, conclusive availability analysis cannot be performed, although the key

importance of the cable’s availability is highlighted. Furthermore, HVDC grids with

additional capacity have been shown to have a higher availability than an equivalent radial

HVDC scheme and consequently could provide a more cost-effective solution for the

connection of offshore windfarms.

Chapter 3 HVDC Protection

65

3 HVDC Protection

The interconnection of HVDC links has numerous potential benefits, including: a reduction

in the volume of assets, enhanced operational flexibility and improved network security

[1]. However, there is only one large scale (2000MW) commercial HVDC MT scheme

(LCC) currently in operation (Quebec) [41]. This is primarily because there are technical

difficulties with reversing power flow with LCCs, since DC current can only flow through

the converter in one direction. VSCs do not have this limitation and as such are more

suitable for MT systems. As the power rating of VSCs has risen, so has the interest in MT

HVDC systems [42, 43]. The UK National Grid has released cost estimates that show that

the connection of the UK windfarms using an integrated VSC-HVDC approach, as

opposed to a radial VSC-HVDC design, could result in a saving of around 25% [44].

A key challenge for the development of HVDC grids is the protection of the grid from DC

faults. At present, all commercial VSC-HVDC links are radial. In the event of a DC fault

the converters at each end of the link are blocked and the AC circuit breakers are tripped so

that the converter’s anti-parallel diodes do not conduct. Applying this approach to a HVDC

grid would require all VSCs connected to the grid to be blocked, and their respective AC

circuit breakers to be tripped, for a DC fault occurring anywhere on the grid. The faulty

section of the grid could then be isolated and the remaining healthy sections could be re-

energised.

The consequence of de-energising the entire grid due to single DC fault, however, becomes

increasingly severe as the power rating of the grid increases. As discussed in section 2.4,

the maximum in-feed loss permitted by NETS SQSS is 1.8GW [45]. This means that the

maximum amount of power a HVDC grid could in-feed to the UK grid would be limited to

1.8GW. Therefore in order for a relatively large MT HVDC grid to be technically and

commercially viable, the ability to isolate parts of the grid due to a fault, or to perform

maintenance without de-energising the entire grid, must be achieved.

A “HVDC circuit breaker” is a device which can be connected to a high potential

conductor and is able to interrupt and isolate a fault on a HVDC grid. A simple single line

diagram of a four-terminal HVDC system, with HVDC circuit breakers installed at both

ends of each HVDC cable, is shown in


66

Figure 3.117

. In this scenario, a fault occurring along cable 1 will trip the HVDC circuit

breakers at each end of the cable, isolating the faulty section of the grid and enabling the

healthy sections of the grid to remain in service. In this case, providing that the grid is

designed so that the disconnection of cable 1 does not result in a power in-feed loss to the

AC grid of more than 1.8GW, then there is no limit on the grid’s power capacity from a

protection point of view. At the time of writing, HVDC circuit breakers are however not

yet commercially available.

Windfarm1

Windfarm2

Converter1Converter2


= AC circuit breaker

= HVDC Breaker

Cable1

Cable3

Cable2Cable4AC Grid

Figure 3.1: Single line diagram for a four-terminal HVDC system

In this chapter the fundamental challenges associated with isolating faults in a HVDC grid,

as opposed to a HVAC grid, are highlighted. A review of potential HVDC circuit breaker

topologies at the time of investigation is given and a new HVDC circuit breaker topology

is presented. The new topology referred to as the “hybrid commutation circuit breaker” is

shown to be able to improve on some of the limitations of the existing designs and has led

to a UK patent application. Furthermore, selected HVDC circuit breaker topologies, which

have been published since the design of the hybrid commutation circuit breaker, are also

discussed, and the current state of HVDC circuit breaker development is summarised.

The production of a commercial HVDC circuit breaker will be a significant step forward

for the development of HVDC grids. However without a suitable protection strategy,

which is capable of tripping the correct HVDC circuit breakers within the necessary time

frame, the potential of HVDC grids will not be realised. A section of this chapter is

therefore dedicated to reviewing the challenges of developing a suitable protection

strategy.

17

It should be noted that in practice the converters are interconnected by two cables (positive and negative) and that each cable requires a circuit breaker at each end of the cable.


67

3.1 Basic Circuit Breaker Theory

In order to appreciate the challenge of interrupting DC current, it is first necessary to

understand basic circuit breaker theory. For completeness this basic theory has therefore

been included and more detail can be found in [46-48].

A circuit breaker is characterised by its ability to make load currents and interrupt both

load and fault currents, unlike other forms of switchgear which are not designed to

interrupt fault current. In the closed position, circuit breakers provide a passage for load

current, whereas in the open position they provide electrical isolation. In the event of a

fault, the circuit breaker must be capable of interrupting current that is well in excess of the

load current.

3.1.1 The Electric Arc

The separation of the circuit breaker’s contacts when current is flowing will result in the

production of an electric arc. The electric arc is a self-sustained electrical discharge that is

capable of sustaining large currents, behaves like a non-linear resistor, and has a voltage

drop [47]. The reader should be aware that the actual behaviour of an electric arc is more

complex than is discussed in this document, but for the discussion presented this simplified

model is sufficient. Generally speaking, electric arcs can be categorised into high pressure

and low pressure arcs. High pressure arcs occur in switchgear at or above atmospheric

pressure, such as in air blast or SF6 circuit breakers. In contrast, low pressure arcs exist in

switchgear below atmospheric pressure, for example in a vacuum circuit breaker.

A high pressure arc is a highly visible bright column consisting of ionised gases that permit

the flow of electric current. The total arc voltage is made up of voltage drops across the

anode, cathode and main body of the arc. The anode and cathode voltage drops exist in

very small regions of the arc, near the electrodes, and are mainly dependent upon the

electrode material. The voltage drop across the main body of the arc is dependent upon a

number of factors, including: the arc length, type of gas, gas pressure and current

magnitude. The electric arc’s conductivity increases in a non-linear fashion with a rise in

current magnitude. The arc voltage, therefore, decreases in a non-linear fashion as the

current magnitude increases, all other things being equal.

The conductivity for the main body of the low pressure arc is dependent upon the

electrodes, since it is composed of metal vapours which have been boiled off the


68

electrodes, not ionised gases [46, 47]. The arc voltage of a low pressure arc is, therefore,

significantly less than for a high pressure arc. The vacuum electric arc can exist in the form

of a diffuse or a constricted arc. For current values between a few hundred and a few

thousand amperes, the arc consists of a number of parallel arc channels between the two

electrodes, which is known as a diffuse arc [48]. When the current value increases beyond

a certain limit, which is dependent upon the electrode material and size, the arc channels

come closer together to form a single tight column. This is known as a constricted arc.

3.1.2 Arc Interruption

A useful way to describe the behaviour of an arc, and the requirements for arc interruption,

is by the black box model [46]. If we consider an arc of conductance, G, per unit length

and with a current, I, the input power per unit length, Pi, and the voltage gradient, Vg, can

be given by the equations (3.1) and (3.2).

g

IV

G (3.1)

2

i

IP

G (3.2)

The arc column has an amount of stored energy in the form of heat. The arc’s conductance

is a function of this energy, with conductance increasing with temperature. The amount of

stored energy, Ws, is therefore given by equation (3.3).

0

t

s i LossW W W dt (3.3)

This equation shows that the amount of stored energy in the arc is the integral of the input

energy, Wi, minus the losses, WLoss, due to convection, conduction and radiation. The arc’s

conductance varies with time which can be described by equations (3.4) and (3.5).

. s

s

dWdG dG

dt dW dt (3.4)

.( )i Loss

s

dG dGW W

dt dW (3.5)

Equation (3.5) shows that if the input energy is greater than the losses then the arc

conductance will increase. Ideally the arc’s conductance would be zero and therefore the

input energy needs to be less than the losses. At or near a current zero the input power to


69

the arc will be at or very close to zero. This means that the arc must be cooling, and so the

conductance will decrease. This is, therefore, an appropriate point to try and regain

sufficient dielectric strength between the contacts to extinguish and prevent the arc from

re-igniting. If not enough energy can be removed from the arc at or near zero current then

the arc will re-ignite. An arc itself may force interruption if the arc voltage is equal to or

greater than the system voltage. However, this is not possible in a HVDC system as the

system voltage will be significantly greater than the arc voltage.

In an AC system the circuit current is forced through zero twice per cycle, presenting an

opportune moment for an AC circuit breaker to interrupt the current. However, this is not

the case in a DC system and therefore interrupting current in a HVDC system is more

arduous. Furthermore, the fault current in an AC system is limited by the system’s

reactance which is not the case in a DC system.

3.2 HVDC Circuit Breaker Topologies

3.2.1 Review of HVDC Circuit Breaker Topologies

At the time of investigation a review of candidate HVDC circuit breakers from academic

papers, published patents and commercially available documentation was conducted. In

this section selected topologies are presented; additional topologies are presented in

Appendix 3A.

3.2.1.1 Passive/Active Resonance DC Circuit Breaker

The resonance DC circuit breaker consists of an AC breaker, BRK, in parallel with two

branches; one containing a series inductor, L, and capacitor, C, the other a surge arrester,

SA, as shown in Figure 3.2 [49-51].

BRKLs

SA

I Ib

Ic

Is

CL

Figure 3.2: Passive resonance circuit breaker

Under normal operation the line current, I, flows through the AC breaker, BRK. The

breaker will open its contacts upon receiving a trip order, which will cause a voltage arc to


70

be produced between its contacts. The line current will virtually remain the same and will

continue to flow through the breaker via the arc. As the arc length increases, the arc

voltage will increase and will begin to interact with the LC branch. The natural fluctuations

in arc voltage produce current oscillations in the LC circuit. These oscillations grow until

the current, Ic, is equal to or greater than the line current, I, producing a zero crossing in the

current flowing through the breaker, Ib.

At this point the breaker is able to extinguish the arc in the same way as it would for an AC

current. The line current then commutates through the LC branch and continues to charge-

up the capacitor. The capacitor voltage grows and opposes the circuit voltage, reducing the

line current until it ceases. The surge arrester will begin to conduct if the capacitor voltage

exceeds the surge arrester knee-point, limiting the voltage across the capacitor.

In 1984, field tests were carried out on a prototype circuit breaker of this type at the Pacific

HVDC Intertie. The breaker consisted of four devices, similar to the one shown in Figure

3.2, connected in series. The breaker successfully interrupted current up to 2kA at 400kV

[51]. Further development and tests of this type of breaker in 1988 showed an interrupting

capability of more than 4kA [52].

This topology is used in LCC HVDC schemes to interrupt and commutate current into

another path. An example of this is the Metallic Return Transfer Breaker (MRTB), which

is used to interrupt current flowing through the ground return path and to commutate it into

the metallic return. DC switches such as the MRTBs are connected at near earth potential

and as such have lower Transient Recovery Voltage (TRV) requirements than the system

voltage [53]. In addition, they are only required to interrupt and commutate the line

current, not to reduce the line current to zero, which reduces TRV requirements and the

energy which must be absorbed by the surge arrester [54].

The passive resonance circuit breaker can be modified to an active resonance breaker by

pre-charging the capacitor and connecting a mechanical switch in series with the LC

branch. Under normal operation the mechanical switch is in the open position. Once the

interrupter, BRK, is opened, the mechanical switch is closed at the appropriate time,

allowing the capacitor to discharge creating an oscillatory current. The remaining sequence

of events for current interruption is very similar to that of a passive resonance breaker. This


71

method allows higher current interruption in comparison to the passive resonance circuit

breaker, with tests showing successful interruption for currents up to 5 kA [50].

The time between fault inception and interruption for a resonance circuit breaker topology

is typically 30-100ms, in which time the DC current in a VSC scheme could reach in

excess of 20p.u. [55]. The interruption time is too long and the fault current is too high,

hence this circuit breaker topology is currently unlikely to be suitable for the protection of

HVDC grids.

3.2.1.2 Conventional Hybrid Solution

A hybrid circuit breaker is one that incorporates a minimum of two types of switching

technology, such as a mechanical and a semi-conductor switch. Figure 3.3 shows the

circuit diagram of a conventional hybrid circuit breaker [56]. This DC circuit breaker

consists of a fast mechanical switch, S, connected in parallel with two branches. One

branch contains a string of anti-parallel semi-conductor devices with turn-off capability,

connected in series with an inductor, L, and the other branch consists of a surge arrester,

SA.

Under normal operation the line current, I, flows through the mechanical switch. The

mechanical switch opens its contacts upon receiving a trip command creating an arc

voltage. The semi-conductor switches are then fired, which causes the line current to

commutate through the semi-conductor switches. Once enough time has lapsed for the

mechanical breaker to regain its dielectric strength, the semi-conductor switches are

turned-off. Due to the stored energy in the system’s inductance, Ls, the voltage will

increase rapidly until the surge arrester begins to conduct and clamp the voltage. The surge

arrester knee-point voltage must be higher than the system voltage in order to de-magnetise

the system’s inductance. It is common that the maximum knee-point voltage is chosen to

be 50% higher than the system voltage [56].

SLs

SA

I Ib

Ic

Is

L

Figure 3.3: Conventional hybrid circuit breaker


72

The speed of fault current interruption for this device is predominantly dependent upon the

speed of the fast mechanical switch. Fast mechanical switches for HVDC circuit breakers

are currently under development and hence very little information with regards to their

specification is available. However, based on available information it is expected that the

total opening time18

for the fast mechanical switch will be less than 2ms [57] and hence the

interruption speed of the conventional hybrid circuit breaker is significantly faster than the

resonance breakers. The fast mechanical switch must be rated appropriately to carry the

nominal load current and to block a specific maximum voltage, which is dependent on the

surge arrester’s rating. The semi-conductor switches must be able to interrupt the

maximum fault current and to block the specific maximum voltage. The surge arrester

must have an appropriate energy dissipation rating.

3.2.1.3 Hybrid Circuit Breaker with Forced Commutation Circuit

The plasma created by an electric arc affects the mechanical switch’s voltage withstand

slew rate. According to [56] the fast mechanical switch has a slew rate of 80V/μs, if there

is plasma between the two contacts, and 300V/μs, if no plasma has occurred. Therefore if

no electric arc occurs in the mechanical switch, it can regain its dielectric strength more

than three times faster resulting in a much shorter interruption time. This enables the

current to be interrupted faster, which reduces the maximum current magnitude. This can

be achieved by ensuring that no current is flowing through the mechanical switch when its

contacts are separated, which may be realised by using the circuit breaker topology in

Figure 3.4 [56].

During normal operation, the line current flows through the inductor, Lc, and the

mechanical switch, S. Upon detection of a fault, the commutation thyristors are fired and

the current commutates from the inductor to the pre-charged commutation capacitor, C1.

The current flowing through the mechanical switch will remain unchanged until the

capacitor voltage reverses polarity. This opposing voltage causes the line current to

commutate into the parallel branch, which consists of series-connected semi-conductor

devices with turn-off capability and an inductor, L. Once the current has transferred to path

Ic there is no current flowing through the mechanical switch and therefore the contacts can

18

The total opening time in this report is defined as the time it takes from the trip signal being received by the switch until its contacts are fully open.


73

be separated without arcing. The remaining sequence of events is the same as explained for

a conventional hybrid circuit breaker.

The forced commutation circuit breaker is able to interrupt fault current quicker than a

conventional hybrid circuit breaker, resulting in a reduction in the maximum current

magnitude. This leads to a reduction in the current interrupting capability requirement of

the semi-conductor switches and the energy dissipation rating of the surge arrester. The

fault current capability requirement of other components in the system may also be

reduced. Generally speaking, lower rated components are less expensive. An additional

commutation capacitor with pre-charging circuit, an inductor and a number of thyristors,

are however required for this topology, in comparison to the conventional hybrid circuit

breaker. The economic viability of this topology will therefore be very much dependent

upon the system voltage.

SLs

SA

I I1

Ic

Is

L

Lc

C1

IC1

Ib

Figure 3.4: Hybrid breaker with forced commutation circuit

3.2.1.4 Solid-state Circuit Breaker

This DC circuit breaker consists of a string of anti-parallel semi-conductor devices which

have turn-off capability connected in parallel with a surge arrester [56]. This configuration

is shown in Figure 3.5.

SA

Ib

Is

Ls

Figure 3.5: Solid-state circuit breaker


74

During normal operation the current flows through the semi-conductor devices. Upon

detection of a fault the semi-conductor devices are switched-off, resulting in a rapid

voltage increase until the surge arrester begins to conduct. The knee-point voltage for the

surge arrester is again set above the system voltage and therefore the surge arrester de-

magnetises the system’s inductance.

This topology requires no mechanical switch, and as such it is able to interrupt fault current

significantly faster than the other DC circuit breaker designs (≈0.2ms [58]). The semi-

conductor devices are therefore required to interrupt a much smaller fault current, and

hence lower rated devices may be used, or fewer devices connected in parallel. This design

may however require hundreds of series-connected semi-conductor devices to block the

TRV, resulting in very high on-state losses, which are about 30% of the losses of a VSC

station [57]. The breaker will also require a large cooling system. There is a pilot 10kV

solid-state circuit breaker in Hällsjön, Sweden [59].

3.2.2 Hybrid Commutation HVDC Breaker (New)

To improve on the key limitations of the existing HVDC circuit breaker topologies, a new

topology was developed as part of this PhD work, which has resulted in a UK patent

application [60]. The hybrid commutation HVDC circuit breaker contains three branches

connected in parallel and is shown in Figure 3.6. The first branch consists of a semi-

conductor switching device with turn-off capability, T, and a mechanical switch, S,

connected in series. The semi-conductor switch, T, has a surge arrester, SD, connected

across its terminals to ensure that the voltage rating of the device is not exceeded. The

second branch is made up of a semi-conductor switching device, Tc, connected in series

with a capacitor, C, whilst the third branch contains a surge arrester, SA.

S

Tc

T

SASD

Ls

C

I 1

3

2

Figure 3.6: Hybrid commutation HVDC circuit breaker


75

During normal operation the line current, I, flows through the semi-conductor switch and

the mechanical switch. At the instance the fault current is detected, the semi-conductor

switch is turned-off and the commutation thyristor is turned-on. This switching action

causes the line current to rapidly commutate from branch one into branch two. The line

current is no longer flowing through the mechanical switch and, therefore, its contacts can

separate without creating an electric arc. The line current charges-up the capacitor until the

surge arrester’s knee-point voltage is reached, resulting in the line current commutating

into branch three. The surge arrester de-magnetises the system’s inductance and the line

current ceases.

3.2.2.1 Advantages

Vastly lower on-state losses in comparison to the solid-state circuit breaker

In contrast to the solid-state circuit breaker, the hybrid commutation circuit breaker

may only require one semi-conductor switch in the normal conduction path. This is

because the voltage across this branch is distributed between the semi-conductor switch

and the mechanical switch, where the voltage across the semi-conductor switches is

limited by the parallel surge arrester. This approach allows a single semi-conductor

switch connected in series with a low contact resistance mechanical switch to provide

the normal conduction path, resulting in significantly lower on-state losses than the

solid-state circuit breaker.

Shorter initial interruption speed in comparison to other known mechanical

HVDC circuit breaker topologies

The initial interruption speed refers to how quickly the fault current is diverted from

the primary conduction path. The majority of hybrid circuit breaker designs use the arc

voltage to commutate the fault current from the primary path into the secondary path.

The current commutation time is dependent upon how quickly the mechanical contacts

open, and the magnitude of the arc voltage, amongst other factors. From the instance

the mechanical switch receives the command to open, there will be a delay before its

contacts begin to separate, and the arc voltage is not likely to reach more than 1kV. The

hybrid circuit breaker with forced commutation (Section 3.2.1.3) uses a pre-charged

capacitor to perform the current commutation from the primary path. For this device,


76

the pre-charged capacitor must fully discharge and then charge in the opposite direction

to provide the commutation voltage to force the fault current into the secondary path.

In contrast, the commutation voltage for the hybrid commutation circuit breaker

(Figure 3.6 - Section 3.2.2) is the voltage across the semi-conductor switch at the

instance it is turned-off. The voltage across the circuit will increase rapidly and is only

limited by the surge arrester, SD, which is likely to have a knee-point voltage in excess

of 4kV. Therefore the commutation voltage of the hybrid commutation circuit breaker

develops faster and has a greater magnitude than the other hybrid designs resulting in a

shorter commutation time.

Arc-less operation

Using a mechanical switch to provide the commutation voltage has a negative effect on

the interruption time. Since the hybrid commutation circuit breaker uses a semi-

conductor switch to perform the initial interruption, and to commutate the current into

the parallel branch, there is no current flowing through the mechanical switch when its

contacts are separated and, therefore, no electric arc. This increases the mechanical

switch’s blocking slew rate. Furthermore, the mechanical switch experiences no

electric arc stress, which is likely to improve the reliability and reduce the maintenance

requirement of this device.

At the time of developing the hybrid commutation circuit breaker, the only other

known hybrid HVDC circuit breaker which performed commutation without an arc

voltage was the hybrid breaker with a forced commutation circuit (Section 3.2.1.3).

The hybrid commutation circuit breaker does however, have several advantages in

comparison to the hybrid breaker with a forced commutation circuit:

1. Faster initial interruption speed, resulting in a lower fault current

2. Requires less components

3. The control strategy for the device is less complex

4. Successful operation is less sensitive to the circuit parameters

5. Less expensive due to lower fault current and less components

3.2.2.2 Initial Simulation

Initial simulations were used to demonstrate the hybrid commutation circuit breaker’s

principle of operation for fault current interruption, where the PSCAD schematic is shown


77

in Figure 3.7. With reference to Figure 3.8, the simulation results can be described as

follows:

1. Nominal line current, IL, flows through the GTO thyristor and mechanical switch.

2. A short-circuit fault is applied at 0.1s and the line current rapidly begins to rise.

3. 0.6ms later the GTO thyristor is turned-off and the commutation thyristor is turned-

on, causing the line current to commutate from the mechanical switch into the

thyristor-capacitor branch, Ic. The mechanical switch (BRK) contacts are separated

without creating an electric arc.

4. Capacitor voltage increases until the surge arrester knee-point voltage is reached

and the surge arrester begins to conduct, Isurge.

5. Surge arrester de-magnetises the system inductance.

6. Line current ceases.

Figure 3.7: PSCAD schematic for the hybrid commutation HVDC circuit breaker

Figure 3.8: Example simulation results for the hybrid commutation HVDC circuit breaker


78

These simulation results show that the hybrid commutation HVDC circuit breaker is viable

in principle.

3.2.3 Latest HVDC Circuit Breaker Designs

This section presents selected breaker topologies which were published after the hybrid

commutation HVDC circuit breaker was designed.

3.2.3.1 Proactive Hybrid Breaker

The proactive hybrid DC breaker is shown in Figure 3.9 and is currently being developed

by ABB [57]. The first branch comprises a disconnector (fast mechanical switch)

connected in series with an auxiliary DC breaker (semi-conductor switch) which is very

similar to the hybrid commutation HVDC circuit breaker shown in Figure 3.6. The second

branch contains the main DC breaker which is separated into several sections. Each section

contains a stack of IGBTs with anti-parallel diodes and a surge arrester connected in

parallel with the stack. The main DC breaker is rated for the full voltage and current

breaking capability. The auxiliary breaker contains a small number of series-connected

IGBTs as it is only required to block a few kV.

Figure 3.9: Proactive hybrid DC breaker

During normal operation, the fast disconnector, auxiliary DC circuit breaker and main DC

breaker are closed/on. The main DC breaker has a much higher resistance than the

auxiliary DC breaker, due to the vastly higher number of series-connected semi-conductor

switches. The load current therefore flows through the auxiliary breaker under normal

operation. The line current is commutated to the main breaker by switching-off the axillary

breaker, once the overcurrent threshold is reached. The fast disconnector can then open

without creating an electric arc. Once the disconnector is fully open, and therefore able to

block the recovery voltage, the main DC breaker can be switched-off. The breaker is said

to be able to limit the line current by operating the main breaker, so that the voltage across

the DC inductance is controlled to zero [57]. This allows the protection strategy further

Disconnector

Auxiliary DC Breaker

Main DC Breaker

Current

Limiting

Reactor

Residual

DC

Current

Breaker

Hybrid DC Breaker


79

time to determine whether or not the breaker needs to be tripped. The main DC breaker is

switched-off once the breaker receives a trip signal or the breaker reaches its maximum

time limit for current limiting. The instance that the main DC breaker is switched-off, the

voltage across the breaker rapidly increases until it is clamped by the surge arresters. In the

event that the breaker is not required to interrupt the fault current (i.e. the fault is on a

different cable) the line current can be transferred back to the primary path by closing the

disconnector and turning-on the auxiliary switch.

The current limiting mode allows the protection strategy additional time to select the faulty

cable19

. Furthermore, if two such breakers are connected in series the back-up breaker

could also be instructed to commutate the line current into the main DC breaker, so that the

DC current can be interrupted very quickly (≈0.2ms) if the primary breaker fails [57].

ABB are currently building a prototype of this device for a 320kV system with a nominal

current of 2kA. The device is expected to achieve a current breaking capability of 9kA in

less than around 2ms from fault inception. Currently the main DC breaker has been shown

to be capable of breaking currents above 9kA at 120kV [57].

An international patent application for this breaker has been filed [61]. ABB have

subsequently filed two additional patent applications for HVDC circuit breakers which

have a similar primary conduction path to the hybrid commutation HVDC circuit breaker

(Section 3.2.2) [62, 63]. These patents were filed before the patent for the hybrid

commutation HVDC circuit breaker [60]. The patent claims for the hybrid commutation

HVDC circuit breaker, were likely to infringe on the claims made in these patents,

especially [62, 63] due to the use a surge arrester in the primary condition path. It is for

these reasons that an international patent for the hybrid commutation HVDC circuit

breaker was not pursued.

3.2.3.2 Hybrid DC circuit breaking device (Siemens)

The hybrid DC breaking device shown in Figure 3.10 is currently patent pending and was

submitted by Siemens [64]. This topology is very similar to the hybrid commutation

HVDC breaker shown in Figure 3.6. The main difference between the two topologies is

that the hybrid DC circuit breaking device does not contain a thyristor valve in the

secondary conduction path.

19

The protection strategy must still operate before the grid DC voltage falls below acceptable levels.


80

Figure 3.10: Hybrid circuit breaking device

The principle of operation for the hybrid circuit breaking device is effectively the same as

the hybrid commutation HVDC breaker, which is described in Section 3.2.2. The key

difference is that the current flowing through the capacitor in this topology may oscillate,

whereas the inclusion of the thyristor valve in the hybrid commutation HVDC breaker

prevents the capacitor current from reversing direction. One embodiment of the hybrid

circuit breaking device described in the patent prevents the current in the capacitor from

oscillating by connecting a residual breaker in series with, Ls.

The international patent application for this device was filed after the UK patent

application for the hybrid commutation HVDC circuit breaker [60, 64].

3.3 Comparison of HVDC Circuit Breakers

The HVDC circuit breaker topologies presented in this chapter have been categorised into

5 types and each type has been rated in terms of their speed, on-state losses and complexity

as shown in Table 3.1. Each type of circuit breaker is rated out of 5 for each characteristic,

with 1 being the best.

Type of breaker Topologies Speed Losses Complexity

Resonance 3.2.1.1 5 1 2

Arc voltage hybrid 3.2.1.2 3 1 3

Arc-less hybrid without auxiliary breaker 3.2.1.3 2 1 4

Arc-less hybrid with auxiliary breaker 3.2.2, 3.2.3.1,

3.2.3.2 2 2 3

Solid-state 3.2.1.4 1 5 3

Table 3.1: Comparison of HVDC breaker types

The resonance breakers are generally not considered to be technically viable for the

protection of VSC-HVDC grids due to their slow interruption speed (>30ms). The solid-

state circuit breaker is significantly faster than the other HVDC circuit breakers (≈0.2ms).

S

SA

Ls

C

I


81

However, the very high on-state losses, which are about 30% of the losses of a VSC station

[57], make this device unsuitable.

The arc-less hybrid breaker without auxiliary breaker, offers improved interruption speed

in comparison to the arc voltage hybrid breakers at the expense of increased complexity.

The arc-less hybrid breaker with auxiliary breaker, further improves on the interruption

speed of the arc-less hybrid breaker without auxiliary breaker, but at the cost of increased

losses. However these losses are insignificant in comparison with a VSC station. The arc-

less hybrid breakers with auxiliary breakers also give greater operational flexibility with

reduced cost and complexity. The interruption speed of the arc-less hybrid breakers with

auxiliary breaker is expected to be about 3ms [57, 58, 65]. ABB have built a prototype of

arc-less hybrid breakers with auxiliary breaker and Siemens has filed at least one patent for

this type of breaker. It is for these reasons that this type of HVDC circuit breaker is likely

to be the first generation of HVDC breakers to be installed in a VSC-HVDC grid. The use

of a fully rated solid-state circuit breaker in the secondary path of the proactive hybrid

breaker offers greater operational flexibility than the other two topologies, however it is

also likely to require a larger footprint and be more expensive. It is clear from Table 3.1

that all designs to date have disadvantages and that further research is required.

3.4 Protection Strategies

Protection strategies which can locate and isolate DC faults MTDC grids are discussed in

several sources [66-70]. Many of these strategies require the entire grid to be de-energised

in order to isolate the faulty section of cable, which is likely to be unacceptable for HVDC

grids with a capacity in excess of 1.8GW. Therefore only protection strategies which are

potentially capable of isolating the faulty section of grid without de-energising the entire

grid are discussed.

3.4.1 Protection System Requirements

Any protection system should have the following properties [58, 71]:

Sensitivity – detect every fault

Selectivity – only operate under fault conditions and only affect the faulty section

Speed – act before the fault could potentially cause damage to equipment or could

no longer be interrupted by the circuit breakers


82

Reliability – be reliable and have a back-up system in the case of primary

protection system failure

Robustness – be able to act in a degraded mode as well as a normal mode and be

able to discriminate between faults and other operations such as set-point changes

Seamless – after the fault clearance the healthy part of the system should continue

to operate in a secure state

In a HVDC grid the DC cable protection system must be able to identify line-to-ground

faults and line-to-line faults. A line-to-ground fault can occur when one of the cables is

damaged and a line-to-line fault can occur when both cables are damaged simultaneously.

An example of this could be when both cables are buried in a single trench and are

damaged by a single anchor strike.

The primary protection system should be selective so that it only trips the HVDC circuit

breakers necessary to isolate the faulty section of the grid. This means that the circuit

breakers responsible for protecting a particular cable should not act for faults on a different

cable, and that faults in other protections zones, such as the converter, should not trigger

the protection relays in the DC cable protection zone.

Leading HVDC circuit breakers designs are expected to be able to interrupt a fault current

of approximately 10kA in around 3ms. Based on a nominal DC current of approximately

1.7kA and a fault current rate of rise of about 2kA/ms for the worst case fault condition,

the breakers current breaking limit would be reached in approximately 4ms from fault

inception. Limiting the fault current rate of rise to 2kA/ms would require significantly

larger cable/line reactors than installed on existing VSC-HVDC schemes [57]. This leaves

about 1ms for the protection system to detect and identify the faulty section of cable and to

then instruct the appropriate breakers to open, unless the HVDC breaking time or the fault

current rate of rise can be reduced further.

The protection system must have a back-up to give a high degree of reliability.

Furthermore, once the faulty section of the grid has been isolated, the control and

protection systems must interact appropriately to ensure that the healthy section of the grid

can operate in a secure manner.


83

3.4.2 Detection and Selection

A simple diagram of a four-terminal HVDC grid is shown in Figure 3.11. The HVDC

circuit breakers at the end of each cable are responsible for clearing faults on their

respective cables. If a fault occurs on cable 1 the protection system is required to identify

that a fault has occurred on cable 1 and to instruct only the HVDC circuit breakers at each

end of this cable to trip. All other HVDC circuit breakers should remain closed.

Windfarm1

Windfarm2



= AC circuit breaker

= HVDC Breaker

Cable1

Cable3

Cable2Cable4AC Grid

Figure 3.11: Single line diagram for a four-terminal HVDC system

VSCs have large capacitor banks connected to the DC side of the converter, which

discharge in the event of a fault. Hence, DC cable faults are typically characterised by a

rapid increase in the DC fault current and a rapid decrease in the DC voltage20

.

Cable faults could therefore be detected by one or more of the following protection

methods:

Overcurrent: trip breaker if the DC current exceeds a set threshold for a set period

of time

Undervoltage: trip breaker if the DC voltage drops below a set limit for a set

period of time

di/dt: trip breaker if the rate of increase of current exceeds a set limit

dv/dt: trip breaker if the rate of decrease of DC voltage exceeds a set limit

The protection strategies described above are not individually particularly selective and it

is likely that employing these protection strategies would result in HVDC breakers on

nearby cables tripping. Distance protection relays, which measure the distance to the fault

20

The fault current due to line-to-line faults is more severe than line-to-ground faults, as the capacitor bank connected to the positive pole, and the capacitor bank connected to the negative pole discharge. The configuration (symmetrical monopole, bipole etc.) and the type of VSC (Two-level, MMC etc.) employed can affect the fault current and voltage characteristics.


84

by dividing the voltage measurement by the current measurement, are widely used in AC

grids [71]. Distance protection is however, not considered appropriate for DC grids for a

number of reasons, including the cable’s low resistance, which results in large distance

errors due to small measurement errors.

There are other protection methods, such as differential cable protection and cable

directional protection, which offer cable selectivity [58]. Differential cable protection trips

the HVDC circuit breakers at each end of the cable if the difference between the current at

the sending and receiving ends of the cable is above a specified limit. Cable directional

protection trips the breakers if the current through each breaker is flowing in opposite

directions. However, these protection strategies require communication between breakers

at each end of the cable. Reliance upon communication between platforms is unlikely to be

acceptable, due to the inherent time delays and the possibility of the fibre optic cable

becoming damaged.

The following example, shown in Figure 3.12, demonstrates the effect of time delays, due

to travelling waves and communication delays, for the cable directional protection scheme.

Under normal operation, power flows from the sending end to the receiving end of the

cable. A fault is applied to the sending end of the cable and the current through breaker B1

begins to rise rapidly.

B1 B2

Sending Receiving

100km DC Cable

100km Fibre Optic Cable

Figure 3.12: Cable directional protection

The speed of an electromagnetic wave through XLPE is approximately 2x108 m/s, hence it

takes more than 0.5ms before the current flowing through the breaker at the receiving end

of the cable, B2, changes direction21

. The speed of light via a fibre optic cable is also

21

Based on an XLPE permittivity value of 2.3, the speed of an EM wave through the cable can be

approximately calculated as follows: - 8 63 10 / 2.3 197.814 10 /m s m s . Therefore the time it takes for

the current wave due to the fault to arrive at breaker B2, is 6100 197.814 10 505.525km s .


85

roughly 2x108 m/s

22. It therefore takes a further 0.5ms for B2 to signal to B1 that the

current direction has changed. Hence it takes about 1ms from the instance the fault occurs

until the HVDC breaker, B1, is able to acknowledge that there is a fault. Note also that

longer cables compound this problem. The time delays and the reliability concerns make a

DC protection system requiring communications between offshore platforms an unlikely

solution.

The use of travelling wave detection or signal processing (Fourier or wavelet analysis) has

been identified as a potential tool to find the faulty cable in a DC grid [71]. In [73]

travelling waves were used to find a faulty line for a DC grid using overhead lines [71]. In

[66] a protection methodology was developed using wavelet analysis to analyse local

measurement signals to identify a faulty cable in a HVDC grid.

The wavelet transform is a mathematical tool, similar to the Fourier transform for signal

analysis [74]. Fourier analysis is not a particularly good technique for analysing non-

periodic signals such as transients, because when transforming the complete signal into the

frequency domain the time information is lost. This problem can be overcome to some

extent by using a technique called the Short-time Fourier Transform (STFT) which

analyses a small section of the signal at a time. However, the major drawback is that the

time window is the same for all frequencies. Wavelet analysis circumvents this problem

by using variable sized windows, which enables a long time window to be used for low

frequency information and a shorter time window to be used for high frequency

information. Each scale in Figure 3.13 (right) represents a band of frequencies.

Time

Fre

qu

en

cy

Time

Sca

le

Figure 3.13: STFT (left) and Wavelet (right) views of signal analysis

Each HVDC breaker could process the local voltage and current measurements, using

wavelet analysis to identify fault characteristics. The protection algorithm in [66, 75]

22

An optical fibre is a very thin wire of glass. The speed of light in glass is about two thirds of its value in free space [72]


86

acknowledges that a fault has occurred if two of the following three detection modules

indicate that a fault has occurred:

1. M1: fault detection by using voltage wavelet coefficients

2. M2: fault detection by using current wavelet coefficients

3. M3: fault detection by using the voltage derivative and magnitude

The two out of three selection system is employed to improve the reliability of the signal

processing, by helping to prevent the protection system from tripping the HVDC breaker

when no fault has occurred. The thresholds used to determine if a fault has occurred or not

were set using simulations, with a particular focus on the worst case scenarios (fault at

sending end and fault at receiving end of cable). Faults on cables near to the DC bus where

other cables are connected, caused the thresholds in the non-faulty cable to be reached.

This selectivity problem was overcome by comparing the wavelet voltage coefficients of

all the breakers connected to the same DC bus and by tripping the breaker with the highest

coefficient. The protection methodology was shown to be able to determine which cable

was faulty within 1ms, without the use of communications.

The lack of experience using wavelet analysis in the protection of power systems may

make its use as the main protection method, a cause for concern. If this is the case then it is

more likely that a protection strategy based on a combination of more traditional protection

methods will be sought. The preferred choice could be a protection strategy which uses

voltage, current, dv/dt and di/dt measurements with wavelet analysis for optimum

detection and selection, but which is not solely reliant upon wavelet analysis.

In one of the worst scenarios for selecting the faulty cable was when a fault was applied on

a cable near to the DC bus. This issue was avoided by comparing wavelet voltage

coefficients. This selectivity problem could also be overcome without the use of wavelet

analysis by checking the magnitude and direction of the current flowing through each cable

connected to the DC bus. Only the current in the faulty cable will increase in the direction

from the DC bus towards the fault, as shown in Figure 3.14.


87

VSCDC Bus

VSCDC Bus

Figure 3.14: DC current direction before (left) and after (right) cable fault6

The current direction selectivity could solve the issue of breakers connected to the same

DC bus (same platform) incorrectly tripping. This technique cannot however be used to

prevent breakers on nearby platforms from tripping. For example, in Figure 3.15 a fault is

applied to cable 2 very near to the VSC1 DC bus. If the protection thresholds are exceeded

in breakers B1 and B2, the DC cable protection system for VSC1 can identify that B3

needs to be tripped by checking the current magnitude and direction. However, if the

protection thresholds in breaker B5 are exceeded, the DC cable protection system for

VSC2 would check the current direction and as a result, would trip B5, incorrectly

assuming that there is a fault on cable C1. Hence, the thresholds in B5 must not be

exceeded for a fault on cable C2.

VSC 1DC Bus

VSC 2DC BusB1

B2

B3

B4

B5

B6

C1

C2

Figure 3.15: Fault on cable C2

3.4.3 Back-up Protection

The protection system must have a high degree of reliability. This means that if any

component in the protection system fails, the system must still operate. The failure of a

HVDC breaker is a key concern for the protection of a HVDC grid. This is a valid concern,

considering the fact that there are no HVDC breakers commercially available and therefore

there is no operational experience. At present, the best method is to ensure that the HVDC

circuit breakers are highly reliable in theory and that a back-up protection system is in

place in the event that a HVDC breaker fails. The reliability of HVDC breakers could be

improved by duplicating all critical components within technical and economic boundaries.


88

The back-up protection system must not interfere with the primary protection system and it

must ensure that, based on present procedure, no more than 1.8GW is disconnected from

the UK AC grid. This section of the document outlines three possible back-up protection

strategies.

In Figure 3.16 (left) each DC cable is protected by two HVDC circuit breakers. In the

event that one breaker cannot clear the fault on its cable the other breakers connected to the

same DC bus could be tripped, isolating the DC bus from the rest of the HVDC grid. The

AC circuit breakers for the VSC connected to the corresponding DC bus would also need

to be tripped. The isolation switches installed at each end of the faulty cable (not shown in

Figure 3.16) could then be opened, allowing the VSC’s AC circuit breaker to be closed

energising the DC bus. The HVDC circuit breakers connected to the non-faulty cable could

then be closed. This method requires the DC bus to be completely isolated from the rest of

the DC grid for several hundred milliseconds [76]. This means that the loss of the DC bus

must not reduce the power injected into the AC grid by more than 1.8GW. Installing a

HVDC circuit breaker between the VSC and DC bus could reduce the amount of time that

the DC bus is disconnected to less than 100ms23

. Upgrading the standard half-bridge

converter to a full-bridge converter, capable of blocking fault current, could replace the

need to install a HVDC breaker between the VSC and the DC bus.

The above strategy requires that every HVDC breaker is capable of breaking fault current

in both directions. If each breaker is however, only required to break current in one

direction, the size and cost of the breaker could be reduced. Instead of operating the

breakers connected to the same DC bus as the faulty breaker, the breakers at the opposite

end of the cable could break the fault current as shown in Figure 3.16 (centre). The use of

uni-directional breakers could also lead to a more simplistic protection strategy.

23

The breaking time of a HVDC breaker is expected to be about 3ms and the opening time of a fast mechanical isolator is likely to be less than 40ms.


89

VSC 2

VSC 3

VSC 1

VSC 2

VSC 3

VSC 1

VSC 2

VSC 1

AC breaker closed

HVDC breaker closed

AC breaker open

HVDC breaker open

VSC 3

C3

C4

Figure 3.16: Back-up protection strategies : Cable bi-directional breakers (left) Cable uni-directional

breakers (centre) Ring bus (right)

In both of the aforementioned protection strategies, the failure of any HVDC breaker leads

to the entire DC bus being temporarily disconnected from the rest of the HVDC grid. A

fault on the DC bus, or the connection between the VSC and the DC bus, also requires the

entire DC bus to be permanently disconnected until the fault is removed, or until the faulty

section can be isolated and bypassed using disconnectors. If this bus is used as a transit bus

(transfer energy from VSC1 to VSC3) problems may ensue. These issues can be solved to

an extent by using a ring bus as shown in Figure 3.16 (right). The failure of any HVDC

breaker in the ring bus leads to two connections (C3 and C4), as opposed to four

connections, being disconnected from the HVDC grid. Hence, disconnecting any two

adjacent connections must not exceed the maximum in-feed loss of 1.8GW to the AC grid.

The ring bus, however, requires four bi-directional HVDC breakers, and the primary

protection strategy must select and trip four breakers for a single cable fault. This indicates

that the ring bus would be more expensive than the other two strategies and that the

primary protection system would be less reliable.

There are other DC substation configurations that would be possible; each with advantages

and disadvantages. It may be the case that installing uni-directional breakers is the best

solution for a terminal with two DC cables and that the ring bus is better suited for three

cables. It is therefore important that different configurations can be used within the same

HVDC grid and that the different protection strategies are compatible.

3.4.4 Seamless and Robust Protection System

Upon fault clearance, current flowing through the healthy converters and cables must be

redistributed carefully to ensure that components are not overstressed and to prevent other

breakers from needlessly tripping. This requires control and protection interaction studies


90

to be carried out for the worst case scenarios. The protection system must be able to protect

the grid for all foreseeable grid configurations, not just the nominal configuration. For

example, if a VSC is disconnected from the grid, due to a fault or for maintenance

purposes, the breaker protection settings must still be valid to provide adequate protection

for the grid. It is unlikely that it would be permissible to update breaker protection settings

for different grid configurations, as this would require communications.

3.5 Conclusion

In this chapter, the requirement for a HVDC circuit breaker has been identified and

selected breaker topologies have been described and compared. The comparative analysis

concludes that arc-less hybrid circuit breakers with an auxiliary circuit breaker are the most

suitable type of HVDC circuit breaker for the protection of a HVDC grid. This is

predominantly due to their ability to achieve the best balance between operation speed and

on-state losses. The chapter also outlined the key requirements of a DC cable protection

system for a HVDC grid and reviewed potential protection strategies to identify and locate

a faulty cable. It is likely that a protection strategy will be developed based on a

combination of traditional techniques (dv/dt, overcurrent etc.) used in conjunction with

modern techniques (wavelet analysis) for optimum detection and selection.

Chapter 4 MMC-HVDC

91

4 MMC-HVDC

A simplified diagram for the offshore connection design of a Round 3 windfarm

employing a 1GW VSC-HVDC point-to-point scheme is shown in Figure 2.1. In order to

assess the steady-state and transient performance of the VSC-HVDC links, high fidelity

EMT models are required. The aim of this chapter is to describe the development of a high

fidelity EMT model of a MMC-HVDC link employed for the connection of a typical

Round 3 windfarm.

At the time this modelling work was undertaken, VSC-HVDC transmission system models

were mainly based on two-level VSCs with PWM control [77-79]. There were a small

number of publications which had modelled VSC-HVDC transmission systems with

MMCs [10, 80, 81], however these publications were limited in scope and lacked key

information required to produce a detailed MMC-HVDC transmission system model. The

work in this thesis provides a more detailed and complete description of EMT modelling

for MMC-HVDC systems.

Figure 4.1 shows a diagram of the MMC VSC-HVDC link for a Round 3 windfarm. In this

chapter the structure, operation, controllers and parameters for each component are

discussed in detail. The control functions that are required for a MMC-HVDC

interconnector are also described.

Figure 4.1: MMC VSC-HVDC link for Round 3 windfarm

4.1 MMC Structure and Operation

The basic structure of a three-phase MMC is shown in Figure 4.2. Each leg of the

converter consists of two converter arms which contain a number of Sub-modules (SMs),

and a reactor, Larm, connected in series. Each SM contains a two-level half-bridge

converter with two IGBTs and a parallel capacitor. The module is also equipped with a

bypass switch to remove the module from the circuit in the event that an IGBT fails, and a

XT=15%

Yg/D

MMC2-Offshore

Vs2(abc)

220kV 370kV

D/Yg

MMC1-Onshore

Is1(abc)

PCC1XT=15%

370kV 410kV

Vs1(abc)

Idc2

Is2(abc)

AC voltage magnitude and

frequency control

1000MW

Windfarm

Active and reactive power

control

DC link voltage control and

AC voltage magnitude control

Rbrak

Vdc2=600kV

165km DC cablePCC2

Larm=45mH CSM=1150μF

Vn

SCR=3.5

Zn

400kV

Idc1

Chapter 4 MMC-HVDC

92

thyristor, to protect the lower diode from overcurrent in the case of a DC side fault. The

conduction states of a SM are displayed in Figure 4.3.

Figure 4.2: Three-phase MMC

The converter is placed into energisation mode when it is first powered-up. In order to

energise the SM capacitor the upper and lower IGBTs are switched-off. If the arm current

is positive then the capacitor charges and if the arm current is negative then the capacitor is

bypassed. This energisation state does not occur under normal operation.

Figure 4.3: SM conduction states

The SM terminal voltage, VSM, is effectively equal to the SM capacitor voltage, Vcap, when

the upper IGBT is switched-on and the lower IGBT is switched-off. The capacitor will

charge or discharge depending upon the arm current direction. With the upper IGBT

switched-off and the lower IGBT switched-on, the SM capacitor is bypassed and hence

Single

IGBT

Sub-module

+Vdc/2

Va

Vua Vla

Vcap

Iarm

VSM

ArmSM2

SMn

SM1

SM2

SMn

SM1

SM2

SMn

Larm

IuaSM1

Rarm

Idc

SM1

SM2

SMn

SM1

SM2

SMn

SM1

SM2

SMn

-Vdc/2Ila

Vb

Vc

Idc

Iarm

VSM

VCap

Iarm

VSM

Iarm

VSM

Iarm

VSM

Iarm

VSM

Iarm

VSM

Iarm>0

Iarm<0

Energisation mode - Upper IGBT

off and Lower IGBT offSM on - Upper IGBT on and Lower

IGBT off

SM off - Upper IGBT off and Lower

IGBT on

VCap

VCap

VCap

VCap

VCap

Chapter 4 MMC-HVDC

93

VSM is effectively at zero volts. Each arm in the converter therefore acts like a controllable

voltage source, with the smallest voltage change being equal to the SM capacitor voltage.

With reference to the equivalent circuit for phase A, as shown in Figure 4.4, the following

equation for the phase A converter voltage can be derived:

2

dc uaa ua arm arm ua

V dIV V L R I

dt (4.1)

2

dc laa la arm arm la

V dIV V L R I

dt (4.2)

The upper and lower converter arm currents, Iua and Ila, consist of three main components

as given by equations (4.3) and (4.4) [82]. The current component which is common to

both arms (3

dc

circ

II ) is commonly referred to as the difference current, Idiff.

3 2

dc aua circ

I II I (4.3)

3 2

dc ala circ

I II I (4.4)

Figure 4.4: Equivalent circuit for phase A

The circulating current, Icirc, is due to the unequal DC voltages generated by the three

converter legs. Substituting equations (4.3) and (4.4) into equations (4.1) and (4.2), and

then summing the resultant equations, gives equation (4.5).

2 2 2

la ua arm a arma a

V V L dI RV I

dt

(4.5)

Equation (4.5) shows that the converter phase voltages are effectively controlled by

varying the upper and lower arm voltages, Vua and Vla. Equation (4.5) may be re-written as

Vdc/2

Vua

Larm Rarm Larm Rarm

Vla

Vdc/2

Va ZL

0V

IlaIua

Ia

Chapter 4 MMC-HVDC

94

equation (4.6), where Vca is the internal converter voltage for phase A given by equation

(4.7) and p d dt [83].

2 2

arm arma ca a a

L RV V pI I (4.6)

2

la uaca

V VV

(4.7)

Each converter arm contains a number of SMs, n. The SM capacitor voltage, Vcap, can be

described by equation (4.8), assuming that the SM capacitance is sufficiently large enough

to neglect ripple voltage and that the capacitor voltages are well balanced.

dccap

VV

n (4.8)

The voltage produced by a converter arm is equal to the number of SMs in the arm which

are turned-on, nonua and nonla, multiplied by the SM capacitor voltage as given by equation

(4.9) and equation (4.10).

ua onua capV n V (4.9)

la onla capV n V (4.10)

Through appropriate control of the SMs the output voltage magnitude and phase can be

controlled independently. The number of voltage levels that a MMC can produce at its

output is equal to the number of SMs in a single arm plus one.

4.2 MMC Parameters

This section determines the value of the key parameters for the MMC through detailed

analysis. A typical radial link for the connection of a Round 3 offshore windfarm has a

power rating of 1GW at ± 300kV according to National Grid’s Offshore Development

Information Statement (ODIS) [1, 14]. Therefore the modelled MMC is rated for 1GW at ±

300kV.

4.2.1 Number of MMC Levels

A suitable starting point for designing/modelling an MMC is to determine the appropriate

number of converter levels required. The MMC used on the Trans Bay Cable project is a

201 level converter, and therefore each converter arm contains approximately 200 SMs.

Chapter 4 MMC-HVDC

95

This large number of SMs ensures that the synthesised output voltage is very close to an

ideal sinusoid and therefore removes the need for filters. The primary reason that such a

large number of SMs per converter arm is required is to reduce the voltage stress across

each SM to around 2kV24

, it is entirely possible to use significantly less than 200 SMs per

converter arm and still not require AC filters.

Each SM contains two IGBTs with anti-parallel diodes and a capacitor. In order to model a

single MMC from the Trans Bay Cable project, it would require more than 2400 IGBTs

with anti-parallel diodes to be modelled, which would be extremely computationally

intensive. Therefore it would be advantageous to be able to represent the MMC with the

fewest number of SMs possible. The purpose of this section of the document is to assess

the minimum number of voltage levels that a MMC is likely to require to ensure that the

AC harmonic content is within acceptable limits so that no AC filters are required.

There are several harmonic limit standards in existence. These standards are defined by

national and international bodies, as well as transmission and distribution network

operators. There is no set of common standards. The standards tend to be specific to a

particular network and for a particular system voltage level. Harmonic limits may be

defined for voltage waveform distortion, injected current, telephone-weighted voltage

distortion and telephone-weighted current. Voltage waveform distortion limits are defined

for the very high majority of networks, whereas the injected current limits are less widely

used. Telephone-weighted limits are normally only considered when there is long exposure

of telephone circuits to power circuits. The IEC 61000-3-6 and the IEEE 519 harmonic

voltage limits are given in Table 4.1 and Table 4.2, respectively, from [30]. The IEC

standard does not provide limitations for current injection or telephone-weighted values

whereas the IEEE standard does.

A custom built voltage step generator was used to produce a very similar waveform to that

of an MMC for a given number of voltage levels. This allowed the harmonic content of the

waveform to be analysed without modelling the actual converter. The output waveform

from the voltage output generator can be analysed, by the fast Fourier transform block in

24

The DC voltage for the Trans Bay Cable project is ±200kV; hence the voltage across each SM is roughly 2kV.

Chapter 4 MMC-HVDC

96

PSCAD, to determine the magnitude of the individual voltage harmonics as well as the

Total Harmonic Distortion (THD) value.

Odd harmonics non-multiple of 3

Odd harmonics multiple of 3 Even harmonics

Harmonic order

Harmonic voltage (%)

Harmonic order Harmonic

voltage (%) Harmonic

order Harmonic

voltage (%)

5 2 3 2 2 1.4

7 2 9 1 4 0.8

11 1.5 15 0.3 6 0.4

13 1.5 21 0.2 8 0.4

17-49 - 21-45 0.2 10-50 -

Table 4.1: IEC 61000-3-6 harmonic voltage limits for high voltage systems

Bus voltage Individual voltage distortion Total voltage distortion (THD) (%)

161kV+ 1 1.5

Table 4.2: IEEE519 harmonic voltage limits

For a 31-level MMC, the THD and the maximum individual harmonic distortion were

found to be 1.42% and 0.49% respectively. The simulated waveform complies with the

IEEE519 voltage limits; however it does not comply with the IEC standards for individual

harmonic distortion. For example, the harmonic distortion for the 33rd

harmonic is 0.43%

which exceeds the 0.2% limit. The harmonic content at the Point of Common Coupling

(PCC) in a real system is dependent upon many factors which are not taken into

consideration in this analysis. Satisfying the IEEE519 harmonic voltage limits is

considered sufficient for estimating the number of levels that the converter is likely to

require.

4.2.2 SM Capacitance

The choice of the SM capacitance value is the next important parameter, and it is a trade-

off between the SM capacitor ripple voltage and the size of the capacitor. A capacitance

value which gives a SM voltage ripple in the range of ±5% is considered to be a good

compromise [84].

An analytical approach proposed by Marquardt et al. in [85] can be used to calculate the

approximate SM capacitance required to give an acceptable ripple voltage for a given

converter rating. This method effectively calculates the value of SM capacitance required

for a given ripple voltage by determining the variation in the converter arm energy. This

approach assumes that the output voltage and current is sinusoidal, that the DC voltage is

Chapter 4 MMC-HVDC

97

smooth and split equally between the SMs, and that the converter is symmetrical.

Circulating currents, which will be explained in Section 4.2.3, are also assumed to be zero.

Only the resultant formula is presented here (4.11). The full derivation is given in

Appendix 4A.

22

SMSM

cap

WC

V

(4.11)

where:

SMW is the variation of stored energy per SM

is the SM capacitance ripple voltage factor 0 1

The SM capacitance value for a ripple voltage of 10% (±5%) was calculated to be 1150µF.

The working for this calculation is given in Appendix 4A. This approach, which was

proposed by Marquardt et al., is widely used [86, 87], it should however only be used as an

approximation, as it is based on the assumptions noted in the introduction of this section.

According to [84] 30-40kJ of stored energy per MVA of converter rating is sufficient to

give a ripple voltage of 10% (±5%). Using this approximation, the value of SM

capacitance was calculated and compared with the value given by equation (4.11). It was

found that a value of 40kJ of stored energy per MVA of converter rating gives a similar

value of capacitance (1110µF) to the method proposed by Marquardt et al. A SM

capacitance value of 1150µF is employed for the MMC.

4.2.3 Limb Reactance

The limb reactors, also known as converter reactors and arm reactors, which are labelled

Larm in Figure 4.2, have two functions. The first function is to suppress the circulating

currents between the legs of the converter, which exist because the DC voltages generated

by each converter leg are not exactly equal. The second function is to reduce the effects of

faults both internal and external to the converter. By appropriately dimensioning the limb

reactors, the circulating currents can be reduced to low levels and the fault current rate of

rise through the converter can be limited to an acceptable value.

The circulating current is a negative sequence (a-c-b) current at double the fundamental

frequency, which distorts the arm currents and increases converter losses [88]. The value

Chapter 4 MMC-HVDC

98

of arm reactance required to limit the peak circulating current, ˆcircI , can be calculated using

equation (4.12) [89]. The analysis of circulating currents and the derivation of equation

(4.12) is given in Appendix 4B.

2

1

ˆ8 3arm dc

SM cap circ

SL V

C V I

(4.12)

The second function of the arm reactor is to limit the fault current rate of rise to within

acceptable levels. According to [90], the Siemens HVDC Plus MMC convertor reactors

limit the fault current to tens of amps per microsecond even for the most critical fault

conditions, such as a short-circuit between the DC terminals of the converter. This allows

the IGBTs in the MMC to be turned-off at non critical current levels. Assuming that the

DC voltage remains relatively constant from fault inception until the IGBTs in the

converter are switched-off, the value of arm reactance required to limit the initial fault

current rate of rise ( )fdI dt can be described by equation (4.13)

2( )

dcarm

f

VL

dI dt (4.13)

The minimum value of limb reactance permissible is calculated assuming the worst case

scenario of 20A/µs for a line-to-line fault. According to equation (4.13), the arm reactor

should be no smaller than 15mH. A 15mH limb reactor results in very large circulating

currents, which increase converter losses and distort the arm currents. Ideally the

circulating current should be zero, however, according to equation (4.12), very large limb

reactors, and/or SM capacitors, would be required for this to be achieved. The size of the

limb reactor is therefore selected as a compromise between voltage drop across the limb

reactor and the cost of the limb reactor, against the magnitude of circulating current. The

circulating current can also be suppressed by converter control action or through filter

circuits. The model developed in this work includes a Circulating Current Suppressing

Controller (CCSC). A 45mH (0.1p.u.) limb reactor used in conjunction with the CCSC was

found to offer a good level of performance.

4.2.4 Arm Resistance

The SM IGBT’s and diode’s on-state resistances, Ron, are set to the default PSCAD value

of 0.01Ω. Only one IGBT or diode in each SM is conducting at any one time, therefore the

resistance in each arm due to the SMs is 0.3Ω. A 0.6Ω resistor is further connected in

Chapter 4 MMC-HVDC

99

series with the SMs in each arm, hence, the converter arm resistance, Rarm, is 0.9Ω. This

model does not attempt to include converter losses, however, an arm resistance of 0.9Ω

represents approximately 0.5% conduction losses for a MMC rated at 1GW25

. The losses

of an MMC converter is approximately 1% [28], which takes into account a number of

factors including conduction losses, switching losses and off-state losses.

4.3 Onshore AC Network

The strength of an AC system is often characterised by its Short-circuit Ratio (SCR),

which is defined by equation (4.14), where Vn is the network voltage, Zn is the network

impedance and Pdrated is the power rating of the HVDC system.

2

n n

drated

V ZSCR

P (4.14)

An AC system with a SCR greater than three is defined as strong [30]. The SCR of the AC

system in this model is selected to be relatively strong with an SCR of 3.5. The AC

network impedance is highly inductive and consequently the AC system impedance is

modelled using an X/R value of 20. The SCR is implemented in PSCAD using an ideal

voltage source connected in series with a resistor and an inductor. The values of resistance

and inductance are 2.28Ω and 0.145H (0.34p.u.) respectively. The calculation of these

values is given in Appendix 4C.

The winding configuration of the converter transformer in the model is delta/star, with the

delta winding on the converter side of the transformer as is the case for the Trans Bay

Cable project [91]. A tap-changer is employed on the star winding of the transformer to

assist with voltage regulation. The transformer leakage reactance is set to 0.15p.u. with

copper losses of 0.005p.u., which are typical values for a power transformer [92]. The

nominal transformer parameters are given in Table 4.3, and a simplified diagram of the

onshore system is shown in Figure 4.5.

Transformer parameters

S (MVA) VTp (kV) VTs (kV) LT (H) RT (Ω)

1000 370 410 0.065 0.68

Table 4.3: Nominal transformer parameters

25

The arm current is approximately 1kArms when operating at 1GW.

Chapter 4 MMC-HVDC

100

Figure 4.5: Onshore AC system

4.4 DC system

4.4.1 Cable

The MMCs are connected by two 165km HVDC cables with a nominal voltage and current

rating of 300kV and 1.7kA respectively, as per ODIS [1, 14]. Accurate models of the

cables are required in order for the DC link dynamics of the scheme to be represented. The

cables are modelled using the Frequency Dependent Phase Model (FDPM) in PSCAD.

Chapter 7 of this thesis is dedicated to HVDC cable modelling. The reader is therefore

referred to this chapter for further information.

4.4.2 DC Braking Resistor

DC braking resistors are normally required on VSC-HVDC schemes used for the

connection of windfarms [93]. There are situations, such as an onshore AC grid fault,

which diminish the onshore converter’s ability to export the energy from the windfarm.

The bulk of this excess energy is stored in the scheme’s SM capacitors leading to a rise in

the DC link voltage. The DC braking resistor’s function is to dissipate this excessive

energy and to therefore prevent unacceptable DC link voltages.

Figure 4.6: DC braking resistor

The worst case scenario is where the onshore MMC is unable to effectively export any

active power. This can occur for severe AC faults such as a solid three-phase to ground

fault at the PCC as shown in Figure 4.6. The braking resistor should therefore be rated to

dissipate power equal to the windfarm power rating, Pwrated. The braking resistor, Rbrak, is

D/Yg

Vn

SCR=3.5

MMC

Iabc

PCCXT=15%

370kV 410kV

Vs

Zn

Ceq

Idc

RbrakD/Yg

Vn

MMC

Iabc

PCC

Zn

Vdc

Chapter 4 MMC-HVDC

101

turned-on once the DC voltage exceeds a set limit (1.1p.u.) and is then turned-off once the

DC voltage has returned to its nominal value (1.0p.u.), Vdcnom [93]. These voltage

thresholds prevent the braking resistor from interfering under normal operating conditions.

In this work, the DC braking resistor is designed to prevent the DC link voltage from

exceeding 1.2p.u. and is calculated using equation (4.15).

2 21.2 720500

1000

dcnom

brak

wrated

V kVR

P MW (4.15)

The IGBT braking valve would therefore be required to conduct up to 1500A.

4.5 Offshore AC Network

A 1GW offshore windfarm would typically contain 200 wind turbines based on a 5MW

turbine design. A simplified diagram of a full scale converter wind turbine is shown in

Figure 4.7. The DC link voltage varies due to the generated power. The function of the grid

side converter is to maintain the DC link voltage and to supply/absorb reactive power if

required. The power generated by the wind turbines is transmitted at 33kV to two 500MW

AC substations which step-up the voltage to 220kV for transmission to the HVDC link.

Figure 4.7: Simplified diagram of a full scale converter wind turbine

The focus of this work is the HVDC scheme, and therefore a simplified representation of

the offshore AC system is employed as shown in Figure 4.8. The voltage sources, Vw,

which represent the windfarm generators, are controlled using a dq controller to inject

active power into the offshore HVDC converter. Further information on this control system

is contained in Section 4.6.

G

33kV

Chapter 4 MMC-HVDC

102

Figure 4.8: Representation of the offshore network

4.6 Control Systems

This section describes the numerous control functions which are required for a MMC-

HVDC point-to-point link. The required control system functions are dependent upon

whether the MMC is connected to an active AC network or a passive/weak AC network.

The internal MMC control system functions are, however, independent of the connected

AC network.

4.6.1 Control Systems for an MMC Connected to an Active Network

For a VSC-HVDC scheme which connects two active networks, one converter controls

active power or frequency and the other converter controls the DC link voltage. The

converters at each end of the link are capable of controlling reactive power or the AC

voltage at the PCC. For VSC-HVDC links which are employed for the connection of

offshore windfarms, the converter connected to the onshore AC grid controls the DC link

voltage and the reactive power or AC voltage. This section describes the control structure,

tuning process and implementation of the aforementioned control functions.

Active power, frequency and DC link voltage are effectively controlled by varying the

angle of the MMC output voltage with respect to the voltage angle of the connected AC

network. The reactive power and AC voltage are effectively controlled by varying the

magnitude of the MMC output voltage with respect to that of the AC network. The MMC

output voltage magnitude and angle can be controlled either directly using direct control,

or indirectly using dq current control. Dq control is employed for the MMC in this work

because it can limit the valve currents under balanced operating conditions and provide a

faster response than direct control. Figure 4.9 shows the basic control structure for an

MMC connected to an active network.

XT=15%

Yg/D

Vw

MMC

Yg/Y

XT=15%

Vso

PCC220kV33kV 220kV 370kV

Chapter 4 MMC-HVDC

103

Figure 4.9: MMC control system basic overview

The current controller is a fast feedback controller, which produces a voltage reference for

the MMC based upon the current set-point from the outer feedback controller. The inner

MMC control system, amongst other functions, translates the voltage set-points using a

Nearest Level Controller (NLC) into Firing Signals (FS) to the MMC to obtain the desired

output voltage magnitude and phase.

4.6.2 dq Current Controller

The impedance between the internal converter voltage, Vca, and the AC system voltage,

Vsa, for phase A is shown in Figure 4.10. The phase shift and change in voltage magnitude

introduced by the converter transformer, is accounted for in the implementation of the

controller as shown in Figure 4.22, and it is therefore not discussed in this analysis.

Figure 4.10: MMC phase A connection to AC system

Equation (4.16) describes the relationship between the internal converter voltage and the

AC system voltage for phase A.

2 2

arm a armca sa T T a

L dI RV V L R I

dt

(4.16)

Equation (4.16) can be reduced to (4.17).

acsa a

dIV L RI

dt (4.17)

where:

2 2

arm armcsa ca sa T T

L RV V V L L R R (4.18)

For the three-phases:

Outer

controller

dq current

controller

P*/V*dc/freq*I*dq V*dq

Q*/V*ac

Inner MMC

control

FSMMC

V

Vn

LT RT Zn

Va Vsa

Larm/2 Rarm/2

Vca

Ia

Chapter 4 MMC-HVDC

104

csc

csa a

csb b

c

V I

V R pL I

V I

(4.19)

In the dq synchronous reference frame equation (4.19) becomes equation (4.20). The

derivation from equation (4.19) to equation (4.20) is given in Appendix 4D.

0 1

1 0

d d d d

q q q q

V I I IR Lp L

V I I I

(4.20)

Where 0 1

1 0

is the matrix representation of the imaginary unit j.

Expanding equation (4.20) and noting that d cd sdV V V and q cq sqV V V , equations (4.21)

and (4.22) are produced.

cd sd d d qV V RI LpI LI (4.21)

cq sq q q dV V RI LpI LI (4.22)

The equivalent circuit diagrams for the plant in the dq reference frame are given in Figure

4.11.

Figure 4.11: Equivalent dq circuit diagrams

Applying the Laplace transform with zero initial conditions to equations (4.21) and (4.22)

gives equations (4.23) and (4.24).

( ) ( ) ( ) ( ) ( )cd sd d d qV s V s RI s LsI s LI s (4.23)

( ) ( ) ( ) ( ) ( )cq sq q q dV s V s RI s LsI s LI s (4.24)

The plant equations in the Laplace domain can be represented by state-block diagrams,

with the (s) notation neglected, as shown in Figure 4.12.

- +

Vcd

Id L R

Vsd

ωLIq

+ -

Vcq

Iq L R

Vsq

ω LId

Chapter 4 MMC-HVDC

105

Figure 4.12: State-block diagram for system plant in dq reference frame

The state-block diagram in Figure 4.12 clearly shows that there is cross-coupling between

the d and q components. The effect of the cross-coupling can be reduced by introducing

feedback nulling, which effectively decouples the d and q components as shown in Figure

4.13.

Figure 4.13: State-block diagram with feedback nulling

The d and q currents are controlled using a feedback PI controller as shown in Figure 4.14.

The d and q components of the system voltage (Vsd and Vsq) act as a disturbance to the

controller. The effect of this disturbance is mitigated through the use of feed-forward

nulling, highlighted in Figure 4.13. The MMC is represented as a unity gain block (i.e.

Vcd*=Vcd), which is representative of its operation providing that the converter has a high

level of accuracy with a significantly higher bandwidth than the current controller. The d-

axis current control loop in Figure 4.14 can be simplified to Figure 4.15, due to the

cancellation of the disturbance term. This is equally applicable to the q-axis.

Figure 4.14: Decoupled d and q current control loops

-

1

L

1

s

R

Vsd

Vcd+

- Id-

1

L

1

s

R

Vsq

Vcq+

- Iq

ωL

ωL

+ -

-

1

L

1

s

R

Vsd

Vcd+

- Id-

1

L

1

s

R

Vsq

Vcq+

- Iq

ωL

ωL

+ -

ωL

+

ωL

-

-

1

L

1

s

R

Vsd

Vcd

+- IdMMC

=1

Vcd*

Vsd

+PI+ +

-

*dIdI

-

1

L

1

s

R

Vsq

Vcq

+- IqMMC

=1

Vcq*

Vsq

+PI+ +

-

*qIqI

Chapter 4 MMC-HVDC

106

Figure 4.15: d-axis current loop without d-axis system voltage disturbance

Using Mason’s rule the plant representation is simplified to a single block as shown in

Figure 4.16.

Figure 4.16: Simplified d-axis current control loop

The transfer function for the control loop can be calculated as follows [94]:

1 1

1 1*1 1

i p

d

di p

K K sI s Ls R

IK K s

s Ls R

(4.25)

*

1

i p

d

i pd

K K s

s Ls RI

K K sI

s Ls R

(4.26)

2*

i p

d

pd i

K K s

I LR KI K

s sL L

(4.27)

Approximating the current loop transfer function to a classic 2nd

order transfer function

allows the PI controller to be tuned to give an approximate damping ratio , , and natural

frequency, n .The current loop transfer function, equation (4.27), can be reduced to a

classic 2nd

order transfer function, equation (4.28), by neglecting the fast transient

information, as given in equation (4.29).

2

2 22

n

n ns s

(4.28)

-

1

L

1

s

R

Vcd

+IdMMC

=1

Vcd*PI+

-

*dIdI

Vcd IdMMC

=1

Vcd*+

-

*dIdI

ip

KK

s

1

Ls R

Chapter 4 MMC-HVDC

107

2*

i

d

pd i

KI L

R KI Ks s

L L

(4.29)

The natural frequency and damping ratio of the 2nd

order system can therefore be

calculated using equation (4.30) and equation (4.31) respectively.

in

K

L (4.30)

2

P

n

R K

L

(4.31)

The natural frequency of the system is approximate to its bandwidth for a damping ratio of

0.7. Alternatively, the closed loop transfer function can be reduced to a first order transfer

function which allows the PI controller to be tuned for a specific bandwidth, BW, with a

critically damped response [94, 95]. Equation (4.25) can be reduced to a first order transfer

function as follows:

1

* 11

p i

p

d

d p i

p

K Ks

Rs KL s

I L

I K Ks

Rs KL s

L

(4.32)

By selecting i

p

K R

K L equation (4.32) is reduced to equation (4.33)

1

*11

p

pd

pd p

p

K

KI sLK LI sL K

sKsL

(4.33)

The full closed loop transfer function is therefore reduced to a first order transfer function

with a time constant ic pL K . The bandwidth in radians for a first order system is equal

to 1 ic . Hence equation (4.33) can be re-written as equation (4.34), where BWic is the

inner controller bandwidth.

1

1CL

ic

Gs

BW

(4.34)

Chapter 4 MMC-HVDC

108

The proportional gain,pK , and integral gain, iK , can be calculated for given values of L, R

and BW from equations (4.35) and (4.36) respectively.

p icK BW L (4.35)

i p ic

RK K BW R

L (4.36)

The advantage of this method is that the exact bandwidth for the control loop can be

selected through a very simple tuning process. Also a phase margin of 90° with an infinite

gain margin is assured. The disadvantage is that since only the bandwidth can be selected,

there is less flexibility when optimising the controller to meet set performance criteria.

The performance criteria for the inner current loop are that it is fast, stable and has no

overshoot. Tuning the PI controller to provide sufficient bandwidth using the first order

transfer function is therefore a suitable approach. A bandwidth of 320Hz is employed for

the inner current loop. This bandwidth provides a very fast response with zero overshoot as

shown in Figure 4.19-Figure 4.21.

To verify the first order transfer function, a three-phase 31-level MMC with dq current

controller has been implemented in PSCAD. The expected d-axis current response for a

step input using the first order transfer function, Idtf, with the response from the PSCAD

model, Id, for different bandwidths are shown in Figure 4.17-Figure 4.19. The step change

in d-axis current, Idset (Id*), is equivalent to a change in active power of 100MW.

Figure 4.17: Current controller step response for a bandwidth of 80Hz ; x axis – time(s), y axis-current

(kA)

Chapter 4 MMC-HVDC

109

Figure 4.18: Current controller step response for a bandwidth of 160Hz ; x axis – time(s), y axis-

current (kA)

Figure 4.19: Current controller step response for a bandwidth of 320Hz ; x axis – time(s), y axis-

current (kA)

The plots show that the simulated response is similar to the expected response for the three

different bandwidths. These results demonstrate that the first order transfer function can

adequately describe the system behaviour. The small differences in the results are due to

assumptions and simplifications in the derivation of the transfer function.

The results show in general that the simulated current response is slower than expected,

particularly for higher bandwidths. This is because significant step changes in power can

easily force the MMC to enter the non-linear over-modulated region, which is not

accounted for by the transfer function. Increasing the converter transformer tap-changer

ratio so that the converter does not become over-modulated improves the simulated

response as shown Figure 4.20.

Chapter 4 MMC-HVDC

110

Figure 4.20: Current controller step response for a bandwidth of 320Hz with tap-changer ratio

increased ; x axis – time(s), y axis-current (kA)

The simulation results also show that the decoupling between the d and q-axis currents

improves as the bandwidth increases. This is likely to be because the control loop’s

disturbance rejection improves as the bandwidth increases.

Mathematically the d and q-axis should be completely decoupled due to the feedback

nulling terms ( dI and qI ). The derivation of the transfer function assumes that the

converter and associated components such as the abc/dq transform components are perfect

and can therefore be represented as unity gain blocks. The MMC implemented in PSCAD,

however, is not capable of perfectly reproducing the set-point d and q-axis voltages with

zero time delay.

The q-axis current peaks approximately 20ms (one fundamental cycle) after the step input

is applied, irrespective of controller bandwidth. The NLC employed by the MMC assumes

that the SM capacitor voltages are constant and equal, which is only true when there is no

current flowing through the converter arm or when the SM capacitance is infinite. During

normal operation, for finite capacitance, the SM capacitors exhibit a fundamental ripple

voltage. Employing very large SM capacitors ensures that the all SM capacitors are

virtually constant and equal which improves the accuracy of the NLC method. Figure 4.21

shows the converter response when the value of the SM capacitors is increased from

1150µF to 115000µF.

Chapter 4 MMC-HVDC

111

Figure 4.21: Current controller step response for a bandwidth of 320Hz with increased SM

capacitance ; x axis – time(s), y axis-current (kA)

Figure 4.21 shows that the decoupling has greatly improved, however, employing such

large capacitors is impractical and was only implemented to show that the transfer function

is able to describe the system behaviour very accurately when all assumptions are

considered. That said, the transfer function describes the system behaviour with sufficient

accuracy even when ideal converter behaviour is assumed.

The block diagram for the implementation of the current controller is shown in Figure

4.22. The phase voltages and currents, measured at the PCC are scaled, and the output

converter voltage set-points are advanced 30° to compensate for the transformer. The d-

axis and q-axis current orders from the outer controller have limits to prevent valve

overcurrents under balanced conditions.

Figure 4.22: dq current controller implementation

Vcd*

Vsd

++ +

-

dI*dI

dI

-

Vsq

++ +

- qI*qI

qI

+

ωL

ωL( ) *c abcV

( )s abcI

Vcq*

t t

PCCVc(abc)

I(abc) L R

t Vsq

Vs(abc)

PLL

dqabc

PI

PI

dqabcdq

abc

Np/Ns

Ns/Np +30°

Transformer

winding ratio Transformer

phase shift

Chapter 4 MMC-HVDC

112

4.6.3 Outer Controllers

4.6.3.1 Active and Reactive Power Controllers

In the magnitude invariant dq synchronous reference frame, the power flow at the PCC can

be described by equations (4.37) to (4.39).

3 3

* ( )( )2 2

dq dq dq sd sq d qS V I V jV I jI (4.37)

3

2sd d sq qP V I V I (4.38)

3

2sq d sd qQ V I V I (4.39)

The q-axis is aligned with Va such that 0sqV . Equations (4.38) and (4.39) are therefore

reduced to equations (4.40) and (4.41).

3

2sd dP V I (4.40)

3

2sd qQ V I (4.41)

Equations (4.40) and (4.41) show that the active power is controlled by Id and the reactive

power is controlled by Iq. The Id and Iq references to the current controller are set using

feedback PI controllers. The Kp and Ki values for the controllers can be calculated

according to equations (4.42) and (4.43), where BWp is the bandwidth of the power

controller. The derivation of the reduced first order transfer function and the resultant

equations for Kp and Ki is given in Appendix 4E.

1.5

p

p

sd ic

BWK

V BW (4.42)

i ic pK BW K (4.43)

Vsd is the value of d-axis voltage at the PCC, which has a nominal value in this model of

300kV. Providing that the AC system is relatively strong this value is effectively fixed, and

therefore the PI controller parameters can be calculated based on the nominal value for Vsd.

In any case, a variation in Vsd produces a proportional change in the power controller

bandwidth; hence a relatively large variation in Vsd of 10% produces only a 10% change in

pBW . Note that the relationship 1i

p ic

K

K is ensured irrespective of Vsd. Feedback PI

Chapter 4 MMC-HVDC

113

controllers are employed to give the Id and Iq set-points to the inner current controllers

based on the active and reactive power orders respectively.

The active and reactive power demands for a VSC-HVDC converter are typically ramped

at 1GW/min under normal operating conditions and at 1GW/s for emergency power

control26

. The outer power loop does not therefore require a large bandwidth and hence a

bandwidth of 30Hz is more than sufficient. The transfer function response and the

simulated response for a 100MW (10%) and -30MVAr (≈10%) step change are very

similar as shown in Figure 4.23 and Figure 4.24 respectively.

Figure 4.23: System response for a 10% change in active power ; x axis – time(s), y axis-active power

(MW)

Figure 4.24: System response for a 10% change in reactive power ; x axis – time(s), y axis-reactive

power (MVAr)

4.6.3.2 DC Link Voltage Controller

MMCs, unlike two-level VSCs, do not normally employ DC side capacitor banks and

therefore the MMC’s equivalent capacitance, Ceq, as calculated by equation (4.44), is used

26

Based on discussions with an HVDC controls expert from Alstom Grid.

Chapter 4 MMC-HVDC

114

in the DC side plant model shown in Figure 4.25. The plant equations and the derivation of

the 2nd

order transfer function are given in Appendix 4F.

Figure 4.25: DC side plant

The Ki and Kp values for a particular natural frequency and damping ratio can be

calculated using equation (4.45) and equation (4.46).

3 SM

eq

CC

n (4.44)

2

1.5

n eq

i

V

CK

K

(4.45)

2

1.5

n eq

p

V

CK

K

(4.46)

The primary function of the DC link voltage controller is to keep the DC link voltage

constant. The DC link voltage set-point is normally fixed at 1.0p.u. and therefore unlike

power controllers, following set-point variations is not a priority. Hence, the key

performance criteria for the DC voltage outer controller are that it is stable, with excellent

steady-state tracking and good disturbance rejection for a range of operating points

(Kv=0.5±10%).

The outer DC link voltage loop is tuned assuming that the inner current loop is a unity gain

block. This is a valid assumption providing that the outer loop is significantly slower than

the inner current loop. The maximum available bandwidth for the outer controller is

therefore limited to one order of magnitude smaller (≈30Hz) than the inner current loop

bandwidth (=320Hz). The controller’s ability to reject disturbances, particularly low

frequency disturbances, improves with bandwidth due to the increase in integral gain.

Tuning the outer loop controller for a bandwidth of 20Hz and a damping ratio of 0.7, using

equations (4.45) and (4.46) was found to offer a good level of performance. Figure 4.26

shows the systems response, Vdc, the full transfer function response, Vdctf, and the

Vn

MMC

CeqL R

Vs(abc)

In Idc

IcPCC

Vdc

Chapter 4 MMC-HVDC

115

approximate transfer function response, Vdctf2nd, for a 1kV step change about the nominal

operating point. This figure shows that the system response is similar to the expected

response, particularly the full transfer function. Figure 4.27 shows the system response for

an injected noise current ramped from 0 to 1.66kA in one second, which is equivalent to 0

to 1GW under emergency power conditions.

Figure 4.26: System response for a 1kV step change about the operating point, Kv=0.5 ; x axis –

time(s), y axis-voltage(kV)

Figure 4.27: System response for a ramped injected noise current of 1.6kA in 1 second ; x axis –

time(s), y axis-voltage (kV)

4.6.3.3 AC Voltage Control

With reference to Figure 4.28, the magnitude of the voltage at the PCC is given by

equation (4.47). The derivation of this equation is provided in Appendix 4G.

Figure 4.28: MMC phase A connection to the AC network with the system resistances neglected

X2

Vsa

X1

Vca

IaVna

PCC

Chapter 4 MMC-HVDC

116

2 2

(1 ) cos( ) sin( )sa na ca c ca cV V k V k V k (4.47)

where:

2Xk

X (4.48)

The network voltage, naV , and the system reactance values, X1 and X2, are fixed and

therefore the voltage at the PCC, Vsa, can be controlled by varying the internal converter

voltage magnitude, Vca, and angle, c . Variations in the converter angle have very little

influence on the voltage at the PCC and therefore the dominant variable in equation (4.47)

is the converter voltage magnitude. In the magnitude invariant dq reference frame the

magnitude of the converter voltage can be described by equation (4.49). The voltage at the

PCC is controlled using the q-axis converter voltage, Vcq.

2 2

( )c abc cd cqV V V (4.49)

For HVDC systems connected to weak AC grids, the AC voltage controller is required to

ensure that the AC system voltage does not fall outside permissible limits for the full

operating range of active power. Figure 4.29 shows the AC system voltage for the MMC

connected to a weak AC network (SCR=1.5) for an active power order of 1GW and a

reactive power order of 0MVAr. The AC system voltage, Vsa, falls to approximately 70%

of its nominal value and the MMC is only able to export 800MW due to the valve current

limit. With the AC voltage controller engaged, the AC voltage remains with ±2% of the

nominal value and the converter is able to export the maximum active power order, as

shown in Figure 4.30.

Chapter 4 MMC-HVDC

117

Figure 4.29: System response for weak AC network with reactive power set to zero ; x axis – time(s)

Figure 4.30: System response for weak AC network with AC voltage control ; x axis – time(s)

4.6.4 Tap-Changer Controller

The onshore converter transformer typically includes an on-load tap-changer to assist with

voltage regulation at the PCC. For a MMC operating in reactive power control, the

transformer tap ratio can be manipulated to help prevent the converter from becoming over

or under-modulated. Operating the converter in the over or under-modulated region could

have a negative impact in a number of areas such as harmonic performance. In this model

a slow PI controller is employed to set the tap ratio of the transformer to reduce the

magnitude of over and under-modulation. Figure 4.31 and Figure 4.32 show that the tap-

changer reduces the THD of the MMC output voltage.

Chapter 4 MMC-HVDC

118

Figure 4.31: MMC output voltage THD when exporting 300MVAr with no tap-changer ; x axis –

time(s), y axis – THD (%)

Figure 4.32: MMC output voltage THD when exporting 300MVAr with tap-changer ; x axis – time(s),

y axis – THD (%)

4.6.5 Control System for MMC Connected to a Windfarm

In situations where the MMC is connected to an islanded or very weak network the

MMC’s function is to regulate the AC network’s voltage and frequency [80]. In this mode

of operation, the MMC absorbs all of the power generated by the offshore windfarm. The

voltage magnitude at the PCC to the offshore network is equal to the d-axis voltage, Vsod,

providing that the q-axis voltage, Vsoq, is equal to 0. The voltage magnitude is therefore

regulated using PI controllers for the d and q-axis voltages. The voltage controlled

oscillator provides the reference angle from the ordered frequency. The implementation of

the controller is shown in Figure 4.33.

Chapter 4 MMC-HVDC

119

Figure 4.33: Implementation of the AC voltage controller for the offshore network

4.6.6 Inner MMC Controllers

4.6.6.1 Circulating Current Suppressing Control (CCSC)

The circulating currents distort the arm currents, which can increase converter losses and

may result in the requirement for higher rated components. The CCSC suppresses the

circulating current by controlling the voltage across the limb reactors. The development of

this controller is based on work carried out in [82, 88]. With reference to Figure 4.34, the

plant equations for the CCSC can be derived as follows.

Figure 4.34: Equivalent circuit for a single phase of a MMC

( ) ( )dc ua ua la laV V I R Lp I R Lp V (4.50)

The voltage drop across the upper and lower arm impedances, due to the / 2aI current

components in the upper and lower arm cancel each other out according to equation (4.50).

Vso(abc)

Vc(abc)LR

MMC

Iabc

Vdc

dqabc Vsod

PI+-

+-

Vsoq

0

Vsod*

PI

dqabc

Vc(abc)*

VCOf

Θ

PCC

Np/Ns

+30°

Vua(t)

Vdc/2

Ia(t)Vsa(t)

Iua(t)=Ig+Ia(t)/2

Vla(t)

Idc

Vdc/2

Larm

Rarm

Larm

Rarm

La Ra

Va(t)

Vu-g(t)

Vl-g(t)

Ila(t)=Ig-Ia(t)/2

Chapter 4 MMC-HVDC

120

uaI and laI can be replaced with diff g circI I I where 3g dcI I . Equation (4.50) can,

therefore, be reduced to equation (4.51).

2 ( )dc ua la diff arm armV V V I R L p (4.51)

( )2 2

dc ua ladiff arm arm

V V VI R L p

(4.52)

The right hand side of equation (4.52) is known as the difference voltage, diffV , which is the

voltage drop across one converter arm due to the difference current. If the circulating

current is zero then the difference voltage is essentially very small as it is the voltage drop

across the arm resistance due to the arm DC current, Ig. The presence of circulating current

increases the difference voltage, hence by reducing the difference voltage, the circulating

current can be suppressed.

The difference voltage can be controlled by varying the upper and lower arm voltages

equally. This does not affect the AC output voltage as described by equation (4.5) which is

repeated here in equation (4.53).

2 2 2

la ua arm a arma a

V V L dI RV I

dt

(4.53)

The circulating current is a negative sequence (a-c-b) current at double the fundamental

frequency. The plant equation in matrix form is given in equation (4.54).

diff a diff a diff a

diff c diff c diff c

diff b diff b diff b

V I I

V R I Lp I

V I I

(4.54)

Applying the acb to dq transform to equation (4.54) gives equation (4.55). The procedure

for going from equation (4.54) to equation (4.55) is very similar to that of the current

controller outlined in Section 4.6.2.

0 1

21 0

diff d circ d circ d circ d

arm arm arm

diff q circ q circ q circ q

V I I IR L p L

V I I I

(4.55)

The diffI component in equation (4.54) has changed to circI in equation (4.55), because the

DC component of diffI is a zero sequence component which has no effect on the dq values.

The dq components are therefore only affected by the circulating current. The state-block

diagram with feedback decoupling is given in Figure 4.35.

Chapter 4 MMC-HVDC

121

Figure 4.35: CCSC plant state-block diagram

The CCSC can be represented by a first order transfer function in the same manner as the

current controller in Section 4.6.2. Equations (4.56) and (4.57) can therefore be used to

calculate the PI controller parameters:

p armK BW L (4.56)

armi p arm

arm

RK K BW R

L (4.57)

The set-point for the CCSC is always zero in order to reduce the circulating current to the

smallest possible value. The circulating current increases as a function of power, which as

discussed in Section 4.2.3 is controlled using a ramped set-point. The circulating current

therefore also changes in a ramped manner. If however, the CCSC is enabled at a particular

power order then the input to the PI controller,circI , is a step input. The performance of the

CCSC is mainly assessed by its ability to suppress the circulating current under steady-

state and transient conditions.

The bandwidth of the controller has little effect on the circulating current under steady-

state conditions. A small controller bandwidth such as 10Hz is therefore suitable, Figure

4.36. However, higher bandwidths provide better performance during transient conditions.

A bandwidth of approximately 30Hz was found to give a good level of performance as

shown in Figure 4.37. The implementation of the controller is shown in Figure 4.38.

-

1

armL

1

s

Vdiff-d+

Icirc-d

-

1

s

Vdiff-q+

Icirc-q

+ -

2ωLarm

+-

Rarm Rarm

1

armL

2ωLarm

2ωLarm2ωLarm

Chapter 4 MMC-HVDC

122

Figure 4.36: CCSC response to active power ramped at 1GW/s for 1s starting at 2s with a BW of 10Hz

; x axis – time(s)

Figure 4.37: CCSC response to active power ramped at 1GW/s for 1s starting at 2s with a BW of 30Hz

; x axis – time(s)

Figure 4.38: Block diagram of CCSC implementation

4.6.6.2 MMC Driver

The MMC driver is a single component, built for this research in PSCAD, which

determines the correct number of SMs to fire to produce the voltage reference for each

arm, and which SMs to fire to ensure that the capacitor voltages are balanced. This has

been implemented in FORTRAN. To aid understanding, each function is represented by a

+ +-

* 0circ dI

circ dI

-

++ +

-

circ qI

dq

acb

* 0circ qI

( ) *diff abcV

dq

acb( )diff abcI

2 t 2 t

PI

PI

2 armL

2 armL

circ dI

circ qI

Chapter 4 MMC-HVDC

123

separate component, although in reality both functions are performed by a single

component.

The Capacitor Balancing Controller (CBC) ensures that the energy variation in each

converter arm is shared equally between the SMs within that arm. Without such a control

system the SM capacitors would exceed their tolerable voltage limits, which amongst other

things, would damage the SM IGBTs.

The CBC is based on the method outlined by Marquardt et al. in [85]. The CBC samples

the SM capacitor voltages and then sorts them into ascending or descending order based on

the direction of the arm current. If the arm current is positive then the SMs with the lowest

capacitor voltages are placed first. Conversely, if the arm current is negative then the CBC

orders the SMs with the highest capacitor voltage first. This ensures that for positive arm

current the capacitors with the lowest voltages are charged first and for negative arm

current the capacitors with the highest voltages are discharged first.

The CBC used here employs the bubble sort algorithm to order the capacitor voltages [96,

97]. The bubble sort algorithm is simple to implement, but is relatively inefficient for

sorting large lists in comparison to other sorting algorithms. However, the algorithm is

sufficient for this application because the list is relatively small.

The custom built CBC component is coded so that the user can select the number of times

the SM capacitor voltages are sorted per cycle. The sorting frequency is a trade-off

between how well the SM capacitor voltages are balanced, against the effective switching

frequency of the SMs, and the additional effort of sampling and sorting the SMs. A

common method is to sort the capacitor voltages each time the converter output voltage

transitions from one level to another. Employing this method for a 31-level MMC would

result in an approximate sorting frequency of 3kHz. A sorting frequency of 3kHz provides

excellent capacitor voltage balancing but at the expense of a high SM switching frequency.

A default sorting frequency of 1.5kHz was therefore chosen as it was found to offer good

performance without excessive switching. A simplified diagram of the CBC is shown in

Figure 4.39, where Vcapua and Vuao, are the SM capacitor voltages and their order in terms

of voltage, for the upper arm of phase A, respectively.

Chapter 4 MMC-HVDC

124

Figure 4.39: Simplified diagram of the capacitor balancing controller

A number of modulation methods have been proposed for MMCs. These include, but are

not limited to, space vector modulation [98], phase-disposition modulation [99], selective

harmonic elimination [100] and Nearest Level Control (NLC) [101]. The NLC method

produces waveforms with an acceptable harmonic content with a suitable number of levels,

and it is the least computationally complex method of the aforementioned techniques.

The controller block diagram for the NLC is shown in Figure 4.40. The NLC reads in the

reference voltage for the upper and lower arm of each phase (phase A is shown as an

example). Using the DC voltage measurement, it calculates the average SM capacitor

voltage and then calculates the Exact Number of SM Levels (ENL) required in the circuit

to obtain the reference voltage. Due to the finite number of SMs (30 in this case) the ENL

is however rounded to the Nearest Level (NL). The NLC then issues Firing Signals (FS) to

the correct SMs using the ordering information from the CBC. The NLC is coded so that

the SM FS can only update when a new NL is required. A simplified block diagram of the

NLC is shown in Figure 4.40.

Figure 4.40: NLC block diagram

If (Trig=1) then

If (Iua>0) then

Order Vcapua(1-30) lowest first

Else order Vcapua(1-30) highest

first

End If

If (Ila>0) then

Order Vcapla(1-30) lowest first

Else order Vcapla(1-30) highest first

End If

End if

Iua

Ila

Vuao(1-30)Vcapua(1-30)

Vcapla(1-30)

Vlao(1-30)

Trig

Vcap=Vdc/n

ENLU=Vua/Vc

NLU=round(ENLU)

ENLL=Vla/Vc

NLL=round(ENLL)

FSU=NLU

FSL=NLL

--

+

Vdiffa

++

-

Vdc/2

Vdc/2

Vca

VcaVua*

Vla*

FSU(1-30)

FSL(1-30)

NLC

Vuoa(1-30) Vlao(1-30)

Chapter 4 MMC-HVDC

125

4.7 Windfarm Control

A simplified diagram for the offshore windfarm control system is shown in Figure 4.41

and Figure 4.42.

Figure 4.41: Block diagram for the windfarm power controller

Figure 4.42: Implementation of the windfarm power controller

The wind turbine, generator and back-to-back converter are represented as a first order

transfer function with a time constant, w . The natural time constants, o , for three

commercial wind turbines have been calculated in [102] and are presented in Table 4.4.

Prated (MW) rated (m/s) o (s)τ

1.5 13 16.4

2.5 12.5 22.6

3.6 14 25.8

Table 4.4: Calculated time constants for commercial wind turbines modified from [102]

Extrapolating the data given in Table 4.4 for a 5MW wind turbine gives a natural time

constant of approximately 30s. Small signal analysis carried out in [102] has shown that

the actual wind turbine time constant, , varies with wind speed, v , and can be described

by equation (4.58).

ratedo

v

v (4.58)

The maximum cut out speed for a large commercial wind turbine is typical 25 m/s with a

rated wind speed of 12-14 m/s [103, 104]; hence the smallest time constant for a typical

5MW wind turbine is approximately 15s. Setting the windfarm first order transfer function

Power

controller

dq current

controller

Pw*

Idq* Vw(dq)*

Qw*

1

1 ws

d/dt

Vw

Lt

Vso(abc)

PCC

PLLΘdq

abc

Vw(dq)*

P,Q

Chapter 4 MMC-HVDC

126

time constant, w , to 15s would require very lengthy simulation times and therefore it is

reduced to 0.15s which is suitable for this model.

The windfarm reactive power order to the power controller is limited to a rate of change of

1MVAr/ms. The structure of the power controller and the current controller employed for

the windfarm are effectively the same as for the MMC and are therefore not repeated here.

The power controller and current controller are tuned using the first order transfer function

to give a bandwidth of 10Hz and 100Hz receptively. The power controller time constant is

therefore approximately one order of magnitude smaller than the reduced windfarm time

constant. The parameters for the controller are given in Appendix 4H.

4.8 Conclusion

This chapter has described the modelling process for a MMC-HVDC link for a

typical Round 3 offshore windfarm, including the analysis to determine the value of

key parameters of the MMC and associated AC and DC networks, as well as the

tuning and implementation of the numerous required control functions. Its key

contribution is that the main aspects of MMC-HVDC modelling have been brought

together and described in a comprehensive and integrated manner.

Chapter 5 MMC-HVDC Link Performance

127

5 MMC-HVDC Link Performance

This chapter assesses the steady-state and transient performance of the MMC-HVDC link

models developed in Chapter 4 for the connection of a typical Round 3 windfarm, and for

the interconnection of two active AC networks. The theory given in Chapter 4 is used to

verify the simulation results.

Considering that MMC VSC-HVDC systems are set to become a key component of the

UK’s power system, their ability to ride-through AC system faults is of great importance.

Publications in this area are however very sparse [105]. This chapter investigates the

systems’ ability to comply with the GB grid code for AC disturbances and reactive power

requirements. A modification to the standard DC voltage controller, to improve the

systems’ AC fault recovery response for different power operating points, is also proposed

in this work.

The models’ response to DC faults is investigated and the differences between a MMC-

HVDC link employed for the connection of a windfarm and a MMC-HVDC link employed

for the interconnection of two active networks are investigated.

5.1 Radial MMC-HVDC Link for a Round 3 Windfarm

The simplified system diagram for a MMC VSC-HVDC link for a typical Round 3

offshore windfarm is shown in Figure 5.1.

Figure 5.1: MMC VSC-HVDC link for a Round 3 windfarm

5.1.1 Start-up

The onshore converter’s SM capacitors are energised from the onshore AC system as

shown in Figure 5.2. The converter is initially in the blocked state, which effectively forms

a six-pulse bridge enabling each arm of the converter to charge-up to a value equal to the

rectified DC voltage. During this initial charging phase, resistors are inserted between the

AC system and the converter to prevent excessive in-rush current [6]. In this model, the

XT=15%

Yg/D

MMC2-Offshore

Vs2(abc)

220kV 370kV

D/Yg

MMC1-Onshore

Is1(abc)

PCC1XT=15%

370kV 410kV

Vs1(abc)

Idc2

Is2(abc)


frequency control

1000MW

Windfarm


control



Rbrak

Vdc2=600kV

165km DC cablePCC2

Larm=45mH CSM=1150μF

Vn

SCR=3.5

Zn

400kV

Idc1


128

rectified DC voltage is not equal to the nominal DC voltage (600kV), and therefore at 0.3s,

the converter is operated in DC voltage control to obtain the nominal DC voltage. During

the entire charging process the offshore converter’s circuit breakers are open and the SM

capacitors are charged from the DC voltage created by the onshore converter. Once the

charging process is complete the offshore AC circuit breakers are closed.

Figure 5.2: Start-up procedure; capacitor voltages are for the upper arm of phase A for MMC1 ; x axis

– time(s)

5.1.2 Windfarm Power Variations

To assess the link’s ability to respond to power demands, the windfarm is ordered to inject

1GW of active power at 1s; the order is then reduced to 500MW at approximately 3.1s and

again increased to 750MW at approximately 4s. The onshore converter is initially set to

supply 330MVAr to the onshore grid and then set to absorb 330MVAr at approximately

2.1s while operating at maximum active power. Figure 5.3 shows that the VSC-HVDC link

is capable of responding to the power demands of the windfarm and that the converter is

able to meet the required reactive power demands set out in the GB grid code (leading and

lagging power factor of 0.95) [106, 107].

The link’s steady-state response for the windfarm operating at maximum power is shown

in Figure 5.4. The phase voltages and phase currents at the PCC for the onshore network

(Vs1(abc) , Is1(abc)) and the offshore network (Vs2(abc), Is2(abc)) are shown to be almost

sinusoidal and as such have a small harmonic content. The DC voltages are smooth and

Vd*=600kV


129

virtually ripple free, while the DC current exhibits a small ripple of approximately ±1.5%

of the nominal value. The DC current ripple can be reduced further by disabling the CCSC,

however, this would increase converter losses.

The THD of the line-to-line voltages at the onshore PCC is shown in Figure 5.5. This

analysis confirms that the harmonic content is very small and is within the 1.5% limit set

out in the IEEE519 standards.

Figure 5.3: Link response to variations in windfarm power ; x axis – time(s)

Q*=-330MVAr

P*=500MW P*=750MW


130

Figure 5.4: Link response at steady-state for Pw =1GW ; x axis – time(s)

Figure 5.5: THD for the line-to-line voltages at PCC1 for Pw = 1GW ; x axis – time(s)

5.1.3 MMC

The output phase voltages (V1(abc)), arm currents (Iu(abc), Il(abc) ) and difference currents

(Idiff(abc)) for the onshore converter operating at 1GW are shown in Figure 5.6. The staircase

voltage waveform produced by the MMC is more evident than the voltages measured at the

PCC. The CCSC is able to suppress the circulating current to very small values as is

evident in the bottom graph of Figure 5.6 since there is virtually no AC component. The

absence of the circulating current component in the arm current ensures that there is little


131

distortion and that losses are minimised. The effect of the CCSC on the waveforms can be

seen by comparing Figure 5.6 with Figure 5.7.

Figure 5.6: Phase voltages, arm currents and difference currents for onshore MMC with Pw =1GW ; x

axis – time(s)

Figure 5.7: Phase voltages, arm currents and difference currents for onshore MMC with Pw =1GW

and CCSC disabled ; x axis – time(s)

The effect of the CCSC on the converter losses can be assessed by measuring the rms value

of the arm current. Comparing Figure 5.8 with Figure 5.9 shows that disabling the CCSC


132

increases the arm current by approximately 25%, indicating a significant increase in the

converter losses [108]. This increase in arm current may also require the valve components

to be designed for a higher current rating.

Figure 5.8: Rms value of the upper arm current for phase A with Pw=1GW and CCSC enabled ; x axis

– time(s)

Figure 5.9: Rms value of the upper arm current for phase A with Pw=1GW and CCSC disabled ; x axis

– time(s)

If the phase voltages in Figure 5.6 and Figure 5.7 are compared closely, particularly at the

peak of the waveform, it is noticeable that they are slightly different. This is because

circulating current increases the SM capacitor ripple voltage which increases the distortion

of the phase voltages. This can be shown by comparing Figure 5.5 and Figure 5.10.

Figure 5.10: THD for the line-to-line voltages at PCC1 for Pw = 1GW and CCSC disabled ; x axis –

time(s)

In Section 4.2.2, the SM capacitance was calculated to give a ±5% ripple voltage. Figure

5.11 shows that this calculation is accurate. Disabling the CCSC increases the ripple


133

voltage to approximately ±10% as shown in Figure 5.12, which again indicates the benefit

of the CCSC.

Figure 5.11: SM capacitor ripple voltages for the upper arm of phase A with Pw=1GW ; x axis – time(s)

Figure 5.12: SM capacitor ripple voltages for the upper arm of phase A with Pw=1GW and CCSC

disabled ; x axis – time(s)

5.1.4 Onshore AC Fault Ride-through

VSC-HVDC links must be able to ride-through faults and disturbances on the AC network.

The exact requirements for the link will be dependent upon the grid code. The fault ride-

through criteria to meet the GB grid code is given in Section CC.6.3.15 of [106]. The

general criterion for HVDC systems is broadly the same as a power park module, however

there are some difference for faults in excess of 140ms. The active power recovery

response of the HVDC system for faults in excess of 140ms but less than 800ms is

determined through study work by the developer and the results are submitted to National

Grid. The key criteria for a power park module, for onshore AC short-circuit faults lasting

up to 140ms and Supergrid voltage dips greater than 140ms is summarised below:

1. The system must not be tripped for a close-up solid three-phase short-circuit fault

or any unbalanced short-circuit fault on the onshore transmission system for a total

fault clearance time of 140ms. It should be noted that the Supergrid voltage may

take longer than the 140ms clearance time to recover to 90% of its nominal value.


134

2. It must deliver 90% of the pre-fault active power within 0.5s of the Supergrid

voltage returning to 90% of its nominal value. Oscillations in active power are

acceptable providing that the oscillations are adequately damped and that the active

energy is at least that which would have been delivered if the active power was

constant.

3. During the fault, for which the voltage at the interface point is outside the limits

specified in Section CC.6.1.4, the generating unit must supply maximum reactive

current without exceeding its thermal rating.

4. The system must remain transiently stable and connected to the system for balanced

Supergrid voltage dips and associated durations on the onshore transmission

system. The active power level during the dip should be retained at least in

proportion to the retained balanced voltage, and supply maximum reactive current

when the voltage is outside the limits specified by CC.6.1.4, without exceeding the

transient ratings.

5. The active power transfer capability following Supergrid voltages dips on the

onshore network should be restored to at least 90% of the level available before the

dip within 1 second. The oscillations criteria are the same as criterion two.

It is expected that the maximum instantaneous arm current for an MMC is approximately

1.5p.u. (≈3kA) and that the maximum instantaneous SM overvoltage is 1.3p.u.(≈27kV)27

.

Hence for each of the test cases simulated, the MMC arm current and SM capacitor

voltages must be within these limits in order to safely ride-through the disturbance.

During onshore AC disturbances, the onshore converter’s ability to export active power is

diminished. If the power generated by the windfarm is not curtailed to meet the demands of

the onshore converter, the DC link voltage will rise. Several methods have been proposed

for the curtailment of wind power during onshore AC faults. However, many of these

methods require telecommunications, are not applicable for all wind turbine topologies, or

require modifications to the offshore MMC and wind turbine controls. The use of a DC

braking resistor in the HVDC link enables the DC link voltage to be controlled very

effectively and does not impact on the windfarm. It is for these reasons that the use of a

DC braking resistor is employed for these studies.

27

Under normal operating conditions, the maximum instantaneous arm current and the maximum instantaneous SM capacitor voltage is approximately 2kA and 21kV respectively.


135

5.1.4.1 Supergrid Voltage Dips

According to the GB grid code, for a Supergrid voltage dip to 30% the DC converter must

remain connected to the grid for at least 384ms. To test the link’s ability to ride-through

this disturbance the following simulation is conducted; the windfarm is set to operate at

maximum power, at approximately 2s the voltage at PCC1 is reduced to 0.3p.u. for 0.5s,

and is then increased to 90% of the nominal value. The simulation results are presented in

Figure 5.13.

At fault inception, the active power exported by the inverter, P1, decays in proportion to

the voltage dip, while the active power imported from the windfarm, P2, remains

unchanged. This leads to a rise in the DC link voltage. The DC braking resistor is

switched-on the moment that the DC link voltage exceeds the 1.1p.u. threshold and is

turned-off once the DC link voltage returns to 1.0.p.u. When the Supergrid voltage is

restored to 90% of the nominal value, the active power level recovers to its pre-disturbance

level with little oscillation and well within the allowable time. The converter’s SM

capacitor voltages and arm current values do not exceed tolerable values during this

simulation case. The simulation results therefore show that the system is capable of riding

through the disturbance for the required 384ms.

The MMC in the previous simulation case was set to inject no reactive power at the PCC1

and therefore criterion 4 would have not been fully met in this case. In the following case

the MMC operates in AC voltage control and the simulation results are shown in Figure

5.14. During the voltage dip the MMC injects maximum q-axis current. The reactive power

support increases the voltage at the PCC and subsequently enables the converter to supply

approximately 50% more active power than without the reactive power support. The active

power response upon fault clearance is more oscillatory when the AC voltage magnitude

control is employed. This is primarily because the AC voltage magnitude control is slower

than the reactive power controller, due to the rms measurements.

5.1.4.2 Unbalanced Short-circuit Faults

In order to meet criterion 1, the DC converter must remain connected to the onshore grid

for an unbalanced close-up short-circuit fault with a fault clearance time of 140ms. Figure

5.15 shows the converter’s performance for a 140ms line-to-ground fault occurring at 3s on

phase A, and for a 140ms line-to-line fault between phases A and B occurring at 4s. The


136

simulation results show that the link is able to ride-through the two unbalanced AC

network faults and meet the necessary criterion.

5.1.4.3 Three-phase Line-to-Ground Fault at PCC1

A three-phase symmetrical fault is applied at PCC1 for 140ms starting at 3s. During such a

severe fault, the inverter is unable to export any significant quantity of active power,

leading to a rapid rise in the DC link voltage. In this scenario, the MMC converters are

effectively paralysed and the regulation of the DC link voltage is performed by the DC

braking resistor, which is designed to dissipate the maximum windfarm power at a DC link

voltage of 720kV (1.2p.u.).

Figure 5.16 shows that the DC link voltage does exceed 1.2p.u. This is due to power from

the onshore AC system being injected into the link when the fault is cleared. Upon fault

clearance, the converter is unable to effectively control the d-axis current for a short period

of time, which leads to power from the onshore AC system being injected into the link.

Increasing the bandwidth of the current controller and the Phase Locked Loop (PLL) can

improve the system’s response to this type of fault; however increasing controller

bandwidth may degrade system performance under different operating conditions. After

the fault is cleared, the active power level recovers to its pre-disturbance level well within

the allowable time and with acceptable oscillations.

The simulation results show that the peak voltage for the SM capacitor voltages for the

upper arm of phase A is approximately 26kV (<1.3p.u.), which is the worst of the cases

simulated. The maximum DC link voltage, the maximum arm current and the performance

of the CBC are the three main factors which determine the peak value of the capacitor

voltage. However, varying one of these three factors can limit the link’s performance in

other areas. For example, increasing the sorting frequency of the CBC can reduce the peak

capacitor voltage, but at the expense of increased switching losses. It is expected that the

SMs in a commercial MMC are rated to withstand 1.3p.u., a peak voltage of 26kV is

therefore considered to be acceptable. The peak arm current value does not exceed the 3kA

overcurrent protection limit.

The link’s ability to safely ride-through AC system faults is affected by a number of

factors which include, but are not limited to, AC system strength, fault impedance, control

system design, protection strategy and DC braking resistor design.


137

Figure 5.13: Supergrid voltage dip to 0.3p.u. with no MMC reactive current support ; arm currents

are for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis – time(s)


138

Figure 5.14: Supergrid voltage dip to 0.3p.u. with MMC reactive current support ; arm currents are

for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis – time(s)


139

Figure 5.15: Phase A to ground fault at 3s and phase A to phase B fault at 4s ; arm currents are for

MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis – time(s)


140

Figure 5.16: Three-phase to ground fault at 3s ; arm currents are for MMC1 and capacitor voltages

are for the upper arm of phase A for MMC1; x axis – time(s)


141

5.1.5 DC Faults

The simulation results for a DC line-to-line fault applied to the terminals of MMC1 at 3s

are shown in Figure 5.17. The converters have an instantaneous overcurrent threshold of

3kA. Once the current magnitude in any arm of the converter reaches this threshold the

converter is blocked. It takes approximately 400µs from fault inception for MMC1 to reach

this limit. If the assumed maximum arm current rating of 3kA is impractical, then either

more inductance must be added to the fault current path, the converter must be capable of

blocking quicker, or a combination of the two must be employed. Upon blocking the

converter, the fault current flows from the AC system through the converter’s anti-parallel

diodes. In practice, protection thyristors are employed to conduct the DC fault current and

to therefore prevent the SM diodes from reaching their current rating. However, this does

not affect the overall simulation results. The results show that it takes approximately three

cycles for the AC breakers to open, after which the arm currents decay as the arm reactors

de-magnetise. The fast blocking action ensures that the converter is able to survive a severe

DC line-to-line fault.

A DC positive line-to-ground fault is applied to the terminals of MMC1 at 3s. As shown in

Figure 5.18 the faulted pole voltage collapses to zero whilst the healthy pole experiences a

voltage of 2p.u. (600kV). This causes the converter to synthesise voltages (Va1,Vb1,Vc1)

with a DC offset of 300kV. In a symmetrical monopole for a MMC-HVDC scheme, the

DC side is not normally earthed and therefore there is no low impedance path for the fault

current. The scheme can then theoretically continue to operate as stated in [109], however

this is unlikely to be possible in a commercial HVDC system due to the additional voltage

stress to the cable and transformer. The scheme is therefore tripped and the DC link

voltage is reduced as quickly as possible to protect the DC cables and transformer.

In Figure 5.19, the DC braking resistor is turned-on and the MMCs are blocked once the

local negative line-to-ground voltage magnitude exceeds 1.1p.u. (330kV) and 1.3p.u.

respectively. Once the offshore converter is blocked, active power is still injected into the

link from the windfarm through the MMC’s diodes, which is dissipated in the DC braking

resistor. Approximately three cycles after fault inception, the AC side breakers for both

converters are tripped and then the DC braking resistor rapidly discharges the DC cable.

The healthy DC cable voltage is reduced to less than 1p.u. within 80ms of fault inception

using this protection strategy.


142

It should be noted that in commercial HVDC schemes a star-point reactor between the

transformer and the converter at one converter station is installed to provide DC voltage

grading [91] and that surge arresters are typically installed between the DC poles and

ground to limit overvoltages. These components were not modelled in the previous

simulation cases.

In the event of a DC line-to-ground fault, the star-point reactor provides a low impedance

path for DC current to flow and the surge arresters assist in limiting the magnitude and

duration of the DC voltage experienced by the healthy cable. Simulation results are

included in Appendix 5A to show the effects of the star-point reactor and surge arresters.


143

Figure 5.17: DC line-to-line fault at the terminals of MMC1 at 3s ; arm currents are for MMC1 and

capacitor voltages are for the upper arm of phase A for MMC1; x axis – time(s)


144

Figure 5.18: Positive pole-to-ground fault at MMC1 ; arm currents are for MMC1 and capacitor

voltages are for the upper arm of phase A for MMC1; x axis – time(s)


145

Figure 5.19: Positive pole-to-ground fault at MMC1 with under voltage protection ; arm currents are

for MMC1 and capacitor voltages are for the upper arm of phase A for MMC1; x axis – time(s)


146

5.2 VSC-HVDC Interconnector

The purpose of this section is to highlight the differences between a VSC-HVDC link

employed for the connection of a windfarm and a VSC-HVDC link employed for the

interconnection of two active networks. The structure of the model for the interconnector,

as shown in Figure 5.20, is similar to link for the offshore windfarm, shown in Figure 5.1,

except for the following distinctive differences:

The windfarm network is replaced with a relatively strong AC network

Each MMC must be able to operate as a rectifier and as an inverter

MMC2 is set to control active and reactive power, as opposed to AC voltage

magnitude and frequency

The interconnector has no DC braking resistor

Figure 5.20: MMC VSC-HVDC interconnector

5.2.1 Power Reversal

Figure 5.21 shows the link’s ability to operate under emergency power control for a range

of power orders including power reversal. The steady-state waveforms for a point-to-point

link are similar to a link employed for a windfarm (Section 5.1.3) and hence they are not

repeated here.

5.2.2 AC Faults

In terms of a link’s ability to ride-through AC faults, the key difference between an

interconnector and a link employed for the connection of a windfarm is that the

interconnector controls active power flow. Hence, if a fault occurs in the AC grid

connected to MMC 1, MMC 2 is able to control the power flow to regulate the DC link

voltage.

A method proposed in [77], varies the link’s power order in accordance with the AC

system voltage magnitude measured at each end of the link. This method is shown to work

XT=15%

Yg/D

MMC2

Vs2(abc)

410kV 370kV

D/Yg

MMC1

Is1(abc)

PCC1XT=15%

370kV 410kV

Vs1(abc)

Is2(abc)

Real and reactive power

control



Vdc2=600kV

165km DC cablePCC2

Larm=45mH

Vn

SCR=3.5

Zn

400kV

Vn

SCR=3.5

Zn

400kV

CSM=1150μF

Idc2 Idc1


147

effectively in [77], however the reliance upon a telecommunications link between the two

converters is a drawback due to reliability concerns. An alternative method is to use

voltage margin control, which is discussed in detail in Section 8.2.2. The converter

effectively operates in constant power control, providing that its local DC link voltage is

within pre-set limits (Vdc-low<Vdc<Vdc-high), when employing this control method. If the DC

link voltage exceeds these limits then the converter operates in DC link voltage control

mode. Hence, applying voltage margin control to MMC 2 enables the DC link voltage to

be regulated for disturbances in AC grid 1 without a telecommunications link.

A three-phase symmetrical fault is applied at PCC1 for 140ms starting at 3s and the

simulation results are shown in Figure 5.22. The simulation results show that the link is

able to ride-through the three-phase AC network fault and meet the necessary criteria.

5.2.3 DC Faults

The link’s response to a DC line-to-line fault is similar to that of a link for a windfarm and

therefore will not be repeated. In the event of a DC line-to-ground fault for a HVDC link

interconnecting two active networks, the converters are blocked on line-to-ground

overvoltage protection, the AC circuit breakers are tripped after three cycles and the cable

then discharges without the aid of a DC braking resistor as shown in Figure 5.23. The

healthy DC cable voltage is reduced to less than 1p.u. within 200ms of fault inception

using this protection strategy. As mentioned in Section 5.1.5, surge arresters can be used to

limit the voltage on the healthy cable.


148

Figure 5.21: System response for a wide range of active and reactive power orders ; x axis – time(s)


149

Figure 5.22: Three-phase fault for 140ms at 3s ; arm currents are for MMC1 and capacitor voltages

are for the upper arm of phase A for MMC1; x axis – time(s)


150

Figure 5.23: DC line-to-ground fault ; arm currents are for MMC1 and capacitor voltages are for the

upper arm of phase A for MMC1; x axis – time(s)


151

5.3 Variable Limit DC Voltage Controller

During AC system disturbances, the DC link voltage controller increases the d-axis current

set-point. This is to compensate for the decrease in the AC system voltage in an attempt to

regulate the DC link voltage and hence maintain the pre-fault active power flow. Once the

fault is cleared, the AC system voltage recovers faster than the DC link voltage controller

is able to reduce the d-axis current set-point to achieve the desired active power, which

results in an overshoot. The d-axis current set-point has a fixed limit which is used to

prevent the converter from exceeding its current rating. In the event of a severe AC system

disturbance, such as an AC close-up three-phase fault, the DC voltage controller will reach

the d-axis current limit. This results in a large overshoot when the desired active power

flow is relatively low, as shown in Figure 5.24 (left) for the windfarm link model.

The system’s response can be improved by increasing the bandwidth of the DC link

voltage controller; however, this can degrade system performance under different

operating conditions. An alternative method is proposed here which varies the d-axis

current limits for the DC link voltage controller depending upon the pre-fault active power

flow. The controller continuously measures the active power, and calculates the required d-

axis current based on the AC system voltage to achieve the required active power. The

calculated d-axis current value is then increased by a safety margin (20%) and is used to

set the d-axis current limit. Once the measured AC system voltage decreases below a pre-

set level (0.85p.u.) the d-axis current value switches to variable limits until 100ms after the

AC system voltage increases above 0.85p.u. The threshold of 0.85p.u. is the minimum AC

system voltage value at which the system can supply maximum active power. This method

ensures that the d-axis current limit is set to a level appropriate for the pre-fault active

power flow and hence reduces the power overshoot as shown in Figure 5.24 (right). The

variable limits are only activated once the AC system voltage decreases below 0.85p.u. and

hence fixed limits are employed during normal operation.

Figure 5.24: Comparison of active power response for a 140ms three-phase AC fault using fixed and

variable limits Left) fixed limits, Right) variable limits


152

5.4 Conclusion

This chapter has assessed the steady-state and transient performance of the MMC-HVDC

link models developed in Chapter 4 through conducting a range of typical studies. The

simulation results are shown to be in agreement with the theory outlined in Chapter 4.

These models thus provide a high fidelity version of a component level MMC model with

detailed parameters and control and can therefore act as a benchmark for lower fidelity

models. An example of this use was in the verification of an averaged value VSC-HVDC

model which enabled this lower fidelity model to be used for a comprehensive

investigation into the limitations imposed on active power controllers.

The models developed in this thesis were used to investigate the links’ ability to respond to

reactive power demands and to ride-through disturbances in the AC grid. The results show

that the models were able to meet the reactive power requirements and the AC fault ride-

through requirements set out in the GB grid code for the tests conducted, as well as

complying with the IEEE 519 THD voltage harmonic limits at the PCC. Furthermore, the

results show that the use of the proposed variable limit DC voltage controller, a

modification to the standard DC voltage controller, can improve the system’s fault

recovery response.

The differences between the control and protection of the interconnector, in comparison to

the link employed for the connection of a windfarm, were also highlighted. The key

difference is that the interconnector is able to maintain control of the DC link voltage in the

event of a severe AC fault, without a DC braking resistor, by controlling the active power

at the rectifier.

Chapter 6 MMC Modelling Techniques

153

6 Comparison of MMC Modelling Techniques

The 31-level MMC converters described in Chapter 4, and used for the MMC-HVDC link

models in Chapter 5, were represented using the PSCAD Detailed Equivalent Model

(DEM) which is based on the principles outlined in [10]. The DEM technique was

employed as a direct consequence of the comparative analysis of detailed MMC modelling

techniques described in this chapter.

Modelling MMCs in Electromagnetic Transient (EMT) simulation programs presents a

significant challenge in comparison to modelling a two or three-level VSC. The stack of

series-connected IGBTs in each arm of a two or three-level VSC are switched at the same

time. This simultaneous switching action enables the stack of IGBTs to be modelled as a

single IGBT for many studies. The MMC topology, however, does not contain stacks of

series-connected IGBTs which have identical firing signals and therefore a comparable

simplification in the model cannot be made.

The converter employed on the Trans Bay Cable project is an MMC with approximately

201 levels. A Traditional Detailed Model (TDM) of this converter would require more than

2400 IGBTs with anti-parallel diodes and more than 1200 capacitors, to be built and

electrically connected in the simulation package’s graphical user interface, resulting in a

large admittance matrix. The admittance matrix must be inverted each switching cycle,

which for MMCs can be hundreds of times per fundamental cycle and is therefore

extremely computationally intensive. This makes modelling MMCs for HVDC schemes

using traditional modelling techniques impracticable.

To address this problem an efficient model was proposed by Udana and Gole in [10],

which is referred to as the DEM in this work. In [10] the DEM was shown to significantly

reduce the simulation time in comparison with a TDM without compromising on accuracy.

A drawback of the DEM is that the individual converter components are invisible to the

user. This makes the model unsuitable for studies which require access to the individual

converter components and it makes it difficult to re-configure the converter SM for

different topologies. Only one publication has compared the DEM with the TDM, which

was performed in EMTP-RV [12].

A new model, referred to as the Accelerated Model (AM), was proposed by Xu et al. in

[11]. This model was found to offer greater computational efficiency than for a TDM


154

without compromising on accuracy and it gives the user access to the individual converter

components. In [11], an attempt was made to compare the AM simulation time with the

DEM simulation time data from [10], however, a full and objective comparison could not

be completed because the models were built by different researchers on different

computers.

The objective of this chapter is to perform a much needed independent comparison of the

TDM, DEM and AM models, which will enable the reader to make a more informed

decision when selecting which type of detailed MMC model to use, and to have a greater

degree of confidence in the MMC model’s performance. In this work the TDM, DEM and

AM models are built in the same software environment and are simulated on the same

computer to evaluate their accuracy and simulation speed. This enables a fair comparison

between the DEM and the AM and it provides the first independent verification for the AM

against the TDM, and the first independent verification for the DEM against the TDM in

PSCAD. Having completed this verification, this work also highlights potential limitations

of the AM and proposes an enhanced accelerated model (EAM) with an improved

simulation speed.

6.1 MMC Modelling Techniques

This section describes the three leading detailed modelling techniques, TDM, DEM and

AM which represent the converter’s IGBTs and diodes using a simple two-state resistance.

6.1.1 Traditional Detailed Model

In a traditional detailed MMC model, each SM’s IGBTs, diodes and capacitors are built in

the simulation package’s graphical user interface and electrical connections are made

between the SMs in each arm, as shown in Figure 4.2. This is the standard way of building

a detailed MMC model and hence is why this type of model is referred to as the TDM.

This method of modelling is intuitive and gives the user access to the individual

components in each SM, however, for MMCs with a large number of SMs this method is

very computationally inefficient.

6.1.2 Detailed Equivalent Model

The DEM uses the method of Nested Fast and Simultaneous Solution (NFSS) [110]. The

NFSS approach partitions the network into small sub-networks, and solves the admittance


155

matrix for each sub-network separately [10]. Although this increases the number of steps to

the solution, the size of admittance matrices are smaller, which can lead to a reduced

simulation time. A summary of the DEM is presented here, however, further information

can be found in [10].

6.1.2.1 Nested Fast and Simultaneous Solution

The NFSS approach is best explained with the aid of an example [10]. The equivalent

admittance matrix for a network, which is split into two subsystems is given by (6.1).

11 12 1 1

21 22 2 2

Y Y V J

Y Y V J

(6.1)

where:

11 22,Y Y admittance matrices for subsystem 1 and subsystem 2 respectively.

12 21,Y Y admittance matrices for the interconnections

1 2,V V unknown node voltage vectors

1 2,J J source current vectors

The number of nodes in subsystem 1 and subsystem 2 are N1 and N2 respectively. The

direct solution of (6.1) for the unknown vector voltages requires an admittance matrix of

size (N1+N2) (N1+N2) to be inverted.

Rearranging the 2nd

row of equation (6.1) for V2 gives (6.2). Substituting (6.2) into the first

row of (6.1) produces (6.3) which can be rearranged for V1, as given by (6.4).

1 1

2 22 21 1 22 2V Y Y V Y J (6.2)

1 1

1 11 1 12 22 2 22 21 1( )J Y V Y Y J Y Y V (6.3)

1 1 1

1 11 12 22 21 1 12 22 2( ) ( )V Y Y Y Y J Y Y J (6.4)

V1, calculated from (6.4), is then substituted into (6.2) to calculate V2. Once all unknown

voltages are calculated, all currents can then be calculated. This approach requires the

inversion of two matrices, 22Y , of size (N2N2) and 1 1

11 12 22 21( )Y Y Y Y of size (N1N1), instead

of a single matrix of size (N1+N2)(N1+N2). This example partitioned the original network


156

into two subsystems, however the network can be split into many subsystems. In the DEM,

each converter arm is modelled as its own subsystem.

The size of the admittance matrices for each converter arm is related to the number of

SMs, hence, for MMCs with a high number of levels, the size of the admittance matrices to

be inverted are still relatively large. To further improve the simulation speed, the DEM

reduces each converter arm to a Norton equivalent circuit.

6.1.2.2 Norton Equivalent Circuit for the Converter Arm

This modelling method is based on converting a multi-node network into an exact, but

computationally simpler, equivalent electrical network using Thevenin’s theorem. The

IGBTs and antiparallel diodes employed in each SM form a bi-directional switch and can

therefore be represented as a resistor, with two values, Ron and Roff. The resistor value is

dependent upon the firing signal to the IGBT and the arm current direction, Iarm. The

converter is considered to be blocked when both IGBTs are switched-off and hence the

values of R1 and R2 are determined by the arm current direction. The SM capacitor can be

represented as an equivalent voltage source, Vcapeq, connected in series with a resistor, Rcap,

as shown in Figure 6.1.

Figure 6.1: SM circuit (left) SM equivalent circuit (right)

The Vcapeq and Rcap values are determined from the following analysis.

( )( )

cap

cap SM

dV tI t C

dt (6.5)

Solving equation (6.5) for ( )capV t using the trapezoidal integration method gives (6.6).

( ) ( ) ( )cap cap cap capeqV t R I t V t t (6.6)

R1

R2

Rcap

Icap

Vcap

Vcapeq

Vcap

Icap

Iarm Iarm

VSMVSM


157

where:

2cap

SM

tR

C

(6.7)

( ) ( ) ( )2

capeq cap cap

SM

tV t T I t t V t t

C

(6.8)

The voltage at the terminals of the SM is given by (6.9):

( ) ( ) ( )SM arm SMeq SMeqV t I t R V t t (6.9)

where:

22

1 2

1SMeq

cap

RR R

R R R

(6.10)

2

1 2

( ) ( )SMeq capeq

cap

RV t t V t t

R R R

(6.11)

The SMs in each converter arm are connected in series. The Thevenin equivalent circuits

for each SM can therefore be combined to a single Thevenin equivalent circuit for each

converter arm, as shown in Figure 6.2, where:

1

n

eq SMeqi

i

R R

(6.12)

1

n

eq SMeqi

i

V V

(6.13)

The Thevenin equivalent circuit for the converter arm is converted to a Norton equivalent

circuit for use by the main EMT solver.


158

Figure 6.2: String of SM Thevenin equivalent circuits (left) Converter arm Thevenin equivalent circuit

(right)

The process outlined in this section has reduced a multi-node network for each converter

arm and converted it into a two node Norton equivalent circuit in the main EMT solver.

This significantly reduces the size of the admittance matrix for the EMT solver which

improves the simulation speed. Since the main EMT solver only considers a two node

network for each converter arm, the individual identities of each SM are lost, however, the

Thevenin equivalent solver considers each SM separately and therefore the SM capacitor

voltages and currents are recorded.

PSCAD have developed a DEM model based on the work by Udana and Gole. The

component mask is shown in Figure 6.3. The development of the DEM has a clear

advantage over the TDM in terms of simulation speed, however there are some limitations.

The user it not able to access the SM components, which means that the model is not

suitable for studies which require internal converter access. Also re-configuring the

component for other SM topologies is not straightforward as it needs to be re-coded for the

specific topology, which can be complex and time consuming. Half-bridge and full-bridge

MMC equivalent arm components are currently available to PSCAD users.

Figure 6.3: PSCAD half-bridge MMC arm component

VSM1

VSMn

RSMeq1

VSMeq1

RSMeqn

VSMeqn

Iarm

Iarm

Iarm

Varm

Req

Veq

Ic

Vc

x10


159

6.1.3 Accelerated Model

The Accelerated Model (AM) was proposed by Xu et al. in [11]. In many respects the AM

is a hybrid between the TDM and the DEM. The user is able to access the SM components,

as they can with the TDM, but the converter arm is modelled as a controllable voltage

source, which is similar to the DEM. An overview of the AM is presented here; the reader

is referred to [11] for further information. In the AM, the series-connected SMs are

removed from each converter arm, separated and driven by a current source with a value

equal to the arm current, Iarm. A controllable voltage source is installed in place of the SMs

as shown in Figure 6.4, where the value of the controllable voltage source is given by

(6.14).

1

n

arm SMi

i

V V

(6.14)

The AM reduces the size of the main network admittance matrix by solving the admittance

matrix for each SM separately. The AM has two key advantages in comparison to the

DEM. The first is that the AM allows the user access to the SM components. The second is

that because the AM is implemented using standard PSCAD components, the internal

structure of the SM can be easily modified; for example changing from a half-bridge SM to

a full-bridge SM.

Figure 6.4: Implementation steps for the accelerated model

VSM1

VSM2

VSMn

VSM1

VSM2

VSMn

Iarm

Iarm

Iarm

Iarm

Iarm

Iarm

Icap1

Icap2

Icapn

Icap1

Icap2

Icapn

Vcap1

Vcapn

Vcap2

Vcap1

Vcapn

Vcap2

Iarm

Larm

Larm

Varm

Converter arm


160

6.2 Simulation Models

A detailed MMC model for a typical VSC-HVDC scheme, employing the TDM converter

arm representation, has been developed. This model is used as the TDM simulation model

base case. The simulation models for the DEM and for the AM are identical to the TDM,

except that the TDM converter arms are replaced with the converter arms required for the

DEM and AM respectively. This approach ensures that fair comparisons between the

different modelling techniques can be made.

The basic structure of the simulation model and the key parameters are shown in Figure

6.5. This simulation model was built before the MMC-HVDC radial link models described

in Chapters 4 and 5 and is effectively one end of a MMC link with the other MMC

represented by a DC voltage source. The structure, controls and parameters for this model

are very similar to that of the model described in Chapter 4. The key differences are that

feed-forward active and reactive power controllers were used for this model and that this

model uses a larger value of arm reactance. The parameters for the model are given in

Appendix 6A.

Figure 6.5: Basic simulation model structure

6.3 Results

In this section the three models are compared in terms of their accuracy and simulation

speed.

6.3.1 Accuracy

The accuracy of each model is assessed for steady-state and transient events through

conducting a range of typical studies, and is evaluated graphically and numerically by

calculating the Mean Absolute Error (MAE) of the waveforms produced by the DEM and

AM with respect to the TDM. The MAE is normalised to the mean value of the TDM

waveform.

D/Yg

Vn

SCR=3.52

dcV

2

dcV

100km

FDPCM

31-Level MMC

Iabc

L-L Fault

PCC

L-G Fault

DCCB

Is(abc)

Vs(abc)

XT=15%

370kV 410kV

P=1GW Csm=1150µF Larm=85mHVdc=600k

400kV

Idc


161

6.3.1.1 Steady-state

The steady-state waveforms produced by the models for the converter operating as an

inverter at 1GW are shown in Figure 6.6. The waveforms are virtually identical and this is

confirmed by the very small (<1%) normalised MAE values given in Table 6.1. The

models were re-simulated for the converter operating as an inverter at 500MW and

100MW, and their normalised MAE values are given in Table 6.2 and Table 6.3

respectively. The results generally show that the accuracy of the models decreases as the

operating point decreases. This is especially the case for the phase current and arm current.

At lower operating points, the magnitude of the arm and phase currents are smaller and the

switching noise is more noticeable. It appears to be the case that the effect of this switching

noise on the dominant signal and the models inability to replicate it, is impacting on the

normalised MAE values.

Figure 6.6: Steady-state simulation results for the three models . From top to bottom: (a) Phase A

output voltage, (b) Phase A output current, (c) Phase C upper arm current. (d) Phase A upper arm

mean capacitor voltage

TDM DEM AM

4.8 4.81 4.82 4.8 4.81 4.82 4.8 4.81 4.82

Time (s) Time (s) Time (s)

TDM DEM AM

4.8 4.85 4.9 4.8 4.85 4.9 4.8 4.85 4.9


Vca

p (

kV

) 21

18.5

Iuc

(kA

)Ia

(kA

)V

a(k

V)

2.2

-2.2

2.2

-2.2

300

-300


162

1GW Steady-state

Signal DEM error (%) AM error (%)

Va 0.27 0.81

Ia 0.12 0.48

Iua 0.32 0.61

Vcap 0.11 0.21

Table 6.1: Normalised MAE for the DEM and AM waveforms when operating in steady-state at 1GW

500MW Steady-state


Va 0.27 0.54

Ia 0.35 0.66

Iua 0.77 1.07

Vcap 0.03 0.07

Table 6.2: Normalised MAE for the DEM and AM waveforms when operating in steady-state at

500MW

100MW Steady-state


Va 0.47 0.85

Ia 2.37 2.64

Iua 3.27 4.76

Vcap 0.04 0.05

Table 6.3: Normalised MAE for the DEM and AM waveforms when operating in steady-state at

100MW

6.3.1.2 DC Side Line-to-Line Fault

A DC line-to-line fault is applied at 4.5s to the MMC terminals as shown in Figure 6.5.

The DC circuit breakers (DCCBs) are opened 2ms after the fault is applied so that the DC

voltage sources do not continue to contribute to the fault current. The MMC converter is

blocked at 4.502s, and the AC side circuit breakers are opened at 4.56s. The waveforms

produced by the models are shown in Figure 6.7 and their normalised MAE values are

given in Table 6.4. The waveforms produced by the DEM and the AM are virtually

identical (<1%) and are very similar (<2.5%) to the TDM respectively. An error in the AM

model’s phase voltage is shown in Figure 6.7 at the instance the arm current goes through

zero. This issue occurs because the AM is not able to correctly determine the on/off status

of the SM diodes in a single time-step when the converter is blocked. This issue is

discussed further in Section 6.3.2.


163

Figure 6.7: DC line-to-line fault applied at 4.5s . From top to bottom: (a) DC current (b) Phase A

output voltage, (c) Phase A upper arm current. (d) Phase A upper arm mean capacitor voltage.

DC Line-to-Line Fault


Idc 0.41 2.29

Va 0.22 1.12

Iua 0.51 1.83

Vcap 0.07 0.07

Table 6.4: Normalised mean absolute error for the DEM and AM waveforms for a DC line-to-line

fault.

6.3.1.3 AC Line-to-Ground Fault

A line-to-ground fault is applied to phase A at the PCC for 60ms at 4.5s as shown in Figure

6.5. The waveforms produced by the models are shown in Figure 6.8 and their normalised

MAE values are given in Table 6.5.

TDM DEM AM

4.5 4.6 4.7 4.5 4.6 4.7 4.5 4.6 4.7


2

Idc

(kA

)V

a(k

V)

300

-300

Iua

(kA

)

4

-8

Vca

p (

kV

)

21

18

-18


164

Figure 6.8: Line-to-ground fault for phase A applied at 4.5s . (a) Phase A output voltage, (b) Phase A

output current, (c) Phase A upper arm current. (d) Phase A arm current, zoomed.

AC Line-to-Ground Fault


Va 0.96 1.76

Ia 0.51 1.37

Iua 3.01 4.34

Iua zoom 11.72 5.14

Table 6.5: Normalised mean absolute error for the DEM and AM waveforms for a line-to-ground AC

With the exception of the phase A upper arm current, the waveforms produced by the

DEM and the AM are virtually identical (<1%) and very similar (<2.5%) to the TDM

respectively. From all of the simulations conducted, the greatest difference between the

three models was found to be in the phase A upper arm current a few cycles after the fault

is cleared when the MMC becomes over-modulated, as highlighted in Figure 6.8d. This

difference lasts for a few cycles and there is no significant difference in the peak current

values for the three models.

TDM DEM AM

4.45 4.6 4.75 4.45 4.6 4.75 4.45 4.6 4.75


TDM DEM AM

4.6 4.62 4.64 4.6 4.62 4.64 4.6 4.62 4.64


Va

(kV

)

300

-300

Ia(k

A)

10

-10Iu

a(k

A)

4

-4

Iua

(kA

)

2

-2


165

6.3.2 AM Simulation Limitation

The AM implemented in this work was found to be unable to fully manage the simulation

case when the converter is blocked, as shown in Figure 6.7. To further demonstrate this

issue, the converter is blocked at 3s when operating as an inverter at 1GW and the Phase A

output voltage for the three models are shown in Figure 6.9. Clearly the converter voltage

for phase A for the AM is different.

Figure 6.9: Phase A output voltage for the three models when the converter is blocked at 3s.

This is an inherent issue with the implementation of the AM and can be illustrated further

at the SM level. A circuit diagram for a blocked SM connected to a voltage through a

resistor is shown in Figure 6.10. A model of this circuit based on the principles of the AM

is shown in Figure 6.11.

The SM current, ISM, is measured in the primary circuit and is used as the current source

reference in the secondary circuit. The SM voltage, VSM, is measured in the secondary

circuit and is used as the voltage source reference in the primary circuit. Each network is

therefore solved at the present time-step based on information from the other network at

the previous time-step.

Figure 6.10: Blocked SM test circuit

TDM DEM AM

2.9 3 3.1 2.9 3 3.1 2.9 3 3.1


400

-400

Va

(kV

)

Icap

ISM

VSM

Vcap

VS

R

D1

D2


166

Figure 6.11: Implementation of blocked SM test circuit based on AM principles

Upon model initialisation, VSM=0V, and therefore the SM current flows in the positive

direction causing the upper diode, D1, to conduct and the SM capacitor to charge. Once the

SM capacitor is fully charged, if the voltage source value is reduced, the upper SM diode,

D1, should become reverse biased. Assuming that the SM diodes are ideal, the SM

capacitor voltage should remain constant, Vs=Vsm and Ism=0. However, this is not the case

with the model implemented based on the AM principles. The arm current in the primary

circuit becomes negative because the value of VSM is equal to Vcap which is higher than Vs.

At the next time-step the negative arm current value causes the lower diode in the

secondary circuit to conduct and hence VSM=0. At the next time-step the arm current

becomes equal to /sV R causing the SM capacitor to charge. This behaviour continues for

the remaining simulation time. This limitation is understood to be have now been

addressed by Xu et al., but no details have yet been published.

6.3.3 Simulation Speed

A 5 second simulation was performed for a 16, 31 and 61 level MMC using the three

modelling techniques with a 20µs time-step. The simulations were conducted on a

Microsoft Windows 7 operating system with a 2.5GHz Intel core iq7-2860 processor and

8GB of RAM, running on PSCAD X4. The simulation times are compared in Table 6.6

and in Figure 6.12.

MMC

Levels

Indices TDM DEM AM

16 Time (s) 178 62 107

Ratio - 2.86 1.66

31 Time (s) 949 82 176

Ratio - 11.59 5.39

61 Time (s) 4570 107 329

Ratio - 42.57 13.88

Table 6.6: Comparison of run times for the three models for a 5 second simulation

Icap

ISM

VSMVSMVS

ISM R

Primary Secondary

D1

D2

Vcap


167

The data shows that the DEM is the fastest and that the TDM is the slowest. It also shows

that as the number of converter levels increases the simulation time for the TDM increases

at a much faster rate than for the DEM and AM models.

It is worth noting that the results in [10] and [11] do appear, in general, to show that their

respective models simulate faster in comparison to the TDM than the results presented in

Table 6.6. The models simulated in this work are, however, more complex than the models

employed in [10] and [11] which may explain the difference.

Figure 6.12: Simulation times of the three models for different MMC levels.

6.3.4 Enhanced AM Model

The AM has the advantage that it is much faster than the TDM without noticeably

sacrificing accuracy for the majority of case studies. It does, however, need to be used with

care when the converter is blocked. In comparison with the DEM, the AM has the

advantage of allowing access to the SM components, but it is slower. This thesis proposes

an enhancement to the AM to improve its speed.

The procedure outlined in [11] to produce the AM, divides the series-connected SMs in

each arm into individual circuits, driven by a current source whose value is equal to the

arm current, as explained in Section 6.1.3. This approach effectively creates a subsystem

for each SM and solves the admittance matrix for each SM separately. Although this

increases the number of steps to the solution, the size of admittance matrices are smaller,

which can lead to a reduced simulation time [10, 11, 110] as shown in Table 6.6.

The simulation speed is affected by the number of steps to the solution and the size of the

admittance matrices. Hence it can be more efficient to group a number of SMs together in

1

10

100

1000

10000

16 31 61

Sim

ula

tio

n d

ura

tio

n (

s)

Number of MMC levels

TDM

DEM

AM


168

order to reduce the number of steps to the solution, at the expense of larger admittance

matrices. A 5 second simulation was performed for a 31-level MMC with groups of 1

(AM), 5 (AM5), 10 (AM10) and 30 (AM30) SMs. The results given in Table 6.7 show that

it is more efficient to create a sub-network for 5, 10 or 30 SMs rather than to produce a

sub-network for each SM. This is an important result since splitting a simulation model

into a smaller number of sub-networks tends to be less time consuming for the user. It can

also improve the simulation speed and reduce the risk of application instability.

Model Time

(s)

Ratio

AM 176 -

AM5 138 1.28

AM10 139 1.27

AM30 147 1.20

Table 6.7: Comparison of run times for different AM models

The AC fault test scenario (Section 6.3.1.3) was performed using an AM30 model to assess

any change in the models accuracy. The arm current waveforms for the TDM, AM and

AM30 are compared in Figure 6.13 and the normalised MAE values for the AM and AM30

model with respect to the TDM are given in Table 6.8. The results show that there is very

little change.

Figure 6.13: Line-to-ground fault for phase A applied at 4.5s for the TDM, AM and AM30 models.

Signal AM error (%) AM 30 error (%)

Va 1.76 1.74

Iua 4.34 4.42

Table 6.8: Normalised mean absolute error for the AM and AM30 waveforms for a line-to-ground AC

fault.

6.4 Analysis and Recommendations

The three detailed EMT models compared represent the converter’s IGBTs and diodes

using a simple two-state resistance and are therefore not suitable for studies which require

a detailed representation of the power electronic devices, such as the assessment of

TDM AM AM30

4.45 4.6 4.75 4.45 4.6 4.75 4.45 4.6 4.75


-10

Iua

(kA

)

4

-4


169

switching losses. The type of model compared is typically employed for control and

protection studies where the converter dynamics are important.

Although the three models compared in this work represent the power electronic devices in

the same way their implementation is different and this has an effect on the accuracy of

their results. A key difference between the TDM and DEM used in this chapter is that the

DEM does not use interpolation, and the key difference between the TDM and AM is that

the solution of the AM is dependent upon information from different sub-networks at the

previous time-step. These are the two most significant reasons why there is a small

difference between the results produced by each model, particularly under transient

conditions. The results in Table 6.8 have shown that even when two models are based on

the same modelling technique, but implemented slightly differently, the simulation results

are not identical. Using the TDM as the benchmark, the DEM was generally found to be

more accurate than the AM, and the AM was also found to produce numerical errors when

the converter is blocked and the arm current changes direction.

The different implementation methods for the three models have a significant impact on

their simulation speed. The results have shown that the DEM is the fastest and that the

TDM is the slowest. The simulation times for the TDM increases significantly more than

for the DEM and the AM as the number of converter levels increase and hence the DEM

and AM modelling techniques have great value when modelling MMCs with a relatively

large number of levels. The results have shown that a model of a 61-level MMC based on

DEM and AM techniques is 43 and 14 times faster than the TDM respectively.

In the DEM, the SM components are not visible to the user and therefore this model is not

suitable for studies which require direct access to the SM components. The TDM and AM

do allow the user access to the SM components and can therefore be easily modified for

the required study.

It is for these reasons that the DEM is considered to be the most suitable model for all

studies which do not require access to the SM components. The AM should be considered

for studies which require access to the SM components and where simulation speed is an

important factor, however great care should be taken if the study requires the converter to

be blocked. The user is also advised to create a sub-network for a number of SMs, rather

than for each SM, as this may reduce implementation time, simulation time and the


170

possibility of application instability without decreasing accuracy. The TDM is

recommended for studies which require access to the SM components and for the converter

to be blocked. The TDM is also recommended when simulation speed is not an important

factor.

6.5 Conclusion

This chapter has presented the first independent comparison of two previously developed

MMC modelling techniques (AM and DEM). It is has also presented the first independent

verification of the AM, and the first independent verification of the DEM in PSCAD. An

improvement to the AM technique is also described. An MMC-HVDC test system was

developed and the AM and DEM modelling techniques were compared against the TDM

modelling technique in terms of accuracy and simulation speed. The accuracy of the AM

and DEM models was evaluated graphically and numerically for steady-state and transient

studies. These findings have shown that both the AM and DEM modelling techniques offer

a good level of accuracy but that the DEM is generally more accurate than the AM. The

AM and DEM models have been shown to simulate significantly faster than the TDM, and

the DEM is more computationally efficient than the AM. The AM model does however

provide access to SM components (which is not possible with the DEM) and so may be

considered when this is an important factor.

The AM model was found to have limited performance for certain conditions when the

converter is blocked. This finding highlights the importance of this comparative study as it

has highlighted previously unreported shortcomings of discussed modelling techniques. It

was also shown that by modifying the original AM by producing a sub-network for a

number of SMs rather than for a single SM, the simulation run time could be improved.

These results have been used to propose a set of modelling recommendations (Section 6.4)

which summarise the findings of this study and offer technical guidance on state-of-the-art

of detailed MMC modelling.

Chapter 7 HVDC Cable Modelling

171

7 HVDC Cable Modelling

The required fidelity of a VSC-HVDC transmission scheme model is dependent upon the

type of study being performed. Publications have a tendency to discuss the VSC converter

model in-depth whilst often overlooking the cable model. There are publications which

compare VSC models in terms of their accuracy and simulation speed [11, 12], however

there are no such publications for HVDC cable models employed on typical VSC-HVDC

transmission schemes. Furthermore, there is currently a lack of publically available HVDC

cable data which is required to represent the cable.

This chapter aims to address the aforementioned gaps in literature by focusing on the

modelling of HVDC cables for VSC-HVDC transmission schemes. The complex structure

of a submarine XLPE HVDC cable is detailed and parameters to represent a 1GW 300kV

cable are derived from academic and commercial documentation. Types of commercially

available cable models are discussed and four of these models are compared in terms of

their accuracy and simulation speed for a range of studies when employed to represent the

cables in a high fidelity MTDC model. The chapter concludes with a set of cable modelling

recommendations.

7.1 The Cable

A submarine HVDC cable is complex and consists of many concentric layers as shown in

Figure 7.1.

Figure 7.1. Image of a submarine XLPE HVDC cable , modified from [34].

The current carrying conductor may be made of copper or aluminium and the choice is

normally project specific. The insulation layer provides an effective potential barrier

between the conductor and the metallic screen/sheath. In VSC-HVDC schemes the


172

insulation is typically XLPE because it is less expensive and more robust in comparison to

mass-impregnated cables [111]. The conductor screen and insulation screen are required to

protect the insulation from ridges/grooves which could be caused by extruding the

insulation directly onto the conductor [112]. Any ridges/grooves in the insulation could

result in an enhanced localised electric field stress which would reduce the dielectric

strength of the insulation. The metallic screen/sheath contains the electric field within the

cable as well as carrying fault current to earth [113]. Longitudinal water sealing is

achieved by applying swelling tape, which also absorbs humidity diffusing into the cable

[112, 114]. The inner jacket provides mechanical and corrosion protection and the armour

provides mechanical protection against impacts and abrasions [34]. The armour usually has

a zinc and bitumen coating to protect against corrosion. The outer cover is the final layer of

the cable and prevents the zinc and bitumen coating from scratches which damage their

anti-corrosion protection.

It is worth noting that there is no commercially available cable model which can represent

every individual layer of the cable and account for the stranded nature of the conductors.

In the absence of publically available data for a commercial HVDC cable model, the

geometric and material properties for the layers of the cable, which can be represented in

the cable model, have been estimated and are given in Table 7.1. Only a brief description

of the cable parameters is given here, the reader is referred to Appendix 7A for the full

derivation.

Layer Material Radial

Thickness (mm) Resistivity (Ω/m)

Relative Permittivity

Relative Permeability

Conductor Stranded Copper 24.9 2.2x10-8* 1 1

Conductor

screen

Semi-conductive

polymer

1 - - -

Insulation XLPE 18 - 2.5 [114] 1

Insulator screen Semi-conductive

polymer

1 - - -

Sheath Lead 3 [115] 2.2x10-7

[116]

1 1

Inner Jacket Polyethylene 5 [117] - 2.3 [118] 1

Armour Steel 5 [117] 1.8x10-7

[116]

1 10 [117]

Outer cover Polypropylene 4 [117] - 1.5 [118] 1

Sea-return Sea water/air - 1 - -

*Copper resistivity is typically given as 1.68*10-8Ω/m. It has been increased for the cable model in PSCAD due to the stranded nature of the cable which cannot be taken into account directly in PSCAD.

Table 7.1: Physical data for a 300kV 1GW submarine HVDC cable


173

The conductor parameters are based on a stranded copper conductor installed in a moderate

climate with close spaced laying [34]. The PSCAD default value for the semi-conducting

screen’s thickness is employed in this work, which is 1mm. There is no official

documentation regarding the insulation thickness of HVDC cables, however a

representative from a leading cable manufacture has stated that a 320kV HVDC cable has

an insulation thickness of about 18mm. The representative also stated that using the

electrical parameters from an AC cable of similar thickness would yield similar results.

This indicates that the relative permittivity of XLPE and DC-XLPE is similar. The relative

permittivity of XLPE is given as 2.5 [114]. The relative permittivity of polypropylene

yarn, which is used for the outer cover, is assumed to be very similar to that of

polypropylene, which is 1.5 [118].

The calculation of the sea-return impedance is complex. In order to calculate the sea-return

impedance accurately, accurate values of sea resistivity, sea-bed resistivity, sea depth,

cable burial depth and frequency are required. A number of these parameters also vary

with the tide and the cable route. PSCAD can only consider the air/sea interface for a

submarine cable and therefore only the sea resistivity and cable depth below the sea

surface are required. The resistivity of sea water varies in the range of 0.25-2Ω/m due to

the temperature and the salinity of the water [119], which makes it difficult to obtain an

accurate value. The sea resistivity and cable depth are assumed to be 1Ω/m and 50m

respectively. Further information on the calculation of the sea-return impedance is given

in Appendix 7A.

The positive and negative cables may be installed in separate trenches, tens of meters apart,

to prevent a ship’s anchor from damaging both cables [111, 120]. This is however

approximately 40% more expensive than installing both cables in a single trench, [111] and

laying both cables close together means that their magnetic fields effectively cancel out.

Unless the cable route has a lot of fishing activity it is therefore more likely that the cables

will be buried in a common trench. It has been assumed that the horizontal distance

between the two cables would therefore be approximately two cable diameters (0.25m).

Sensitivity analysis to assess the impact of each of the cable’s parameters on its

electromagnetic characteristics was conducted, and the results are shown in Appendix 7A.

This sensitivity analysis has shown that small variations in the cable’s parameters do not

have a significant effect on the cable’s transient voltage response.


174

7.2 Multi-conductor Analysis

The wave equation describes how the voltage and current vary along a transmission line

with time [121]. A submarine cable can be described as a multiphase system consisting of

three-phases (conductor, metallic sheath and armour), hence there are 6 conductors for two

submarine cables. The wave equations in the frequency domain for a transmission line are

given by equations(7.1) and (7.2) [117, 122]:

2

2' '

phase

phase phase phase

d VZ Y V

dx

(7.1)

2

2' '

phase

phase phase phase

d IY Z I

dx

(7.2)

phaseV and phaseI are n x 1 matrices for the voltage and current along the conductors within

the cable respectively, where n is equal to the number of conductors. 'phaseZ and 'phaseY

are n x n matrices for the series impedance per unit length and shunt admittance per unit

length respectively. These are calculated by the method of coaxial loops [123-125].

Equations (7.1) and (7.2) therefore each contain n coupled equations. These coupled

equations in the phase domain can be transformed to decoupled equations in the modal

domain. This allows each equation in the modal domain to be solved as a single-phase line.

The relationship between the phase domain and the modal domain for the voltages and

currents can be described by equations (7.3) and (7.4).

modphase v eV T V (7.3)

modphase i eI T I (7.4)

VT and iT are the voltage and current transformation matrices respectively. Inserting

equation (7.3) into equation (7.1) gives equation (7.5).

2

modmod2

ee

d VV

dx

(7.5)

where:

1

' 'v phase phase vT Z Y T (7.6)


175

In order to obtain the diagonal matrix, , the values of the voltage transformation matrix,

vT , which diagonalises the ' 'phase phaseZ Y product, must be found. The voltage

transformation matrix is obtained by finding the eigenvectors of ' 'phase phaseZ Y . The

current transformation matrix is obtained by finding the eigenvectors of the product

' 'phase phaseY Z . The decoupled current wave equation in the modal domain is shown by

equation (7.7).

2

modmod2

ee

d II

dx

(7.7)

The wave equation for a single mode can be analysed in a similar manner to the wave

equation for a single-phase line as shown by equation (7.8), where m , is the eigenvalue

for mode m.

2

mod , 2

mod , mod , mod ,2

e m

m e m e m e m

d VV V

dx (7.8)

mod ,e m m m mj (7.9)

The propagation constant, , given by equation (7.9), is a complex quantity; the real part is

called the ‘attenuation constant’, , measured in nepers per unit length, and the imaginary

part is called the ‘phase constant’, , measured in radians per unit length of line. The

propagation constant describes how the voltage or current waveform is attenuated and

delayed travelling from one end to the other end of the line. The modal series impedance

matrix and modal shunt admittance matrix are diagonal matrices and can be obtained from

equations (7.10) and (7.11).

mod' 'T

e i phase iZ T Z T (7.10)

mod' 'T

e v phase vY T Y T (7.11)

The characteristic impedance, Zc, of a single mode can be obtained by equation (7.12).

mod ,

mod ,

mod ,

'

'

e m

e m

e m

ZZc

Y (7.12)


176

Once the characteristic impedance and propagation constant for each mode have been

calculated, PSCAD can determine how the voltage and current waves will propagate

through the cable.

7.3 HVDC Cable Models

This section gives an overview of the most common types of HVDC cable models

commercially available.

Lumped parameter model - This model lumps the cable’s resistance, R, capacitance, C,

and inductance, L, together to typically form one or more PI-sections. In general lumped

parameter models are only considered appropriate when the wave propagation travel time

is smaller than the time-step. Based on a time-step of 50μs and the maximum velocity of

propagation in a typical XLPE cable, the travel time will only be less than the time-step if

the cable is shorter than about 10km. HVDC cables are normally greater than 50km in

length. However, for completeness a Coupled Equivalent PI-section Model (CEPIM) is

compared in this work.

Bergeron model - The Bergeron model is based on travelling wave theory and represents

the distributed nature of the cable’s LC parameters. The cable’s resistance is lumped

together and divided into three parts, 50% in the middle of the cable and 25% at each end.

This model is similar to the PI-section as it does not account for the frequency dependence

of the cable’s parameters and is therefore essentially a single frequency model.

Frequency-dependent models - Frequency dependent models represent the cable as a

distributed RLC model, which includes the frequency dependency of all parameters. This

type of model requires the cable’s geometry and material properties to be known. There are

two frequency dependent models available in PSCAD; the Frequency Dependent Mode

Model (FDMM) and the Frequency Dependent Phase Model (FDPM). The key difference

between the two models is that the mode model does not represent the frequency

dependent nature of the internal transformation matrix, vT , whereas the phase model does

through direct formulation in the phase domain.

Furthermore, the phase model has an additional feature which is referred to as DC

correction. This enables the model to produce the exact DC response rather than a best


177

approximation, which is used by the mode model. The FDPM is the most advanced and

accurate time domain line model available [126].

7.4 System Model

To assess the impact of the cable model on typical studies a high fidelity model of a MT

VSC-HVDC system has been developed. A MT HVDC model is used for this study rather

than a radial model because it allows a wider range of cases to be conducted and it is more

appropriate for DC protection studies, which require very accurate representation of the

DC voltage and current. The test model which is shown in Figure 7.2 is described in

Sections 8.1 and 8.3. Based on the work carried out in Chapter 8, the onshore MMCs

employ standard droop control.

Figure 7.2: MTDC test model

The four cable models to be compared are the CEPIM, Bergeron model, FDMM and the

FDPM. The physical properties of the cable, cable positions and sea-return resistivity are

given in Table 7.1. The sheath and armour in the submarine cable are bonded to ground at

both ends of the cable [120] through a small resistor; further information on cable bonding

is given in Appendix 7A. The last metallic layer (armour in a submarine cable), is

eliminated from the impedance matrix. This is often a valid assumption for a submarine

cable, where the armour is a semi-wet construction which allows water to penetrate [117].

The steady-state frequency for the Bergeron model is set to 5 Hz as recommend for DC

studies for this type of model [126] and the CEPIM is created using PSCAD’s in-built

function. The starting frequency for the frequency dependent models is set to 0.1Hz and

XT=15%

Yg/D

MMC2

Vs2(abc)

220kV 370kV

D/Yg

MMC1

Is1(abc)

PCC1XT=15%

370kV 410kV

Vs1(abc)

Idc1

Is2(abc)


frequency control

1000MW

Windfarm1


control

Rbrak

Vdc2

PCC2

Vn

SCR=3.5

Zn

XT=15%

Yg/D

MMC3

Vs3(abc)

220kV 370kV

D/Yg

MMC4

Is4(abc)

PCC4XT=15%

370kV 410kV

Vs4(abc)

Idc4

Is3(abc)


frequency control

1000MW

Windfarm2


control

Rbrak

Vdc3

125km DC cable

PCC3

Vn

SCR=3.5

Zn

130km DC cable

200km DC cableIdc2

Idc3

Standard droop control

Standard droop control


178

equal weighting is given to the entire frequency range. The DC correction function, which

is only available for the FDPM is enabled. All other settings are left at their default value.

7.5 Results

7.5.1 Accuracy

A series of tests were performed to assess the impact of the cable model on the simulation

results for common types of study ranging across a wide frequency range; the results of

which are presented in this section.

The active power generated by windfarm 1 increases from 500MW to 1GW at

approximately 2s and the windfarm power generated by windfarm 2 increases from

500MW to 1GW at 2.25s. At approximately 3s, the circuit breakers for windfarm 1 are

tripped. Figure 7.3 shows that the active power injected into the onshore AC network at

PCC1 is very similar for all the cable models. This plot also shows that greater accuracy

can be obtained for the FDMM by reducing the constant transformation matrix frequency

to 5Hz, as opposed to the default value of 2kHz.

A DC line-to-line fault is applied to the DC terminals of MMC1 at 2.5s. The DC voltage

and current response for the three cable models are shown in Figure 7.4 and Figure 7.5

respectively. The CEPIM shows virtually no propagation delay as expected, whilst the

propagation delay for the Bergeron model is approximately twice that of the frequency

dependent cable models due to the modal velocities for the cable being calculated at the

steady-state frequency. The attenuation for the two frequency domain models is different

due to the frequency dependent nature of the transformation matrix. MT protection

schemes are required to detect a DC fault, identify the faulty cable and issue the trip

command to the appropriate HVDC breakers within approximately 1-2ms, as described in

Chapter 3. MT protection strategies are therefore highly sensitive to the local DC voltage

and current measurements and hence very accurate cable models are required.

A three-phase line-to-ground fault is applied to PCC1 at 2s for 140ms. The active power

injected to the onshore network from MMC1 is shown in Figure 7.6. The responses

produced by the CEPIM, FDMM and the FDPM are very similar, whilst the Bergeron

model’s response is very different. This is because the Bergeron model is unable to


179

accurately reproduce the DC voltage response and is adversely interacting with the DC

braking resistors as shown in Figure 7.7.

Figure 7.3: Onshore AC power response to windfarm power variations

Figure 7.4: DC voltage response at MMC2 for a DC line-to-line fault at the terminals of MMC1

Figure 7.5: DC current response at MMC2 for a DC line-to-line fault at the terminals of MMC1

0

100

200

300

400

500

600

700

800

900

1000

1.80 2.00 2.20 2.40 2.60 2.80 3.00 3.20 3.40

Po

we

r (M

W)

Time (s)

P1-CEPIM

P1-Bergeron

P1-FDMM

P1-FDPM

P1-FDMM T=5Hz

0

100

200

300

400

500

600

700

2.490 2.494 2.498 2.502 2.506 2.510

Vo

ltag

e (

kV)

Time (s)

Vdc2-CEPIM

Vdc2-Bergeron

Vdc2-FDMM

Vdc2-FDPM

0

2

4

6

8

10

12

14

16

2.490 2.494 2.498 2.502 2.506 2.510

Cu

rre

nt

(kA

)

Time (s)

Idc2-CEPIM

Idc2-Bergeron

Idc2-FDMM

Idc2-FDPM

P*WF1=1GW

P*WF2=1GW


180

Figure 7.6: AC power response at PCC1 for a three-phase line-to-ground fault at PCC1.

Figure 7.7: DC voltage response at MMC1 for a three-phase line-to-ground fault at PCC1 (CEPIM

trace is behind FDMM and FDPM traces).

7.5.2 Simulation Speed

A three second simulation was performed for the four models using a 20µs time-step. The

simulations were conducted on a Microsoft Windows 7 operating system with a 2.5GHz

Intel core iq7-2860 processor and 8GB of RAM, running on PSCAD X4. The simulation

times for all three of the travelling wave models were approximately 260s, whilst the

simulation time for the CEPIM was approximately 375s. This is predominately because the

travelling wave models decouple the electric networks, which can result in reduced

simulation times.

7.6 Conclusion

The results presented in this chapter have shown that the choice of cable model can have a

significant impact on the overall model’s response for typical VSC-HVDC studies. The

results have also shown that the travelling wave cable model’s impact on the

computational simulation time is insignificant, particularly when the overall model is

-600

-400

-200

0

200

400

600

800

1000

1200

1.70 1.90 2.10 2.30 2.50

Po

we

r (M

W)

Time (s)

P1-CEPIM

P1-Bergeron

P1-FDMM

P1-FDPM

0

100

200

300

400

500

600

700

800

900

1.70 1.90 2.10 2.30 2.50

Vo

ltag

e (

kV)

Time (s)

Vdc2-CEPIM

Vdc2-Bergeron

Vdc2-FDMM

Vdc2-FDPM


181

relatively complex. It is therefore recommended that the FDPM should be the default

model of choice for typical VSC-HVDC studies.

In the case of simple VSC-HVDC models, the choice of cable model may have a more

significant impact on the computational simulation time. The FDMM may therefore be

more suitable in this instance, providing that a very accurate representation of the DC cable

dynamics is not required. The Bergeron model or the CEPIM can also be employed when

computational simulation time is an issue and where accurate representation of the DC

cable outside of the steady-state frequency of the cable, is not required.

Chapter 8 MTDC MMC Modelling

182

8 MTDC MMC Modelling

At the time of writing almost all operational windfarms employing VSC-HVDC

connections are point-to-point (radial). Numerous potential benefits have however been

identified for interconnecting multiple offshore windfarms using HVDC cables (co-

ordinated design). These benefits include a reduction in the volume of assets installed

offshore and improved operational flexibility and network security [1]. The control of a

MT DC system does however require additional levels of complexity in comparison to the

control of a radial system.

Numerous studies have been carried out to assess the performance of MTDC control

strategies [127-129]. These studies have however employed simplified MTDC system

models, which cannot accurately represent the MMC dynamics and that may have an

impact on the MTDC system’s response to transient events, such as the loss of a converter.

The simple models are also unable to simulate the MMC arm currents and SM capacitor

voltages which are critical to ensuring that the converter is operating within safe limits

during transient events.

In this chapter a four-terminal high fidelity MTDC model for the connection of two 1GW

Round 3 offshore windfarms is developed. This model is based on a potential scenario

outlined in ODIS and it is used to investigate the performance of selected MTDC control

strategies for different scenarios.

8.1 MTDC Test Topology

National Grid has developed co-ordinated designs for large offshore windfarms, where a

benefit can be identified. The primary areas of where the co-ordinated approach has been

proposed are the Crown Estate Round 3 zones of the Firth of Forth, Dogger Bank,

Hornsea, East Anglia and the Irish Sea. Figure 8.1 shows the offshore HVDC cable

connections for Dogger Bank and Hornsea for one of the potential scenarios outlined by

National Grid [130].


183

Figure 8.1: Accelerated growth 2030 transmission system scenario – potential connection diagram ,

modified from [9]

The MTDC system topology used in this work for the investigation of MTDC control

strategies is based upon a sub-section of this scenario. This topology represents a 1GW

radial VSC-HVDC link between Dogger Bank and the north east of England, and a 1GW

radial VSC-HVDC link between Hornsea and the east midlands, with a 1GW HVDC cable

connecting the two offshore converters as shown in Figure 8.2. The HVDC cable lengths

have been estimated from the information given in ODIS.

Figure 8.2: MTDC test topology

1 G W W in d fa rm -

D o g g e r B a n k

2 0 0 k m

V S C 2 V S C 1

N o rth E a s t

E n g la n d

1 G W W in d fa rm -

H o rn s e a

S h o re

V S C 3 V S C 4

1 3 0 k m

1 2 5 k m

E a s t M id la n d s

A C G r id


184

8.2 MTDC Control Methods

In a point-to-point VSC-HVDC link employed for the connection of an offshore windfarm,

the offshore converter controls the connected windfarm’s AC voltage magnitude and

frequency, and the onshore converter controls the DC link voltage, as discussed in Chapter

5. The converter controlling the DC link voltage is often referred to as the DC slack bus. In

a MTDC network, such as the one shown in Figure 8.2, the offshore converters can be

controlled in the same way as they are in a point-to-point link. The regulation of the DC

link voltage for a MTDC system is however more complex than in a radial system.

A review of MTDC control methods is given in [131, 132]. Generally speaking these

methods can be categorised as centralised DC slack bus, voltage margin control, droop

control or a combination of the aforementioned control methods. In this chapter these

control methods are discussed with reference to the MTDC topology shown in Figure 8.2.

8.2.1 Centralised DC Slack Bus

Employing a centralised DC slack bus, one of the onshore converters operates in DC

voltage control (DC slack bus) whilst the other onshore converter operates in constant

power control. The DC slack bus converter must therefore supply/absorb the deficit/surplus

of active power to ensure that the DC voltage is regulated. If however, the required active

power is outside of the DC slack bus converter’s capability then it will no longer be able to

control the DC voltage. The converter and its connected AC network must therefore be

sufficiently rated to compensate for the total power variations of the other converters [127,

132]. Furthermore, in the event of a fault which diminishes the converter’s power

capability, the system may become unstable. It is for these reasons that a centralised DC

slack bus is generally not considered suitable, especially for large MTDC systems.

8.2.2 Voltage Margin Control

Applying the method of voltage margin control to the MTDC topology, one of the onshore

converters operates as a DC slack bus whilst the other operates in what is referred to as

voltage margin control. The voltage-current characteristics for the two converters are

shown in Figure 8.3 and the implementation of the voltage margin controller used in this

work is shown in Figure 8.4. The converter operating in voltage margin control effectively

operates in constant power control providing that its local DC link voltage is within pre-set

limits (Vdc-low<Vdc<Vdc-high). If the DC link voltage exceeds the pre-set limits then the


185

converter operates in DC link voltage control mode. This means that if the converter

operating as the DC slack bus is unable to control the DC link voltage, the other onshore

converter will take control. Voltage margin control therefore improves the reliability of the

system in comparison to a centralised DC slack bus. There are however the following

limitations of employing voltage margin control [131, 132]:

Only one converter is responsible for regulating the DC voltage at a time.

The voltage margin must be carefully selected to avoid undesirable interaction

between the converters whilst minimising losses and maximising the systems VA

rating.

Transitions from one voltage level to another may occur abruptly leading to

additional system stress.

Figure 8.3: Standard Vdc-Idc characteristic; DC slack bus (Left) voltage margin control (Right)

Figure 8.4: Implementation of the voltage margin controller

8.2.3 Droop Control

Droop control can be employed to minimise some of the aforementioned limitations of

voltage margin control. In droop control more than one converter is able to participate in

regulating the DC voltage and therefore the burden of continuously balancing the system’s

power flow is not placed upon a single converter. A standard voltage-current droop

Vdc

Idc-maxIdc-min

Vdc

Idc-maxIdc-min

V

Vdc-High

Vdc-Low

Vdc*

Idc*Inv InvRec 0 0Rec

+-

P*

P

PI x(-1)

+-

Vdc-High*

Vdc

PI

+-

Vdc-Low*PI x(-1)

Idmax

Idmin

Id*

Vdc

d-axis current

controller


186

characteristic is shown in Figure 8.5. The gradient of the droop slope determines the

converter’s current response to a change in the DC voltage; the steeper the gradient the

smaller the response. The converter operates in current limit mode when the DC voltage

thresholds are reached.

Figure 8.5: Standard Vdc-Idc characteristic for voltage droop control

The implementation of the droop controller used in this work is shown in Figure 8.6.

Ideally the upper and lower voltage limits (Vdc-High and Vdc-Low) are very similar to the no-

load voltage, Vdc-NL, however this requires large variations in the current controller’s set-

point, Id*, for relatively small deviations in the DC link voltage. This is an issue because

the high bandwidth current controller will respond abruptly to the switching noise in the

DC voltage measurement. The droop gain therefore needs to be selected with care.

Figure 8.6: Implementation of voltage droop controller

The standard droop characteristic can be modified, so that the converter acts as a DC slack

bus within pre-set voltage limits and then as a droop controller outside those voltage limits

as shown in Figure 8.7. This type of droop controller is effectively a hybrid between a

voltage margin controller and a standard droop controller. This type of characteristic is

sometimes referred to as a voltage droop with dead band [131].

Vdc

Idc-maxIdc-min

Vdc-NL

InvRec

Vdc-Low

Vdc-High

0

+-

Kdroop

Vdc-NL

Vdc

Id* d-axis current

controller

Idmax

Idmin


187

Figure 8.7: Vdc-Idc characteristic for voltage droop control with dead band

8.2.4 Control Methods Investigated

The onshore converters could operate in various control modes, including DC voltage

control, constant power control, voltage margin control, standard DC droop control and

voltage droop control with dead band. The only limitation is that at least one converter

must regulate the DC voltage. A plethora of possible control options therefore exist. The

centralised DC slack bus control, voltage margin control and droop control methods are

investigated in this chapter with the control permutations shown in Table 8.1.

Control Method MMC1 control mode MMC4 control mode Comments

Centralised DC slack bus

DC voltage & AC voltage magnitude

Active power & reactive power

P*=500MW

Voltage margin control

DC voltage & AC voltage magnitude

Voltage margin & reactive power

Vdc-High=620kV, Vdc-

Low=580kV

Droop control Standard droop & AC

voltage magnitude Standard droop &

reactive power Droop gain =- 0.1

Table 8.1: Control methods investigated

8.3 MTDC System Model

The simplified system diagram for the MTDC model is shown in Figure 8.8. The structure,

parameters and controls for the four MMCs, onshore AC networks, offshore AC networks

and the DC cables are described in Chapter 4 and Chapter 7.

Vdc

Idc-maxIdc-min InvRec

Vdc-Low

Vdc-High

0


188

Figure 8.8: MTDC test model

8.3.1 Windfarm Power Variations

At 1s both windfarms are each ordered to inject 500MW of active power. The power order

for windfarm 2 is increased to 1GW at 2s and the power order for windfarm 1 is increased

to 1GW at 3s.

Figure 8.9 shows the system’s response to the wind power variations when employing a

centralised DC bus. MMC4 is operated in constant power control, with a power order of

500MW, and MMC1 is operated as the DC slack bus. At approximately 2s, the DC slack

bus exports the increase in windfarm power to the onshore AC grid and therefore the DC

voltage is maintained to close to its nominal value. At 3s, however, the DC slack bus is

unable to export all of the additional increase in windfarm power due to the converter

reaching its valve current limit. This results in a rise in the DC link voltage to

approximately 1.1p.u. (660kV), at which point the DC braking resistors are activated to

dissipate the excess wind energy. In order for the DC slack bus to regain control of the DC

voltage, the power order for MMC4 must be increased or the windfarm power must be

curtailed.

The system’s response for operating MMC4 in voltage margin control and MMC1 as a DC

slack bus is shown in Figure 8.10. The system’s response to the increase in wind power at

2s is effectively the same as the system employing a centralised slack bus. This is because

the DC slack bus is able to export the increase in wind power from windfarm 2 and

therefore the upper voltage margin control limit is not reached. The upper voltage margin

limit is however reached at approximately 3.2s due to the increase in wind power from

XT=15%

Yg/D

MMC2

Vs2(abc)

220kV 370kV

D/Yg

MMC1

Is1(abc)

PCC1XT=15%

370kV 410kV

Vs1(abc)

Idc1

Is2(abc)


frequency control

1000MW

Windfarm1


control

Rbrak

Vdc2

PCC2

Vn

SCR=3.5

Zn

XT=15%

Yg/D

MMC3

Vs3(abc)

220kV 370kV

D/Yg

MMC4

Is4(abc)

PCC4XT=15%

370kV 410kV

Vs4(abc)

Idc4

Is3(abc)


frequency control

1000MW

Windfarm2


control

Rbrak

Vdc3

125km DC cable

PCC3

Vn

SCR=3.5

Zn

130km DC cable

200km DC cableIdc2

Idc3


189

windfarm 1 and the inability of the DC slack bus to export it. This causes MMC4 to

operate in DC voltage control as opposed to constant power control. The DC voltage

control reference is equal to the upper voltage margin limit (620kV). This simulation result

shows that the use of voltage margin control enables the DC link voltage to be controlled

without the need for communications or the curtailment of wind power.

Figure 8.11 shows the system’s response to wind power variations when MMC1 and

MMC4 are operating in standard droop control with the same droop characteristic. This

figure shows that the onshore converters share the variations in wind power and therefore

the burden of continuously balancing the system’s power flow is placed on more than one

converter. The droop controller is a proportional only controller and therefore some steady-

state error is introduced in the DC voltage. This is a disadvantage in comparison to the

centralised DC slack bus control strategy and the voltage margin control strategy (when

operating within the pre-set voltage limits). The steady-state voltage error can however be

minimised via modifying the droop characteristic via a dispatch centre.

Figure 8.9: MTDC system response to windpower variations when employing a centralised DC slack

bus ; x axis – time(s)

P*WF2=1GW P*WF1=1GW


190

Figure 8.10: MTDC system response to windpower variations when employing voltage margin control


Figure 8.11: MTDC system response to windpower variations when employing standard droop control


8.3.2 Three-phase Line-to-Ground Fault at PCC1

Windfarm 1 and windfarm 2 are ordered to inject 500MW and 1GW respectively. A three-

phase symmetrical fault is applied at PCC1 (Figure 8.8) for 140ms starting at 2s. MMC1 is

therefore unable to export any significant quantity of active power during the fault.

P*WF2=1GW

P*WF1=1GW

P*WF2=1GW P*WF1=1GW


191

The system’s responses to this fault for centralised DC bus control, voltage margin control

and droop control are shown in Figure 8.12, Figure 8.13 and Figure 8.14 respectively.

These figures show that the three control strategies are able to ride-through the fault in

compliance with the GB grid code and without exceeding the maximum instantaneous arm

current limit of 3kA or the maximum SM overvoltage limit of 27kV. The system’s

response to the fault does however differ depending on the control strategy employed.

During the fault for the system employing the DC centralised bus, there is a surplus of

approximately 1GW which must be dissipated by the DC braking resistor to prevent

uncontrollable DC voltage rise. When employing voltage margin control or droop control,

MMC4 increases its exported power in response to the increase in DC link voltage. The

surplus of active power is therefore reduced to approximately 500MW, which again is

dissipated by the DC braking resistor. If the total windfarm power was within the power

capability of MMC4 (≈1GW), then the DC voltage could be controlled without the use of

the DC braking resistor when employing either voltage margin control or droop control.

Comparing Figure 8.13 and Figure 8.14, it is clear that the power response upon fault

clearance is more oscillatory for voltage margin control than for droop control.


192

Figure 8.12: MTDC system response to a three-phase to ground fault when employing a centralised

DC slack bus ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A

for MMC1; x axis – time(s)


193

Figure 8.13: MTDC system response to a three-phase to ground fault when employing voltage margin

control ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for

MMC1; x axis – time(s)


194

Figure 8.14: MTDC system response to a three-phase to ground fault when employing standard droop

control ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for


The phase A upper arm current waveforms from Figure 8.12-Figure 8.14 are plotted on the

same graph in Figure 8.15. This figure shows the significant impact that the MTDC control

methods can have on the converter’s arm currents. Table 8.2 shows that the maximum

current value experienced by the converter arm when employing DC slack bus control is

75% higher than for droop control. This result highlights the importance of modelling

MMC converters in detail when comparing MT control methods.


195

Figure 8.15: Impact of MTDC control methods on the upper arm current for phase A of MMC1 for a

three-phase to ground fault

Indices Droop Margin Slack Iua max (kA) 1.41 2.14 2.47

Ratio - 1.52 1.75 Iua rms (kA) 0.71 0.99 1.04

Ratio - 1.41 1.47

Table 8.2: Maximum and rms values for Figure 8.15.

8.3.3 Converter Disconnection

In this section, the control strategies’ responses to the disconnection of an offshore

converter and an onshore converter are investigated. The power order for windfarm 1 and

windfarm 2 are 1GW and 500MW respectively. At 2s MMC3 is blocked and at 3s MMC1

is blocked. Their AC circuit breakers are tripped three cycles after their respective blocking

commands. The system’s response for a centralised DC bus, voltage margin control and

droop control are shown in Figure 8.16, Figure 8.17 and Figure 8.18 respectively.

-2

-1.5

-1

-0.5

0

0.5

1

1.5

2

2.5

2.24 2.26 2.28 2.30 2.32 2.34 2.36 2.38 2.40 2.42 2.44Cu

rre

nt

(kA

)

Time (s)

Droop

Margin

Slack


196


disconnected at approximately 3s when employing a centralised DC slack bus ; arm currents are for



197


disconnected at approximately 3s when employing voltage margin control ; arm currents are for



198


disconnected at approximately 3s when employing standard droop control ; arm currents are for


The centralised DC slack bus is able to satisfactorily maintain control of the DC voltage

during the disconnection of the offshore converter (MMC3); however, the DC voltage

becomes uncontrollable when the onshore converter (MMC1), which is operating as the

DC slack bus, is disconnected. The voltage margin control method and the droop control

method maintain satisfactory control of the DC voltage for the disconnection of MMC3

and MMC1. The active power response and DC voltage response for the disconnection of


199

MMC1 and MMC3 is more oscillatory for the voltage margin controller than for the droop

line controller.

8.4 Conclusion

In this chapter a MTDC topology based on a segment of a potential connection diagram for

the UK’s Round 3 windfarms, as outlined in National Grid’s 10 year statement, has been

developed. The performance of three MTDC control methods, namely, centralised DC

slack bus, voltage margin control and droop control, were investigated using a detailed

MTDC system model. The controllers’ response to wind power variations, onshore AC

faults and the disconnection of an offshore and an onshore converter were simulated.

The simulation results show that the use of a DC centralised bus is not suitable for MTDC

systems as the DC voltage becomes uncontrollable if the imbalance in active power is

outside of the power capability of the DC slack bus, or if the slack bus converter is

disconnected from the system. The voltage margin control method and the droop control

method were shown to be able to respond to variations in wind power, to ride-through

close-up three-phase AC faults in compliance with the GB grid code, and to maintain grid

stability after the disconnection of a converter without exceeding the converter ratings. The

droop controller shares power flow more evenly than the voltage margin controller and its

response to transient events was shown to be less oscillatory with lower arm currents. The

simulation results in this chapter therefore show that the droop controller offers the best

overall performance.

A key contribution of this chapter was to show that the MT control systems can have a

significant impact on the internal MMC quantities, which highlights the importance of high

fidelity MMC models when comparing MT control methods.

Chapter 9 Conclusion and Future Work

200

9 Conclusion and Future Work

9.1 Conclusion

This thesis identified factors which may have a negative impact on the reliability of VSC-

HVDC systems and which therefore required further research. These factors broadly fit

into three categories; availability analysis, HVDC protection and VSC-HVDC system

modelling. To address these factors, the following objectives were identified:

1. Conduct an availability study for a radial VSC-HVDC system and identify the key

components which affect the system’s overall availability.

2. Identify the key issues in the development of a HVDC breaker and present potential

solutions.

3. Develop a high fidelity EMT model of a radial VSC-HVDC system employed for

the connection of a typical Round 3 windfarm and compare the leading MMC


4. Develop a high fidelity EMT model of a MT VSC-HVDC system employed for the

connection of a typical Round 3 windfarm and compare the leading cable


All objectives have been met in this thesis, and in some areas further work has been

undertaken. The following sub-sections provide further details of the conclusions made in

the three main areas.


The expected availability of the VSC-HVDC systems which connect the Round 3 offshore

windfarms is a key factor in determining if the Round 3 windfarms are technically and

economically viable. However, at the time of investigation there were no publications

which estimated the expected availability of these systems.

In this thesis an availability model of a radial VSC-HVDC system for the connection of a

typical Round 3 windfarm was developed and analysed using reliability indices derived

from academic papers and industrial documentation. The analysis of this model showed


201

that the energy availability of the system due to forced outages was approximately 96.5%.

It also revealed that the DC submarine cable has the greatest impact on the availability of

the transmission scheme, which highlights the importance of protecting the DC cables.

An availability model for a MTDC network was also developed and analysed for different

levels of additional capacity in the transmission paths back to shore. This analysis showed

that the availability of the MTDC network is highly dependent upon the rating of the

network’s paths back to shore and that grids with additional capacity had a higher

availability than equivalent radial systems. Furthermore, a cost-benefit analysis was

conducted that showed that the HVDC grids with additional capacity could provide a more

cost-effective solution for the connection of offshore windfarms due to the improved

energy availability figures.

This work was published at an international conference and has contributed to Cigre

Working Group B4-60 “Designing HVDC Grids for Optimal Reliability and Availability

Performance”. The reliability indices for the VSC-HVDC components derived in this

thesis have also been published in: G. Migliavacca “Advanced Technologies for Future

Transmission Grids”, Springer, 2012.

9.1.2 HVDC Protection

In order for a large HVDC grid to be technically and commercially viable, the ability to

isolate parts of the grid due to a fault, or to perform maintenance without de-energising the

entire grid, must be achieved. This requires HVDC circuit breakers; however at the time of

investigation these were not commercially available.

In this thesis the requirements for a HVDC circuit breaker have been identified and

potential breaker topologies, including one developed as part of this thesis, have been

described and compared. The comparative analysis concluded that arc-less hybrid circuit

breakers with an auxiliary circuit breaker are the most suitable type of HVDC circuit

breaker for the protection of a HVDC grid. This is predominantly due to their ability to

achieve the best balance between operation speed and on-state losses. This type of circuit

breaker is being developed commercially and is expected to be available for order in the

next one to three years, with delivery in the next five years.

This thesis also outlined the key requirements of a DC cable protection system for a

HVDC grid and reviewed potential protection strategies to identify and locate a faulty


202

cable. The review concluded that a protection strategy will most likely be developed based

on a combination of traditional techniques used in conjunction with modern techniques for

optimum detection and selection.

This work resulted in a UK patent application being filed for a hybrid HVDC breaker and

has enabled contributions to be made to Cigre Working Group B4-57 ‘Guide for the

Development of Models for HVDC Converters in a HVDC Grid’. This work has also led to

further work being funded (two PhD students) by National Grid, “DC Circuit Breaker

Technologies” (2012-2016).

9.1.3 VSC-HVDC System Modelling

Simulation models are a vital tool in the research and development of VSC-HVDC

systems. Highly accurate models are required in order to give a high degree of confidence

in the simulation results and to therefore ensure that the system operates in the expected

way.

The use of MMC converters in VSC-HVDC systems has presented a number of modelling

challenges. Applying traditional modelling techniques to MMC VSC-HVDC systems is

computationally intensive and virtually unmanageable in many cases, which has led to the

development of new modelling techniques. The published literature validating these

techniques are, however, very limited in some areas, and non-existent in others.

In this thesis, the three leading detailed MMC modelling techniques, the TDM, the DEM

and the AM, were compared in terms of their accuracy and simulation speed. An MMC

VSC-HVDC test simulation model was developed in PSCAD for this study. The study

found that both the AM and DEM modelling techniques offer a good level of accuracy but

that the DEM is generally more accurate than the AM. The AM and DEM models were

also shown to simulate significantly faster than the TDM, and the DEM was found to be

more computationally efficient than the AM. Furthermore, the AM model was found to

have limited performance for certain conditions when the converter is blocked and it was

also shown that by modifying the original AM the simulation run time could be improved.

The findings of this study were used to propose a set of modelling recommendations which

offer technical guidance on the state-of-the-art of detailed MMC modelling.

The EMT simulation model for the comparison of MMC modelling techniques was

developed further using the DEM modelling technique to produce a detailed EMT model


203

for a radial VSC-HVDC link for the connection of a typical Round 3 windfarm. Another

radial model was also developed for the interconnection of two active networks. The

simulation results produced by these models were verified against the theory outlined in

the thesis. These models thus provide a high fidelity version of a component level MMC

model with detailed parameters and control and can therefore act as a benchmark for lower

fidelity models. As an example, the detailed MMC-HVDC model developed in this thesis

was used for the verification of an averaged value VSC-HVDC model, which enabled this

lower fidelity model to be used for a comprehensive investigation into the limitations

imposed on active power controllers.

MMC VSC-HVDC systems are set to become a key component of the UK’s power system

and their ability to ride-through AC system faults is therefore of great importance, however

publications in this area were found to be very limited. The models developed in this thesis

were used to investigate the links’ ability to meet the GB grid code requirements for

disturbances in the AC grid. The results show that for the tests conducted the models were

able to meet AC fault ride-through requirements and reactive power requirements, as well

as to comply with the IEEE 519 THD voltage harmonic limits. Furthermore, the results

showed that the use of a variable limit DC link voltage controller, proposed as part of this

thesis, can improve the system’s fault recovery response. The differences between the

control and protection of the interconnector, in comparison to the link employed for the

connection of a windfarm, were also highlighted.

The potential development of HVDC grids has led to the need to produce highly accurate

EMT grid models which are valid for a range of studies. The issue of accuracy vs.

computational efficiency is of greater concern for grids than radial systems, due to the

increased size of the model. In addition to the MMC models, cable models are the other

main DC component which may have a significant impact on the overall model’s

simulation results and simulation time. The fidelity of cable models is of particular

importance for HVDC grids due to the need to locate the faulty section of the grid within

approximately 1-2ms, which requires accurate representation of the DC quantities.

Publications regarding the impact of different cable models in terms of their accuracy and

speed for typical VSC-HVDC studies are however very limited.

In this thesis a four-terminal EMT VSC-HVDC model was developed based on a

subsection of a potential scenario outlined in National Grid’s 10 year statement. This


204

model was used to compare a coupled equivalent PI model, Bergeron model, frequency

dependent mode model and a frequency dependent phase model in terms of their accuracy

and simulation speed for a wide range of studies. The results showed that the choice of

cable model can have a significant impact on the overall model’s response for typical

VSC-HVDC studies and that the traveling wave cable model’s impact on the

computational simulation time is insignificant, particularly when the overall model is

relatively complex. The findings of this study were used to propose a set of modelling

recommendations which offer technical guidance on HVDC cable modelling.

Numerous studies have been carried out to assess the performance of MTDC control

strategies. These studies have however employed simplified MTDC system models, which

cannot accurately represent the MMC dynamics and which may have an impact on the

MTDC system’s response to transient events, such as the loss of a converter. The

simplified models are also unable to simulate the MMC arm currents and SM capacitor

voltages which are critical in ensuring that the converter is operating within safe limits

during transient events. The performance of three MTDC control methods, namely,

centralised DC slack bus, voltage margin control and droop control, were investigated

using the developed detailed MTDC system model for a range of studies. The key

contribution of this work was to show that the MT control systems can have a significant

impact on the internal MMC quantities, which highlights the importance of high fidelity

MMC models when comparing MT control methods.

This work resulted in two journal papers and the publication of two international

conference papers and has enabled contributions to be made to Cigre Working Group B4-

57 “Guide for the Development of Models for HVDC Converters in a HVDC Grid”.

9.2 Future Work

Recommendations for future work in the three main areas investigated in this thesis are

presented in the following subsections. This work could potentially improve the reliability

of VSC-HVDC systems.


Availability analysis, independent of methodology, can only ever be as good as the input

data. Unfortunately there are no true failure statistics for VSC-HVDC components

available in the public domain and therefore many of the reliability indices used for this


205

thesis were estimated based on data from LCC-HVDC schemes. However, the author

understands that the VSC-HVDC owners are now beginning to report failure statistics to

the Cigre World HVDC reliability survey. It would therefore be very useful to repeat these

studies using this data once it is available in the public domain.

Variations in wind energy were not taken into consideration for the availability analysis

contained in this thesis. The amount and location of the input energy for a HVDC grid is a

key factor in determining the actual amount of energy lost due to a system failure.

Incorporating the variations in wind farm energy into the availability analysis would be a

useful contribution to the field.

9.2.2 HVDC Breakers

In this thesis a review of HVDC circuit breakers was carried out and a patent application

for an arc-less hybrid breaker with auxiliary switch was filed. The review concluded that

arc-less hybrid circuit breakers with an auxiliary circuit breaker are currently the most

suitable type of HVDC circuit breaker for the protection of a HVDC grid and that this type

of breaker is likely to be commercially available for order in the next one to three years.

The key component which determines the breaking time for this type of breaker is the

opening speed of the fast mechanical switch. However, the performance of mechanical

switches received little attention in this thesis due to the lack of publications in this area.

Further research into the state-of-the-art of mechanical switches and their limitations is

therefore required.

One of the key parameters which determines how fast the circuit breaker is required to

open is the fault current rate of rise. Increasing the values of DC reactance and installing

other fault current limiting devices, such as superconducting fault current limiters, can

reduce the fault current rate of rise. However, the potential implications that the DC

reactance value and fault current limiting devices can have on system stability and breaker

footprint are not well documented and therefore further research is required.

This thesis reviewed potential protection strategies for the protection of a HVDC grid. It

concluded that although some good preliminary research has been carried out substantially

more is required before a HVDC protection strategy could demonstrate all of the necessary

requirements.


206

9.2.3 MMC Modelling

The focus of this thesis has been on the MMC-HVDC system and therefore high fidelity

models of the converters and the DC system have been developed. However for a more

complete model, the simplified models for the AC systems could be replaced with more

detailed models. Further work to incorporate more detailed models of the windfarm, AC

system and transformer would be a useful contribution. Incorporating such models is likely

to result in impractical simulation durations and therefore the use of variable rate and

hybrid simulation packages could be investigated.

Results presented in this thesis showed that the MT control methods can have a significant

influence on the internal MMC quantities and thus showed the importance of detailed

MMC models, even when comparing the performance of slower outer loop controllers.

However, producing high fidelity MMC models for every converter in a large HVDC grid

would result in lengthy simulation durations. Further work could be conducted to

investigate the necessary level of converter fidelity for each converter in the grid,

depending upon the converter location and the type of study. This work could lead to a set

of MTDC modelling recommendations being produced.

Chapter 10 References

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Appendices

215

A. APPENDICES

Appendix 1A

216

APPENDIX 1A – HVDC TRANSMISSION SYSTEMS

1 HVAC vs. HVDC for Offshore Wind

Wind turbines typically generate power at a voltage of up to 1kV AC [133]. A transformer

located either in the nacelle, or at the bottom of the tower, steps the voltage up to either

11kV or 33kV [133]. The power from the wind turbines is transmitted to an offshore

substation which increases the voltage for transmission to shore. In a HVAC transmission

system a typical transmission voltage to shore is 132kV, which can be connected directly

to the electricity grid or stepped-up at an onshore substation if it is to be connected at

400kV. Alternatively the AC voltage can be converted to DC by a HVDC converter on the

offshore platform and then converted back to AC by a HVDC converter located onshore.

Figure A.1 shows a typical HVDC and HVAC connection.

Figure A.1: Overview of a HVDC connection and a HVAC connection

A HVDC transmission system typically has much higher investment costs in comparison to

a HVAC transmission system, due to the converters. However there are a number of

scenarios where HVDC is chosen for technical and/or financial reasons. These include,

connecting asynchronous grids, bulk power transmission through a long distance

transmission line, bulk power transmission via a submarine cable over a certain length and

for other technical advantages such as improved AC system stability.

Offshore windfarms are connected to the AC grid using a submarine cable, not a

transmission line. The capacitance of a cable is much greater than that of an equivalent

line, due to the proximity of the conductor to the grounded sheath and the insulating

medium. In an AC system the cable’s capacitance must be charged and discharged every

Wind

Farm 1

Wind

Farm 2

AC

DC

Rectifier R1 Inverter I1

AC

AC

Shore

AC

Appendix 1A

217

cycle, which constitutes a capacitive current flowing through the cable. This capacitive

current consumes a proportion of the cable’s overall current carrying capability and

therefore reduces the cable’s useful power transfer capability. However, in a HVDC

system once the cable’s capacitance is charged, almost the entire capacity is available for

active power transmission. Thus VSC-HVDC is typically employed for windfarms located

more than 50-100km from shore [5].

2 HVDC Converter Technology

A HVDC converter is capable of rectifying AC to DC and inverting DC to AC. The

converter must instantaneously match the AC and DC side voltages for stable operation

[134]. This is achieved by adding some impedance to the switching circuit to absorb the

instantaneous mismatch in AC and DC voltage levels. If this impedance is located

exclusively on the AC side, the instantaneous DC voltage is transferred to the AC side and

therefore the DC side acts as a voltage source. This type of converter is referred to as a

Voltage Source Converter (VSC). If a large smoothing reactor is located exclusively on the

DC side, the instantaneous AC voltage is transferred to the DC side, which results in

constant pulses of DC current and therefore the DC side acts as a current source. This type

of converter is referred to as a Current Source Converter (CSC).

CSC-HVDC is based on thyristor technology. Thyristors can be switched-on by issuing a

control signal, but can only be switched-off once the current flowing through the thyristors

ceases. It is for this reason CSC-HVDC requires a strong AC voltage source to commutate

the current between the valves (string of thyristors) in the converter. Therefore the CSC-

HVDC converter is also a Line Commuted Converter (LCC) and is sometimes referred to

as LCC-HVDC. VSC-HVDC can self-commutate current between the converter valves

because the valves consist of IGBTs, which have turn-off capability. Therefore the VSC-

HVDC converter is also classified as a Self-commutated Converter (SCC) and maybe

referred to as SCC-HVDC although this is not commonly used.

2.1 CSC-HVDC

There are several different CSC-HVDC transmission scheme configurations. One of the

most common schemes is the monopole HVDC scheme with metallic return as shown in

Figure A.2.

Appendix 1A

218

Figure A.2: CSC-HVDC monopole scheme with metallic return

The heart of the scheme is the six-pulse bridge, or Graetz bridge as it is sometimes known.

The six-pulse bridge consists of six valves. Each valve contains a number of series-

connected thyristors, as shown in Figure A.3. The number of thyristors in each valve is

dependent upon the voltage the valve is required to block.

Figure A.3: Six-pulse converter

AC Network 1 AC Network 2

6 - Pulse Bridge

DC Smoothing Reactor

Transmission Line

Metallic Return

3 - Winding Star / Star , Star / Delta

Transformer

V dcr V dci

I dc

I dc

V dc

I dc

I dc

L d

V a V b

V c

T 1 T 3 T 5

T 4 T 6 T 2

I 1 I 3 I 5

I 4 I 6 I 2

Anode

Cathode

V

Appendix 1A

219

A thyristor is turned-on by issuing a control signal to energise the thyristor’s gate terminal

when the thyristor is forward biased. The thyristor is turned-off when the external circuit

forces the current flowing in the thyristor through zero. The firing angle, also referred to as

alpha, is the delay measured in electrical degrees from when the thyristor is forward biased

until the gate terminal is energised. A thyristor is essentially a diode if the firing angle is

zero degrees.

Figure A.4: PSCAD simulation of CSC converter switching waveforms for a firing angle of 0° -

indicative waveforms shown, each valve conduction pulse is 120°.

The waveforms shown in Figure A.4 are for a six-pulse converter with a firing angle of 0°.

The anode voltage, Vdc-a, is the voltage transferred from the AC side, when valves T1, T3

and T5 conduct. Comparing Vdc-a, with the phase voltages in the second plot, it can be seen

that Vc is transferred to Vdc-a until Va exceeds Vc and then T1 conducts resulting in Va

being transferred to Vdc-a. The cathode voltage, Vdc-c, is the voltage transferred from the

AC side when valves T2, T4 and T6 conduct. In this case when the phase voltage is more

negative than Vdc-c, the valve connected to that phase will conduct. The voltage Vdc, is the

potential difference between Vdc-a and Vdc-c. Therefore Vdc has a mean voltage of twice Vdc-

a, with half the amplitude ripple, at six times the supply frequency. The two bottom plots in

Vdc-a (Blue),Vdc -c(Green) and Vdc (Red) against time

Va(Blue),Vb(Green) and Vc(Red) against time

Current

I1(Blue),I3(Green) and I5(Red) against time

I2(Blue),I4 (Green) and I6(Red) against time

Current

Time

Voltage

T1 T3 T5

T2 T4 T6

T1&T6 T1&T2 T3&T2 T3&T4 T5&T4 T5&T6

T1 T3 T5

T2 T4 T6T6

T1

Voltage

Appendix 1A

220

Figure A.4 show that when a valve conducts, a constant pulse of current flows due to the

large DC smoothing reactor. Each valve conducts for 120° per cycle.

The effect of increasing the firing angle is shown in Figure A.5. After a particular phase

voltage exceeds the anode voltage there is a delay, in this case 25° or 1.4ms for a 50Hz

system, before the valve is fired. This delay causes the DC voltage to decrease and the

fundamental phase current to lag the fundamental phase voltage, which results in the

converter absorbing reactive power.

Figure A.5: PSCAD simulation of CSC converter switching waveforms for a firing angle of 25° -

indicative waveforms shown, each valve conduction pulse is 120°.

The average DC voltage for the converter is calculated from equation (A.1).

3 2

( )LLdc

VV cos

(A.1)

Va(Blue),Vb(Green) and Vc(Red) against time

Time

VoltageT1 T3 T5

T2 T4 T6

T1&T6 T1&T2 T3&T2 T3&T4 T5&T4 T5&T6

T1 T3 T5 T1

T2 T4 T6T6

Voltage

α

Current

Current



I2(Blue),I4 (Green) and I6(Red) against time

Appendix 1A

221

where:

LLV - rms valve line-to-line voltage

α – firing angle

Increasing the firing angle decreases the DC voltage. A firing angle between 0° and 90°

results in a positive DC voltage and the converter operating as a rectifier. Increasing the

firing angle above 90° results in a negative DC voltage and the converter operating as an

inverter. Current can only flow in one direction in a CSC-HVDC scheme. At the rectifier,

power is being transferred from the AC side to the DC side (P=Vdcr.Idc) and at the inverter

power is transferred from the DC side to the AC side (P=-Vdci.Idc). Therefore power

reversal is achieved by changing the voltage polarity at each converter. XLPE cable is not

suitable for polarity reversal, due to space charge formation, and therefore mass-

impregnated cable is used. For more information on space charge formation see [135]

The bottom two plots in Figure A.4 and Figure A.5 show that the line current appears to be

able to commutate between valves instantaneously. This is because there is no reactance on

the AC side in this simulation, as shown in Figure A.3, however in reality there will be

some reactance on the AC side not least to limit the valve current during a fault. The most

common and predominate source of AC side reactance is leakage reactance from the

converter transformer. The leakage reactance reduces the rate of change for the current

commutating from one valve to the next, which in the absence of AC side reactance is

infinite. The time it takes for the current to commutate from one valve to the next is known

as the commutation overlap, µ, and is usually defined in degrees. The commutation overlap

reduces the DC voltage, as shown in Figure A.6 and described by the modified mean

voltage equation (A.2).

33 2

( ) c dcLLdc

X IVV cos

(A.2)

where:

cX - commutation reactance

Appendix 1A

222

Figure A.6: PSCAD simulation of switching waveforms for CSC converter with AC side reactance and

firing angle of 0° - indicative waveforms shown, each valve conduction pulse is 120°.

The relationship between the firing angle and commutation overlap on the amount of

reactive power the converter absorbs may be described by the Uhlmann approximation

given in [30, 134] and shown in equation (A.3).

cos 0.5 cos( ) cos( )P

S (A.3)

This approximation shows that increasing the firing angle, and/or increasing the

commutation overlap, results in the converter absorbing more reactive power.

A converter operating as an inverter has a large firing angle (>90°) and it is more common

to refer to the extinction angle or gamma, γ, which is mathematically expressed as

180 . Therefore the Uhlmann approximation can be re-written for an inverter as in

equation (A.4).

cos 0.5 cos( ) cos( )P

S (A.4)

The HVDC scheme controls the active power by essentially controlling the voltage drop

across the transmission line/cable. The firing angle affects the voltage drop across the

transmission cable and the amount of reactive power the converter absorbs. Therefore, the

converter cannot control active and reactive power independently. The reactive power the

converter typically absorbs is 60% of the active power [134]. Shunt capacitance, along

Voltage

Time

Current

µ



Appendix 1A

223

with AC harmonic filters, are normally required to supply the converter’s reactive power

requirements.

A CSC-HVDC converter, as shown in Figure A.2, contains two six-pulse bridges

connected in series on the DC side. The reason for doing this is to reduce the harmonics

which are generated by the converter. As shown in the previous section the six-pulse

bridge conducts rectangular pulses of current (no leakage reactance) which means the

phase current is very non-sinusoidal and therefore has a high harmonic content. In order to

reduce the harmonic content, two six-pulse bridges are typically connected in series on the

DC side, with one bridge connected to the AC source using a star/star transformer and the

other using a star/delta transformer. The effect of the star/delta transformer is that one six-

pulse bridge conducts current pulses which are shifted by 30° from the other six-pulse

bridge, resulting in phase currents which are more sinusoidal. This is shown in Figure A.7.

Figure A.7: PSCAD simulation of phase current for six-pulse converter (left) and twelve-pulse

converter (right)

Figure A.7 shows that a twelve-pulse converter produces a more sinusoidal phase current

in comparison to a six-pulse converter and therefore reduces AC side harmonics. A twelve-

pulse converter also reduces the DC side harmonics because the ripple voltage is twelve

times the fundamental frequency, in comparison to six times the fundamental frequency for

a six-pulse converter. Although a twelve-pulse converter improves harmonic content in

comparison to a six-pulse converter, it does not reduce the AC and DC side harmonic

content to within acceptable levels. Therefore harmonic filters are required. The AC side

harmonic filters are tuned at the 11th

and 13th

harmonic with an extra high-pass branch

added and typically tuned at the 24th

harmonic [134]. The AC side harmonic filters are

also designed to provide reactive power compensation for the converter. The DC side

generally has a high-pass filter tuned at the 12th

harmonic [134].

The AC harmonic filters, shunt capacitor bank and the associated AC switchyard account

for a large proportion (40-60%) of the overall space required for a CSC-HVDC scheme

Appendix 1A

224

[111]. The footprint for a typical 1000MW CSC station located onshore is 200m x 175m x

22m with an indicative cost of about £100m [111]28

.

Thus the disadvantages of a CSC-HVDC scheme are:

LCC requires a strong AC system for stable operation

Cannot control active and reactive power independently

Large footprint

Requires the more expensive and heavier mass-impregnated cable [111]

Multi-terminal operation is technically challenging due to the change of DC voltage

polarity for power reversal [134]

2.2 VSC-HVDC

ABB pioneered VSC-HVDC technology and introduced its 1st generation of VSC-HVDC

technology in 1997, known as HVDC Light. Currently the 3rd

and 4th

generation of HVDC

Light is available. Siemens have developed their VSC-HVDC technology under the trade

name of HVDC Plus, whilst Alstom Grid has developed its VSC-HVDC technology called

HVDC MaxSine. A single line diagram for a typical VSC-HVDC scheme is shown in

Figure A.8.

Figure A.8: VSC-HVDC scheme

As with CSC-HVDC, the converter is the heart of the scheme. There are several VSC

converter topologies available. The simplest VSC-HVDC converter is a two-level

converter, which is the converter topology used in the 1st and 3

rd generations of HVDC

Light. This converter topology will be used to explain the fundamental principles of VSC-

HVDC. A three-phase two-level VSC is shown in Figure A.9.

28

Cost is indicative for a 1000MW, 400kV converter station.

Transmission Line

Metallic Return

Vdcr Vdci

Idc

Idc

AC Network 1 AC Network 2

Appendix 1A

225

Figure A.9: Three-phase two-level voltage source converter

Each valve consists of a stack of series and parallel connected Insulated Gate Bipolar

Transistors (IGBT) with anti-parallel diodes. The number of devices connected in series

and parallel depends upon the voltage and current rating of the valve respectively.

Consider the phase A converter voltage, Va. This voltage has two possible values +Vdc/2

when the upper valve conducts and –Vdc/2 when the lower valve conducts. The same

applies for the phase converter voltage B, Vb, and phase converter voltage C, Vc. By

applying a Pulse Width Modulation (PWM) control scheme to the converter a sinusoidal

voltage of the desired magnitude and phase can be synthesized as shown in Figure A.10.

Figure A.10: Sinusoidal voltage synthesised from a two-level converter with PWM (modified from

[28]); Vd=Vdc.

The quality of the sinewave synthesised, and therefore the harmonic content as well as the

converter losses, is dependent upon the PWM switching frequency. Increasing the

switching frequency produces a better quality sinewave and therefore reduces the AC and

DC harmonic content but at the expense of increasing the converter losses. The first

generation of HVDC Light utilised a switching frequency of 1950Hz [134]. The high

switching frequency normally removes the low-order harmonics and therefore filters are

+Vdc/2

-Vdc/2

Vsa

Vsb

Vsc

Valve

XVa

Vb

Vc

Appendix 1A

226

only required to absorb the higher harmonics. This greatly reduces the VSC-HVDC

footprint in comparison to a CSC-HVDC scheme.

Power transfer between the inverter and the AC system for phase A can be described by

equations (A.5) and (A.6).

sinsa aV V

PX

(A.5)

( cos )sa a saV V V

QX

(A.6)

Active power flows from the inverter into the AC network when the inverter power angle,

is positive with respect to that of the AC system. Therefore active power flows from the

AC network when the inverter power angle is negative with respect to that of the AC

system. The inverter exports reactive power when its voltage magnitude is greater than the

AC system and absorbs reactive power when its magnitude if less than the AC system.

Since the VSC can control its voltage magnitude and phase independently, it is able to

control active and reactive power independently. This is a key advantage over CSC-

HVDC. A VSC-HVDC scheme can offer fast reactive power support for the connected AC

systems and does not require shunt capacitor banks which further reduces its footprint. The

typical footprint for an onshore 1000MW VSC is about 90m x54m x 24m [111].

Power flow reversal in a VSC-HVDC scheme is achieved by reversing the direction of

current, not the DC voltage polarity as is the case for CSC-HVDC. This means that the

cheaper, lighter and more robust XLPE cable is suitable for VSC-HVDC schemes. The

absence of DC voltage polarity reversal also makes MT operation much less challenging.

The VSC is a self-commutated converter and therefore does not require an AC voltage

source for commutation. It can therefore maintain stable operation when connected to a

weak AC system, such as an offshore windfarm. Also CSC converters are generally more

expensive than VSC due to their reactive power and harmonic filtering requirements [136].

However, at present VSC schemes have been installed at lower power ratings than CSC

and therefore have been more expensive in terms of capital costs per unit of power.

ABB modified its converter design from a two-level converter to a three-level diode

Neutral Point Clamped (NPC) VSC in their 2nd

generation, as shown in Figure A.11.

Appendix 1A

227

Figure A.11: Single phase of a diode neutral clamped voltage source converter

The output voltage from the converter is +Vdc/2 when the two upper valves (1 and 2)

conduct and -Vdc/2 when the lower two valves conduct (3 and 4). The NPC can also output

0V when the middle valves (2 and 3) conduct. Positive current flows through the additional

upper anti-parallel diode and the upper middle IGBT into the AC network; negative current

flows through the lower middle IGBT and the lower additional anti-parallel diode. The

sinewave synthesised by this type of converter is shown in Figure A.12.

Figure A.12: Sinusoidal voltage synthesised from a three-level converter with PWM (modified from

[28]); Vd=Vdc.

The NPC VSC switches between the positive or negative DC link voltage and zero, which

halves the dv/dt in comparison to a two-level converter. From the perspective of harmonic

content, the effective switching frequency has doubled in comparison to a two-level

converter. This allows the switching frequency to be reduced, which decreases converter

losses without adversely impacting on the converter output harmonics. The NPC converter

topology was used for a back-to back VSC-HVDC scheme in the year 2000 [33].

+Vdc/2

-Vdc/2

Va

Valve1

Valve2

Valve3

Valve4

Appendix 1A

228

The NPC converter suffers with unequal distribution of semi-conductor losses [137], due

to some of the valves being utilised more than others, leading to said valves experiencing

higher junction temperatures. The converter is switching its output voltage between 0V and

+Vdc/2 for the first half cycle. Providing the inverter is operating at unity power factor,

valve 2 will conduct the phase current for the entire half-cycle and valve 1 will conduct the

phase current for only a high majority of the half-cycle. Therefore valve 1 will have

slightly less conduction losses than valve 2. However, valve 1 also experiences switching

losses, which in [137] resulted in the overall losses for valve 1 being approximately double

that of valve 2. Since losses are related to switching frequency and phase current, the most

stressed valve will limit the permissible phase current and switching frequency for the

converter. The NPC VSC can also suffer from valve voltage imbalance, which under

certain conditions may cause valves 2 and 3 to experience higher voltages than valves 1

and 4 [138]. These issues may be overcome by using an Active Neutral Point Clamped

(ANPC) VSC [137, 138].

The ANPC VSC is a NPC VSC with the addition of an active switch connected in anti-

parallel with the NPC diodes, as shown in Figure A.13. The addition of the active switches

gives more switching states which allows the losses to be distributed more evenly. As an

example, for the NPC VSC to go from +Vdc/2 to 0V valve 1 must turn-off, whereas the

ANPC can switch between +Vdc/2 to 0V without switching valve 1 off. This could be

achieved by switching valve 2 off, valve 6 and valve 3 on and therefore leaving valve 1 on.

The additional switching states, in conjunction with an appropriate control strategy, can

more evenly distribute losses and reduce the maximum device junction temperature. This

results in a potential increase in converter output power or/and an increase in the switching

frequency. In [137] the converter output power rating increased by 20%, or the switching

could increase from 1050Hz to 1950Hz for an ANPC VSC compared to a NPC VSC.

In a NPC-VSC it is likely that all of the valves will be rated for the maximum stress of the

worst valve. It is unlikely that different valves will be designed and built depending on

their individual maximum stress rating due to the additional cost and time. HVDC schemes

are designed for two-way power transfer, although in many cases the power is

predominantly transferred in one direction. Therefore it is likely some valves will be

stressed more than others for the high majority of the time. Since the losses in an ANPC

Appendix 1A

229

VSC are distributed more evenly, the maximum stress that any valve experiences is

reduced. Therefore it is likely that the ANPC VSC is more reliable for the same rating.

Figure A.13: Single phase of an active neutral clamped voltage source converter

ABB utilised the ANPC VSC on the Murraylink and Cross Sound Cable projects in 2002

[33]. ABB’s HVDC Light technology then evolved again to its current 3rd

generation. The

third generation of HVDC Light reverts back to the two-level converter but employs a new

control strategy known as Optimum PWM (OPWM). OPWM can cancel selective

harmonics and therefore the switching frequency can be reduced [87]. The 350MW

±150kV VSC-HVDC scheme between Estonia and Finland, known as “Estlink”, employs

the OPWM at a switching frequency of 1050Hz [139]. This is a reduction of 900Hz in

comparison to the first generation of HVDC light used in the Tjaereborg VSC transmission

scheme [134].

Siemens VSC-HVDC technology, known as HVDC Plus, is based on a Modular Multi-

Level converter (MMC) approach. The MMC, as shown in Figure A.14, consists of six

converter arms. Each converter arm comprises a number of Sub-modules, SM, and a

reactor connected in series. The SM contains a two-level half-bridge converter with two

IGBT’s and a parallel capacitor. The SM is also equipped with a bypass switch, to remove

the SM from the circuit in the event that an IGBT fails, and a thyristor, to protect the lower

diode from overcurrent in the case of a DC side fault.

+Vdc/2

-Vdc/2

Va

Valve1

Valve2

Valve3

Valve4

Valve5

Valve6

Appendix 1A

230

Figure A.14: Three-phase MMC

Each SM in a MMC is switched at less than three times the fundamental frequency and

therefore the converter losses are less than the equivalent two-level and three-level

converters by about 1% per converter station [28, 140]. Figure A.15 shows the voltage

produced by the converter. The sinewave produced (orange) is very close to the desired

waveform, which means that the harmonic content is very low. Increasing the number of

voltage steps that are used to produce the desired waveform reduces the harmonic content.

The AC converter voltages for a 400MW MMC with 200 modules per arm is shown in

Figure A.16 (Trans Bay Cable project) [28]. This figure clearly shows that AC filtering is

not required with a high number of SMs per converter arm.

Figure A.15: Sinusoidal voltage synthesised from a MMC (modified from [28])

Figure A.16: Sinusoidal voltage synthesised from a 400MW MMC with 200 modules per arm (modified

from [28])

Single

IGBT

Sub-module

+Vdc/2

Va

Vua Vla

Vcap

Iarm

VSM

ArmSM2

SMn

SM1

SM2

SMn

SM1

SM2

SMn

Larm

IuaSM1

Rarm

Idc

SM1

SM2

SMn

SM1

SM2

SMn

SM1

SM2

SMn

-Vdc/2Ila

Vb

Vc

Idc

Appendix 1A

231

The MMC has a much lower voltage step (few kV) in comparison to a two-level and three-

level VSC-HVDC scheme which switches the entire DC voltage or half the DC voltage

respectively. This reduces the high frequency noise and component stresses. However, the

benefits of the MMC come at the expense of increased valve and control complexity.

Siemens have currently commissioned one HVDC Plus project (Trans Bay Cable), which

is a 400MW ± 200kV VSC-HVDC transmission scheme between Pittsburg and San

Francisco. Siemens have many more orders to use their HVDC Plus technology to connect

offshore windfarms such as Helwin1 and Borwin2 [141].

Alstom Grid have developed their VSC-HVDC technology under the trade name of

MaxSine, which also employs a MMC very similar to that of HVDC Plus. They have built

a 25MW VSC demonstrator in Stafford, UK, and have won a contract to supply a 750MW,

345kV VSC scheme for operation in 2014 [142].

ABB’s fourth generation converter is a Cascaded Two-level (CTL) converter topology

very similar to that of a MMC, as shown in Figure A.17. Each cell is a half-bridge two-

level converter with two valves and a parallel capacitor. The number of series and parallel

connected devices within the valve will depend upon the cell voltage and current

respectively. A phase leg consists of two phase arms which contain a number of cells. The

main difference between the CTL and MMC converter topologies is that the MMC SM

contains two IGBT’s whereas the CTL contains two valves (string of IGBTs).

The valves are initially blocked; the anti-parallel diodes conduct and the cell capacitance

charges-up providing the arm current is positive. The cell capacitor output voltage is

inserted into the circuit by switching the lower valve on and the upper valve off, the cell

capacitor charges for positive arm current and discharges for negative arm current. The cell

capacitor can be bypassed by turning the upper valve on and the lower valve off; hence the

cell output voltage is 0V.

Appendix 1A

232

Figure A.17: Single phase of a two-level cascaded converter (ABB 4th

Gen HVDC light)

Each cell is switched at a low frequency which is approximately three times the

fundamental frequency (150Hz for a 50Hz system). For a DC bus voltage of ± 320kV

about n=38 cells are required per arm, therefore the effective switching frequency of the

phase leg is 11.4 kHz. This is about 10 times greater than the third generation of HVDC

Light, which gives the converter a good dynamic response. The dynamic response for the

MMC is however likely to be better. A ±200kV MMC has approximately 200 SMs per

arm, which gives a dynamic response of 20kHz for a conservative switching frequency of

50Hz29

. An equivalent voltage rating (± 320kV) would result in more levels and therefore

an even better dynamic response.

According to [84] the nominal cell voltage for a CTL converter is approximately 18kV,

compared to a MMC SM voltage of approximately 2kV30

. The converter voltage for a CTL

converter is shown in Figure A.18.

29

The SM switching frequency is quoted as being less than three times the fundamental [140].Therefore the SM switching frequency equal to the fundamental switching is likely to represent the minimum dynamic performance for a converter. 30

Based on ±200kV MMC with 200 SMs per arm. Module voltage = DC voltage/ Number of SMs.

Appendix 1A

233

Figure A.18: CTL Converter voltage for a fundamental frequency of 50Hz with 17 cells per arm at a

nominal cell voltage of 17.6kV and cell switching frequency of 168.5Hz [84].

Due to the MMC having smaller voltage steps in comparison to the CTL converter, it is

able to produce a cleaner sinusoidal waveform as seen when comparing Figure A.16 with

Figure A.18. Therefore it is likely that the MMC generates a lower harmonic content than

the equivalent CTL converter. The MMC is also likely to have slightly lower losses than an

equivalent CTL converter due to its apparent lower module switching frequency. However

the CTL converter loss is quoted as being roughly 1% per converter [84] which is very

similar to the quoted losses of close to 1% per converter station for the MMC [28].

The MMC requires approximately nine times more modules than the equivalent CTL-

converter31

, which will result in a higher primary component count (capacitor, bypass

switch, thyristor, enclosure). The CTL converter on the other hand will require grading

circuits due the string of IGBTs connected within each valve. The MMC control system is

challenged with balancing nine times the number of capacitor voltages in comparison to

the CTL converter. However the CTL control system is likely to need to switch each cell in

and out of circuit at least three times per cycle, compared to possibly twice per cycle for

the MMC32

. Currently there is not enough information to conclude whether Siemens

HVDC Plus, Alstom Grid MaxSine or 4th

Generation HVDC Light will offer the greatest

performance. However with the current information, it is expected that the MMCs are

likely to offer the best performance in terms of harmonic content, dynamic response and

losses, but at the expense of a more costly and complex valve and control system.

There is little information on the size of the HVDC Plus and HVDC Light 4th

generation

converter stations. There are example layouts in [28, 44], but they are for very different

31

Based on 2kV SM voltage and an 18kV cell voltage. 32

The module switching frequency is only quoted as being less than three times the fundamental [140].

Appendix 1A

234

converter ratings which makes them difficult to compare. However since the MMC has

vastly more modules it is likely that the CTL converter will be more compact.

Thus-far all of the VSC-HVDC topologies which have been, or are likely to be, in

commercial operation in the near future have been discussed. The primary driver behind

each evolution of VSC-HVDC technology has been to reduce losses. The VSC losses have

been reduced from 3% to about 1%, but are still slightly higher than LCC at 0.8% per

converter [134].

Technology Year first scheme

commissioned Converter type

Typical losses per converter

(%)33

Switching frequency (Hz)34

Example project

HVDC Light 1st Gen

1997 Two-Level 3 1950 Gotland

HVDC Light 2nd Gen

2000 Three-level Diode

NPC 2.2 1500 Eagle Pass

2002 Three-level Active

NPC 1.8 1350 Murraylink

HVDC Light 3rd Gen

2006 Two-Level with

OPWM 1.4 1150 Estlink

HVDC Plus 2010 MMC 1 <150* Trans Bay Cable

HVDC MaxSine

2014 MMC 1 <150* SuperStation

HVDC Light 4th Gen

2015 CTL 1 ≈150* Dolwin 235

*switching frequency is for a single module/cell.

Table A.1: Evolution of VSC-HVDC technology

33

Losses are indicative of a particular converter type, not specific to a project. The HVDC Light losses are primarily estimated from a graph produced by ABB, which can be found in [44]. The figure for HVDC Plus losses is in [28]. HVDC MaxSine losses are based on the HVDC Plus losses since the converter designs are very similar. 34

Switching frequency for HVDC Light generations 1-3 are for the example projects and can be found in [134, 139]. Switching frequency for HVDC plus is based on [140]. The same value is also used for MaxSine. 35

Dolwin 2 is likely to be the first HVDC Light 4th

generation project based on correspondence with ABB and in [143] its states losses less than 1%, which implies 4

th generation technology will be used.

Appendix 1A

235

Table A.1 shows that the three main HVDC manufacturers are moving towards a multi-

level converter topology. The multi-level converter, as with the other VSCs, has the

following advantages in comparison to a CSC-HVDC scheme:

Can be connected to weak AC systems

Can control active and reactive power independently

Smaller footprint

Can use the cheaper, lighter and more robust XLPE cable

MT operation is less technically challenging

3 Conclusion

HVDC tends to be a more favourable transmission technology for offshore windfarms

located further than 50-100km from shore. This is due to the transmission cable’s

capacitance which requires charging and discharging every cycle in an AC system. The

charging current reduces the cable’s useful power transfer capacity. In a HVDC system,

once the cable’s capacitance is charged, nearly its entire current carrying capability can be

used for the transmission of active power.

LCC-HVDC is not a suitable technology for the connection of offshore windfarms. This is

primarily because LCC-HVDC requires a strong AC network at each end of the link and

the converter station is very large, which means the offshore platform is expensive. LCC-

HVDC cannot independently control active and reactive power and requires mass-

impregnated cable to handle the DC polarity reversal. Mass-impregnated cable is

expensive and time consuming to install and is not particular suitable for subsea

installation because it is heavy and inflexible.

The issues of LCC-HVDC can be mitigated, or partially overcome, with VSC-HVDC

technology. VSC-HVDC is a self-commutated converter and can therefore be connected to

a weak AC network such as an offshore windfarm. The VSC-HVDC footprint is about

40% smaller than the equivalent LCC-HVDC footprint36

, which results in a large cost

saving, particularly for offshore schemes. VSC-HVDC can control the output AC voltage

magnitude and phase independently which gives independent active and reactive power

capability. XLPE cable can be used on VSC-HVDC schemes because it does not change

36

Estimated from a space saving diagram comparing HVDC Plus with LCC-HVDC in [28].

Appendix 1A

236

the DC voltage polarity for power reversal. This type of cable is cheaper, lighter and more

flexible than mass-impregnated cable.

VSC-HVDC was pioneered by ABB in 1997. Since then there have been several

evolutions of VSC-HVDC technology with the main focus on reducing the losses to

similar levels of LCC-HVDC. The three leading manufacturers of HVDC technology have

all moved towards a form of multi-level converter topology, which has seen losses reduce

to about 1% per converter, which is comparable to the 0.8% per converter for LCC-HVDC.

Therefore it is fully expected that multi-level VSC-HVDC will facilitate the transmission

of power from the future offshore windfarms which require a HVDC link.

Appendix 2A

237

APPENDIX 2A – COMPONENT RELIABILITY INDICES

1 Introduction

Reliability statistics for the components in a VSC-HVDC scheme are extremely sparse.

The following papers/reports produced by academic institutions and industry are used as

the main basis for the derivation of reliability statistics for the VSC-HVDC scheme used in

this thesis:

1. LCC-HVDC data from academic paper [15] [Billinton et al., “Reliability

Evaluation of an HVDC Transmission System Tapped by a VSC Station"]

2. VSC-HVDC data from academic paper [15]

3. VSC-HVDC data from industrial paper report [144] [Statnett and DNV, “Design,

operation and availability analysis of a multi-terminal HVDC grid - A case study of

a possible Offshore Grid in the Norwegian Sea”]

4. VSC-HVDC data from Cigre paper [16] [ABB and STRI, “Reliability study

methodology for HVDC grids”]

Source 1 and 2 are from a recent IEEE transactions paper produced by respected authors in

the area of power systems reliability, including Roy Billinton. The third source is a report

produced by Statnett and Det Norske Veritas (DNV). The fourth source is a Cigre paper

written by authors from ABB and STRI. Therefore the data from these sources is expected

to be credible. Due to the limited data available some degree of estimation is unavoidable.

Where this has been done the rational used is explained.

2 Gas-insulated Switchgear (GIS) Failure Statistics

Unfortunately sources 1-4 only gave failure statistics for an AC circuit breaker. However

since the circuit breaker is the main component of a GIS switchbay, it is worth analysing

the failure statistics used in sources 1-4 to give an indication of the failure statistics for the

GIS. Table A.2 shows the reliability statistics for AC circuit breakers given in academic

and industrial papers.

Table A.2: Circuit breaker MTTF and MTTR values given in sources 1 to 4

Source MTTF(yr) MTTR(hr) Scheme

1 66.7 50 500kV

2 1000 40 500kV

3 405 190 132kV Offshore

4 50 200 >500kV

Appendix 2A

238

It is clear from Table A.2 that the circuit breaker reliability statistics used for reliability

studies in academic and industrial papers vary significantly. Source 3 and 4 reference Cigre

publications for their reliability statistics. At the time of investigation, the last known high

voltage circuit breaker survey was published by Cigre in 1994. This publication presented

results from two surveys, one conducted between 1974 and 1977 (all circuit breaker

technologies) and the other conducted between 1988 and 1991 (only SF6).

Table A.3: Cigre high voltage circuit breaker reliability data

The MTTF values for the survey conducted in 1988-1991 are more than three times higher

than the values from the 1974-1977 survey. This increase in MTTF for the circuit breakers

in the 1988-1991 survey is thought to be due to improvements in circuit breaker

technology and due to the utilities doing a better job of collecting statistics. The increase in

downtime for the MTTR for circuit breakers in the 1988-1991 survey was cited as being

primarily due to the time taken to obtain a specific spare part for the SF6 circuit breakers.

According to the ODIS 2011 document [14], Gas-insulated Switchgear (GIS) bays will be

installed on all offshore platforms, and on onshore platforms located less than 5km from

the sea. The final results for two surveys on the reliability of gas-insulated substations have

been published. The first international survey was circulated in 1991 and the second survey

was circulated in 1996 [27]. The major failure statistics from the 2nd

international survey

for GIS commissioned after 1985 are shown in Table A.4.

Table A.4: Failure statistics from the 1996 survey for GIS commissioned after 198537

Comparing the values from the Cigre 1988-1991 survey in Table A.3 with the values in

Table A.4, it is clear that a GIS bay tends to take longer to repair than an AC circuit

37

MTTF is calculated by taking the reciprocal of the failure rate. It is assumed that the failure rate is based on the number of circuit breaker bay-years in service. (I.e. the reciprocal of the failure rate is the MTTF not the MTBF). In any case the difference between MTTF and MTBF will be very small.

Survey Voltage(kV) MTTF (yr) MTTR(hr)

200-300 38.760 58.5

300-500 21.978 83.8

200-300 122.850 54.6

300-500 82.645 162.5

Cigre 1974-1977

Cigre 1988-1991

Component MTTF (yr) MTTR(hr)

200-300kV GIS 149 192

300-500kV GIS 39 192

Appendix 2A

239

breaker and that the higher voltage (300-500kV) GIS has a shorter MTTF than an AC

circuit breaker. This is not particularly surprising considering a GIS bay contains an AC

circuit breaker as well as other equipment such as disconnectors.

The data given in Table A.2, Table A.3 and Table A.4 can be used to estimate the failure

statistics for a 220/275kV GIS switchbay and a 400kV switchbay commissioned in 2011. It

is fair to assume that the MTTF of a GIS switchbay in 2011 would be much higher than a

GIS switchbay commissioned between 1985 and 1996. The MTTF from the 1996 survey

for 200-300kV GIS commissioned after 1985 was 45% higher than the GIS commissioned

after 1985 from the 1991 survey. The MTTF for AC circuit breakers 1988 survey was

more than 300% higher than the values given in the 1974 survey. Therefore, it is justifiable

to assume that the MTTF for a 220/275kV GIS switchbay and a 400kV switchbay

commissioned in 2011 would be 250 years and 100 years respectively. These figures lie

within reasonable ranges as shown by the figures used in academic and industrial papers in

Table A.2. It is also worth mentioning that ABB have quoted a Mean Time Between

Failure (MTBF) figure of up to 1000 bay-years for their gas-insulated switchgear [145].

Based on the assumption that GIS today would be somewhat easier to fix than 15-25 years

ago, and that the spare parts are more readily available, it is assumed that the MTTR values

will be reduced. Furthermore the supply chain is computerised with modern telecoms

which would help to improve service levels. Therefore the MTTR for modern GIS is

assumed to be 120 hours.

As mentioned in the main body access times for offshore platforms vary considerably

depending on a number of factors. The 1996 GIS survey stated that about 70% of repairs

could be carried out on-site and required a spare part and/or enclosure [27]. It is assumed

that the high majority of spare parts could be transported by helicopter. Therefore the time

to access the offshore platform to repair a GIS switchbay is taken as 84 hours (70%

helicopter, 30% medium vessel). It is estimated that about 20 hours of the offshore access

time is spent performing administration related tasks which could be done concurrently

with the time spent obtaining spare parts. Therefore the MTTR used for the offshore GIS

switchbay is 184 hours. Table A.5 shows the estimated reliability indices for GIS.

Appendix 2A

240

Table A.5: Estimated reliability indices for GIS

3 Transformer Failure Statistics

Table A.6 shows the reliability statistics for transformers given in sources 1 to 4.

Table A.6: Transformer failure statistics given in sources 1 to 4

The transformers used in LCC-HVDC schemes (source 1) are more complex and

experience greater stress than the transformers in the VSC-HVDC schemes (source 2).

This would explain the better reliability statistics for the transformer from source 2.

The reliability statistics provided by source 4 are from the latest transformer failure

statistics survey published by Cigre in 1983 for transformers between 300-700kV. After

analysing the 1983 report, it is clear that the statistics from source 4 are based on an

autotransformer with and without an On-Load Tap-changer (OLTC). Analysis of the 1983

report shows that for an autotransformer with an OLTC, the MTTF is 98.33 years and for

an autotransformer without OLTC the MTTF is 17.2 years38

. This is somewhat surprising

and the report noted that the abnormally high failure rate of autotransformers without

OLTC could be in part explained by the failure of the transformers belonging to a certain

network. In other words, the MTTF of 17.2 years for an autotransformer without OLTC

should be used with a degree of caution and therefore the figure with and without OLTC as

used in source 4 should also be used with a degree of caution. In any case, HVDC schemes

use transformers with an OLTC and tend not to use autotransformers, because they cannot

provide galvanic isolation between the AC and DC sides. Therefore, the statistic given in

source 4 may not be representative of a transformer used in a HVDC scheme.

38

MTTF is calculated by taking the reciprocal of the failure rate. According to the Cigre report the failure rate is calculated based on the number of transformer-years in service (i.e. the reciprocal of the failure rate is the MTTF not the MTBF).

Component MTTF (yr) MTTR(hr)

Offshore switchbay 250 184

400kV onshore switchbay 100 120

275kV onshore switchbay 250 120

Source MTTF (yr) MTTR (hr) Scheme

1 14.29 1200 500kV

2 20 1000 500kV

3 225 672 132kV Offshore

4 41.67 2160 >500kV

Appendix 2A

241

The 1983 Cigre report also gave statistics for substation station transformers. The MTTF

for a 100-300kV substation transformer with an OLTC and a 300-700kV transformer is

62.5 years and 50.85 years respectively. Considering the survey was conducted more than

30 years ago, it is reasonable to suggest that the MTTF for a modern transformer is much

improved. Therefore an estimated MTTF of 95 years for a 100-300kV transformer and 80

years for a 300-700kV transformer will be used in this availability analysis. These values

are still much less than the estimated values given by DNV in source 3.

Unfortunately, the 1983 Cigre report did not publish the mean downtime for non-

autotransformers in the 300-700kV range as it was deemed not significant. However, the

mean downtime with a 95% confidence level for a 100-300kV transformer with an OLTC

was reported as being between 46 and 76 days. The MTTR is taken as the mean, 61 days

(1464 hrs). Considering it is now more than 30 years since the survey was conducted, an

estimated MTTR value of 42 days (1008 hrs) will be assumed. This figure is based on the

assumption that technology today allows a quicker diagnosis and repair of the transformer

failure.

In the event a transformer fails it is normally shipped back to the factory for repair [146].

There have been situations where it is so difficult to send the transformer back to the

factory that a fully equipped workshop has been constructed on-site. It is difficult to send

an offshore transformer back to the factory, but due to the lack of space on an offshore

platform it would be extremely rare, if not impossible, to construct a workshop on the

platform. Therefore in the event a transformer fails it is expected it would need to be

shipped back to the factory for repair.

In this report, the time it takes to access an offshore platform with a transformer has been

estimated at three weeks (504 hours). This figure was based on the transportation of a large

item, such as a transformer, to the offshore platform. The offshore access time required for

repairing an offshore transformer would be split into two parts. The first part would be to

transport the transformer back to shore. The second part would occur once the transformer

is repaired and must be transported back to the offshore platform. Therefore the offshore

access time for repairing the transformer must at least be greater than three weeks. A

significant portion of the three weeks access time would be due to delays in acquiring the

large vessel at very short notice. However the vessel could be booked well in advance for

returning the transformer back to the offshore platform. Therefore, the access time to

Appendix 2A

242

transport the transformer to the offshore platform is estimated to be reduced to one week.

Therefore the total access time to repair the offshore transformer is estimated to be 4

weeks.

It is assumed that one week of the MTTR for the onshore transformer is spent sourcing

spare parts. It is feasible that the transformer could be diagnosed using non-invasive tests

on the offshore platform [147]. This would allow the spare part to be sourced while the

transformer is being transported back to the factory. Therefore the MTTR for the offshore

transformer is estimated to be three weeks longer than the MTTR for the onshore

transformer. For comparison DNV increased the MTTR for the offshore transformer by

three weeks in their availability analysis in source 3. Table A.7 shows the estimated

reliability indices for the transformers.

Table A.7: Estimated reliability indices for transformer

4 Converter Reactor Failure Statistics

Table A.8 shows the reliability statistics for phase reactors given in sources 1 to 4.

Table A.8: Converter reactor reliability values given in sources 1 to 4

Only source 3 has stated reliability values for the converter reactor. Unfortunately, there

are no other known author publications which have given reliability values for the

converter reactor. It is worth noting that availability statistics for the Murraylink VSC-

HVDC scheme have been published by ABB in a Cigre paper [33] as shown in Table A.9.

Table A.9: Murraylink energy availability

The very low availability of the scheme in 2007 was due to a fault in the phase reactor,

which was most likely caused by a fault in an external light fitting which led to a fire on

Component MTTF(yr) MTTR(hr)

Offshore Transformer 95.00 1512.00

Onshore Transformer 95.00 1008.00

Source MTTF (yr) MTTR (hr)

3 7 24

Energy 2003 2004 2005 2006 2007 2008 2009 Average

Total 95.18 97.08 95.39 98.92 90.56 99.17 99.37 96.52429

Scheduled 96.49 98.77 97.96 98.51 97.91 99.12 99.13 98.27000

Forced 98.21 98.04 97.11 99.33 90.98 99.86 100.00 97.64714

Murraylink

Appendix 2A

243

the reactor [33]. It was noted that one of the reasons the repair took so long was because

the building was not designed to accommodate an easy replacement. That said the

Murraylink went into service in 2003 and it is expected that new schemes would be

designed to allow easier replacement of components.

The values from DNV seem reasonable, after all DNV is a well-respected risk management

company and therefore their values are expected to be credible. The only slight concern is

that the MTTR values for both the onshore and offshore converters are the same. In the

event a converter reactor fails it is assumed it would need to be replaced rather than

repaired on-site because it is a single unit and has no moving parts. A converter reactor is

too large to be shipped via a helicopter, therefore a medium sized vessel would be

required. The offshore access time for the converter reactor is 168 hours. It is expected that

a converter reactor is readily available to allow replacement within 24 hours. Since there is

no time delay in sourcing the component, the offshore MTTR is equal to the onshore

MTTR plus the offshore access time. Table A.10 shows the estimated reliability indices for

the converter reactor.

Table A.10: Estimated converter reactor reliability indices

5 MMC Failure Statistics

Table A.11 shows the reliability statistics for MMCs given in sources 1 to 4.

Table A.11: MMC failure statistics given in sources 1 to 4

It is unclear if sources 1 and 2 have included the Control and Protection (C&P) systems, as

well as the cooling and ventilation systems, in the reliability values for the converter.

However, it is assumed that they have, since these systems are not considered separately in

the sources and the converter would be the most appropriate component in which to

Component MTTF (yr) MTTR (hr)

Onshore Converter Reactor 7 24

Offshore Converter Reactor 7 192

Source MTTF (yr) MTTR (hr) Comment 1 1 5 LCC

2 2 4 Two-level VSC

3 2 24 Two-level VSC

4 0.71 4.1 VSC*

*Value based on LCC and includes the C&P and the DC

Equipment

Appendix 2A

244

include these systems. Sources 2 and 3 do not explicitly state that their reliability statistics

are for a two-level VSC converter, however, since both systems include AC filters it is fair

to assume that they are for a two-level converter. Source 3 has considered the C&P as well

as the cooling and ventilation systems separately. Therefore the values given by source 3

are purely for the IGBT converter system.

The reliability statistics given for a VSC in source 4 are based on actual forced outage

statistics collected for LCC-HVDC schemes between 2005 and 2006 [16]. However the

value for source 4 given in Table A.11 is a combined value for the converter, C&P and DC

equipment. Based on the same analysis method used in source 4, the MTTF and MTTR for

the converter only are 2.1 years and three hours respectively. These values account for the

cooling and ventilation systems, but not the C&P and DC equipment.

There has been no actual reliability statistics published for converters used in VSC-HVDC

schemes. However based on the values given in Table A.11 it is assumed that the MTTF

and MTTR for a two-level VSC are 2 years and 12 hours respectively. The MMC has a

significantly higher component count than a two-level VSC, which is likely to reduce the

reliability of the converter. However, it does not suffer the high stress of switching all

IGBTs in the valve simultaneously. It is reasonable to assume that the MMC at this time

will be slightly less reliable than the two-level converter due to the lack of experience with

this type of converter in HVDC schemes and the higher component count. Therefore, the

MTTF will be reduced to 1.9 years as a placeholder to reflect the expected increase in

failure rates for MMC. The MTTR will be kept the same at 12 hours for an onshore

converter. The MMC reliability indices account for the cooling and ventilation systems.

The failure of a MMC is likely to require the replacement of a SM. It is justifiably assumed

that spare SMs would be readily available since they require minimum storage space and

are critical for converter operation. SMs are fairly small components and could be

transported by a helicopter with the engineer. Since the reliability indices for the MMC

includes the cooling and ventilation systems, the size of spare parts for these systems must

also be taken into account. The critical components which have high failure rates in a

cooling plant are electrical motors. It is expected that electrical motors could be transported

by helicopter/small vessel. The offshore access time for such a component has been

estimated at 48 hours and as such the MTTR for the offshore converter is 60 hours. Table

A.12 shows the estimated MMC reliability indices.

Appendix 2A

245

Table A.12: Estimated MMC reliability indices

6 Control System

Table A.13 shows the reliability statistics for the control system given in sources 1 to 4.

The reliability statistics from source 3 are a DNV internal estimate for a single VSC

control system. The C&P systems for HVDC schemes are normally duplicated [30].

Therefore the availability of the duplicated control system must be calculated, as shown in

Table A.14.

Table A.13: Control and protection failure statistics given in sources 1 to 4

Table A.14: Availability of DNV duplicated control system

Providing the repair time for the DNV duplicated C&P system is fixed at 9 hours the

MTTF for the duplicated control system would be approximately 930 years. This value has

been calculated in (A.11) by rearranging equation (A.7) for MTTF and substituting the

duplicated control system availability values.

MTTF

AMTTF MTTR

(A.7)

MTTF

MTTF MTTRA

(A.8)

(1 )MTTF A A MTTR (A.9)

(1 )

A MTTRMTTF

A

(A.10)

0.9999989 9

8181809 930(1 0.9999989)

hrsor yrs

(A.11)


MMC Onshore 1.9 12

MMC Offshore 1.9 60

Source MTTF (yr) MTTR (hr)

3 1 9

4 1.60 3

Capacity Control 1 Control 2 Probability Availability

1 1 0.99795

1 0 0.00103

0 1 0.00103

0 0 0 0.00000 0.0000011

100% 0.9999989

Appendix 2A

246

The values given in source 4 are from the actual forced outage statistics collected for LCC-

HVDC schemes between 2005 and 2006. Therefore, the MTTF statistic is actually the

mean time to failure of both C&P systems, as the scheme could operate if only one of the

two C&P systems failed. Therefore, the availability of the duplicated C&P system is

0.99979, which is significantly less than the availability of the duplicated control system

from the DNV reliability data in source 3. This is further highlighted by the difference

between the calculated MTTF value from the DNV data and the MTTF value from source

4. It is expected that the reliability data given in source 4 is more realistic than source 3

since this is actual HVDC C&P failure data.

The hardware for the C&P system for a LCC-HVDC system is similar to a MMC VSC-

HVDC system. Therefore, the data given in source 4 would provide a good basis for

estimating the reliability indices for the MMC VSC-HVDC C&P system. The MMC Valve

Based Electronics (VBE), the interface between the C&P system and the converter, is

different from that of a LCC-HVDC scheme due to the higher number of levels. The

software is also more complex, because the control system must balance the capacitor

voltages in the MMC valve and turn each level on and off individually. However it is

expected that a modern C&P system would be more reliable than an older C&P system.

The World HVDC survey obtains data from many schemes using C&P systems of different

ages. Therefore all things considered, a MTTF and MTTR of 1.6 years and 3 hours will be

used in this availability analysis.

It is assumed that many control system faults could be solved without attending the site

(i.e. via remote access). In the event that the problem cannot be solved via remote access

an engineer would have to attend site. Spare parts for control systems, such as digital

signal processing cards, are very small and therefore access via helicopter is suitable. It is

assumed that 30% of faults on the offshore control system require an on-site visit.

Therefore the MTTR of the offshore control system is equal to MTTR for the onshore

control system plus 30% of the time required to access the offshore platform with a small

component (3+48x0.3=17hours). Table A.15 shows the estimated reliability indices for an

onshore and offshore control system.

Appendix 2A

247

Table A.15: Estimated control system reliability indices

7 DC Switchyard

Table A.16 contains the reliability indices for the DC equipment from sources 1 to 4.

Table A.16: DC equipment failure statistics given in sources 1 to 4

There is significant difference between the DC filter reliability indices between sources 1

and 2. The DC filters are for different schemes but it is unlikely that the VSC DC filter is

400 times more reliable than an LCC filter based on the MTTF. The DNV (source 3)

reliability indices for the VSC DC filter appear to be more realistic than source 2. Sources

1-3 appear to have included what they consider the key components for their analysis,

whereas source 4 has accounted for an entire DC switchyard. Source 4 has accounted for

all the VSC DC equipment by analysing the failure statistics for DC equipment in the

2006-2007 World HVDC survey (LCC) published in 2008.

The major equipment in a MMC DC VSC switchyard consists of HV capacitor banks (if

required), line reactors, measurement transducers and switchgear [29]. The major

equipment in a LCC DC switchyard consists of DC harmonic filters, smoothing reactors,

measurement transducers and switchgear [30].


Onshore Control System 1.6 3

Offshore Control System 1.6 17

Source MTTF (yr) MTTR (hr) Scheme

20 300 Smoothing Reactor

2.5 12 LCC DC Filter

1 4 VSC HVDC Switch/breaker

1000 5 VSC DC Filter

7 24 HV DC Bus

6 24 VSC DC Filter

4 3.333 6.4 Based on Data from 2005-2006 LCC Survey

1

2

3

Appendix 2A

248

Figure A.19: Image of a MMC VSC DC switchyard (left, modified from [29]) , Image of a LCC DC

switchyard (right modified from [31])

Since there is significant similarity between the DC switchyards, the failure statistics from

the World HVDC survey (LCC) could be used to estimate the reliability indices for the

MMC VSC-HVDC DC switchyard. The latest World HVDC survey was published in 2010

for data collected on LCC-HVDC schemes during 2007-2008. Back-to-back HVDC

schemes do not normally require smoothing reactors or DC filters [30]. Therefore only the

data for transmission schemes should be considered. In the 2007-2008 HVDC survey, data

was collected from 18 transmission schemes (8 monopole and 10 bipole). Monopole

schemes have one DC switchyard at each end of the scheme, whereas bipole schemes have

the equivalent of two DC switchyards at each end of the scheme. The failure rate for a

single DC switchyard can be calculated by summing the number of failures for the 18

transmission schemes and dividing by the number of DC switchyards (56). The MTTR is

obtained by dividing the total number of outage hours by the number of failures. The

reciprocal of the failure rate is the Mean Time Between Failures (MTBF). The MTTF is

the MTBF minus the MTTR. The average MTTF and MTTR has been calculated and is

shown in Table A.17.

There is a significant difference between the MTTF and MTTR calculated in Table A.17

and the reliability indices from the 2005-2006 survey. However, source 4 calculated the

reliability indices for a DC switchyard from both back-to-back and transmission schemes.

Source 4 also assumed that 50% of the HVDC schemes in the 2005-2006 survey were

monopole and 50% were bipole. Since the 2007-2008 survey is the most recent, and the

analysis of the reliability indices is more accurate for a transmission scheme, these indices

will be used in this availability analysis.

Line Reactor

Appendix 2A

249

Table A.17: Analysis of the DC equipment failure statistics from the World 2007-2008 HVDC survey

It is worth noting that although there are 18 transmission schemes which would normally

equate to 56 converters (8x2+4x10) further analysis of the data shows that there are

actually 80 converters. This is because a number of schemes contain more than one

converter per pole. Nelson River BP 2 for example has 3 six-pulse converters connected in

series per pole, giving twelve converters for the bipole instead of the usual four [148]. This

is unlikely to affect the reliability indices for DC switchyards as there should still be about

the same amount of DC equipment for standard HVDC schemes with one converter per

pole. However calculating the reliability indices for the HVDC converters from the World

HVDC surveys should take the number of converters per pole into consideration to ensure

a high degree of accuracy.

In order to adjust the MTTR for the offshore DC switchyard, the most common types of

repair and size of spare parts would need to be known. Unfortunately, the HVDC surveys

do not give this level of detail. However, by analysing the outage statistics due to DC

equipment failures it may be possible to get an indication of the size of component

required for the most common failures. In 2007 there were twelve DC equipment failures

causing a total of 368 outage hours, of which a single failure accounted for 314 hours [26].

Therefore the MTTR excluding the single major failure was only 4.9 hours. Such a small

repair time is likely to indicate that only small parts which were readily available, if any,

were required. The 314 hour outage indicates the repair required a large component. The

314 hour outage was due to a smoothing reactor failure [26], which is a large component as

shown in Figure A.19. Only five of the 18 failures in 2008 required a repair time in excess

of 10 hours. This analysis indicates that the high majority of DC switchyard repairs require

a small spare part, if any, and that the spare part is readily available. Therefore it is

Parameters 2007 2008 Average

No of schemes 19 19

Number of monopoles 9 9

Number of bipoles 10 10

No of Failures 12 18

Failure per scheme year 0.63 0.95

Failures per Switchyard 0.21 0.31

MTBF (yr) 4.8333 3.22 4.03

Repair time (hr) 367.50 386.80

MTTR (hr) 30.63 21.49 26.06

MTTF (yr) 4.83 3.22 4.02

Appendix 2A

250

estimated that 80% of offshore DC switchyard repairs could be carried out via

helicopter/small vessel and the remaining 20% via a small vessel39

. Furthermore, since the

analysis indicates that the majority of spare parts are readily available it is assumed that

very little time could be saved performing parallel tasks and it is therefore neglected.

Hence the MTTR for the offshore DC switchyard is the MTTR for the onshore DC

switchyard plus the offshore access time for the DC switchyard. The offshore access time

to the DC switchyard is estimated to be 72 hours (0.8x48+0.2x168). Table A.18 shows the

estimated reliability indices for the DC switchyard.

Table A.18: Estimated reliability indices for DC switchyard

8 DC Cable

Only source 3 contained reliability indices for cables as shown in Table A.19.

Table A.19: DC cable failure statistics given in sources 1 to 4

The results from the latest reliability survey for cable systems were published by Cigre in

2009 [32]. The survey ended in 2005 and was for a 15 year period. At the end of 2005

approximately 7000 circuit km of submarine cable was identified as being in service.

DC-XLPE cable is the type of cable which is most likely to be used for VSC-HVDC

schemes. Unfortunately the failure rates for DC-XLPE cables were not given in the report.

The failure rate for all submarine cable types, with the exception of DC Self Contained Oil

Filled (SCOF) cables, due to internal faults, was zero. Therefore, the failure rate due to

internal faults for DC-XLPE cable will be assumed to be zero.

The average failure rate for all types of cable technology and voltage ratings due to

external/unknown damage gives a failure rate of 0.217 failures per year per 100km of

circuit. Approximately 55% of these submarine cable failures were reported to be at a

39

Based on the assumption that an outage time of less than 10 hours for a single fault indicates a small spare was required. In 2007, 2 of the 12 failures caused outages in excess of 10 hours while in 2008, 5 of the 18 failures caused outages in excess of 10 hours. Therefore approximately 80% of failures required a small part.

Component MTTF(yr) MTTR(hr)

Onshore DC Switchyard 4.02 26.06

Offshore DC Switchyard 4.02 98.06

Component Failure rate (occ/yr/100km) MTTR (hr)

DC Cable 0.05 1440

Appendix 2A

251

location where the cable was unprotected40

. Submarine HVDC cables are normally buried

at depths of 1m to offer protection [111]. For cable routes where direct burial is unsuitable

due to the sea-bed conditions (e.g. solid rock) other protection methods such as concrete

mattressing may be employed [111]. Considering that HVDC submarine cables will have

installation protection, the failure rate is calculated to be approximately 0.1 failures per

year per 100km circuit. This failure rate is nearly double the failure rate used in the DNV

report. It is important to note that submarine cable failure rates are very subjective. They

are heavily influenced by many factors including, fishing activity, installation protection

method, awareness of cable routes, water depth, and hardness of the sea-bed. In this

availability analysis it will be assumed that the annual failure rate is 0.07 failures per

100km of circuit. This is a reasonable assumption based on data from the DNV report and

the Cigre survey.

The offshore converter and onshore converter are located 165km apart. Therefore the total

cable length is 330km, but the circuit length/route length is assumed to be 165km41

. The

average repair time for submarine cables in the Cigre 2009 was 60 days [32] which is the

same as the DNV MTTR. Therefore this availability analysis will assume a MTTR of 60

days (1440hrs) for submarine cables. Table A.20 shows the estimated reliability indices for

the submarine cable.

Table A.20: Estimated reliability indices for submarine cable42

40

There were a total of 49 submarine cable failures recorded of which 4 were internal failures. 25 of the 45 external/unknown failures occurred at a location that the cable was unprotected. 17 faults occurred on cables that were protected. It is unclear if the remaining three faults (including two terminal faults) occurred on protected or unprotected cables. The vast majority of the cables surveyed (>80%) employed some form of protection [149]. Therefore by assuming that the smaller number of unprotected cables can be neglected and attributing the three unknown faults to the protected cables, the failure rate of a cable employing some form of protection can be approximately calculated by (20/45)*0.217=0.096≈0.1. 41

The questionnaire for the Cigre survey gives an example of how the circuit length is calculated. “A 5 km

long double-circuit connection with three phases and two cables per phase should be reported as 10 circuit km even though it has 60 km of cable core”. Therefore from this example 330km of core cable has a circuit length of 165km.

42 The reciprocal of the failure rate was assumed to be the MTBF. MTTF=MTBF-MTTR.

Component Failure rate (occ/yr/100km) Circuit Length (km) MTTF (yr) MTTR (hr)

DC Cable 0.07 165 8.493625 1440

Appendix 2B

252

APPENDIX 2B – RELIABILITY CONCEPTS AND DEFINITIONS

1 Reliability Concepts and Definitions

Reliability – is the probability of a device performing its purpose adequately for the period

of time intended under the operating conditions encountered [13].

Maintainability – is the probability that a component/device/system will be retained or

restored to specified working condition.

Mean Time To Failure (MTTF) – is the average time from the instance a

component/device/system enters a working state until a component/device/system enters a

failed state. This may also be defined as the component/device/system’s uptime.

Mean Time To Repair (MTTR) - is the average time it takes to restore a

component/device/system to a specified working condition from the instance the

component/device/system failed. This may also be defined at the

component/device/system’s downtime.

Mean Time Between Failures (MTBF) – is the average time elapsed between a

component/device/system entering a working state until the component/device/system re-

enters a working state. This may also be defined as the cycle time, which is the uptime plus

the downtime.

Availability – is the probability of finding the component/device/system in the operating

state at some time into the future [13]. The availability of a component with two states can

be calculated by equation (A.12).

Uptime MTTF MTTF

AUptime Downtime MTTF MTTR MTBF

(A.12)

Failure rate – is the number of times a component/device/system is expected to fail per

unit of time, or the number of times a component/device/system is expected to fail per unit

of time the component/device/system is in a working condition. The failure rate in this

report has two definitions because different reliability surveys determine the failure rate

from one of two methods. Some surveys record the number of failures for a sample of

components for a specified period time without suspending time for a component upon

failure, whereas other surveys suspend time when a component enters a failed state.

Appendix 2B

253

As an example, consider a fictitious reliability survey which collected failure statistics

from ten transformers for ten years during their useful life, giving 100 transformer-years of

data. The survey concluded that there were four failures in that time and that the average

time to repair each failure was three months. The number of times a transformer is

expected to fail per unit of time is calculated as follows:

4

0.04( / )10 10

occ yr

(A.13)

Equation (A.13) states that the failure rate for a transformer is 0.04 failures per year.

However this method for determining the failure rate did not suspend time when each

transformer was in a failed condition. The number of times the transformer is expected to

fail per unit of time when the transformer is in a working condition is calculated as

follows:

4

0.0404040( / )10 10 (4 3 )

occ yrmonth

(A.14)

Failure rates in this report are assumed to be constant, see Figure A.21. The reciprocal of

equation (A.13) is the MTBF, whereas the reciprocal of equation (A.14) is the MTTF.

Therefore the MTTF and MTBF can be calculated as follows and their relationship is

shown in Figure A.20:

1

24.750.0404040

MTTF years (A.15)

1

250.04

MTBF years (A.16)

24.75 3 25MTBF MTTF MTTR months years (A.17)

Figure A.20: Relationship between MTBF, MTTF and MTTR

MTBF

MTTR

MTTF time

1

0

Appendix 2B

254

Reliability surveys normally specify the failure rate and MTTR. Therefore if the reliability

survey has calculated the failure rate for a component without suspending time for failed

components, the MTTF may be obtained from equation (A.18).

1

MTTF MTTR

(A.18)

It is not always clear which method the reliability survey has used to calculate the failure

rate. However, in many cases this will not significantly impact on the calculated

availability of the component, since the MTTF is typically much greater than the MTTR.

The lifecycle of a product can be described by three distinct phases, as shown by the bath-

tub curve in Figure A.21. The infant mortality phase is characterised by a high failure rate

which decreases with time, and could be due to manufacturing errors or improper design.

Product failures in the second region (useful life) occur purely by chance and as such the

failure rate is constant. The third region (end of life) of the bath-tub curve shows the

product is wearing out.

Figure A.21: Product lifecycle from [150]

The failures rates in this report are assumed to be constant with time (i.e. phase one and

three are neglected). This is a fair assumption since components go through an extensive

testing process before they are installed at site and it is expected that the life of the product

has been designed to be equal to or less than the useful life of the product. In other words,

it is expected that manufacturing errors or improper design issues would be discovered in

the testing phase and that if a product is expected to be in operation for 25 years the

manufacture would have designed the product to have a useful life of at least 25 years.

Appendix 2B

255

Mean Time to Access Offshore Platform (MTTAOP) – is the average estimated time it

takes to reach an offshore platform with a component of a particular size.

Mean Offshore Access Time (MOAT) – is the average estimated offshore access time for

a particular component.

Mean Time Performing Concurrent Tasks (MTPCT) – is the average time spent

performing tasks associated with repairing a component located onshore which can be

conducted in parallel with tasks related to the MOAT for the component.

Example

A GIS switchbay located onshore has an estimated MTTR of 120 hours. It is estimated that

70% of GIS failures require a small sized spare part and 30% require a medium sized spare

part.

0.7 ( ) 0.3 ( )

0.7 48 0.3 168 84

MOAT MTTAOP small MTTAOP medium

MOAT hours

(A.19)

In addition it is estimated that 20 hours of the MOAT is spent on administration related

tasks which can be performed in parallel with the time spent obtaining spare parts

(accounted for in the onshore MTTR).

20MTPCT hours (A.20)

120 84 20 184offshore onshoreMTTR MTTR MOAT MTPCT hours (A.21)

Appendix 2C

256

APPENDIX 2C – MTDC GRID ANALYSIS

The full truth table for 7 variables is shown below:

State OFNA OFNB OFNC C1 C2 Sub 6 Sub 7

1 1 1 1 1 1 1 1

2 1 1 1 1 1 1 0

3 1 1 1 1 1 0 1

4 1 1 1 1 1 0 0

5 1 1 1 1 0 1 1

6 1 1 1 1 0 1 0

7 1 1 1 1 0 0 1

8 1 1 1 1 0 0 0

9 1 1 1 0 1 1 1

10 1 1 1 0 1 1 0

11 1 1 1 0 1 0 1

12 1 1 1 0 1 0 0

13 1 1 1 0 0 1 1

14 1 1 1 0 0 1 0

15 1 1 1 0 0 0 1

16 1 1 1 0 0 0 0

17 1 1 0 1 1 1 1

18 1 1 0 1 1 1 0

19 1 1 0 1 1 0 1

20 1 1 0 1 1 0 0

21 1 1 0 1 0 1 1

22 1 1 0 1 0 1 0

23 1 1 0 1 0 0 1

24 1 1 0 1 0 0 0

25 1 1 0 0 1 1 1

26 1 1 0 0 1 1 0

27 1 1 0 0 1 0 1

28 1 1 0 0 1 0 0

29 1 1 0 0 0 1 1

30 1 1 0 0 0 1 0

31 1 1 0 0 0 0 1

32 1 1 0 0 0 0 0

33 1 0 1 1 1 1 1

34 1 0 1 1 1 1 0

35 1 0 1 1 1 0 1

36 1 0 1 1 1 0 0

37 1 0 1 1 0 1 1

38 1 0 1 1 0 1 0

39 1 0 1 1 0 0 1

40 1 0 1 1 0 0 0

41 1 0 1 0 1 1 1

42 1 0 1 0 1 1 0

43 1 0 1 0 1 0 1

44 1 0 1 0 1 0 0

45 1 0 1 0 0 1 1

46 1 0 1 0 0 1 0

47 1 0 1 0 0 0 1

48 1 0 1 0 0 0 0

49 1 0 0 1 1 1 1

50 1 0 0 1 1 1 0

51 1 0 0 1 1 0 1

52 1 0 0 1 1 0 0

53 1 0 0 1 0 1 1

54 1 0 0 1 0 1 0

55 1 0 0 1 0 0 1

56 1 0 0 1 0 0 0

57 1 0 0 0 1 1 1

58 1 0 0 0 1 1 0

59 1 0 0 0 1 0 1

60 1 0 0 0 1 0 0

61 1 0 0 0 0 1 1

62 1 0 0 0 0 1 0

63 1 0 0 0 0 0 1

64 1 0 0 0 0 0 0

Appendix 2C

257

65 0 1 1 1 1 1 1

66 0 1 1 1 1 1 0

67 0 1 1 1 1 0 1

68 0 1 1 1 1 0 0

69 0 1 1 1 0 1 1

70 0 1 1 1 0 1 0

71 0 1 1 1 0 0 1

72 0 1 1 1 0 0 0

73 0 1 1 0 1 1 1

74 0 1 1 0 1 1 0

75 0 1 1 0 1 0 1

76 0 1 1 0 1 0 0

77 0 1 1 0 0 1 1

78 0 1 1 0 0 1 0

79 0 1 1 0 0 0 1

80 0 1 1 0 0 0 0

81 0 1 0 1 1 1 1

82 0 1 0 1 1 1 0

83 0 1 0 1 1 0 1

84 0 1 0 1 1 0 0

85 0 1 0 1 0 1 1

86 0 1 0 1 0 1 0

87 0 1 0 1 0 0 1

88 0 1 0 1 0 0 0

89 0 1 0 0 1 1 1

90 0 1 0 0 1 1 0

91 0 1 0 0 1 0 1

92 0 1 0 0 1 0 0

93 0 1 0 0 0 1 1

94 0 1 0 0 0 1 0

95 0 1 0 0 0 0 1

96 0 1 0 0 0 0 0

97 0 0 1 1 1 1 1

98 0 0 1 1 1 1 0

99 0 0 1 1 1 0 1

100 0 0 1 1 1 0 0

101 0 0 1 1 0 1 1

102 0 0 1 1 0 1 0

103 0 0 1 1 0 0 1

104 0 0 1 1 0 0 0

105 0 0 1 0 1 1 1

106 0 0 1 0 1 1 0

107 0 0 1 0 1 0 1

108 0 0 1 0 1 0 0

109 0 0 1 0 0 1 1

110 0 0 1 0 0 1 0

111 0 0 1 0 0 0 1

112 0 0 1 0 0 0 0

113 0 0 0 1 1 1 1

114 0 0 0 1 1 1 0

115 0 0 0 1 1 0 1

116 0 0 0 1 1 0 0

117 0 0 0 1 0 1 1

118 0 0 0 1 0 1 0

119 0 0 0 1 0 0 1

120 0 0 0 1 0 0 0

121 0 0 0 0 1 1 1

122 0 0 0 0 1 1 0

123 0 0 0 0 1 0 1

124 0 0 0 0 1 0 0

125 0 0 0 0 0 1 1

126 0 0 0 0 0 1 0

127 0 0 0 0 0 0 1

128 0 0 0 0 0 0 0

Table A.21: Truth table for the simplified MTDC system

Appendix 2C

258

The capacity probability table for the HVDC grid with each path to shore rated at 900MW

is shown below:

State OFNA OFNB OFNC C1 C2 Sub 6 Sub 7 Probability Capacity

1 0.98721 0.98721 0.98721 0.99310 0.99310 0.97743 0.97743 0.90654 1800

2 0.98721 0.98721 0.98721 0.99310 0.99310 0.97743 0.02257 0.02093 900

3 0.98721 0.98721 0.98721 0.99310 0.99310 0.02257 0.97743 0.02093 900

4 0.98721 0.98721 0.98721 0.99310 0.99310 0.02257 0.02257 0.00048 0

5 0.98721 0.98721 0.98721 0.99310 0.00690 0.97743 0.97743 0.00630 1500

6 0.98721 0.98721 0.98721 0.99310 0.00690 0.97743 0.02257 0.00015 900

7 0.98721 0.98721 0.98721 0.99310 0.00690 0.02257 0.97743 0.00015 600

8 0.98721 0.98721 0.98721 0.99310 0.00690 0.02257 0.02257 0.00000 0

9 0.98721 0.98721 0.98721 0.00690 0.99310 0.97743 0.97743 0.00630 1500

10 0.98721 0.98721 0.98721 0.00690 0.99310 0.97743 0.02257 0.00015 600

11 0.98721 0.98721 0.98721 0.00690 0.99310 0.02257 0.97743 0.00015 900

12 0.98721 0.98721 0.98721 0.00690 0.99310 0.02257 0.02257 0.00000 0

13 0.98721 0.98721 0.98721 0.00690 0.00690 0.97743 0.97743 0.00004 1200

14 0.98721 0.98721 0.98721 0.00690 0.00690 0.97743 0.02257 0.00000 600

15 0.98721 0.98721 0.98721 0.00690 0.00690 0.02257 0.97743 0.00000 600

16 0.98721 0.98721 0.98721 0.00690 0.00690 0.02257 0.02257 0.00000 0

17 0.98721 0.98721 0.01279 0.99310 0.99310 0.97743 0.97743 0.01174 1200

18 0.98721 0.98721 0.01279 0.99310 0.99310 0.97743 0.02257 0.00027 900

19 0.98721 0.98721 0.01279 0.99310 0.99310 0.02257 0.97743 0.00027 900

20 0.98721 0.98721 0.01279 0.99310 0.99310 0.02257 0.02257 0.00001 0

21 0.98721 0.98721 0.01279 0.99310 0.00690 0.97743 0.97743 0.00008 900

22 0.98721 0.98721 0.01279 0.99310 0.00690 0.97743 0.02257 0.00000 900

23 0.98721 0.98721 0.01279 0.99310 0.00690 0.02257 0.97743 0.00000 0

24 0.98721 0.98721 0.01279 0.99310 0.00690 0.02257 0.02257 0.00000 0

25 0.98721 0.98721 0.01279 0.00690 0.99310 0.97743 0.97743 0.00008 1200

26 0.98721 0.98721 0.01279 0.00690 0.99310 0.97743 0.02257 0.00000 600

27 0.98721 0.98721 0.01279 0.00690 0.99310 0.02257 0.97743 0.00000 600

28 0.98721 0.98721 0.01279 0.00690 0.99310 0.02257 0.02257 0.00000 0

29 0.98721 0.98721 0.01279 0.00690 0.00690 0.97743 0.97743 0.00000 600

30 0.98721 0.98721 0.01279 0.00690 0.00690 0.97743 0.02257 0.00000 600

31 0.98721 0.98721 0.01279 0.00690 0.00690 0.02257 0.97743 0.00000 0

32 0.98721 0.98721 0.01279 0.00690 0.00690 0.02257 0.02257 0.00000 0

33 0.98721 0.01279 0.98721 0.99310 0.99310 0.97743 0.97743 0.01174 1200

34 0.98721 0.01279 0.98721 0.99310 0.99310 0.97743 0.02257 0.00027 900

35 0.98721 0.01279 0.98721 0.99310 0.99310 0.02257 0.97743 0.00027 900

36 0.98721 0.01279 0.98721 0.99310 0.99310 0.02257 0.02257 0.00001 0

37 0.98721 0.01279 0.98721 0.99310 0.00690 0.97743 0.97743 0.00008 1200

38 0.98721 0.01279 0.98721 0.99310 0.00690 0.97743 0.02257 0.00000 600

39 0.98721 0.01279 0.98721 0.99310 0.00690 0.02257 0.97743 0.00000 600

40 0.98721 0.01279 0.98721 0.99310 0.00690 0.02257 0.02257 0.00000 0

41 0.98721 0.01279 0.98721 0.00690 0.99310 0.97743 0.97743 0.00008 1200

42 0.98721 0.01279 0.98721 0.00690 0.99310 0.97743 0.02257 0.00000 600

43 0.98721 0.01279 0.98721 0.00690 0.99310 0.02257 0.97743 0.00000 600

44 0.98721 0.01279 0.98721 0.00690 0.99310 0.02257 0.02257 0.00000 0

45 0.98721 0.01279 0.98721 0.00690 0.00690 0.97743 0.97743 0.00000 1200

46 0.98721 0.01279 0.98721 0.00690 0.00690 0.97743 0.02257 0.00000 600

47 0.98721 0.01279 0.98721 0.00690 0.00690 0.02257 0.97743 0.00000 600

48 0.98721 0.01279 0.98721 0.00690 0.00690 0.02257 0.02257 0.00000 0

49 0.98721 0.01279 0.01279 0.99310 0.99310 0.97743 0.97743 0.00015 600

50 0.98721 0.01279 0.01279 0.99310 0.99310 0.97743 0.02257 0.00000 600

51 0.98721 0.01279 0.01279 0.99310 0.99310 0.02257 0.97743 0.00000 600

52 0.98721 0.01279 0.01279 0.99310 0.99310 0.02257 0.02257 0.00000 0

53 0.98721 0.01279 0.01279 0.99310 0.00690 0.97743 0.97743 0.00000 600

54 0.98721 0.01279 0.01279 0.99310 0.00690 0.97743 0.02257 0.00000 600

55 0.98721 0.01279 0.01279 0.99310 0.00690 0.02257 0.97743 0.00000 0

56 0.98721 0.01279 0.01279 0.99310 0.00690 0.02257 0.02257 0.00000 0

57 0.98721 0.01279 0.01279 0.00690 0.99310 0.97743 0.97743 0.00000 600

58 0.98721 0.01279 0.01279 0.00690 0.99310 0.97743 0.02257 0.00000 600

59 0.98721 0.01279 0.01279 0.00690 0.99310 0.02257 0.97743 0.00000 0

60 0.98721 0.01279 0.01279 0.00690 0.99310 0.02257 0.02257 0.00000 0

61 0.98721 0.01279 0.01279 0.00690 0.00690 0.97743 0.97743 0.00000 600

62 0.98721 0.01279 0.01279 0.00690 0.00690 0.97743 0.02257 0.00000 600

63 0.98721 0.01279 0.01279 0.00690 0.00690 0.02257 0.97743 0.00000 0

64 0.98721 0.01279 0.01279 0.00690 0.00690 0.02257 0.02257 0.00000 0

Appendix 2C

259

Table A.22: Capacity probability tables for MTDC with 900MW paths back to shore

65 0.01279 0.98721 0.98721 0.99310 0.99310 0.97743 0.97743 0.01174 1200

66 0.01279 0.98721 0.98721 0.99310 0.99310 0.97743 0.02257 0.00027 900

67 0.01279 0.98721 0.98721 0.99310 0.99310 0.02257 0.97743 0.00027 900

68 0.01279 0.98721 0.98721 0.99310 0.99310 0.02257 0.02257 0.00001 0

69 0.01279 0.98721 0.98721 0.99310 0.00690 0.97743 0.97743 0.00008 1200

70 0.01279 0.98721 0.98721 0.99310 0.00690 0.97743 0.02257 0.00000 600

71 0.01279 0.98721 0.98721 0.99310 0.00690 0.02257 0.97743 0.00000 600

72 0.01279 0.98721 0.98721 0.99310 0.00690 0.02257 0.02257 0.00000 0

73 0.01279 0.98721 0.98721 0.00690 0.99310 0.97743 0.97743 0.00008 900

74 0.01279 0.98721 0.98721 0.00690 0.99310 0.97743 0.02257 0.00000 0

75 0.01279 0.98721 0.98721 0.00690 0.99310 0.02257 0.97743 0.00000 900

76 0.01279 0.98721 0.98721 0.00690 0.99310 0.02257 0.02257 0.00000 0

77 0.01279 0.98721 0.98721 0.00690 0.00690 0.97743 0.97743 0.00000 600

78 0.01279 0.98721 0.98721 0.00690 0.00690 0.97743 0.02257 0.00000 0

79 0.01279 0.98721 0.98721 0.00690 0.00690 0.02257 0.97743 0.00000 600

80 0.01279 0.98721 0.98721 0.00690 0.00690 0.02257 0.02257 0.00000 0

81 0.01279 0.98721 0.01279 0.99310 0.99310 0.97743 0.97743 0.00015 600

82 0.01279 0.98721 0.01279 0.99310 0.99310 0.97743 0.02257 0.00000 600

83 0.01279 0.98721 0.01279 0.99310 0.99310 0.02257 0.97743 0.00000 600

84 0.01279 0.98721 0.01279 0.99310 0.99310 0.02257 0.02257 0.00000 0

85 0.01279 0.98721 0.01279 0.99310 0.00690 0.97743 0.97743 0.00000 600

86 0.01279 0.98721 0.01279 0.99310 0.00690 0.97743 0.02257 0.00000 600

87 0.01279 0.98721 0.01279 0.99310 0.00690 0.02257 0.97743 0.00000 0

88 0.01279 0.98721 0.01279 0.99310 0.00690 0.02257 0.02257 0.00000 0

89 0.01279 0.98721 0.01279 0.00690 0.99310 0.97743 0.97743 0.00000 600

90 0.01279 0.98721 0.01279 0.00690 0.99310 0.97743 0.02257 0.00000 0

91 0.01279 0.98721 0.01279 0.00690 0.99310 0.02257 0.97743 0.00000 600

92 0.01279 0.98721 0.01279 0.00690 0.99310 0.02257 0.02257 0.00000 0

93 0.01279 0.98721 0.01279 0.00690 0.00690 0.97743 0.97743 0.00000 0

94 0.01279 0.98721 0.01279 0.00690 0.00690 0.97743 0.02257 0.00000 0

95 0.01279 0.98721 0.01279 0.00690 0.00690 0.02257 0.97743 0.00000 0

96 0.01279 0.98721 0.01279 0.00690 0.00690 0.02257 0.02257 0.00000 0

97 0.01279 0.01279 0.98721 0.99310 0.99310 0.97743 0.97743 0.00015 600

98 0.01279 0.01279 0.98721 0.99310 0.99310 0.97743 0.02257 0.00000 600

99 0.01279 0.01279 0.98721 0.99310 0.99310 0.02257 0.97743 0.00000 600

100 0.01279 0.01279 0.98721 0.99310 0.99310 0.02257 0.02257 0.00000 0

101 0.01279 0.01279 0.98721 0.99310 0.00690 0.97743 0.97743 0.00000 600

102 0.01279 0.01279 0.98721 0.99310 0.00690 0.97743 0.02257 0.00000 0

103 0.01279 0.01279 0.98721 0.99310 0.00690 0.02257 0.97743 0.00000 600

104 0.01279 0.01279 0.98721 0.99310 0.00690 0.02257 0.02257 0.00000 0

105 0.01279 0.01279 0.98721 0.00690 0.99310 0.97743 0.97743 0.00000 600

106 0.01279 0.01279 0.98721 0.00690 0.99310 0.97743 0.02257 0.00000 0

107 0.01279 0.01279 0.98721 0.00690 0.99310 0.02257 0.97743 0.00000 600

108 0.01279 0.01279 0.98721 0.00690 0.99310 0.02257 0.02257 0.00000 0

109 0.01279 0.01279 0.98721 0.00690 0.00690 0.97743 0.97743 0.00000 600

110 0.01279 0.01279 0.98721 0.00690 0.00690 0.97743 0.02257 0.00000 0

111 0.01279 0.01279 0.98721 0.00690 0.00690 0.02257 0.97743 0.00000 600

112 0.01279 0.01279 0.98721 0.00690 0.00690 0.02257 0.02257 0.00000 0

113 0.01279 0.01279 0.01279 0.99310 0.99310 0.97743 0.97743 0.00000 0

114 0.01279 0.01279 0.01279 0.99310 0.99310 0.97743 0.02257 0.00000 0

115 0.01279 0.01279 0.01279 0.99310 0.99310 0.02257 0.97743 0.00000 0

116 0.01279 0.01279 0.01279 0.99310 0.99310 0.02257 0.02257 0.00000 0

117 0.01279 0.01279 0.01279 0.99310 0.00690 0.97743 0.97743 0.00000 0

118 0.01279 0.01279 0.01279 0.99310 0.00690 0.97743 0.02257 0.00000 0

119 0.01279 0.01279 0.01279 0.99310 0.00690 0.02257 0.97743 0.00000 0

120 0.01279 0.01279 0.01279 0.99310 0.00690 0.02257 0.02257 0.00000 0

121 0.01279 0.01279 0.01279 0.00690 0.99310 0.97743 0.97743 0.00000 0

122 0.01279 0.01279 0.01279 0.00690 0.99310 0.97743 0.02257 0.00000 0

123 0.01279 0.01279 0.01279 0.00690 0.99310 0.02257 0.97743 0.00000 0

124 0.01279 0.01279 0.01279 0.00690 0.99310 0.02257 0.02257 0.00000 0

125 0.01279 0.01279 0.01279 0.00690 0.00690 0.97743 0.97743 0.00000 0

126 0.01279 0.01279 0.01279 0.00690 0.00690 0.97743 0.02257 0.00000 0

127 0.01279 0.01279 0.01279 0.00690 0.00690 0.02257 0.97743 0.00000 0

128 0.01279 0.01279 0.01279 0.00690 0.00690 0.02257 0.02257 0.00000 0

Appendix 3A

260

APPENDIX 3A – HVDC CIRCUIT BREAKER REVIEW

The HVDC circuit breaker topologies which were not presented in the main body are

described in this appendix.

1 Mechanical breaker with turn-off snubber

This DC circuit breaker consists of a fast mechanical switch connected in parallel with two

branches [56]. One branch contains a set of anti-parallel thyristors connected in series with

a snubber capacitor, and the other branch consists of a surge arrester. This device is shown

in Figure A.22.

SLs

SA

I Ib

Ic

Is

C

Figure A.22: Mechanical breaker with turn-off snubber

During normal operation, the current flows through the mechanical switch, S. Once the

fault is detected and the mechanical switch receives a trip order, it opens its contacts

causing the line current to begin to commutate into the thyristor-capacitor branch once the

thyristors are turned-on. The line current charges-up the capacitor creating a counter

voltage, resulting in a decrease in the rise of fault current. The surge arrester will become

highly conductive and de-magnetise the system’s inductance at the moment its knee-point

voltage is reached. The de-magnetisation of the system’s inductance reduces the voltage

across the surge arrester (i.e. it becomes less conductive). In the absence of a thyristor this

could cause the current to commutate back to the capacitor and ultimately result in

oscillations. The thyristor therefore prevents the current from oscillating and hence

successful interruption can be achieved.

The snubber capacitor must be designed to ensure that the rate of voltage rise across the

mechanical switch does not exceed its voltage blocking slew rate capability. This DC

breaker is able to reduce the maximum fault current, due to the capacitor gradually

reducing the voltage across the system’s inductance. It also uses thyristors, instead of semi-

conductor switches with turn-off capability, which is by far the most cost-efficient device

for very high power applications [134]. This may also increase the device’s reliability,

Appendix 3A

261

since no control equipment is required to turn-off the device. A suitable method of

discharging the capacitor once the current has been interrupted must however be

incorporated into the design.

2 Resonant DC/DC Converter

The prospect of incorporating DC/DC converters in MT HVDC grids is being investigated

[43, 151]. The proposed DC/DC resonant converters [55, 152] would allow the DC grid to

be operated at different voltages levels, which is claimed to optimise costs and losses. They

would also enable faulty sections of the grid to be isolated.

T1 T2T3 T4

T2 T1T4 T3

T7 T8T5 T6

T8 T7T6 T5

Rg

L1

L1L2u

L2u

L2d

L2d

V2+

V2-

V1+

V1-

C

CVc

I1 I2

Low Voltage Converter High Voltage converter

Figure A.23: DC/DC resonance converter

The proposed DC/DC resonance converter is also known as a high power bi-directional

DC transformer and is shown in Figure A.23. The converter creates two back-to-back LC

resonant circuits with a common capacitor, C. In step-up mode, (power transfer from V1 to

V2), thyristor pairs T1 and T2 are fired sequentially at a switching frequency with a duty

ratio of 50%. This creates a resonance with L1 and C, increasing voltage, Vc, and enabling

zero current switching of T1 and T2. The high voltage resonance circuit (L2u-C) allows the

thyristor pairs T5 and T6 to be switched at zero current. This operating principle is similar

for the converter operating in step-down mode with thyristor pairs T3 and T4 in the low

voltage converter, and thyristor pairs T7 and T8 in the high voltage converter, being

utilised.

The high voltage converter’s switching frequency is synchronised to that of the low

voltage converter, but the firing angle is selected depending on the mode of operation

(step-up or step-down). The switching frequency is usually varied to control the DC

current (I1 or I2) using a Proportional-integral (PI) feedback controller.

Appendix 3A

262

The worst case zero-impedance faults, at both high voltage and low voltage converter

terminals, are considered. The moment the fault occurs there is an initial transient for one

to two cycles, in which the converter components experience peak fault values. Following

this the converter finds a new steady-state operating point, if possible, until the controller is

able to respond. The controller is assumed to be inactive from the instance that the fault

occurs until sometime later, due to the delays in transducers, in processing the data and in

firing the thyristors [152]. After this delay, the controller is able to act to reduce the

switching frequency or block the firing pulses (for a permanent fault), and to open the off-

load mechanical switches to provide fault isolation. The time period during which the

controller is inactive is said to be the converter’s natural response and is dealt with in

[152], which refers to the controller’s active response documented in [67].

The use of a DC/DC resonance converter as a HVDC breaker is relatively new and there is

ongoing work in this area [151]. The addition of DC/DC resonance converters in a DC grid

is likely to result in additional costs and losses.

3 Patent Filed by ABB Technology on 26th November 2008 titled

‘High Voltage Direct Current Circuit Breaker Arrangement and

Method’.

The novel part of this patent is how a number of DC breakers are arranged to enable a

larger current to be interrupted than is possible with a single device. The device consists of

an interrupter, BRK, connected in parallel with two branches, one containing a series

inductor and capacitor, the other a surge arrester [153].

BRKLs

SA

I Ib

Ic

Is

CL

Figure A.24: HVDC circuit breaker arrangement and method (ABB, Nov 2008)

The breaker is only able to interrupt DC circuits up to approximately 5kA, because above

this level the arc voltage/current characteristic becomes flat (i.e. for changes in arc current

the arc voltage remains constant).

Appendix 3A

263

Simplistically, connecting DC breakers in parallel will allow the current between the

breakers to be shared and therefore will, theoretically speaking, increase the total breaking

current capability. The issue, however, is that one breaker will interrupt the current first,

causing the current to commutate into the other breaker which will not be able to interrupt

the total current.

By introducing a single-phase two-winding transformer into the circuit, the problem may

be overcome. The first DC breaker is connected to the polarity end of one transformer

winding, whilst the second DC breaker is connected to the non-polarity end of the other

transformer winding. During steady-state operation, the core magnetic flux produced by

the current in one winding will therefore cancel out the core magnetic flux due to the

current in the other winding. As an example, if breaker 1, B1, interrupts its current first, its

parallel capacitor will begin charging up and will therefore produce an increasing voltage

across B1. This voltage will try to commutate the current into the other breaker, B2,

meaning that the total line current, I, will now be flowing through the second breaker. This

will however not happen due to the action of the transformer, allowing the second breaker

to only interrupt half of the line current. This arrangement is shown in Figure A.25.

B1

B2

I

I2

I1

W

W

Transformer

Figure A.25: Transformer arrangement

4 Patent Filed by ABB Technology on 10th June 2008 titled ‘A DC

Current Breaker’.

This invention is to improve the existing passive resonance circuit breaker design so that it

is capable of breaking DC current in excess of 2500A. The DC breaker design is an

interrupter, in parallel with an LC resonance circuit, in parallel with a surge arrester [154].

The acclaimed novel part of this design is the relationship between the values of

capacitance and inductance in the LC resonance circuit.

There is a known maximum frequency for which the interrupter is capable of extinguishing

the arc. Above this frequency the interrupter may no longer be able to cool the arc quickly

enough. The resonance frequency is given by equation (A.22).

Appendix 3A

264

1 1

2f

LC (A.22)

According to the patent, the resonance circuit up until now has been designed with a higher

value of inductance to reduce the cost of the capacitor. The typical relationship is for the

value of capacitance to be a third of the value of inductance. The inventors have however,

realised that increasing this relationship is more favourable. This is because the amplitude

of the oscillating current is proportional to (C/L)1/2

and the transient recovery voltage in the

interrupter is proportional to 1/C. Increasing the capacitance therefore results in a higher

oscillating current, which helps higher currents to be broken. The increased capacitance

also reduces the rate of rise of recovery voltage for a specific current.

The patent is for the capacitance to inductance value to be equal to or greater than one.

There are many embodiments of this invention mentioned in the patent, some of which are

outlined below:

According to the patent it is possible to break currents exceeding 2500A, for

example 5000A, if the said relationship is greater than two.

The use of the conductor’s self-inductance which therefore requires no separate

inductor.

Two interrupters connected in series and in parallel with the resonance circuit and

surge arrester. This arrangement is more costly but results in a higher total arc

voltage which has some benefits.

Connecting a switch in series with the resonance circuit. The switch is closed after

some delay from when the interrupter contacts open, meaning it is possible to

create a well-defined voltage step that efficiently initiates current oscillation. This

configuration makes it possible to break currents in the order of 7000A.

Application as a Metallic Return Transfer Breaker (MRTB) in a HVDC

transmission scheme.

5 Patent Filed by ABB Technology on 5th December 1994 titled

‘Direct-Current Breaker for High Power for Connection into a

Direct-Current Carrying High-Voltage Line’.

This patent focuses on two DC circuit breaker designs [155]. The first uses a GTO thyristor

to divert current from the breaker to allow arc extinction. The second uses an IGBT to

Appendix 3A

265

initiate current oscillations to create a zero-crossing to allow arc extinction. Considering

that this patent expires in 2014 and that these topologies are not known to be in operation

on any HVDC scheme it is unlikely that these solutions are cost-effective.

6 GTO Circuit Breaker

Figure A.26 shows the circuit diagram of the GTO circuit breaker. Prior to current

interruption, both sets of circuit breaker contacts, BC1 and BC2, are closed and the current,

Idc, is flowing through the HVDC line via the circuit breaker contacts. The circuit breaker

contacts open upon receiving the break command, producing arc voltages, V1 and V2.

The arc voltage, V2, charges-up capacitor, C2, whose voltage, VC2, is measured and

compared with a reference voltage, Vref, by the voltage level detector, VLD. Once VC2

exceeds Vref a Fire Now (FN) signal is issued to the Pulse Generating Circuit (PGC) and

the Time Delay Circuit (TDC). The PGC sends a Firing Signal (FS) to the Gate Turn-off

(GTO) thyristor to turn-on. The GTO thyristor enters a conducting state, causing the

current flowing through BC2 to commutate via the GTO thyristor, allowing the arc in BC2

to be extinguished. The TDC issues a turn-off signal to the GTO after a predetermined time

delay, which is determined to allow the current to commutate from BC2 to the GTO and

for BC2 to recover preventing arc re-ignition when the GTO thyristor is switched-off.

When the GTO thyristor is switched-off and BC2 is open, the voltage across the contacts,

and hence the voltage across the breaker, grows rapidly, causing the current to commutate

into C1. The voltage distribution between BC1 and BC2 is determined by the surge arrester

connected across BC2, which is used to limit the voltage across the GTO and related

control circuitry. This means that the majority of the voltage across the circuit breaker, Vt,

will be supported by BC1. The total voltage across the breaker, Vt, will ramp up due to the

capacitor and will oppose the external circuit voltage, causing the line current to decrease.

The surge arrester, SA1, will begin to conduct, if Vt exceeds the surge arrester knee

voltage, until the line current has ceased.

Appendix 3A

266

BC2L Idc Ibrk

C1

BC1

SA1

SA2C2

VLD PGC

TDC

Vref

VC2

FN

FS

V1 V2

Is1

Ic1

Vt

Figure A.26: GTO thyristor circuit breaker

The mechanical breaker with turn-off snubber described in Section 1 operates in a similar

way to this circuit breaker, by commutating the line current from the breaker to allow arc

extinction. This device is however more complex and requires an additional capacitor, C2,

surge arrester, SA2, and a breaker with two sets of contacts. The advantage of this

topology is that the voltage rating of the power electronics is determined by surge arrester

SA2, not SA1. The patent states that SA2 would have a knee-point voltage between 2 and

2.5kV for a system voltage of 500kV.

7 IGBT Circuit Breaker

This circuit breaker topology is shown in Figure A.27 and is very similar to the one

described in Section 6. This time however, when the contacts open, the arc voltage V2 acts

as the supply voltage to the oscillator, OSC, which is designed to generate a train of pulses

at the same natural frequency created by the inductor, L1, and capacitor, C1. The square

pulses are amplified and are used to control the switching of the IGBT. Controlling the

switching of the IGBT in this way causes an oscillation of natural frequency, with growing

amplitude, in the circuit consisting of the inductor, L1, capacitor, C1, and breaker contacts,

BC1 and BC2. The oscillations generate an alternating current, superimposed on the DC

current flowing through the breaker, which will produce a zero crossing. This zero crossing

allows the breaker contacts to extinguish the arc. The oscillations can now no longer

oscillate back to the breaker contacts and the oscillations cease. The current then

commutates into C1 as described in the above breaker topology. The inductor value is

chosen to be sufficiently low, to minimise the effect on the circuit.

Appendix 3A

267

BC2Ls Idc Ibrk

C1

BC1

SA1

SA2OSC AMP

V1 V2

Is1

Ic1

V2

L1

Figure A.27: IGBT circuit breaker

This circuit breaker topology is comparable to the passive resonance DC Circuit Breaker,

with the addition of power electronics to excite the oscillations. The additional components

in this topology are likely to increase the cost and to reduce the reliability of the device.

Appendix 4A

268

APPENDIX 4A – SUB-MODULE CAPACITANCE DERIVATION

An analytical approach proposed by Marquardt et al. in [85] can be used to calculate the

approximate SM capacitance required to give an acceptable ripple voltage for a given

converter rating. The converter arms are treated as controllable voltage sources as shown in

Figure A.28.

Figure A.28: Single-phase equivalent circuit for MMC

The current flowing through each converter arm contains a sinusoidal component, ( ) / 2aI t

and a DC component,gI as shown in Figure A.28 and described by equation (A.23).

1 1 ˆ( ) ( ) ( sin( ))2 2

ua g a g aI t I I t I I t (A.23)

where:

ˆ1

3 2

ag dc

g

II I m

I (A.24)

Substituting (A.24) into (A.23) gives Iua in terms of Idc, as given by equation(A.25).

1

( ) (1 sin( ))3

ua dcI t I m t (A.25)

Where is the phase angle between ( )aV t and ( )aI t .

Neglecting the voltage drop across the arm impedance, each arm of the converter is

represented as a controllable voltage source which can be described by equation (A.26).

Vua(t)

Vdc/2

Ia(t)Vsa(t)

Iua(t)=Ig+Ia(t)/2

Vla(t)

Idc

Vdc/2

Larm

Rarm

Larm

Rarm

La Ra

Va(t)

Vu-g(t)

Vl-g(t)

Ila(t)=Ig-Ia(t)/2

Appendix 4A

269

1 1 1ˆ ˆ( ) ( ) sin( ) (1 sin( ))2 2 2

ua dc a dc a dcV t V V t V V t V k t (A.26)

where:

ˆ2 a

dc

Vk

V (A.27)

The power flow of the upper phase arm, Pua, is given by equation (A.28), using equations

(A.25) and (A.26).

1 1

( ) ( ) ( ) (1 sin( )) (1 sin( ))2 3

ua ua ua dc dcP t V t I t V k t I m t (A.28)

Equation (A.28) can be simplified to give equation (A.29).

( ) (1 sin( ))(1 sin( ))6

dc dcua

V IP t k t m t (A.29)

The relationship between m and k can be obtained by equations (A.30) to (A.34).

ˆ ˆ

3 cos2 2

a ad dc dc

I VP V I (A.30)

Substituting Ig for Idc, using (A.24), gives equation (A.31).

ˆ ˆ

cos2 2

a adc g

I VV I (A.31)

Multiplying each side of equation (A.31) by two gives equation (A.32).

ˆ ˆ2 cosdc g a aV I I V (A.32)

Equation (A.32) can be rearranged to give equation (A.33).

ˆ

ˆ 2cos

dc a

ga

V I

IV

(A.33)

Substituting equations (A.24) and (A.27) into equation (A.33) gives equation (A.34).

2

cosm

k

(A.34)

The variation in stored energy from the upper arm over a half cycle can be found by

integrating the equation for Pua (equation (A.29)) between limits x1 and x2 (positive half

Appendix 4A

270

cycle). The first step of this approach is to put equation (A.29) into an easier format for

integration.

Multiplying out the brackets gives equation (A.35).

( ) 1 sin( ) sin( ) sin( )sin( )6

dua

PP t m t k t mk t t (A.35)

Equation (A.36) can be produced using trigonometric identities.

( ) 1 sin( ) sin( ) cos(2 ) cos( )6 2 2

dua

P mk mkP t m t k t t

(A.36)

This can be re-written as equation (A.37).

( ) sin( ) sin( ) cos(2 ) 1 cos( )6 2 6 2

d dua

P Pmk mkP t m t k t t

(A.37)

From equation (A.34), cos( ) 2mk . The following term therefore equals 0.

1 cos( ) 06 2

dP mk

(A.38)

Equation (A.37) can thus be reduced to equation (A.39).

( ) sin( ) sin( ) cos(2 )6 2

dua

P mkP t m t k t t

(A.39)

Each term in equation (A.39) can be separately integrated and then added together.

Equations (A.40) to (A.44) show the integration for the first term.

u t (A.40)

du

dt (A.41)

Using equations (A.40) and (A.41) the integral of the first term can be written as equation

(A.42).

sin( ) sin( )du

m t dt m u

(A.42)

Integrating the right hand side of equation (A.42) gives equation (A.43).

sin( ) cos( )du m

m u u

(A.43)

Appendix 4A

271

Substituting for u gives equation (A.44).

cos( )

sin( )m t

m t dt

(A.44)

Integrating each term of equation (A.39) in a similar way gives equation (A.45).

22

11

cos( ) cos( ) sin(2 )( )

6 4

xx

dua ua

xx

P m t k t mk tW P t

(A.45)

This can be re-written as equation (A.46).

22

11

( ) cos( ) cos( ) sin(2 )6 4

xx

dua ua

xx

P mkW P t m t k t t

(A.46)

The limits for the half cycle, x1 and x2, can be obtained by finding the zero crossings, as

shown by equations (A.47) to (A.50).

1 sin( ) 0m t (A.47)

1

1 1arcsin arcsinx t

m m

(A.48)

Since sin( ) sin( ) :

1 sin( ) 0m t (A.49)

2

1arcsinx t

m

(A.50)

Substituting limits into equation (A.46) gives equation (A.51).

2 2

2 2 2 2

1 1 1 1 1 1

cos( ) cos( )

6 sin( )cos( ) cos( )sin( )4

cos( ) cos( ) sin( )cos( ) cos( )sin( )6 4

dua

d

m x k xP

W mkx x x x

P mkm x k x x x x x

(A.51)

Equation (A.52) can be re-written as equation (A.52) by collecting like terms.

2 1 2 1

2 2 2 2

1 1 1 1

cos( ) cos( ) cos( ) cos( )

sin( )cos( ) cos( )sin( )6

sin( )cos( ) cos( )sin( )4

dua

m x x k x xP

W x x x xmk

x x x x

(A.52)

Substituting equations (A.53) to (A.56) into equation (A.52) gives equation (A.57).

Appendix 4A

272

1

1sin( )x

m

(A.53)

2

1sin( )x

m (A.54)

2

1 2

1 1cos( ) 1

mx

m m

(A.55)

2 2

1cos( ) 1x

m (A.56)

2 12 2

2 2 1 12 2

1 11 1 cos( ) cos( )

6 1 1 1 1cos( ) 1 sin( ) cos( ) 1 sin( )

4

dua

m k x xm mP

Wmk

x x x xm m m m

(A.57)

Simplifying equation (A.57) gives equation (A.58):

2 12

2 1 2 12

12 1 cos( ) cos( )

6 1 1cos( ) cos( ) 1 sin( ) sin( )

4 4

dua

m k x xmP

Wmk mk

x x x xm m

(A.58)

Substituting equations (A.61) and (A.64) into equation (A.58) gives equation (A.65).

2 2

1 1sin( ) 1 sin( ) cos( )x

m m (A.59)

1 2

1 1sin( ) cos( ) 1 sin( )x

m m (A.60)

1 2

2sin( ) sin( ) cos( )x x

m (A.61)

2 2

1 1cos( ) 1 cos( ) sin( )x

m m (A.62)

1 2

1 1cos( ) 1 cos( ) sin( )x

m m (A.63)

2 1 2

1cos( ) cos( ) 2 1 cos( )x x

m (A.64)

Appendix 4A

273

2 2

2 2

1 12 1 2 1 cos( )

6 1 1 1 22 1 cos( ) 1 cos( )

4 4

dua

m km mP

Wmk mk

m m m m

(A.65)

Equation (A.65) can be simplified to equation (A.69), shown by equations (A.66) to (A.69)

.

2 2

2 2

1 12 1 2 1 cos( )

6 2 1 2 11 cos( ) 1 cos( )

4 4

dua

m km mP

Wmk mk

m m m m

(A.66)

2 2 2

1 1 12 1 2 1 cos( ) 1 cos( )

6

dua

PW m k k

m m m

(A.67)

2

11 2 cos( )

6

dua

PW m k

m

(A.68)

2

11 1 cos( )

3 2

dua

P kW m

m m

(A.69)

Substituting2

cos( )km

from equation (A.34) into equation (A.69) gives equation (A.70).

2

1 2 /1 1

3 2

dua

P mW m

m m

(A.70)

This can be simplified to give equation (A.71), and further simplified to equation (A.72).

The variation in stored energy for the upper arm of the converter is obtained in terms of m.

2 2

1 11 1

3

dua

PW m

m m

(A.71)

3/2

2

11

3

dua

PW m

m

(A.72)

Equation (A.72) can be re-written in terms of k by substituting equation (A.34).

3/2

22 cos

( ) 13 cos 2

dua

P kW k

k

(A.73)

The variation in energy per SM can be calculated by dividing equation (A.73) by the

number SMs in the converter arm, n, as shown in equation (A.74).

Appendix 4A

274

3/2

22 cos

( ) 13 cos 2

dSM

P kW k

n k

(A.74)

The required capacitance per SM for a ripple voltage factor 0 1 can be determined as

follows:

20.54

SMCap SM cap

WW C V

(A.75)

22

SMSM

Cap

WC

V

(A.76)

This approach which was proposed by Marquardt et al. is widely used [86, 87]. The SM

capacitance calculation should only be used as an approximation as it is based on several

assumptions, as described in the main body. The control strategy implemented for

balancing the capacitor voltages will also have a very significant impact on the capacitor

ripple voltage. The SM’s capacitance should be calculated based on the converter’s

operating condition that causes the greatest variation in the capacitor’s stored energy. This

condition is likely to be when the converter is operating at maximum power.

Sub-module capacitance calculation

The SM capacitance required to give a 10% capacitor voltage ripple for a 1000MW,

±300kV, 31-level MMC is calculated below:

The average SM capacitor voltage can be calculated as follows:

600

2030

dccap

V kVV kV

n (A.77)

The DC current, AC phase voltage and current, and frequency are given in equations

(A.78) to (A.81).

1000

1670600

ddc

dc

P MWI A

V KV (A.78)

ˆ 300aV kV (A.79)

/ 3 333

1570212

da

a

P MWI A

V kV (A.80)

2 2 50 314f rads (A.81)

Appendix 4A

275

The values for Ig and m are calculated in equations (A.82) and (A.83) respectively.

1670

5573 3

dcg

I AI A (A.82)

ˆ 2 1570

22 2 557

a

g

Im

I

(A.83)

The variation in the upper arm’s stored energy is given in equation (A.84).

3/2

2

10001 12 1 1.38

314 3 2ua

MWW MJ

(A.84)

Based on the assumption that the energy variation is shared equally between all SMs in the

converter arm, the required SM capacitance for a voltage ripple of ±5% is calculated in

equation (A.85).

2

1.38 / 301150

2 0.05 20SM

MJC uF

kV

(A.85)

According to [84] 30-40kJ of stored energy per MVA of converter rating is sufficient to

give a ripple voltage of 10% (±5%). Using this approximation the value of SM capacitance

can be calculated and compared with the value calculated by equation (A.85). The value of

SM capacitance based on 30kJ/MVA is given in (A.87).

30 1000 30

1676 180

SM

KJ MJW kJ

n

(A.86)

2 2

167835

0.5 0.5 20

SMSM

sm

W kJC F

V kV

(A.87)

The value of SM capacitance based on 40kJ/MVA is given in (A.89).

40 1000 40

2226 180

SM

KJ MJW kJ

n

(A.88)

2

2221110

0.5 20SM

kJC F

kV

(A.89)

The analysis conducted here shows that a value of 40MJ of stored energy for a 1000MVA

converter gives a value of SM capacitance similar to the method proposed by Marquardt et

al.

Appendix 4B

276

APPENDIX 4B – ARM INDUCTANCE DERIVATION

This appendix document derives an expression to approximately calculate the value of arm

reactance required for a given value of peak circulating current. This derivation is given in

a more condensed form in [89]. In the main body of this thesis, circulating current is

denoted by Icirc, however in this appendix it is denoted by I2f. This notation is used as it is

in-keeping with the original literature and it has greater meaning for the analysis of

circulating currents.

Equation (A.90), which describes the instantaneous power of the upper converter arm,

( )uaP t , is derived in the appendix document entitled “Sub-module capacitance derivation”

(Appendix 4A).

( ) (1 sin( ))(1 sin( ))6

dua

PP t k t m t (A.90)

The equation which describes the instantaneous power of the lower converter arm ( )laP t is

derived in brief in equations (A.91) to (A.93).

1

( ) (1 sin( ))2

la dcV t V k t (A.91)

1

( ) (1 sin( ))3

la dcI t I m t (A.92)

( ) ( ) ( ) (1 sin( ))(1 sin( ))6

dla la la

PP t V t I t k t m t (A.93)

K, m and Pd are the same as stated in appendix 4A, and are restated in (A.94).

ˆ ˆ2 2

2 cos

a ad dc dc

d g

V Ik m P V I

V I k

(A.94)

Integrating ( )uaP t and ( )laP t with respect to time gives the fluctuations of stored energy in

the upper and lower converter arms respectively, as calculated in equations (A.95) and

(A.96).

sin(2 ) 2cos( )

( ) ( ) cos( )6 2cos( ) cos( )

dua ua

P t tW t P t m t

m

(A.95)

sin(2 ) 2cos( )( ) ( ) cos( )

6 2cos( ) cos( )

dla la

P t tW t P t m t

m

(A.96)

Appendix 4B

277

Summing uaW and laW gives the AC component of the total stored energy in the converter

leg, and is shown in equation (A.97). This derivation uses the phase A converter leg as an

example.

sin(2 )

( ) ( ) ( )6 cos( )

da ua la

P tW t W t W t

(A.97)

Equation (A.99) is written in terms of apparent power by substituting equation (A.98) into

equation (A.97).

cos( )dP S (A.98)

sin(2 )

( )6

a

S tW t

(A.99)

Equation (A.99) shows that the AC component of the stored energy in the converter phase

leg varies at twice the fundamental frequency. The energy stored in the converter leg is a

function of voltage. A component of the converter leg voltage (upper arm and lower arm)

must therefore also vary at twice the fundamental frequency. Equation (A.100) shows the

voltage for the phase A converter leg as an example.

_ _ 2ˆ( ) sin(2 )a a dc a ac dc fV t V V V V t (A.100)

The upper and lower arm voltages must be re-written to include the double frequency

component, as shown in equations (A.101) and (A.102).

2ˆ1

( ) (1 sin( )) sin(2 )2 2

f

ua dc

VV t V k t t (A.101)

2ˆ1

( ) (1 sin( )) sin(2 )2 2

f

la dc

VV t V k t t (A.102)

The double fundamental frequency voltage component excites circulating currents, as

described by equation (A.103).

2

2 2

ˆˆ( ) sin(2 ) cos(2 )

4 2

f

f f

N arm

VI t t I t

L

(A.103)

Re-writing the arm currents with respect to phase A gives equations (A.104) and (A.105)

2

1 ˆ( ) (1 sin( )) cos(2 )3

ua dc fI t I m t I t (A.104)

Appendix 4B

278

2

1 ˆ( ) (1 sin( )) cos(2 )3

la dc fI t I m t I t (A.105)

The instantaneous power of the upper converter arm ( )uaP t is now therefore written as

equation (A.106).

2

2

ˆ( ) sin( ) sin(2 )

2 2 2

ˆsin( ) cos(2 )3 3

fdc dcua

dc dcf

VV VP t k t t

I Im t I t

(A.106)


2

2 2

2 2 2

ˆ( ) sin( ) cos(2 )

6 6 2

sin( ) sin( )sin( )6 6

ˆ ˆsin( )cos(2 ) sin(2 )

2 6

ˆ ˆ ˆsin(2 )sin( ) sin(2 )cos(2 )

6 2

dc fd dua

d d

dc f f dc

f dc f f

V IP PP t m t t

P Pk t mk t t

V I V Ik t t t

V I V Im t t t t

(A.107)

This can be re-written as equation (A.108) by collecting like terms.

2

2

2 2

( ) 1 sin( ) sin( ) sin( )sin( )6

ˆcos(2 ) sin( )cos(2 )

2

ˆsin(2 ) sin(2 )sin( )

6

ˆ ˆsin(2 )cos(2 )

2

dua

dc f

f dc

f f

PP t m t k t mk t t

V It k t t

V It m t t

V It t

(A.108)

Equation (A.108) can be simplified to equation (A.109) by using trigonometric identities.

2

2

2 2

( ) 1 sin( ) sin( ) cos(2 ) cos( )6 2 2

ˆcos(2 ) sin(3 ) sin( )

2 2 2

ˆsin(2 ) cos( ) cos(3 2 )

6 2 2

ˆ ˆsin(4 2 )

4

dua

dc f

f dc

f f


V I k kt t t

V I m mt t t

V It

(A.109)

Equations (A.110) to (A.113) repeats the same process but for the lower converter arm

( )laP t from equation (A.93).

Appendix 4B

279

2

2

ˆ( ) sin( ) sin(2 )

2 2 2

ˆsin( ) cos(2 )3 3

fdc dcla

dc dcf

VV VP t k t t

I Im t I t

(A.110)


2

2 2

2 2 2

ˆ( ) sin( ) cos(2 )

6 6 2

sin( ) sin( )sin( )6 6

ˆ ˆsin( )cos(2 ) sin(2 )

2 6

ˆ ˆ ˆsin(2 )sin( ) sin(2 )cos(2 )

6 2

dc fd dla

d d

dc f f dc

f dc f f

V IP PP t m t t

P Pk t mk t t

V I V Ik t t t

V I V Im t t t t

(A.111)

Equation (A.111) can be written as equation (A.112) by collecting like terms.

2

2

2 2

( ) 1 sin( ) sin( ) sin( )sin( )6

ˆcos(2 ) sin( )cos(2 )

2

ˆsin(2 ) sin(2 )sin( )

6

ˆ ˆsin(2 )cos(2 )

2

dla

dc f

f dc

f f

PP t m t k t mk t t

V It k t t

V It m t t

V It t

(A.112)

This can be simplified to equation (A.113) by using trigonometric identities.

2

2

2 2

( ) 1 sin( ) sin( ) cos(2 ) cos( )6 2 2

ˆcos(2 ) sin(3 ) sin( )

2 2 2

ˆsin(2 ) cos( ) cos(3 2 )

6 2 2

ˆ ˆsin(4 2 )

4

dla

dc f

f dc

f f


V I k kt t t

V I m mt t t

V It

(A.113)

The instantaneous power of the converter leg is calculated using equation (A.114).

( ) ( ) ( )a ua laP t P t P t (A.114)

Substituting equations (A.109) and (A.113) into equation (A.114) gives (A.115).

Appendix 4B

280

2

2 2 2

ˆ( ) 1 cos(2 ) cos( ) cos(2 )3 2 2

ˆ ˆ ˆsin(2 ) sin(4 2 )

3 2

d

a dc f

f dc f f

P mk mkP t t V I t

V I V It t

(A.115)

Substituting cos( ) 2mk from (A.94) into equation (A.115) gives equation (A.116).

2

2 2 2

ˆ( ) cos(2 ) cos(2 )3 2


3 2

d

a dc f

f dc f f

P mkP t t V I t

V I V It t

(A.116)

Substituting2

cos( )k

m from (A.94) into equation (A.116) gives equation (A.117).

2

2 2 2

cos(2 ) ˆ( ) cos(2 )3 cos( )


3 2

d

a dc f

f dc f f

P tP t V I t

V I V It t

(A.117)

Equation (A.117) can be re-written in terms of apparent power by substituting cos( )dP S

from equation (A.98), as shown by equation (A.118).

2

2 2 2

ˆ( ) cos(2 ) cos(2 )6


3 2

a dc f

f dc f f

SP t t V I t

V I V It t

(A.118)

Integrating equation (A.118) with respect to time produces equation (A.119).

2

2 2 2

ˆ( ) ( ) sin(2 ) sin(2 )

6 2

ˆ ˆ ˆcos(2 ) cos(4 2 )

6 8

dc f

a a

f dc f f

V ISW t P t dt t t

V I V It t

(A.119)

Substituting equation (A.120) into equation (A.119) produces equation (A.121).

2

2

ˆˆ

4

f

f

arm

VI

L (A.120)

2

2

2

2 2

2

ˆ( ) sin(2 ) sin(2 )

6 8

ˆ ˆcos(2 ) cos(4 2 )

6 32

dc f

a

arm

f dc f

arm

V VSW t t t

L

V I Vt t

L

(A.121)

Appendix 4B

281

It is shown in equations (A.122) to (A.129) that under normal operating conditions for a

typical HVDC scheme the third and fourth terms in equation (A.121) are at least one order

of magnitude smaller than the second term and that equation (A.121) can therefore be

approximated by neglecting the third and fourth terms.

According to [89], for a 50Hz system, providing Larm <0.2p.u., the third term in equation

(A.121) can be neglected since:

2 2 2

2

ˆ ˆ ˆ10

8 6 6

dc f f dc f dc

arm

V V V I V I

L (A.122)

The maximum value of limb reactor permissible for equation (A.122) to be true can be

determined by equations (A.123) to (A.126).

2

2

2

2

22

ˆ

ˆ8 6 3

ˆˆ 48

6

dc f

arm dc f dc

arm dcarm f dcf dc

V V

L V V V

L IL V IV I

(A.123)

Substituting L armX L into equation (A.123) produces equation (A.124)

2

2

2

ˆ

8 0.75

ˆ

6

dc f

arm dc

arm dcf dc

V V

L V

X IV I

(A.124)

Therefore to ensure 2

2

ˆ

8

dc f

arm

V V

L is at least one order of magnitude greater than 2

ˆ

6

f dcV I

Xarm and

Lmax must be defined by equations (A.125) and (A.126).

0.075 dcarm

dc

VX

I (A.125)

max

0.075

2

dc

dc

VL

fI (A.126)

Equation (A.127) compares the fourth term in equation (A.121) with the second term in

equation (A.121):

Appendix 4B

282

2

2 2

2

2 222 22

2

ˆ

ˆ8 32 4

ˆ ˆˆ 8

32

dc f

arm dc f arm dc

arm f ff

arm

V V

L V V L V

L V VV

L

(A.127)

Therefore to ensure 2

2

ˆ

8

dc f

arm

V V

L is at least one order of magnitude greater than

2

2

2

ˆ

32

f

arm

V

L, 2

ˆfV

must be defined by equation (A.128).

2ˆ 0.4f dcV V (A.128)

2ˆ

fV is significantly less than 0.4 dcV in any realistic MMC, hence the fourth term in equation

(A.121) can also be neglected. Equation (A.121) is therefore reduced to equation (A.129).

2

2

ˆ( ) sin(2 )

6 8

dc f

a

arm

V VSW t t

L

(A.129)

The double fundamental frequency voltage 2 ( )fV t , should distribute between all of the

SMs in the converter leg (2n) equally. Therefore the SM capacitor voltage can be described

by equation (A.130).

2ˆ

( ) sin(2 )2

f

cap cap

VV t V t

n (A.130)

capV is the DC component of the capacitor voltage. The total energy stored in the phase A

converter leg can be calculated by equation (A.131).

2 21( ) 2 ( ) ( )

2a SM cap SM capW t n C V t nC V t (A.131)

Substituting equation (A.130) into (A.131) produces equation (A.132).

2

2ˆ

( ) sin(2 )2

f

a SM cap

VW t nC V t

n

(A.132)

Multiplying out the brackets produces equation (A.133).

22

2

2 2 2

2

ˆsin(2 )

2( )

ˆ ˆsin(2 ) sin (2 )

2 4

cap f

cap

a SM

cap f f

V VV t

nW t nC

V V Vt t

n n

(A.133)

Appendix 4B

283

Equation (A.133) can be simplified to equation (A.134).

2

22 2

2

ˆˆ( ) sin(2 ) sin (2 )

4

SM f

a SM cap SM cap f

C VW t nC V C V V t t

n (A.134)

The second term in equation (A.134) is the double frequency component and can be

directly compared with equation (A.129), as shown by equation (A.135).

2

2 2

ˆˆ sin(2 ) sin(2 )

6 8

dc f

SM cap f

arm

V VSC V V t t

L

(A.135)

Equation (A.135) can be simplified to equation (A.136).

2

2 2

ˆˆ

6 8

dc f

SM cap f

arm

V VSC V V

L

(A.136)

Equation (A.136) can be rearranged for 2ˆ

fV as shown by equations (A.137) to (A.139).

2

2ˆ8 6

dcSM cap

arm f

V SC V

L V (A.137)

2

2

ˆ6 1

8

f

dcSM cap

arm

V

S VC V

L

(A.138)

2

2

6ˆ

8

f

dcSM cap

arm

SV

VC V

L

(A.139)

The double fundamental frequency current can be calculated by equation (A.140).

2

2

ˆˆ

4

f

f

arm

VI

L (A.140)

Substituting equation (A.139) into equation (A.140) produces equation (A.141).

2

2

6

8ˆ

4

dcSM cap

arm

f

arm

S

VC V

LI

L

(A.141)

Equation (A.141) can be simplified by equations (A.142) to (A.144).

Appendix 4B

284

2

2

1

6 4ˆ

8

armf

dcSM cap

arm

S

LI

VC V

L

(A.142)

2 2

2

1ˆ24

8

f

arm dcSM cap

arm

SI

L VC V

L

(A.143)

2 2

1ˆ3 8

f

arm SM cap dc

SI

L C V V

(A.144)

Equation (A.144) can be rearranged for Larm as shown by equations (A.145) to (A.147)

2

2ˆ3 (8 )f arm SM cap dcI L C V V S (A.145)

2

2

8ˆ3

dc arm SM cap

f

SV L C V

I (A.146)

2

2

1

ˆ8 3arm dc

SM cap f

SL V

C V I

(A.147)

Equation (A.147) allows the required value of arm reactor to be calculated to limit the

circulating current for a given system.

Appendix 4C

285

APPENDIX 4C – SHORT-CIRCUIT RATIO CALCULATION

The strength of an AC system is often characterised by its Short-Circuit Ratio (SCR),

which is defined by equation (A.148).

2

n n

drated drated

V ZSCLSCR

P P (A.148)

An AC system with a SCR greater than three is defined as strong [30]. The SCR of the

onshore AC system in the models is relatively strong with an SCR of 3.5, hence the AC

system impedance can be calculated by equation (A.149).

2 2400

45.713.5 1000

nn

drated

V kVZ

SCR P MVA

(A.149)

The AC network impedance is highly inductive and consequently the AC system

impedance is modelled using an X/R ratio of 20. The SCR is implemented in PSCAD

using an ideal voltage source connected in series with a resistor and an inductor. The

values of resistance and inductance are calculated from equations (A.151) and (A.152).

2 2(20 )n n nZ R R (A.150)

2

2.28401

nn

ZR (A.151)

20

0.145nn

RL H

(A.152)

Appendix 4D

286

APPENDIX 4D – ABC TO DQ TRANSFORMATION DERIVATION

In matrix form for the three phases:

csc

csa a

csb b

c

V I

V R pL I

V I

(A.153)

Applying the abc to (Clarke) transform as given by equation (A.154) to both sides of

equation (A.153) gives equation (A.155):

0

1 11

2 2

2 3 30

3 2 2

1 1 1

2 2 2

a

b

c

V V

V V

V V

(A.154)

0 0

V I

V R pL I

V I

(A.155)

Providing that the three-phase system (abc) is balanced, the three AC quantities are

transformed into two ac quantities of equal magnitude separated by 90°. The two ac

quantities can then be transformed into two dc quantities using the to dq (Park)

transform given in equation (A.156).

sin

sin cos

d

q

V Vcos

V V

(A.156)

Using Euler’s rule, as given in equation (A.157), and noting that V lags V by 90° (i.e.

V jV ), equation (A.156) may be re-written in vector form as in equation (A.158), with

its inverse given in equation (A.159).

cos sinjxe x j x (A.157)

j

dqV V e

(A.158)

j

dqV V e

(A.159)

Using equation (A.159), equation (A.155) can re-written in vector form as in equation

(A.160) and equation (A.161).

Appendix 4D

287

( )j j

dq dqV e R pL I e (A.160)

j j j

dq dq dqV e RI e Lp I e (A.161)

Using partial differentiation and noting that t , equation (A.162) is obtained.

j j j

dq dq dq

const I const

j j

dq dq

p I e e I I et t

e pI j I e

(A.162)

Substituting equation (A.162) into equation (A.161) gives

j j j j

dq dq dq dqV e RI e L e pI j I e (A.163)

Equation (A.163) can be simplified as follows:

j j j

dq dq dqV e RI e e Lp j L I (A.164)

dq dq dqV RI Lp j L I (A.165)

Or in matrix form:

0 1

1 0

d d d d

q q q q

V I I IR Lp L

V I I I

(A.166)

Where 0 1

1 0

is the matrix representation of the imaginary unit j.

Appendix 4E

288

APPENDIX 4E – POWER CONTROLLER TRANSFER FUNCTION

DERIVATION

Equations (A.167) and (A.168) show that the active power is controlled by Id and the

reactive power is controlled by Iq. The open loop transfer function, GOL, is given by

equation (A.169).

3

2sd dP V I (A.167)

3

2sd qQ V I (A.168)

1.51 3

1 2 1

p isd

piOL p sd

ic ic ic

K KV s

s KKG K V

s s s

(A.169)

Setting 1i p icK K equation (A.169) can be reduced to equation (A.170).

1.5 sd p

OL

ic

V KG

s (A.170)

The closed loop transfer function, GCL, is given by equation (A.171).

1.5

1.5 1

1.5 1.511

1.5

sd p

sd picCL

sd p icic sd p

sd pic

V K

V KsG

V K s V Ks

V Ks

(A.171)

The closed loop transfer function is therefore reduced to a first order transfer function with

a time constant 1.5

icp

sd pV K

.The bandwidth in radians for a first order system is equal to

1 rp . Hence equation (A.171) can be re-written as equation (A.172).

1

/ 1CL

p

Gs BW

(A.172)

The values of pK and iK can be calculated for given values of Vsd, BWp and BWic from

equations (A.173) and (A.174) respectively.

1.5 1.5

ic p p

p

sd sd ic

BW BWK

V V BW

(A.173)

i ic pK BW K (A.174)

Appendix 4F

289

APPENDIX 4F – DC VOLTAGE CONTROLLER TRANSFER FUNCTION

DERIVATION

Figure A.29: DC side plant

3 SM

eq

CC

n (A.175)

With reference to Figure A.29 the DC link voltage can be described by equation (A.176)

and the power balance between the AC and DC system can be described by equation

(A.177), assuming no converter losses.

dceq n dc

dVC I I

dt (A.176)

1.5dc dc sd sdI V V I (A.177)

Hence:

3

2

dc n sd sd

eq eq dc

dV I V I

dt C C V (A.178)

Taking partial derivatives gives equation (A.179), where the subscript ‘O’ denotes

operating point:

2

3 31

2 2

dc sdo sdo sdon dc sd

eq eq dco eq dco

d V V I VI V I

dt C C V C V

(A.179)

1.5 1.5dceq n V G dc V sd

d VC I K K V K I

dt

(A.180)

where:

sdo sdoV G

dco dco

V IK K

V V (A.181)

The state feedback system block diagram (SFSB) for the DC voltage control loop is shown

in Figure A.30.

Vn

MMC

CeqL R

Vs(abc)

In Idc

IcPCC

Vdc

Appendix 4F

290

Figure A.30: SFSB for DC voltage control loop

The transfer function for the control loop can be derived as follows:

1.5( )

1.5*1.5 ( )

Vp i

dc

Vdceq V G p i

KsK K

V sKV

C s K K sK Ks

(A.182)

2

1.5 ( )

* 1.5 ( ) 1.5

V p idc

dc eq V G p v i

K sK KV

V C s K K K s K K

(A.183)

Typically KG <<Kp and hence equation (A.183) can be reduced to equation (A.184):

2

1.5 ( )

* (1.5 ) 1.5

V p idc

dc eq V p v i

K sK KV

V C s K K s K K

(A.184)

Rearranging equation (A.184) and ignoring the psK term gives equation (A.185):

2

1.5

* 1.5 1.5

V i eqdc

dc V p eq v i eq

K K CV

V s K K C s K K C

(A.185)

The natural frequency and damping ratio is given by equations (A.186) and (A.187)

1.5 v i

n

eq

K K

C (A.186)

1.5

2

V p

n eq

K K

C

(A.187)

Hence the Ki and Kp values for a particular natural frequency and damping ratio can be

calculated by equations (A.188) and (A.189).

2

1.5

n eq

i

V

CK

K

(A.188)

2

1.5

n eq

p

V

CK

K

(A.189)

-

1

eqC

1

s

1.5KvKG

∆In

++∆Vdc* PI+

-

Inner

loop≈1

∆Isd* ∆Isd

1.5Kv

∆Vdc

Appendix 4G

291

APPENDIX 4G – AC VOLTAGE CONTROL

Figure A.31: MMC phase A connection to the AC network with the system resistances neglected

2sa na aV V I X (A.190)

where:

na caa

V VI

X

(A.191)

1 2X X X (A.192)

Substituting equation (A.191) into equation (A.190) and rearranging gives equation

(A.193)

(1 )sa na caV V k V k (A.193)

where:

2Xk

X (A.194)

Expanding equation (A.193) into its real and imaginary components gives equation

(A.195), noting that c is the power angle for the converter voltage and that the network

voltage is taken as the reference ( 0)n

(1 ) cos( ) sin( )sa na ca c ca cV V k V k jV k (A.195)

Hence, the magnitude of the voltage at the PCC is given by equation (A.196).

2 2

(1 ) cos( ) sin( )sa na ca c ca cV V k V k V k (A.196)

X2

Vsa

X1

Vca

IaVna

PCC

Appendix 4H

292

APPENDIX 4H – KEY PARAMETERS FOR THE MMC-HVDC LINK

Main circuit

Active power rating P 1000MW

Reactive power rating Q ±330MVAr

DC voltage Vdc 600kV

MMC

Number of levels NL 31

Number of SMs per arm n 30

SM capacitance CSM 1150µF

Arm resistance1 Rarm 0.9Ω

Arm inductance Larm 0.045H

Onshore MMC transformer

Leakage reactance XT 0.15p.u.

Star Primary winding voltage, L-L VTp 370kV

Delta Secondary winding voltage, L-L VTs 410kV

Apparent power base Sbase 1000MVA

Onshore AC system

Network voltage, L-L Vn 400kV

Network resistance Rn 2.28Ω

Network inductance Ln 0.145H

MMC power controllers Proportional gain Kp 0.000208

Integral time constant Ti 2.387

MMC DC voltage controller Proportional gain Kp 0.0269


AC voltage controllers Proportional gain Kp 0.000208


MMC current controller Proportional gain Kp 175


MMC dq current limits Nominal d-axis current limit Idlim ±2.65

Nominal q-axis current limit Iqlim ±0.75

CCSC Proportional gain Kp 8.48


Windfarm transformer



Star Secondary winding voltage, L-L VTs 220kV

Windfarm power controller

Proportional gain Kp 0.00246


Windfarm time constant τw 0.15s

Windfarm current controller Proportional gain Kp 0.327


Windfarm dq current limits Nominal d-axis current limit Idlim ±40

Nominal q-axis current limit Iqlim ±12

Offshore MMC voltage controller

Proportional gain Kp 0.5


Frequency freq 50Hz

Offshore MMC transformer



Delta Secondary winding voltage, L-L VTs 220kV

1. Value includes the on-state resistance of the semi-conductor devices in each arm.

Table A.23: Key parameters for the MMC-HVDC link

Appendix 5A

293

APPENDIX 5A – DC POLE-TO-GROUND FAULT

In Figure A.32, the system’s response to a DC pole-to-ground fault is shown when

employing a star-point reactor between the MMC1 and the transformer. The star-point

reactor has a per phase inductance of 50H and a mid-point resistance of 10Ω.

Figure A.32: Positive pole-to-ground fault at MMC1 with under voltage protection and a star-point

reactor ; arm currents are for MMC1 and capacitor voltages are for the upper arm of phase A for


Appendix 5A

294

The system’s response to a DC pole-to-ground fault with surge arresters installed between

the poles and ground at the terminals of each converter is shown in Figure A.33. The

PSCAD default surge arrester characteristic was used with a nominal voltage rating of

300kV.

Figure A.33: Positive pole-to-ground fault at MMC1 with under voltage protection and DC surge

arresters (no star-point reactor) ; arm currents are for MMC1 and capacitor voltages are for the

upper arm of phase A for MMC1; x axis – time(s)

Appendix 6A

295

APPENDIX 6A – PARAMETERS FOR MMC COMPARISON MODEL

MMC Comparison Model Parameters

Main Circuit Active power rating P 1000MW

Reactive power rating Q ±300MVAr DC voltage Vdc 600kV

MMC

Number of levels NL 31 Number of SMs per arm n 30

SM capacitance CSM 1150uF

Arm resistance1 Rarm 0.9Ω Arm inductance Larm 0.085H

Capacitor leakage resistance Rlc 10MΩ IGBT/diode on- state resistance Ron 0.01Ω IGBT/diode off-state resistance Roff 1MΩ

Transformer Leakage reactance XT 0.15pu

Primary winding voltage, L-L VTp 370kV Secondary winding voltage, L-L VTs 410kV

AC System Network voltage, L-L Vn 400kV Network resistance Rn 2.28Ω Network inductance Ln 0.145H

Inner Current loop control Proportional gain Kp 36


CCSC Proportional gain Kp 150

Integral time constant Ti 0.00000745 CBC Sorting frequency Trig 30

1. Value includes the on-state resistance of the semi-conductor devices in each arm.

Table A.24: Parameters for MMC comparison model

Appendix 7A

296

APPENDIX 7A – HVDC CABLE PARAMETERS, BONDING AND

SENSITIVITY ANALYSIS

1 HVDC Cable Parameters

1.1 Core Conductor

The current ratings for ABB’s HVDC Light 320kV cable are given in Table A.25 and were

taken from [34]. The data is for a cable with a copper conductor installed in a moderate

climate with close spaced laying.

Table A.25: Submarine HVDC Light 320kV cable with copper conductor in a moderate climate with

close laying

The 1400mm2 cable has sufficient power rating at ±320kV for a typical connection of a

Round 3 windfarm, however, if the same cable was operated at ±300kV then the power

rating would be reduced to 956MW43

. The 1600mm2 cable is considered more appropriate.

The core conductor is typically made from strands of wire and therefore the conductor

radius, rc cannot be calculated in the normal manner using equation (A.197).

cc

Ar

(A.197)

The conductor radius of a 1600mm2 XLPE AC land cable is however given in Table A.26.

Table A.26: XLPE land cable systems

43

It is assumed that the design of a 300kV cable would be very similar to a 320kV cable and therefore the current capacity of both cables would also be very similar.

Conductor

Area

(mm²)

Voltage

rating

(kV)

Current

rating

(A)

Power

rating

(MW)

Resistance

(Ω/km)

Diameter over

cable (mm)

1400 320 1594 1020 0.0126 130

1600 320 1720 1101 0.0113 133

HVDC Light Cable Data

Conductor

Area

(mm²)

Radius of

conductor

(mm)

Insulation

thickness

(mm)

Capcitance

(uF/km)

1600 24.9 17 0.29

ABB XLPE Land Cable Systems Data

Appendix 7A

297

PSCAD assumes that the core conductors are solid and therefore the resistivity of the

copper needs to be modified to take into account the stranded nature of the conductor. This

is achieved using equation (A.198).

2

80.0113 0.0249

( / ) 2.2 10 /1 1000

R Am m

km

(A.198)

1.2 Lead Sheath

The thickness of the lead sheath for a typical single core XLPE submarine cable is

approximately 3mm according to ABB’s submarine user’s guide [115]. The electrical

resistivity of lead is given as 2.2x10-7

Ω/m [116].

1.3 Armour

The thickness of the steel armour for a typical submarine cable is assumed to be 5mm

[117]. The resistivity of the steel wire is given as 1.8x10-7

Ω/m [116] with a relative

permeability of 10 [117].

1.4 Semi-conducting layers

The latest version of PSCAD (X4) allows the conductor and insulator screens to be

represented in the cable model. In earlier versions of PSCAD the conductor and insulator

screens can be taken into account by modifying the relative permittivity of the insulator

[116]. The PSCAD default value for the screen thickness is employed in this work which is

1mm. The resistivity and relative permittivity for the semi-conducting layers cannot be set

by the user in PSCAD. It is therefore assumed that the cable parameters sub-routine is

using typical values.

1.5 Insulator

There is no official documentation regarding the insulation thickness of the HVDC Light

cables, however an ABB representative has stated that a 320kV HVDC Light cable has an

insulation thickness of about 18mm. The ABB representative also stated that using the

electrical parameters from an AC cable of similar thickness would yield similar results.

This indicates that the relative permittivity of XLPE and DC-XLPE is similar. The relative

permittivity of XLPE is given as 2.5 [114].

Appendix 7A

298

1.6 Polyethylene Inner Jacket

The inner jacket is assumed to have a thickness of 5mm [117]. The relative permittivity of

polyethylene is given as 2.3 [118].

1.7 Polypropylene Yarn Outer Cover

The outer cover thickness is assumed to be 4mm [117]. The relative permittivity of

polypropylene yarn is assumed to be very similar to that of polypropylene, which is 1.5

[118].

1.8 Horizontal Cable Distance

The positive and negative cables may be installed in separate trenches tens of meters apart

to prevent a ships anchor from damaging both cables [111, 120]. This is however

approximately 40% more expensive than installing both cables in a single trench. The use

of a single trench would result in a saving of about £40m for a 100km route [111] and by

laying both cables close together it means that their magnetic fields effectively cancel out.

Therefore, with the exception of cable routes which have lots of fishing activity, it is more

likely that the cables will be buried in a common trench. It has been assumed that the

horizontal distance between the two cables would be approximately two cable diameters

(0.25m).

1.9 Sea-return Impedance

The calculation of the sea-return impedance is complex. In order to calculate the sea-return

impedance accurately, accurate values of sea resistivity, sea-bed resistivity, sea depth,

cable burial depth and frequency are required.

The primary focus of this research is the connection of large offshore windfarms using

HVDC technology. Dogger Bank is a potential site for a Round 3 offshore windfarm which

has been leased by the Crown Estate to a consortium of developers. The site is situated

some 125-195km off shore [156], which makes HVDC transmission the only realistic

option. The sea depth of the site ranges from approximately 19 to 64 meters [156]. The sea

depth around the site is greater than the site and the sea depth will decrease closer to shore.

The sea depth along the cable route back to shore will therefore most definitely vary. In

addition the sea depth will fluctuate with the tide. The resistivity of sea water varies in the

range of 0.25-2Ω/m due to the temperature and the salinity of the water [119], which

Appendix 7A

299

makes it difficult to obtain an accurate value. Sea-bed resistivity logically speaking will

vary with the depth of the sea-bed and possibly along the cable route. Even if all the

different variables which affect the sea-return impedance for Dogger Bank could be

measured accurately, there is no known model which can factor all of them in to compute

the sea-return impedance.

Many studies which include submarine cables use the infinite sea model [117, 120], which

is based on [157] and assumes that the cable is surrounded by infinite sea in all directions.

This model therefore neglects the sea water/air interface and the sea water/seabed

interface. A new model proposed in [119] takes into account the sea water/air interface and

the sea water/seabed interface, however it assumes that the sea depth and soil resistivity are

constant and that the cable is laid on the surface of the seabed. In general this is not the

case and the cable will be buried 1-1.5 meters beneath the seabed to protect it from anchor

strikes [111, 120]. The new model is compared with the infinite sea model in [119], which

shows in general that there is little difference between the two models when the skin depth

of the sea is much less than the sea depth. If this condition is met, the results from [119]

show that the effect of soil resistivity is negligible. This indicates that the sea water/air

interface has a greater effect than the sea water/seabed interface.

The PSCAD models can only consider the sea water/air interface. PSCAD allows the user

to select whether the return impedance is solved using direct numerical integration

(Pollaczek) or an analytical approximation (Wedepohl or Saad). The approximation

method is normally accurate to within 5% of the exact solution and is much less time

consuming [158].

The effect that the sea-return impedance will have for the particular system model and

studies should also be considered. As an example, the sea-return impedance will have a

greater influence on a HVDC scheme employing a sea-return, than a HVDC scheme with a

metallic return. It is however more common to have a metallic return for environmental

reasons and due to the additional maintenance required for sea electrodes [30].

In summary the analytical approximation in PSCAD for the sea-return impedance will be

sufficient for the majority of simulation studies required for this research. The sea

resistivity and the vertical location of the cable are assumed to be of 1Ω/m and 50m below

the sea surface respectively.

Appendix 7A

300

1.10 Cable Bonding

For safety reasons cable sheaths must be bonded to ground. In the event that the cable

sheath is not bonded to ground, it could operate at a very large potential above ground.

This could make the cable sheath dangerous to touch and could cause damage to the layers

of the cable between the sheath and the ground.

In three-phase systems the main types of bonding arrangement are: single-point bonding,

solid bonding and cross bonding. Single-point bonding is where the sheath is bonded at

one end of the cable. This type of bonding removes the considerable heating effect from

circulating currents, but voltages will be induced along the length of cable, which increases

with the cable length and conductor current. Care must be taken to protect the free end of

the cable from excessive voltage, which is normally achieved using a surge voltage limiter.

The acceptable screen voltage potential normally limits the length of cable for which

single-point bonding can be used. Another disadvantage of single-point bonded systems is

that in the event of a phase to ground fault, the sheath is unable to carry the fault current.

Solid bonding is where the cable sheaths are bonded to ground at both ends of the cable.

This removes the problem of induced voltages but provides a path for circulating currents

to flow, which increases cable losses and therefore reduces the ampacity of the cable.

Cross-bonding avoids sheath circulating currents and excessive sheath voltages. This is

achieved by dividing the cable route into three equal lengths and cross-connecting the

sheaths of each phase. The voltage induced in the sheath of the cable within one section is

equal in magnitude but 120° out of phase. Therefore by cross-connecting the sheath, the

net voltage induced in each of the sheaths over the length of the cable is ideally zero.

Although cross-bonding increases the ampacity of the cable it can be expensive and is

impractical for submarine cables. For more information on bonding configurations see

[113].

In a HVDC system at steady-state there is no time-varying magnetic flux and therefore no

voltage induced in the sheath of the cable and no capacitive current. Therefore at steady-

state in a HVDC system the only current flowing in the sheath is due to the imperfections

in the cable’s insulation. A submarine HVDC cable could be single-point bonded, but this

makes little sense since there is no circulating current to affect the ampacity of the cable. In

addition for single-point bonded systems the sheath is unable to carry the fault current

Appendix 7A

301

during a phase-to-ground fault. Therefore solid-bonding is considered to be the ideal

bonding arrangement for submarine HVDC cables.

2 Cable Parameters Sensitivity

The effect of variations in the cable parameters on the cable’s transient voltage response

are assessed using the test model shown in Figure A.34.

Figure A.34: Cable parameter sensitivity test model

The cable is modelled using PSCAD’s frequency dependent phase cable model, which is

said to be the most accurate cable model commercially available [159]. The sheath and

armour in the submarine cable are usually bonded to ground at both ends of the cable

[120]. In this case the submarine cable’s sheath will be bonded to ground at both ends of

the cable through a small resistor. PSCAD gives the option to ground the last metallic layer

(armour in a submarine cable), which eliminates this layer from the impedance matrix.

Grounding the last metallic layer physically means that the layer is connected to ground

along its entire length. This is often a valid assumption for a submarine cable, where the

armour is a semi-wet construction which allows water to penetrate [117].

The sending end voltage source is initially set to 600kV and the load is modelled as a

350Ω resistor; hence the load is dissipating approximately 1GW. At 0.3s the sending end

voltage is increased to 605kV and the receiving end pole-to-pole voltage is measured. The

effect of varying the cable’s parameters on its transient voltage response is shown in the

following plots.

Increasing the thickness of the semi-conductor screen reduces the propagation velocity as

shown in Figure A.35. This is because increasing the screen thickness increases the

effective relative permittivity of the material between the core conductor and sheath.

Appendix 7A

302

Figure A.35: Effect of semi-conductor screen thickness on the receiving end voltage ; x axis – time(s)

Decreasing the relative permittivity of the insulation increases the propagation of velocity,

while variations in insulation thickness have virtually no effect as shown in Figure A.36.

Figure A.36: Effect of insulation design on the receiving end voltage ; x axis – time(s)

Increasing the effective resistance of the sheath, through decreasing the sheath thickness or

increasing the sheath resistivity, increases the attenuation of the cable as shown in Figure

A.37.

Appendix 7A

303

Figure A.37: Effect of sheath design on the receiving end voltage ; x axis – time(s)

Increasing the armour’s permeability or increasing its resistivity increases the cable’s

attenuation as displayed in Figure A.38. This is because increasing the amour’s

permeability reduces the skin depth of the armour and therefore effectively increases the

amour’s resistance for frequencies where skin depth is less than the armour thickness

[116].

Figure A.38: Effect of armour design on the receiving end voltage ; x axis – time(s)

The design of the inner jacket and outer jacket has virtually no effect on the receiving end

voltage as shown in Figure A.39 and Figure A.40 respectively.

Appendix 7A

304

Figure A.39: Effect of inner jacket design on the receiving end voltage ; x axis – time(s)

Figure A.40: Effect of outer jacket design on the receiving end voltage ; x axis – time(s)

Figure A.41 shows that the resistivity of the sea and the vertical location of the sea cable

has virtually no effect on the receiving end voltage.

Figure A.41: Effect of sea-return impedance on the receiving end voltage ; x axis – time(s)

Appendix 7A

305

The sensitivity analysis conducted in this appendix has shown that small variations in the

cable’s parameters do not have a significant effect on the cable’s transient voltage

response. It should be noted that the effect of the cable’s parameters on its electromagnetic

transient response may vary with the study. For example the effect of the sea-return

impedance has little effect for the test conducted in this chapter, but will have a greater

influence for line-to-ground faults.

3 Summary

Datasheets for physical and electrical properties of HVDC cables are not available in the

public domain. A set of parameters for a 1GW 300kV VSC-HVDC cable have therefore

been derived in this appendix based on available commercial documentation and reputable

academic papers. The estimated parameters may differ from a commercial cable and

therefore a sensitivity analysis on the cable’s parameters was conducted. The sensitivity

analysis has shown that small variations in the cable’s parameters do not have a significant

effect on the cables transient voltage response for the test conducted. This gives confidence

that the estimated parameters are sufficient to represent the dynamics of the cable for the

models in this thesis.

vsc-hvdc technology for the connection of offshore windfarms

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