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E-Cruitment SolutionsFINAL YEAR IEEE PROJECTS TITLES 2014-2015(DIGITAL SIGNAL PROCESSING)

S.NoProject Code

TITLE YEAR

No 1 ECSV001

Designing a SAR-Based All-Digital Delay-Locked Loop

With Constant Acquisition Cycles Using a Resettable Delay

Line.

2014-15

No 2 ECSV002

A 5.8-GHz Wideband TSPC Divide-by-16/17 Dual

Modulus Prescaler

2014-15

No 3 ECSV003

Runtime Thermal Management for 3-D Chip-

Multiprocessors With Hybrid SRAM/MRAM L2 Cache

2014-15

No 4 ECSV004

A 16-mW 8-Bit 1-GS/s Digital-Subranging ADC in 55-nm

CMOS

2014-15

No 5 ECSV005

A 28-nm CMOS 1 V 3.5 GS/s 6-bit DAC With Signal-

Independent Delta-I Noise DfT Scheme

2014-15

No 6 ECSV006

A GPU-Accelerated Parallel Shooting Algorithm for

Analysis of Radio Frequency and Microwave Integrated

Circuits

2014-15

No 7 ECSV007 A Low Complexity-High Throughput QC-LDPC Encoder 2014-15

No 8 ECSV008

A Method for Improving Power Grid Resilience to

Electromigration-Caused via Failures

2014-15

No 9 ECSV009

A Process-Variation Resilient Current Mode Logic With

Simultaneous Regulations for Time Constant, Voltage

Swing, Level Shifting, and DC Gain Using Time-

Reference-Based Adaptive Biasing Chain

2014-15

No 10 ECSV010 A Real-Time Motion-Feature-Extraction VLSI Employing 2014-15

CONTACT: PRAVEEN KUMAR. L (+91 – 9626110101,+91 – 9751442511)MAIL ID: [email protected], [email protected]


Digital-Pixel-Sensor-Based Parallel Architecture

No 11 ECSV011

A Synergetic Use of Bloom Filters for Error Detection and

Correction

2014-15

No 12 ECSV012

Actively Alleviate Power Gating-Induced Power/Ground

Noise Using Parasitic Capacitance of On-Chip Memories in

MPSoC

2014-15

No 13 ECSV013

Parallel and Pipelined Architectures for Cyclic Convolution

by Block Circulant Formulation Using Low-Complexity

Short-Length Algorithms

2014-15

No 14 ECSV014

An 8 bit 0.3–0.8 V 0.2–40 MS/s 2-bit/Step SAR ADC With

Successively Activated Threshold Configuring Comparators

in 40 nm CMOS

2014-15

No 15 ECSV015

An Accuracy-Adjustment Fixed-Width Booth Multiplier

Based on Multilevel Conditional Probability

2014-15

No 16 ECSV016

Analysis and Characterization of Capacitance Variation

Using Capacitance Measurement Array

2014-15

No 17 ECSV017

Analysis and Design of a Low-Voltage, Low-Power, High-

Precision, Class-AB Current-Mode Subthreshold CMOS

Sample and Hold Circuit

2014-15

No 18 ECSV018

Analysis and Modeling of a Gain-Boosted N-Path

Switched-Capacitor Bandpass Filter

2014-15

No 19 ECSV019

Compensating Modeling Overlay Errors Using the

Weighted Least-Squares Estimation

2014-15

No 20 ECSV020 Compensating Modeling Overlay Errors Using the 2014-15



Weighted Least-Squares Estimation

No 21 ECSV021

Demonstrating HW–SW Transient Error Mitigation on the

Single-Chip Cloud Computer Data Plane

2014-15

No 22 ECSV022

Design of Self-Timed Reconfigurable Controllers for

Parallel Synchronization via Wagging

2014-15

No 23 ECSV023

Design Techniques to Improve Blocker Tolerance of

Continuous-Time __ ADCs

2014-15

No 24 ECSV024

Effects of Intermittent Faults on the Reliability of a

Reduced Instruction Set Computing (RISC) Microprocessor

2014-15

No 25 ECSV025

Efficient Hardware Architecture of ηT Pairing Accelerator

Over Characteristic Three

2014-15

No 26 ECSV026

Energy Efficiency Optimization Through Codesign of the

Transmitter and Receiver in High-Speed On-Chip

Interconnects

2014-15

No 27 ECSV027

Efficient Parallel Turbo-Decoding for High-Throughput

Wireless Systems

2014-15

No 28 ECSV028

Energy-Efficient Soft-Input Soft-Output Signal Detector for

Iterative MIMO Receivers

2014-15

No 29 ECSV029

Exploiting Same Tag Bits to Improve the Reliability of the

Cache Memories

2014-15

No 30 ECSV030

Fast and Wide Range Voltage Conversion in Multisupply

Voltage Designs

2014-15

No 31 ECSV031 Fast Design Optimization Through Simple Kriging 2014-15



Metamodeling: A Sense Amplifier Case Study

No 32 ECSV032 Fast Radix-10 Multiplication Using Redundant BCD Codes 2014-15

No 33 ECSV033

Fat-Tree-Based Optical Interconnection Networks Under

Crosstalk Noise Constraint

2014-15

No 34 ECSV034

Fast Sign Detection Algorithm for the RNS Moduli Set

{2n+1 − 1, 2n − 1, 2n}

2014-15

No 35 ECSV035

Fault Tolerant Parallel Filters Based on Error Correction

Codes

2014-15

No 36 ECSV036

Finite Alphabet Iterative Decoders for LDPC Codes:

Optimization, Architecture and Analysis

2014-15

No 37 ECSV037

Fully Reused VLSI Architecture of FM0/Manchester

Encoding Using SOLS Technique for DSRC Applications

2014-15

No 38 ECSV038

Functional Constraint Extraction From Register Transfer

Level for ATPG

2014-15

No 39 ECSV039

Hardware Efficient Mixed Radix-25/16/9 FFT for LTE

Systems

2014-15

No 40 ECSV040

Level-Converting Retention Flip-Flop for Reducing

Standby Power in ZigBee SoCs

2014-15

No 41 ECSV041

Low-Complexity Hardware Design for Fast Solving LSPs

With Coordinated Polynomial Solution

2014-15

No 42 ECSV042

Low-Cost Low-Power ASIC Solution for Both DAB+ and

DAB Audio Decoding

2014-15

No 43 ECSV043 Low-Cost Low-Power ASIC Solution for Both DAB+ and 2014-15



DAB Audio Decoding

No 44 ECSV044

Low-Energy Two-Stage Algorithm for High Efficacy

Epileptic Seizure Detection

2014-15

No 45 ECSV045

Low-Power Digital Signal Processor Architecture for

Wireless Sensor Nodes

2014-15

No 46 ECSV046

Novel Structures for Cyclic Convolution Using Improved

First-Order Moment Algorithm

2014-15

No 47 ECSV047

Parallel Thermal Analysis of 3-D Integrated Circuits With

Liquid Cooling on CPU-GPU Platforms

2014-15

No 48 ECSV048

Precise VLSI Architecture for AI Based 1-D/ 2-D Daub-6

Wavelet Filter Banks With Low Adder-Count

2014-15

No 49 ECSV049 Protein Alignment Systolic Array Throughput Optimization 2014-15

No 50 ECSV050 Quaternary Logic Lookup Table in Standard CMOS 2014-15

No 51 ECSV051

Designing a SAR-Based All-Digital Delay-Locked Loop

With Constant Acquisition Cycles Using a Resettable Delay

Line.

2014-15

No 52 ECSV052

A 5.8-GHz Wideband TSPC Divide-by-16/17 Dual

Modulus Prescaler

2014-15


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