vlsi system design – eces 681

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VLSI System Design – ECES VLSI System Design – ECES 681 681 Lecture: Interconnect -1 Lecture: Interconnect -1 Prashant Bhadri Prashant Bhadri [email protected] Office: Rhodes Hall - 933C Office: Rhodes Hall - 933C Department of ECECS, College of Department of ECECS, College of Engineering, University of Engineering, University of Cincinnati Cincinnati

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VLSI System Design – ECES 681. Lecture: Interconnect -1 Prashant Bhadri [email protected] Office: Rhodes Hall - 933C Department of ECECS, College of Engineering, University of Cincinnati. Noise. What is noise? - PowerPoint PPT Presentation

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Page 1: VLSI System Design – ECES 681

VLSI System Design – VLSI System Design – ECES 681ECES 681

Lecture: Interconnect -1 Lecture: Interconnect -1

Prashant BhadriPrashant [email protected]

Office: Rhodes Hall - 933COffice: Rhodes Hall - 933C

Department of ECECS, College of Department of ECECS, College of Engineering, University of Engineering, University of

CincinnatiCincinnati

Page 2: VLSI System Design – ECES 681

Noise Noise

What is noise?What is noise?– auditory experience of sound that lacks musical quality; ;

sound of any kind (especially unintelligible or dissonant kind (especially unintelligible or dissonant sound)sound)

– Electrical noise may be said to be the introduction of any unwanted Electrical noise may be said to be the introduction of any unwanted energy, which tend to interfere with the proper reception and energy, which tend to interfere with the proper reception and reproduction of transmitted signals.reproduction of transmitted signals.

Page 3: VLSI System Design – ECES 681

External SourcesExternal Sources– AtmosphericAtmospheric– IndustrialIndustrial– ExtraterrestrialExtraterrestrial– Solar noiseSolar noise– Cosmic noiseCosmic noise

Internal Noise Internal Noise – This is the noise generated by any of the active This is the noise generated by any of the active

or passive devices found in the receiver.or passive devices found in the receiver.– Can it be a transmitter?Can it be a transmitter?– How about on chip, in a system design, board How about on chip, in a system design, board

design etcdesign etc.

Page 4: VLSI System Design – ECES 681

Chip NoiseChip Noise

Circuit noiseCircuit noise includes all the disturbances induced by the includes all the disturbances induced by the circuit’s topology.circuit’s topology.

Interconnect noiseInterconnect noise includes noise coming from capacitive or includes noise coming from capacitive or inductive coupling between interconnects.inductive coupling between interconnects.

Power supply noisePower supply noise, which refers to deviations of the supply , which refers to deviations of the supply and ground voltages from their nominal values.and ground voltages from their nominal values.

Substrate noise Substrate noise in mixed-signal integrated circuits: the charge in mixed-signal integrated circuits: the charge injected in the substrate by the logic gates during the transitions injected in the substrate by the logic gates during the transitions may interfere severely with the operation of sensitive analog may interfere severely with the operation of sensitive analog circuits.circuits.

Reference: Bartolo’s Thesis, Chapter 1

Page 5: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 6: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 7: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 8: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 9: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 10: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 11: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 12: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 13: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 14: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 15: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 16: VLSI System Design – ECES 681

Shot NoiseShot Noise

In a transistor the major contributor to noise is called shot noise.In a transistor the major contributor to noise is called shot noise. The formula for shot noise in a diode is given as:The formula for shot noise in a diode is given as:

Page 17: VLSI System Design – ECES 681

Thermal NoiseThermal Noise

The noise generated by the agitation and interaction of electrons is called thermal noise. The internal kinetic energy of a particle can be expressed through its temperature.

The kinetic energy of a body is zero at a temperature of absolute zero.

The noise generated by a resistor, for example, is proportional to its absolute temperature as well as the bandwidth over which the noise is to be measured.

Page 18: VLSI System Design – ECES 681

Any ordinary resistor not connected to a voltage source will have a voltage associated with it.

If the load is noiseless and is receiving the maximum noise power generated by our noisy resistor then:

Page 19: VLSI System Design – ECES 681

Flicker NoiseFlicker Noise

• Flicker noise dominates the noise spectrum at low frequency.Flicker noise dominates the noise spectrum at low frequency.

Reference: Noise Sources in Bulk CMOS, paper by Kent H. Lundberg

Page 20: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 21: VLSI System Design – ECES 681

Other IssuesOther Issues

Charge Injection Charge Injection Capacitive Feed-through Capacitive Feed-through

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Problem Problem Solution Solution

Charge InjectionCharge Injection

Reference: http://kabuki.eecs.berkeley.edu/~gchien/thesis/Masters/appB/appendixB.pdf

•When the switch is on, the voltage across the sampling capacitor tracks the time-varying When the switch is on, the voltage across the sampling capacitor tracks the time-varying input signal within the bandwidth. input signal within the bandwidth. •Some charges are present in the MOS channel, this is a result of forming a conducting Some charges are present in the MOS channel, this is a result of forming a conducting channel under the MOS gate. channel under the MOS gate. •When the switch is turned off, charges either flow to the input source or to the sampling When the switch is turned off, charges either flow to the input source or to the sampling capacitor and create a small voltage which . is a function of several parameters which include capacitor and create a small voltage which . is a function of several parameters which include input impedance, source impedance, clock falling edge, etc.input impedance, source impedance, clock falling edge, etc.

Page 23: VLSI System Design – ECES 681

Clock Feed-throughClock Feed-through

•When the clock voltage on the gate switches between high and low, this voltage. drop is coupled into the signal via the capacitor divider.•The clock feed-through can be corrected to the first order by using a differential signal path. •As long as the error is present on both signal inputs and the same magnitude, it can be cancelled by taking the input differentially. •This technique, once again, depends on the absolute matching of transistors.

Reference: http://kabuki.eecs.berkeley.edu/~gchien/thesis/Masters/appB/appendixB.pdf

Page 24: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 25: VLSI System Design – ECES 681

Reference: Digital System Engineering http://eeclass.stanford.edu/ee273/http://eeclass.stanford.edu/ee273/

Page 26: VLSI System Design – ECES 681

How will you remove noise during How will you remove noise during the chip design phase? the chip design phase?

Any Ideas ??Any Ideas ??

Page 27: VLSI System Design – ECES 681

Noise FigureNoise Figure

Used to assess the performance.Used to assess the performance. Additionally compares two devices in Additionally compares two devices in

order to evaluate their performance + order to evaluate their performance + compares the signal and the noise at the compares the signal and the noise at the same point to ensure that noise is not same point to ensure that noise is not excess.excess.

This term is used to describe how noisy This term is used to describe how noisy a device is. a device is.

It is a ratio of the signal to ratio at the It is a ratio of the signal to ratio at the input to the signal to noise ratio at the input to the signal to noise ratio at the output.output.

Page 28: VLSI System Design – ECES 681

Reading Assignment

1. Paper Name : Design Methodologies for Noise in Digital Integrated CircuitsAuthor: Kenneth L. ShepardDepartment of Electrical EngineeringColumbia University, New York, NY 10027Website: http://www.cisl.columbia.edu/faculty/shepard/group/dac_noise.pdf