vlsi design testing and...
TRANSCRIPT
VLSI Design Testing and Fabrication
Abdulah Alshafi
Outline
Introduction
Design Structured Design
Design Abstractions
Y-chart of Design partitioning
MIPS Architecture and Micro-architecture
Logic Design
Circuit Design
Physical Design
Design Verification
Fabrication
Introduction
Companies use hundreds of millions or sometimes billions of transistors which cost tens of millions of dollars or more to design. Talent - materials, devices, hardware designers,
software designers, mechanical engineering, chemical engineering, business (marketing, sales)
Complexity - hardware design, software design, test design, tools for fabrication and test
The greatest challenge in VLSI design is not in designing the individual transistors but rather managing the system complexity
Design
Structured Design Hierarchy
○ Partitioning a large system into multiple cores for units of functional blocks to cells which are constructed from transistors
Regularity
○ Aids the minimum number of different blocks for better design complexity management
Modularity
○ Defining interfaces between blocks to avoid unanticipated interaction
Locality
○ inputs and outputs are physically and temporally close
Design
Design Abstractions Architecture design
○ Describes the functions of the system
Microarchitecture design○ Describes how the architecture is partitioned into
registers and functional units
Logic design○ Describes how functional units are constructed
Circuit design○ Describes how transistors are used to implement
the logic
Physical design○ Describes the layout of the chip
Design Y-chart of Design partitioning
Y- chart design domains
Behavioral domain
Describes what a particular system does
Structural domain
Describes the interconnection of modules
necessary to achieve a particular behavior
Physical domain
Describes how to physically construct each
level of abstraction
MIPS Architecture
MIPS (Microprocessor without Interlocked Pipeline Stages) is a reduce instruction set computer (RISC) developed by MIPS Computer Systems (now MIPS Technologies).*
MIPS is a 32-bit architecture with 32 registers Consider 8-bit subset using 8-bit datapath
Only implement 8 registers ($0 - $7)
$0 hardwired to 00000000
8-bit program counter
The MIPS also have later versions were 64-bit. *
*//en.wikipedia.org/wiki/MIPS_architecture
*//www.cs.cornell.edu/courses/cs3410/2008fa/MIPS_Vol1.pdf
Instruction set
MIPS32 Architecture templates
MIPS32 Program C code for Fibonacci program
MIPS32 Program Translated to assembly language
MIPS32 Program Translated to machine language
MIPS32 Microarchitecture
MIPS32 Controller FSM state
transition diagram
Logic Design
Top-Level interfaces
Block diagrams
Hierarchy
Hardware Description languages
Top-Level interfaces
Block Diagrams Top-level MIPS block diagram
Block Diagram
8-bit datapath viewed as
Wordslice
Bitslice
Hierarchy
Hardware Description Languages (HDL)
Two most popular HDLs
Verilog
VHDL
Structural HDL
Specifies how a cell is composed of other
cells or primitive gates and transistors
Behavioral HDL
Specifies what a cell does
Circuit Design
Physical Design
Floorplanning
Standard Cells
Pitch matching
Slice Plans
Illustrates the ordering of wordslice and the
allocation of wiring each bitslice
Arrays
Area Estimation
Floorplanning
Actual chip layout
Standard Cells
Standard Cells
Pitch Matching
Pitch Matching MIPS Datapath
Slice Plans
Arrays
Area Estimation Need area estimates to make floorplan
Compare to another block you already
designed
Or estimate from transistor counts
Budget room for large wiring tracks
Your mileage may vary!
Design Verification
Fabrication,
Packaging & Testing