Thyristors

Vitezslav Benda

Dept. of Electrotechnology

Czech Technical University in Prague

Czech Republic

A

K

G

A

p+

n+

n-

p

K G

P1

N1

P2

N2

J2

J3

J1

Thyristors - family of switching devices consisting of four layers

of semiconductor of alternating dopant type (pnpn).

Three-terminal thyristor switches (triode thyristors)

are the most important members of this family.

• The anode A is negatively biased with respect to the cathode, K, I

The three operating states of a thyristor structure

• The anode A is negatively biased with respect to the cathode, K,

- a high impedance state called the reverse blocking state (VR, IR)

• The anode A is positively biased with respect to the cathode K

- a high impedance state = the forward blocking state (VD, ID)

- a low impedance state = the forward conducting state (VT, IT)

V

IT

VTI

R

IH

IL

VBR

(b)

p+

n+

n-

p

K

A

G

P1

N

1

P2

N2

J2

J3

J1

(-ve)

(+ve)

Space-charge

layer

(a)

p+

n+

n-

p

K

A

G

P1

N

1

P2

N2

J2

J3

J1

(+ve)

(-ve)

Space-c

harge

layer

reverse blocking state

forward blocking state

The (Reverse) Blocking State

1) avalanche breakdown at junction J1

D1

2

BR0rBR

2eN

EV

εε=

2) breakdown a result of punch-through

0r

2

ND1PT

2 εε

weNV =

wN is the thickness of the N1-region

The breakdown voltage is maximum when

VD(BO) ≈ VR(BR)

AThe breakdown voltage is maximum when

N

BR0rD

ew

EN

εε=

The P2N1P1 structure can be regarded as that of a transistor

connected in common-emitter configuration

κ

γ

1

p

R

p

BRR(BR)

cosh

~

1

−=

Lw

VV

Surface Profiles for High Breakdown Voltages

(a) double negative

bevelling

p

n

p

(b) positive - negative

bevelling

p

n

p

At large-area devices of a circular shape, surface bevelling is often used. The surface is

mechanically beveled, etched, and passivated with silicon rubber

For VDRM < 3500 V, positive-negative

or double positive bevelling are often used

(c) double posiive

bevelling

p

n

p

(d) double posiive

bevelling

p

n

p

For high voltages, double positive bevelling

is mostly used

At devices of a rectangular shape, the guard ring, filed plate and SIPOS techniques

are used, too.

The Two-Transistor Model for Thyristor Switching

K

N1

P2

N2

A

P1

G

A

P1

K

G

N1

P2

N2

P2

N1

A

G

K

IA

IC1

IC2

IK

(a) (b) (c)

In the case of open gate (I = 0)

C2C1E2E1KA IIIIII +====

( )C01E11C1 IIMI += α ( )C02E22C2 IIMI += α

( )21

C0A

+-1 ααM

MII = ( ) 121 =+ααM

( )21

C0G2A

1 αα

α

+−

+=

III

In the case of open gate (IG = 0)

Collector currents of the partial transistor structures

The anode current is then Thyristor turns on ( ∞→AI ) if

For IG > 0

Supposing VD << VBR, M = 1, and

P2

K

A

RSH

P2

P1

N1

N1

N2

(a)

G

A

p+

n+

n-

p

p+

K G

P1

N1

P2

N2

J1

J2

J3

(b)

Space-charge layer

To decrease temperature dependence of VD(BO), it is necessary to decrease injection

efficiency of the cathode emitter by cathode shorts

1eff21 ≥+αα

2

3

32eff2 ααα <

+=

SHJ

J

II

I

Since VJ3 = ISH RSH, this becomes

The turn-on condition is now

Critical dV/dt

( )t

V

V

CVCVC

tJ

d

d

d

d

d

d D

D

j

DjDjq

+==

2(r1-r

2)

2r1

If the blocking voltage increases with the rate dVD/dt,

the displacement current density

It has an effect similar to a positive gate current, therefore

a cathode short pattern is generally used

The displacement current flows radially to a short with a density

( ) ( )22

1qq

1

d2 rrJrrJrIr

r−== ∫ ππ

The radial potential gradient is: ( )

P2d

d

rw

rI

r

V

π

ρ=

0 5 10 15

100

10

102

F

r

r12

2

2

−−=

2

1

2

2

2

1 ln2114

1

r

r

r

rF

Fr

VwJ

2

2

EPqcrit

2

ρ=

The voltage between r1 and r2, can be expressed as

∫ ≤

==

2

1E

2

1

P

2

2q

SH2

dd

dr

rV

r

rF

w

rJr

r

VV

ρ

VE is a voltage causing the direct injection from n+p junction

that occurs at a critical current density

crit

DDqcritq

dt

dV

dt

dVJJ

=⇔=

The Forward Conducting State

p+ p n n+

n+p+i

carrierconcentration

p

n

n

pn = p

p

VJp+

VJn+

Vw

In the two transistor model, at least one of the partial transistor

structures must be saturated when the thyristor is in the on-state

0T

2

T

1 <+JJ ∂

∂α

∂

∂α

The inner layers are flooded with excess carriers due to high injection

from both n+ and p+ emitters (electron-hole plasma)

The on-state characteristic of a thyristor is similar to a forward diode

characteristic

mJw

V

∝ cosh

INPT VVVV ++=

potential

0

VF V

Jp+

VJn+

Vw

x

0 x-w/2 w/2

ww

p+w

n+

m

a

I JL

wV

∝

2cosh

Je

kTKVV ln0NP

α+=+

It complicates

the VDRM – ITAV trade-of

J1

J2

J3

n+

p

n

p+

I II III

Space-chargeregion

K

A

p+ n p n+

J1

J2

J3

A K

V

p

p

off

on

The turn-on condition 0T

2

T

1 <+JJ ∂

∂α

∂

∂α

is valid for current densities JT > JM

The minimum current density JM is in order 10 A/cm2.

At large-area devices, only a portion AT of the total area

M

TT

J

IA = is turned-on (electron-hole plasma)

Some differences from a diode-like characteristics

can be observed at lower currents

Transient Processes during Turn-OnIG

t0

IG0

0.1 IG0

VD

0

t

VD0

0.1

VD0

0.9

VD0

td

tf

tgt

IT

n

2

p

p

2

nd

22 D

w

D

wt +>

−=

GTG

Gd ln

II

It τ

fdgt ttt +=

When a gate impuls is aplied, a change of characteristics can be

observed with a delay

The delay time is connected with a minimum triggering

charge QGT. Therefore, the td depends on the gate current

The tur-on time

The fall time tf depends on the dIT/dt in the circuit

0t

d

d

I

tT

vs → 0 MJJ →⇔

BJAvs += ln

The original turn-on region is close to the gate contact

and it spreads due to a lateral velocity

The static on-state chracteristic is reached for

Critical di/dt

( ) crit

t

WttA

AtP

dAW ≤= ∫ d)(

1 0

00

V

K GAuxiliary

cathode

At high dIT/dt…. At the beginning an area A0 is turned-on.

Energy dissipated in the turn-on area

A large A0 is necessary ⇔ a large gate signal is necessary for

High di/dt operations

The amplifying gate construction

For W > Wcrit the thermal breakdown occurs ⇒ dIT/dt < (dIT/dt)crit

A

K

G

A

p+

n+

n-

p p+

P1

N1

P2

N2

J1

J2

J3 n

+

cathode

2

1

Transient Processes during Turn-off

1. Turn-off when the on-state current decreases below the holding current

2. Turn-off by circuit commutation

3. Turn-off brought about by the application of a negative gate voltage.

The minimum on-state current density JM (1 A/cm2< JM < 100 A/cm2)

is a function of layer thickness, carrier lifetime and emitter efficiency

Turn-off by a Decrease of Forward Current.

0T

2

T

1 <+JJ ∂

∂α

∂

∂αFor on-state current density,JT

Turning thyristor off, is is necessary to remove charge of excess carriers stored in inner layers

(electro-hole plasma) to restore the space charge region at the junction J2 (the blocking state). It

could be realised by

is a function of layer thickness, carrier lifetime and emitter efficiency

and temperature (a dependence on the cathode shunt density represented

by the geometric factor F is demonstrated in figure)

If the on-state current decreases, the turned-on area

decreases, so that the current density remains at JM.

The holding current, IH, depends on the rate of decrease

of the on-state current, the minimum holding current IH0 is for

very slow decrease of IT.

If the geometric factor, F, can be reduced rapidly, by making emitter shorts

electronically, it is possible to turn the thyristor off increasing the holding current. This

principle is used in the turn-off process of the MOS-Controlled Thyristor

Thyristor Turn-off Using Circuit Commutation

With a dc-supply, turn-off requires an auxiliary source that is

able to commutate the anode current when it is applied to the

thyristor for a short time.

The excess carrier distribution in a thyristor in the on-state is

similar to that in a forward biased p+nn+ diode. Therefore,

the reverse recovery takes place in a similar way. At the storage

time ts, a charge Q1 remains in inner layers of thyristor structure.

The turn-off time tq is the interval from the instant that the

falling anode current crosses zero until the moment that

the anode voltage again becomes positive.

time ts, a charge Q1 remains in inner layers of thyristor structure.

The thyristor turns off successfully only if the excess free

charge remaining in the device after tq is less than some

critical value, Qcr.

≈

+=

cr

1eff

cr

1effsq lnln

Q

Q

Q

Qtt ττ

Q1, depends on the circuit commutation conditions (diR/dt and VR)

The critical charge, Qcrit, decreases with increasing dVD/dt at recovery

and temperature.

The critical charge Qcrit decreases with both dVD/dt

and temperature

A short carrier lifetime is necessary

for obtaining a short turn-off time tq.

From that follows a complicated trade-off

between VDRM, ITAV, and tq

iL v

L

L

SCR2

SCR1

C

C

Basic inverter circuits

A fast reverse blocking thyristor is necessary

The solution with antiparallel diodes involves the use

of assymetrical thyristors with the PT construction (ASCR)

or with an integrated antiparallel diode

SCR2

SCR1

D2 D

1

D3

Load

CRCT- Reverse Conducting Thyristor

A

n+

p+

n-

p

K G

n

Diode

Section s

Thyristor

Section

p+

n+

Gate Turn-Off

In the two-transistor analogy, the anode current can be expressed as:

( ) 2GA1A2K1AA αααα IIIIII ++=+=

GQGA III −=⇔= 0

121

2

GQ

AoffM

−+==

αα

α

I

IGThe maximum available turn off gain

The Goff has a maximum when α2 is high and α1 is low

n+

KG G

n+

KGG

Applying a negative gate gurrent

p

n-

p+

n+

A

n+

p

n

p

n+

A

Reverse blocking (NPT) GTO

A large N1-base thickness and a low carrier

lifetime to keep α1 low

Assymetrical (PT) GTO

α1 decreased by the use of anode shorts

the lateral resistance of the p-base layer RG

the breakdown voltage of junction J3, VG(BR),

G

G(BR)

GM

4

R

VI =The maximum allowable negative gate current is limited by

( ) G21

G(BR)2

G

G(BR)offM

TGQM1

44

R

V

R

VGI

−+==

αα

α

The high-power GTO must be constructed as an integration of many

In-parallel connected segments. The maximum on state current ITGQM

depends on number of segmentsnITGQM ∝

VG

t0

VG(BR)

t

IG

0

IGRM

IT

IT0

0.9 IT0

The stored charge period – a charge of excess carriers from

the p-base must be removedAnewtIQ avPgsGP ==

( ) ( )Aww

I

Aww

Qn

NP

HA

NP

onav

+=

+=

τ

( ) ( )NP

PoffH

NP

P

G

AH

G

Pgs

ww

wG

ww

w

I

I

I

Qt

+=

+== ττ

the storage time tgs

Goff = IA/IG < GoffM

This means operating the thyristor

at a lower turn-off gain G , the gate signals

t

Tail

current

0.9 IT0

0

0.1 IT0

tgs t

gf

tgqV

A

0t

Vs

Resistive loadEffect of snubber

at a lower turn-off gain Goff, the gate signals

should be steep

dtdI

It

G

K

/gs ∝

Cs

Rs

Ds

Courses of current and voltage during

the turn-on process depend on the load.

For a resistive load

To decrease loses during turn-on,

snubbers are often used

( ) D

sr0

NP

Hf

282.1

eN

V

wwtg

εετ

+=

Difference in storage time of GTO segments with

different carrier lifetime

NP

P

G

AHgs

ww

w

I

It

+∆=∆ τ

All the current concentrates

in the with the longest carrier lifetime

⇒ a possibility of destruction

0

20

40

60

80

100

120

0 1 2 3 4

irradiation dose (10-12cm -2)

ca

rrie

r life

tim

e (

s)

Maximum

Minimum

NP

P

G

AHgs

ww

w

I

It

+∆=∆ τTo decrease differences in the storage time ∆tgs

a higher negative gate impulse may be applied

For IG > IA, it is possible to obtain situation when all segments turn-off at the same time and

the cathode current is not concentrated only for a few segments in the end of the turn-off

GCT - Gate Commutated Thyristors – the case construction with a parasitic inductance in

the gate electrode below 5 nH

IGCT – Integrated Gate Commutated Thyristor

– integration of a GCT with a source of

gate signals involving dIG/dt > 1000 A/µs

Absorptiondepth

(microns)

1

10

100

Wavelength(microns)

0.6 0.7 0.8 0.9 1.00.5 1.1

KKAK

2

LightGuide

AK2

AK1

AK1

LTT – Light Triggering Thyristor

At the application of light (hν > Wg),

optical generation of electron-hole pairs occurs.

The effect of the optical carrier generation is similar

to that of the electron injection from the n+ emitter

following the application of a positive gate voltage.

A

n-

p

p+

n+n+

V

r

Optical power

density

0

To obtain satisfactory turn-on with a reasonably

low optical power, while on the other hand high

values of the parameters, (dVD/dt)crit and (dIT/dt)crit,

are required, the structure and layout of the optical

gate region is very important