visuals 16.2 - cut-and-paste organic fet customized ics

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Cut-and-Paste Organic FET Customized ICs for Application to Artificial Skin

Takao Someya, Hiroshi Kawaguchi, and Takayasu Sakurai

University of Tokyo, Tokyo, Japan

#16.2

© 2004 IEEE International Solid-State Circuits Conference © 2004 IEEE

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Outline

•Introduction & motivation

•Manufacturing process

•Circuit design

•Results & discussion

•Summary© 2004 IEEE International Solid-State Circuits Conference © 2004 IEEE

3

Introduction

•Attributes of organic transistors

–Mechanically flexible

–Large area manufacturability

–Potentially low cost manufacturing

Pentacene

Base film

Drain

SourceGate

Organic semiconductorGate dielectric

> 1 cm2/Vs

(Low molecule)


4

Motivation•Two driving applications of organic FETs

RF ID tags and displays

•Our proposal: flexible, large-area sensors Organic FET + pressure sensor = artificial skin


5

Tactile sensors for robots

• A sensitive skin with 1,000~1M pressure sensors

requires flexible, large-area switches.

Static drivers(Existing devices)

Active matrix drivers(Present study)

DensityResolution

Pressure sensors


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Manufacturing process



•Circuit design


•Summary


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Picture of artificial skin

16 x 16 FET matrix

Rowdecoders

Column selectorsThrough-hole sheet

Pressure sensitive rubbery sheet

Top electrode


8

D

G

S

G

G

PEN

Manufacturing process (I)

Gate5nm Cr/ 100 nm Au

Semiconductor50 nm pentacene

Source & Drain60 nm Au

Gate insulator500 nm polyimideSpin coating

1.

2.

3.

4.


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Manufacturing process (II)

The device is manufactured with laminating four different sheets.

7. Top electrode PolyimideCu

6. Rubber sheet

5. Through holes PolyimideCu/Ni/Au

4. FET sheet

D S

GPEN

PolyimideAu


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One sensor cell (Sencel)

FET + Sensor = Sencel

S D

G

VWL

VDD

VBL

Polyimide (Gate dielectric)

via Rubber

FET

SensorPressed

VDD

Sensor

AccessFETVWL

VBL


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Sensor cell (Sencel)

sensor

pentacene

GS

SD

16 x 16 FET matrix4 x 4 cm2

One sencel2.54 x 2.54 mm2

VDD

Sensor

AccessFETVWL

VBL

VBL

VWL


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Via holes by laser drilling machine

10-10

10-8

10-6

10-4

10-2

100

0 10 20 30Co

nd

uct

ance

[

/ Ω]

Laser power [mJ]Fig.2 / Iba et al.

2.46μm2.46μm2.5 μm

φ90 μm via holesCO2 laser

Yield > 99% /pulse(R < 10Ω)

Laser via

Base film

Insulator

Au


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Circuit design



•Circuit design


•Summary


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Concept

Roll-to-roll

Cutting

LargeSmall

Body

Fingers


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Cut-and-paste feature(scalable circuit concept)

16x16 FET matrix

Rowdecoders

Column selectors

VCO

Registerfiles

1.2mm

16x16matrixR

ow

dec

od

ers

Columnselectors


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Circuit scalability (row decoder)

Sencels

1 out of 16 rowdecoders

R0R0R1R1R2R2R3R3 φRVDD GND D0 D1 D2 D3

1 out of 4 rowdecoders

R0R0R1R1 φRVDD GND D0 D1 D2 D3

Sencels

Word line

Word line


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Circuit scalability (column selector)

GND

C0

D0,D1,D2,D3

φCVDDC0

GNDD0,D1,D2,D3

φC

8 sencels

4 sencels

4 out of 8 column

selectors

4 out of 4 column

selectors


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Connecting tape to paste

• Connects sheet to sheet

• PET film with 0.1-inch pitch Au lines

• Silver paste

Connectingtapes

2.54mm

2.54

mm


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Cut-and-paste feature (16x16 sencels)

16x16 FET matrix

Rowdecoders

Column selectors

VCO

Registerfiles

1.2mm

16x16matrixR

ow

dec

od

ers

Columnselectors


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Cut-and-paste feature (convex shape)

Convex sencel matrix

Rowdecoders

Column selectors

4x4matrix

VCO

Registerfiles

1.2mm

ConvexmatrixR

ow

dec

od

ers

Columnselectors


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Cut-and-paste feature (4x4 sencels)

VCO4x4

sencelsRowdecoders

Column selectors

4x4 FET matrix

Rowdecoders


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Results & discussion



•Circuit design


•Summary


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VDS-IDS characteristics

L=100µmW=2mm

-40 -30 -20 -10 00

10

20

30

VDS [V]

I DS

[µA

]

VGS=-40V

-30V

-20V

-10V

200k

200k

MeasurementSimulation

S

D

G

•Match level 1 SPICE MOS model with 200kΩ


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Measured & simulated waveforms

23ms

Decoder-out (word line) Bit-out (DX)(bit line)

40V 20V

No pressure

Withpressure

φR, φC

Addr. 40V

50V

-20V

40VDecoder-out

&bit-out (Dx)

• Access time: 23ms

• Cycle time: 30ms

0

Time [ms]

Vo

ltag

e [V

]

40

20V10V

21ms

3msL=100µmL=25µm

Sheet scan:30ms x 16 x 4 = 2s @L=100µm4ms x 16 x 4 = 0.25s @L=25µm


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IDS dependence on pressureI D

S[µ

A]

VGS [V]100-10-20-30-40 20

VDS=-40V

No pressure

30

20

10

0

• Resistance changes between 10MΩ (off) & 1kΩ(on).

VDD

Sensor

AccessFETVWL

VBL

With pressure (2N)


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Bit-out when pressed

•Pressed sencel pulls bit line up to VDD.B

it l

ine

volt

age

[V]

403020100

0 10 20 30 40Position [mm]

2N


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Access time dependence on VDD

• Access time reduces to half @100V VDD.• Simulation agrees with measurement.A

cces

s ti

me

[ms]

0 20 40 60 80 1000

10

20

30

VDD [V]

Measurement

Level 1 SPICE modelsimulation


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-300

-200

-100

0-40-20020

I DS

[μA

]

VGS [V]

r =5010

(mm)

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Bending test

r

G D

S

Tensile strain

L=50μm, W=16mmVDS= - 40V

S D

G


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Remaining issues

• Enhancing reliability and stability– Current lifetime: days months, years

Encapsulation

– Initial transistor yield > 99% for tinsulator=500 nm

• Lowering operation voltage– Currently 40V <10V

Shorter L

Thinner insulator

High-k


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Summary

• An electronic artificial skin system– A large-area pressure sensor matrix

– Column selectors and row decoders

– Laser via process for circuit implementation

• Cut-and-paste customization

• Mechanical flexibility down to r=5 mm

• 23 ms delay for read-out© 2004 IEEE International Solid-State Circuits Conference © 2004 IEEE

visuals 16.2 - cut-and-paste organic fet customized ics

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