KREST TECHNOLOGIESEMBEDDED SYSTEM TRAINING

8051 MATERIAL

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INDEX

S.No TOPIC Page No.

1. 8051 Microcontroller Introduction 03 to 17

2. Timers & Counters 18 to 22

3. Serial Communication 23 to 28

4. ADC 29 to 38

5. Interrupts 39 to 43

6. DC Motor 44 to 49

7. Stepper Motor 50 to 68

6. Light Emitting Diode (LED) 69 to 73

7. Liquid Crystal Display (LCD) 74 to 81

8. Power Supply 82 to 84

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1. MICROCONTROLLER

Introduction:

A Micro controller consists of a powerful CPU tightly coupled with memory

RAM, ROM or EPROM), various I / O features such as Serial ports, Parallel Ports,

Timer/Counters, Interrupt Controller, Data Acquisition interfaces-Analog to Digital

Converter (ADC), Digital to Analog Converter (ADC), everything integrated onto a

single Silicon Chip.

It does not mean that any micro controller should have all the above said features

on chip, Depending on the need and area of application for which it is designed, The

ON-CHIP features present in it may or may not include all the individual section said

above.

Any microcomputer system requires memory to store a sequence of instructions

making up a program, parallel port or serial port for communicating with an external

system, timer / counter for control purposes like generating time delays, Baud rate for

the serial port, apart from the controlling unit called the Central Processing Unit

Advantages of microcontrollers:

1. If a system is developed with a microprocessor, the designer has to go for external

memory such as RAM, ROM or EPROM and peripherals and hence the size of the PCB

will be large enough to hold all the required peripherals. But, the micro controller has

got all these peripheral facilities on a single chip so development of a similar system with

a micro controller reduces PCB size and cost of the design.

One of the major differences between a micro controller and a microprocessor is that a

controller often deals with bits , not bytes as in the real world application, for example

switch contacts can only be open or close, indicators should be lit or dark and motors can

be either turned on or off and so forth.

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INTRODUCTION TO ATMEL MICROCONTROLLERSERIES: 89C51 Family, TECHNOLOGY: CMOS

The major Features of 8-bit Micro controller ATMEL 89C51:

8 Bit CPU optimized for control applications

Extensive Boolean processing (Single - bit Logic ) Capabilities.

On - Chip Flash Program Memory

On - Chip Data RAM

Bi-directional and Individually Addressable I/O Lines

Multiple 16-Bit Timer/Counters

Full Duplex UART

Multiple Source / Vector / Priority Interrupt Structure

On - Chip Oscillator and Clock circuitry.

On - Chip EEPROM

SPI Serial Bus Interface

Watch Dog Timer

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8051 BLOCK DIAGRAM:

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Fig. 6.2.1 Architecture of AT89C51

PIN CONFIGURATION:

Pin Diagram of AT89C51

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Pin Description

VCC Supply voltage.

GND Ground.

Port 0

Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink

eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high

impedance inputs. Port 0 may also be configured to be the multiplexed low order

address/data bus during accesses to external program and data memory. In this mode P0

has internal pull-ups. Port 0 also receives the code bytes during Flash programming, and

outputs the code bytes during program verification. External pull-ups are required during

program verification.

Port 1

Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers

can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high

by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are

externally being pulled low will source current (IIL) because of the internal pull-ups.

Port 1 also receives the low-order address bytes during Flash programming and

verification.

Port 2

Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers

can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high

by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are

externally being pulled low will source current (IIL) because of the internal pull-ups.

Port 2 emits the high-order address byte during fetches from external program memory

and during accesses to external data memory that use 16-bit addresses (MOVX @

DPTR). In this application it uses strong internal pull-ups. When emitting 1s. During

accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits

the contents of the P2 Special Function Register. Port 2 also receives the high-order

address bits and some control signals during Flash programming and verification.

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Port 3

Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers

can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high

by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are

externally being pulled low will source current (IIL) because of the pull-ups. Port 3 also

serves the functions of various special features of the AT89C51 as listed below:

Alternate Functions of PORT3

Port 3 also receives some control signals for Flash programming and verification.

Port Loading and Interfacing

The output buffers of Ports 1, 2, and 3 can each drive 4 LS TTLinputs. These ports on

NMOS versions can be driven in a normal manner by a TTL or NMOS circuit. Both

NMOS and CMOS pins can be driven by open-collector and open-drain outputs, but note

that0-to-1 transitions will not be fast. In he NMOS device, if the pin is driven by an open-

collector output, a 0-to-1 transition will have to be driven by the relatively weak

depletion mode FET in the CMOS device, an input 0turns off pull-up pFET3, leaving

only the very weak pull-up pFET2 to drive the transition. Port 0 output buffers can each

drive 8 LS TTL inputs. They do, however, require external pull-ups to drive NMOS

inputs, except when being used as the ADDRESS/DATA bus for external memory.

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RST

Reset input. A high on this pin for two machine cycles while the oscillator is running

resets the device.

ALE/PROG

Address Latch Enable output pulse for latching the low byte of the address during

accesses to external memory. This pin is also the program pulse input (PROG) during

Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the

oscillator frequency, and may be used for external timing or clocking purposes. Note,

however, that one ALE pulse is skipped during each access to external Data Memory. If

desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit

set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is

weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in

external execution mode.

PSEN

Program Store Enable is the read strobe to external program memory. When the

AT89C51 is executing code from external program memory, PSEN is activated twice

each machine cycle, except that two PSEN activations are skipped during each access to

external data memory.

EA/VPP

External Access Enable. EA must be strapped to GND in order to enable the device to

fetch code from external program memory locations starting at 0000H up to FFFFH.

Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.

EA should be strapped to VCC for internal program executions. This pin also receives

the 12-volt programming enable voltage (VPP) during Flash programming, for parts that

require 12-volt VPP.

XTAL1

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2

Output from the inverting oscillator amplifier.

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Oscillator Characteristics

XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier,

which can be configured for use as an on-chip oscillator, as shown in Figure 21. Either a

quartz crystal or ceramic resonator may be used. To drive the device from an external

clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Fig

6.2.3. There are no requirements on the duty cycle of the external clock signal, since the

input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum

and maximum voltage high and low time specifications must be observed.

Idle Mode

In idle mode, the CPU puts itself to sleep while all the on chip peripherals remain active.

The mode is invoked by software. The content of the on-chip RAM and all the special

functions registers remain unchanged during this mode. The idle mode can be terminated

by any enabled interrupt or by a hardware reset. It should be noted that when idle is

terminated by a hard ware reset, the device normally resumes program execution, from

where it left off, up to two machine cycles before the internal reset algorithm takes

control. On-chip hardware inhibits access to internal RAM in this event, but access to the

port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin

when Idle is terminated by reset, the instruction following the one that invokes Idle

should not be one that writes to a port pin or to external memory.

Fig 6.2.3 External Clock Drive Configuration

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Tab 6.2.2 Status of External Pins

Power Down Mode

In the power down mode the oscillator is stopped, and the instruction that invokes

power down is the last instruction executed. The on-chip RAM and Special Function

Registers retain their values until the power down mode is terminated. The only exit

from power down is a hardware reset. Reset redefines the SFRs but does not change the

on-chip RAM. The reset should not be activated before VCC is restored to its normal

operating level and must be held active long enough to allow the oscillator to restart and

stabilize.

Power on reset:

When power is turned on, the circuit holds the RST pin high for an amount of

time that depends on the capacitor value and the rate at which it charges.

To ensure a valid reset, the RST pin must be held high long enough to allow the

oscillator to start up plus two machine cycles. On power up, Vcc should rise within

approximately 10ms. The oscillator start-up time depends on the oscillator frequency. For

a 10 MHz crystal, the start-up time is typically 1ms.With the given circuit, reducing Vcc

quickly to 0 causes the RST pin voltage to momentarily fall below 0V. How ever, this

voltage is internally l limited and will not harm the device.

Memory organization:

* Logical Separation of Program and Data Memory *

All Atmel Flash micro controllers have separate address spaces for program and

Data memory as shown in Fig 1.The logical separation of program and data memory

allows the data memory to be accessed by 8 bit addresses. Which can be more quickly

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stored and manipulated by an 8 bit CPU Nevertheless 16 Bit data memory addresses

can also be generated through the DPTR register.

Program memory can only be read. There can be up to 64K bytes of directly

addressable program memory. The read strobe for external program memory is the

Program Store Enable Signal (PSEN) Data memory occupies a separate address space

from program memory. Up to 64K bytes of external memory can be directly addressed in

the external data memory space. The CPU generates read and write signals, RD and Wr,

during external data memory accesses. External program memory and external data

memory can be combined by applying the RD and PSEN signals to the inputs of AND

gate and using the output of the fate as the read strobe to the external program/data

memory.

Program memory:

Fig 1.1 shows the map of the lower part of the program memory, after reset, the

CPU begins execution from location 0000h. As shown in Fig 1.1 each interrupt is

assigned a fixed location in program memory. The interrupt causes the CPU to jump to

that location, where it executes the service routine. External Interrupt 0 for example, is

assigned to location 0003h. If external Interrupt 0 is used, its service routine must begin

at location 0003h. If the I interrupt in not used its service location is available as general-

purpose program memory.

Fig.2: Program Memory.

0033h

Timer 2 002Bh

Serial Port 0023h

Timer 1 001Bh

External 8 Bytes

Interrupt 1 0013h

Timer 0 000Bh

External

Interrupt 0 0003h

Reset 0000h

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The interrupt service locations are spaced at 8 byte intervals 0003h for External

interrupt 0, 000Bh for Timer 0, 0013h for External interrupt 1,001Bh for Timer1, and so

on. If an Interrupt service routine is short enough (as is often the case in control

applications) it can reside entirely within that 8-byte interval. Longer service routines can

use a jump instruction to skip over subsequent interrupt locations. If other interrupts are

in use. The lowest addresses of program memory can be either in the on-chip Flash or in

an external memory. To make this selection, strap the External Access (EA) pin to either

Vcc or GND. For example, in the AT89C51 with 4K bytes of on-chip Flash, if the EA pin

is strapped to Vcc, program fetches to addresses 0000h through 0FFFh are directed to

internal Flash. Program fetches to addresses 1000h through FFFFh are directed to

external memory.

Data memory:

The Internal Data memory is dived into three blocks namely, Refer Fig (1.1.1)

The lower 128 Bytes of Internal RAM.

The Upper 128 Bytes of Internal RAM.

Special Function Register.

FFh Accessible Accessible Upper By Indirect By Direct 128 Addressing Addressing

80h only.79h

Accessible Special Function Register Lower By Direct 128 and Indirect (Ports , Status and Control Bits)

00h Addressing

Internal Data memory Addresses are always 1 byte wide, which implies an

address space of only 256 bytes. However, the addressing modes for internal RAM can in

fact accommodate 384 bytes. Direct addresses higher than 7Fh access one memory space,

and indirect addresses higher than 7Fh access a different Memory Space.

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The lowest 32 bytes are grouped into 4 banks of 8 registers. Program instructions call out

these registers as R0 through R7. Two bits in the Program Status Word (PSW) Select,

which register bank, is in use. This architecture allows more efficient use of code space,

since register instructions are shorter than instructions that use direct addressing.

The next 16-bytes above the register banks form a block of bit addressable

memory space. The micro controller instruction set includes a wide selection of single -

bit instructions and this instruction can directly address the 128 bytes in this area. These

bit addresses are 00h through 7Fh. either direct or indirect addressing can access all of the

bytes in lower 128 bytes. Indirect addressing can only access the upper 128. The upper

128 bytes of RAM are only in the devices with 256 bytes of RAM.

The Special Function Register includes Port latches, timers, peripheral controls

etc., direct addressing can only access these register. In general, all Atmel micro

controllers have the same SFRs at the same addresses in SFR space as the AT89C51 and

other compatible micro controllers. However, upgrades to the AT89C51 have additional

SFRs. Sixteen addresses in SFR space are both byte and bit Addressable. The bit

Addressable SFRs are those whose address ends in 000B. The bit addresses in this area

are 80h through FFh.

FFFFh FFFFh

External

External

FFh

EA = 0 EA = 1

External External 0000h

-0000- 00h

PSEN RD WR

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Fig.1.1 89C51 MEMORY STRUCTURE

ADDRESSING MODES:

Direct addressing:

In direct addressing, the operand specified by an 8-bit address field in the

instruction. Only internal data RAM and SFR’s can be directly addressed.

Indirect addressing:

In Indirect addressing, the instruction specifies a register that contains the address

of the operand. Both internal and external RAM can indirectly address.

The address register for 8-bit addresses can be either the Stack Pointer or R0 or

R1 of the selected register Bank. The address register for 16-bit addresses can be only the

16-bit data pointer register, DPTR.

Indexed addressing:

Program memory can only be accessed via indexed addressing this addressing

mode is intended for reading look-up tables in program memory. A 16 bit base register

(Either DPTR or the Program Counter) points to the base of the table, and the

accumulator is set up with the table entry number. Adding the Accumulator data to the

base pointer forms the address of the table entry in program memory.

Another type of indexed addressing is used in the“ case jump ” instructions. In

this case the destination address of a jump instruction is computed as the sum of the base

pointer and the Accumulator data.

Register instruction:

The register banks, which contains registers R0 through R7, can be accessed by

instructions whose opcodes carry a 3-bit register specification. Instructions that access the

registers this way make efficient use of code, since this mode eliminates an address byte.

When the instruction is executed, one of four banks is selected at execution time by the

row bank select bits in PSW.

Register - specific instruction:

Some Instructions are specifiec to a certain register. For example some instruction

always operates on the Accumulator, so no address byte is needed to point OT ir. Inthese

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cases, the opcode itself points to the correct register. Instruction that regger to

Accumulator as A assemble as Accumulator - specific Opcodes.

Immediate constants:

The value of a constant can follow the opcode in program memory For example.

MOV A, #100 loads the Accumulator with the decimal number 100. The same number

could be specified in hex digit as 64h.

PROGRAM STATUS WORD:

Program Status Word Register in Atmel Flash Micro controller:

CY AC F0 RS1 RS0 OV --- P

PSW 7 PSW 0

PSW 6 PSW 1

PSW 5 PSW 2

PSW 4 PSW 3

PSW0: Parity of Accumulator Set By Hardware To 1 if it contains an Odd number

of 1s, otherwise it is reset to 0.

PSW1: User Definable Flag

PSW2: Overflow Flag Set By Arithmetic Operations

PSW3: Register Bank Select

PSW4: Register Bank Select

PSW5: General Purpose Flag.

PSW6: Auxiliary Carry Flag Receives Carry Out from

Bit 1 of Addition Operands

PSW7: Carry Flag Receives Carry Out From Bit 1 of ALU Operands.

The Program Status Word contains Status bits that reflect the current state of the

CPU. The PSW shown if Fig resides in SFR space. The PSW contains the Carry Bit, The

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auxiliary Carry (For BCD Operations) the two - register bank select bits, the Overflow

flag, a Parity bit and two user Definable status Flags.

The Carry Bit, in addition to serving as a Carry bit in arithmetic operations also

serves the as the “Accumulator” for a number of Boolean Operations .The bits RS0 and

RS1 select one of the four register banks. A number of instructions register to these RAM

locations as R0 through R7.The status of the RS0 and RS1 bits at execution time

determines which of the four banks is selected.

The Parity bit reflect the Number of 1s in the Accumulator .P=1 if the

Accumulator contains an even number of 1s, and P=0 if the Accumulator contains an

even number of 1s. Thus, the number of 1s in the Accumulator plus P is always even.

Two bits in the PSW are uncommitted and can be used as general-purpose status flags.

Oscillator and clock circuit:

XTAL1 and XTAL2 are the input and output respectively of an inverting

amplifier which is intended for use as a crystal oscillator in the pioerce configuration, in

the frequency range of 1.2 Mhz to 12 Mhz. XTAL2 also the input to the internal clock

generator.

To drive the chip with an internal oscillator, one would ground XTAL1 and

XTAL2. Since the input to the clock generator is divide by two filip flop there are no

requirements on the duty cycle of the external oscillator signal. However, minimum high

and low times must be observed.

The clock generator divides the oscillator frequency by 2 and provides a tow

phase clock signal to the chip. The phase 1 signal is active during the first half to each

clock period and the phase 2 signals are active during the second half of each clock

period.

CPU Timing:

A machine cycle consists of 6 states. Each stare is divided into a phase / half,

during which the phase 1 clock is active and phase 2 half. Arithmetic and Logical

operations take place during phase1 and internal register - to register transfer take place

during phase 2

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2. TIMERS AND COUNTERS

THEORY:

Many Micro-controller applications require

(i) Counting of external events, such as frequency of a pulse train (or)

(ii) The generation of precise internal time delays between computer

operations.

These tasks can be accomplished using software techniques, but software loops

for counting/timing keep the processor busy, so that other task, perhaps more

important functions are not to be done.

To relieve the processor of this burden, two 16-bit UP counters (T0 & T1) are

provided for general use of the programmer.

Each counter may be programmed to count internal clock pulses, acting as a timer

(or) programmed to count external pulses as a counter.

The counters are divided into two 8-bit registers called the timer low (TL0, TL1)

and timer high (TH0, TH1).

All counter actions are controlled by,

(i) Bit states in the timer mode control register (TMOD)

(ii) Timer/Counter control register

(iii) Certain program instructions.

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TIMERS :

SFR’S USED IN TIMERS:

The special function registers used in timers are,

(i) TMOD Register (ii) TCON Register

(iii) Timer(T0) & timer(T1) Registers

(i) TMOD Register:

TMOD is dedicated solely to the two timers (T0 & T1). The timer mode SFR is used to configure the mode of operation of each of the

two timers. Using this SFR your program may configure each timer to be a

16-bit timer, or 13 bit timer, 8-bit auto reload timer, or two separate timers.

Additionally you may configure the timers to only count when an external pin

is activated or to count “events” that are indicated on an external pin.

It can consider as two duplicate 4-bit registers, each of which controls the action of one of the timers.

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(ii) TCON Register:

The timer control SFR is used to configure and modify the way in which the

8051’s two timers operate. This SFR controls whether each of the two timers is

running or stopped and contains a flag to indicate that each timer has overflowed.

Additionally, some non-timer related bits are located in TCON SFR.

These bits are used to configure the way in which the external interrupt flags are

activated, which are set when an external interrupt occurs.

(iii) TIMER 0 (T0):

TO (Timer 0 low/high, address 8A/8C h)

These two SFRs taken together represent timer 0. Their exact behavior

depends on how the timer is configured in the TMOD SFR; however, these timers

always count up. What is configurable is how and when they increment in value.

T0:

(iv) TIMER 1 (T1):

T1 (Timer 1 Low/High, address 8B/ 8D h)

These two SFRs, taken together, represent timer 1. Their exact behavior

depends on how the timer is configured in the TMOD SFR; however, these timers

always count up. What is Configurable is how and when they increment in value.

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T1:

Square Ware Generation:

T = 1/F

If F = 1 KHz , then T = 1 msec

Assuming Duty Cycle = 50 %

ON Time = 500 us

OFF Time = 500 us

For clock frequency = 12 MHz,

then T = 500 us

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FLOW CHART:

COUNTER:

TIMER: START

INTILIZE TIMER, LOADING CORRESPONDING

REGISTERS

EXCUTING MAIN PROGRAM

STOP

Is time out

Complement Bit

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3. SERIAL COMMUNICATION

THEORY:In order to connect micro controller to a modem or a pc to modem a serial port is

used. Serial is a very common protocol for device communication that is standard on

almost every PC. Most computers include two RS-232 based serial ports. Serial is also a

common communication protocol that is used by many devices for instrumentation;

numerous GPIB-compatible devices also come with an RS-232 port. Furthermore, serial

communication can be used for data acquisition in conjunction with a remote sampling

device.

The concept of serial communication is simple. The serial port sends and receives

bytes of information one bit at a time. Although this is slower than parallel

communication, which allows the transmission of an entire byte at once, it is simpler and

can be used over longer distances. For example, the IEEE 488 specifications for parallel

communication state that the cabling between equipment can be no more than 20 meters

total, with no more than 2 meters between any two devices. Serial, however, can extend

as much as 1200 meters.

Typically, serial is used to transmit ASCII data. Communication is completed

using 3 transmission lines: (1) Ground, (2) Transmit, and (3) Receive. Since serial is

asynchronous, the port is able to transmit data on one line while receiving data on

another. Other lines are available for handshaking, but are not required. The important

serial characteristics are baud rate, data bits, stop bits, and parity. For two ports to

communicate, these parameters must match.

Baud rate: It is a speed measurement for communication. It indicates the number of

bit transfers per second. For example, 300 baud is 300 bits per second. When a clock

cycle is referred it means the baud rate. For example, if the protocol calls for a 4800 baud

rate, then the clock is running at 4800Hz. This means that the serial port is sampling the

data line at 4800Hz. Common baud rates for telephone lines are 14400, 28800, and

33600. Baud rates greater than these are possible, but these rates reduce the distance by

which devices can be separated. These high baud rates are used for device

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communication where the devices are located together, as is typically the case with GPIB

devices.

Data bits: a measurement of the actual data bits in a transmission. When the

computer sends a packet of information, the amount of actual data may not be a full 8

bits. Standard values for the data packets are 5, 7, and 8 bits. Which setting choosen

depends on what information transferred. For example, standard ASCII has values from

0 to 127 (7 bits). Extended ASCII uses 0 to 255 (8 bits). If the data being transferred is

simple text (standard ASCII), then sending 7 bits of data per packet is sufficient for

communication. A packet refers to a single byte transfer, including start/stop bits, data

bits, and parity. Since the number of actual bits depend on the protocol selected, the term

packet is used to cover all instances.

Stop bits: used to signal the end of communication for a single packet. Typical

values are 1, 1.5, and 2 bits. Since the data is clocked across the lines and each device has

its own clock, it is possible for the two devices to become slightly out of sync. Therefore,

the stop bits not only indicate the end of transmission but also give the computers some

room for error in the clock speeds. The more bits that are used for stop bits, the greater

the lenience in synchronizing the different clocks, but the slower the data transmission

rate.

Parity: a simple form of error checking that is used in serial communication.

There are four types of parity: even, odd, marked, and spaced. The option of using no

parity is also available. For even and odd parity, the serial port sets the parity bit (the last

bit after the data bits) to a value to ensure that the transmission has an even or odd

number of logic high bits. For example, if the data is 011, then for even parity, the parity

bit is 0 to keep the number of logic-high bits even. If the parity is odd, then the parity bit

is 1, resulting in 3 logic-high bits. Marked and spaced parity does not actually check the

data bits, but simply sets the parity bit high for marked parity or low for spaced parity.

This allows the receiving device to know the state of a bit to enable the device to

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determine if noise is corrupting the data or if the transmitting and receiving device clocks

are out of sync.

WHAT IS RS –232C

RS-232 (ANSI/EIA-232 Standard) is the serial connection found on IBM-

compatible PCs. It is used for many purposes, such as connecting a mouse, printer, or

modem, as well as industrial instrumentation. Because of improvements in line drivers

and cables, applications often increase the performance of RS-232 beyond the distance

and speed listed in the standard. RS-232 is limited to point-to-point connections between

PC serial ports and devices. RS-232 hardware can be used for serial communication up to

distances of 50 feet .

DB-9 pin connector

1 2 3 4 5

6 7 8 9

(Out of computer and exposed end of cable)

Pin Functions:

Data: TxD on pin 3, RxD on pin 2

Handshake: RTS on pin 7, CTS on pin 8, DSR on pin 6,

CD on pin 1, DTR on pin 4

Common: Common pin 5(ground)

Other: RI on pin 9

The method used by RS-232 for communication allows for a simple connection of three

lines: Tx, Rx, and Ground. The three essential signals for 2 way RS-232

Communications are these:

TXD: carries data from DTE to the DCE.

RXD: carries data from DCE to the DTE

SG: signal ground

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Connection Diagram:

SFRs Used for Serial Communication:

SCON:

TMOD:

T1:

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BAUD RATE CALCULATION:

Internal timer stages are as fallows

Divided by X box can be replaced with T1 timer so that by changing the value of timer we can obtain the required baud rate.

Let XClk = 11.0592 Mhz

Baud Rate = (XClk / 12 / 16 / 2 / X )

For attaining 9600 baud Rate

X can be calculated as

= 11.0592 x 106 / 12 / 16 / 2 / 9600

= 3

So set the 2’s Complement of 3 in Timer 1 so that we can achieve 9600 baud rates.

Note: Assuming 8-bit Auto reload mode and 8-bit variable baud rate modes.

FLOW CHART:

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TX Loop:

RX Loop:

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4. ADC MODULETHEORY:

ADC is short for Analog Digital Converter, Sometimes called a A-D or A to D

Converter. An ADC is a device that converts a continuous analog signal to a multi-level

digital signal without altering its content. The signals that are monitored are sounds,

movement, and temperature into binary code for the PC.

(or)

Analog to digital (A/D, ADC) converters are electrical circuit devices that convert

continuous signals, such as voltages or currents, from the analog domain to the digital

domain where the signals are represented by numbers

Most processing equipment today are digital in nature, and they work with signals

which are binary valued. In a digital or binary representation, a signal is represented by a

word, which is composed of a finite number of bits. The processing of signals is

preferably carried out in the digital domain because digital processing is fast, accurate

and reliable. Analog to digital converters are widely used for converting analog signals to

corresponding digital signals for many electronic circuits. Analog to digital converters

allow the use of sophisticated digital signal processing systems to process analog signals,

which are common in the real world. Many modern electronic systems require conversion

of signals from analog to digital or from digital to analog form. Circuits for performing

these functions are now required in numerous common consumer devices such as digital

cameras, cellular telephones, wireless data network equipment, audio devices such as

MP3 players, and video equipment such as digital video disk (DVD) players, high

definition digital television (HDTV), and numerous other products. Analog to digital

converters (ADC's) form an essential link in the signal processing pathway at the

interface between the analog and digital domains. Advances in ADC technology have

increased the speed, lowered the cost, and reduced the power requirements of analog to

digital converters, and resulted in a proliferation of ADC applications.

29

Conversion involves quantizing and encoding. Quantizing means partitioning the

analog signal range into a number of discrete quanta and determining to which quantum

the input signal belongs. Encoding means assigning a unique digital code to each

quantum and determining the code that corresponds to the input signal. The most

common system is binary, in which there are 2n quanta (where n is some whole number),

numbered consecutively; the code is a set of n physical two-valued levels or bits (1 or 0)

corresponding to the binary number associated with the signal quantum.

The illustration shows a typical three-bit binary representation of a range of input signals,

partitioned into eight quanta. For example, a signal in the vicinity of 3/8; full scale

(between 5/16 and 7/16) will be coded 011 (binary 3).

A three-bit binary representation of a range of input signals.

There are four commonly used ADC’s:

Parallel converter

Successive approximation ADC

Voltage-to-Frequency ADC

Integrating ADC

Applications of ADC: Digital camera or scanner uses A/D converters to transform the variable charges in

CCD and CMOS chips into the binary data that represent pixels. Cell phone and digital desk phone has an ADC converter that converts the pressure of

sound waves into PCM code Etc.

30

ADC0808:

This is 8-Bit µP Compatible A/D Converters with 8-Channel Multiplexer.

The ADC0808 data acquisition component is a monolithic CMOS device with an 8-bit

analog-to-digital converter,8-channel multiplexer and microprocessor compatible

Control logic. The 8-bit A/D converter uses successive approximation as the conversion

technique. The converter features a high impedance chopper stabilized comparator, a

256R voltage divider with analog switch tree and a successive approximation register.

The 8-channel multiplexer can directly access any of 8-single-ended analog signals.

The device eliminates the need for external zero and full-scale adjustments. Easy

interfacing to microprocessors is provided by the latched and decoded multiplexer

address inputs and latched TTL TRI-STATE outputs.

Features

Easy interface to all microprocessors

Operates ratio metrically or with 5 VDC or analog span adjusted voltage reference

No zero or full-scale adjust required

8-channel multiplexer with address logic

0V to 5V input range with single 5V power supply

Outputs meet TTL voltage level specifications

ADC0808 equivalent to MM74C949

ADC0809 equivalent to MM74C949-1

Key Specifications

Resolution 8 Bits

Total Unadjusted Error ±1⁄2 LSB and ±1 LSB

Single Supply 5 VDC

Low Power 15 mW

Conversion Time

31

FUNCTIONAL DESCRIPTION:

The ADC0808 shown in figure can be functionally divided into 2 basic sub

circuits. These two sub circuits are an analog multiplexer and an A/D converter. The

multiplexer uses 8 standard CMOS analog switches to provide to up to 8 analog inputs.

The switches are selectively turned on, depending on the data latched into a 3-bit

multiplexer address register.

The second functional block, the successive approximation A/D converter,

transforms the analog output of the multiplexer to an 8-bit digital word. The output of the

multiplexer goes to one of two comparator inputs. The other input is derived from a 256R

resistor ladder, which is tapped by a MOSFET transistor switch tree. The converter

control logic controls the switch tree, funneling a particular tap voltage to comparator.

Based on the result of this comparison, the control logic and the successive

approximation register (SAR) will decide whether the next tap to be selected should be

higher or lower than the present tap on the resistor ladder. This algorithm is executed 8

times per conversion, once every 8-clock period, yielding a total conversion time of clock

periods.

When the conversion cycle is complete the resulting data is loaded into the TRI-

STATE output latch. The data in the output latch can be then be read by the host system

any time before the end of the next conversion. The TRI-STATE capability of the latch

allows easy interfaces to bus oriented systems.

32

The operation on these converters by a microprocessor or some control logic is

very simple. The controlling device first selects the desired input channel. To do this, a 3-

bit channel address is placed on the A, B, C in and out pins; and the ALE input is pulsed

positively, clocking the address into the multiplexer address register. To begin the

conversion, the START pin is pulsed. On the rising edge of this pulse the internal

registers are cleared and on the falling edge the start conversion is initiated.

As mentioned earlier, there are 8 clock periods per approximation. Even though

there is no conversion in progress the ADC0808 is still internally cycling through these 8

clock periods. A start pulse can occur any time during this cycle but the conversion will

not actually begin until the converter internally cycles to the beginning of the next 8

clock period sequence. As long as the start pin is held high no conversion begins, but

when the start pin is taken low the conversion will start within 8 clock periods. The EOC

output is triggered on the rising edge of the start pulse. It, too, is controlled by the 8 clock

period cycle, so it will go low within 8 clock periods of the rising edge of the start pulse.

One can see that it is entirely possible for EOC to go low before the conversion starts

internally, but this is not important, since the positive transition of EOC, which occurs at

the end of a conversion, is what the control logic is looking for.

Once EOC does go high this signals the interface logic that the data resulting from

the conversion is ready to be read. The output enable(OE) is then raised high. This

enables the TRI-STATE outputs, allowing the data to be read. Figure shows the timing

diagram.

33

Fig : - Functional block diagram of ADC

PIN DIAGRAM:

34

CONNECTION DIAGRAM:

SC (Chip Selection): By using this selection Bit you can select the Chip. After selecting

this bit the chip is ready to do operation. By using HIGH(1) you can select the this pin as

a active high.

ALE (Address Latch Enable):

ALE is to enable address latch of ADC, so that the selected channel is activated.

In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency, and

can be used for external timing or clocking. Note that one ALE pulse is skipped during

each access to external data memory. This pin is also the Program Pulse input (PROG)

during Flash programming.

35

EOC (End of Conversion): After End of ADC Conversion EOC bit is set to high.

CHANNEL SELECTION:

36

37

FLOW CHART:

38

Set callCSF

6. INTERRUPTS

THEORY:

An interrupt is an external or internal event that suspends the operation of micro

controller to inform it that a device needs its service.

DIFFERENCE BETWEEN POLLING AND INTERRUPT MECHANISMS:

In polling, the micro controller continuously monitors the status of a given device;

when the condition met, it performs the service. Here the precious CPU’s time is being

wasted in waiting for the device. Other tasks which needs the CPU’s service has to wait

for undefined time. This is the main disadvantage with polling method.

In interrupt method, whenever any device needs its service, the device notifies the

micro controller by sending it an interrupt signal. Upon receiving an interrupt signal, the

micro controller interrupts whatever it is doing and servers the device. The program

associated with interrupt is called as interrupt service subroutine (ISR).Main advantage

with interrupts is that the micro controller can serve many devices. Cpu is properly

utilized by all tasks.

NUMBER OF INTERRUPTS IN 8051:

There are basically five interrupts available to the user. Reset is also considered

as an interrupt. There are two interrupt for timer, two interrupts for external hardware

interrupt, one for serial communication.

Memory location Interrupt name 0000H Reset 0003H External interrupt 0

000BH Timer interrupt 0 0013H External interrupt 1 001BH Timer interrupt 1 0023H Serial COM interrupt

Lower the vector the ROM location higher the priority.

39

CONNCETION DIAGRAM:

SFRS:

The Following mentioned register are needed to be initialized

IE (Interrupt enable register) : It is an 8-bit register.

Steps in enabling an interrupt:

1. Bit D7 of the IE register must be set to high to allow the rest of register to take effect.

2. If EA=1, interrupts are enabled and will be responded to if their corresponding bits in

IE are high. If EA=0, no interrupt will be responded to even if the associated bit in

the IE register is high.

40

Description of each bit in IE register:

D7 bit: disables all interrupts. If EA =0, no interrupt is acknowledged, if EA=1 each

interrupt source is individually enabled or disabled by setting or clearing its enable bit.

D6 bit: Reserved.

D5 bit: Enables or disables timer 2 over flow interrupt (in 8052).

D4 bit: Enables or disables serial port interrupt.

D3 bit: Enables or disables timer 1 over flow interrupt.

D2 bit: Enables or disables external interrupt 1.

D1 bit: Enables or disables timer 0 over flow interrupt.

D0 bit: Enables or disables external interrupt 0.

Interrupt priority in 8051:

There is one more SRF to assign priority to the interrupts which is named as

interrupt priority register (IP). User has given the provision to assign priority to one

interrupt writing one to that particular bit in the IP register full fills the task of assigning

the priority.

Description of each bit in IP register:

D7 bit: Reserved.

D6 bit: Reserved.

D5 bit: Timer 2 interrupt priority bit (in 8052).

D4 bit: Serial port interrupt priority bit.

D3 bit: Timer 1 interrupt priority bit.

D2 bit: External interrupt 1 priority bit.

D1 bit: Timer 0 interrupt priority bit.

D0 bit: External interrupt 0 priority bit.

41

INTERRUPTS

The AT89C51 provides 5 interrupt sources: Two External interrupts, two-timer

interrupts and a serial port interrupts. The External Interrupts INT0 and INT1 can each

either level activated or transition - activated, depending on bits IT0 and IT1 in Register

TCON. The Flags that actually generate these interrupts are the IE0 and IE1 bits in

TCON. When the service routine is vectored to hardware clears the flag that generated an

external interrupt only if the interrupt WA transition - activated. If the interrupt was level

- activated, then the external requesting source (rather than the on-chip hardware)

controls the requested flag. Tf0 and Tf1 generate the Timer 0 and Timer 1 Interrupts,

which are set by a rollover in their respective Timer/Counter Register (except for Timer 0

in Mode 3). When a timer interrupt is generated, the on-chip hardware clears the flag that

generated it when the service routine is vectored to. The logical OR of RI and TI generate

the Serial Port Interrupt. Neither of these flag is cleared by hardware when the service

routine is vectored to. In fact, the service routine normally must determine whether RI or

TI generated the interrupt an the bit must be cleared in software.

In the Serial Port Interrupt is generated by the logical OR of RI and TI. Neither of

these flag is cleared by hardware when the service routine is vectored to. In fact, the

service routine normally must determine whether RI to TI generated the interrupt and the

bit must be cleared in software.

IE: Interrupt Enable Register

EA - ET2 ES ET1 EX1 ET0 EX0

Enable bit = 1 enabled the interrupt

Enable bit = 0 disables it.

42

Symbol Position Function

EA IE. Global enable / disable all interrupts.

If EA = 0, no interrupt will be

Acknowledge.

If EA = 1, each interrupt source is

individually enabled to disabled by

setting or clearing its enable bit

- IE.6 Undefined / reserved

ET2 IE.5 Timer 2 Interrupt enable Bit

ES IE.4 Serial Port Interrupt enabled bit.

ET1 IE.3 Timer 1 Interrupt enable bit.

EX1 IE.2 External Interrupt 1 enable bit.

ET0 IE.1 Timer 0 Interrupt enable bit.

EX0 IE.0 External Interrupt 0 enable bit.

43

DC Motor DC motors are configured in many types and sizes, including brush less, servo, and

gear motor types. A motor consists of a rotor and a permanent magnetic field stator. The

magnetic field is maintained using either permanent magnets or electromagnetic

windings. DC motors are most commonly used in variable speed and torque.

Motion and controls cover a wide range of components that in some way are used to

generate and/or control motion. Areas within this category include bearings and bushings,

clutches and brakes, controls and drives, drive components, encoders and resolves,

Integrated motion control, limit switches, linear actuators, linear and rotary motion

components, linear position sensing, motors (both AC and DC motors), orientation

position sensing, pneumatics and pneumatic components, positioning stages, slides and

guides, power transmission (mechanical), seals, slip rings,solenoids,springs.

Motors are the devices that provide the actual speed and torque in a drive

system.  This family includes AC motor types (single and multiphase motors, universal,

servo motors, induction, synchronous, and gear motor) and DC motors (brush less, servo

motor, and gear motor) as well as linear, stepper and air motors, and motor contactors and

starters.

In any electric motor, operation is based on simple electromagnetism. A

current-carrying conductor generates a magnetic field; when this is then placed in an

external magnetic field, it will experience a force proportional to the current in the

conductor, and to the strength of the external magnetic field. As you are well aware of

from playing with magnets as a kid, opposite (North and South) polarities attract, while

like polarities (North and North, South and South) repel. The internal configuration of a

DC motor is designed to harness the magnetic interaction between a current-carrying

conductor and an external magnetic field to generate rotational motion.

44

Let's start by looking at a simple 2-pole DC electric motor (here red represents a magnet

or winding with a "North" polarization, while green represents a magnet or winding with

a "South" polarization).

Every DC motor has six basic parts -- axle, rotor (a.k.a., armature), stator, commutator,

field magnet(s), and brushes. In most common DC motors (and all that Beamers will see),

the external magnetic field is produced by high-strength permanent magnets1. The stator

is the stationary part of the motor -- this includes the motor casing, as well as two or more

permanent magnet pole pieces. The rotor (together with the axle and attached

commutator) rotates with respect to the stator. The rotor consists of windings (generally

on a core), the windings being electrically connected to the commutator. The above

diagram shows a common motor layout -- with the rotor inside the stator (field) magnets.

The geometry of the brushes, commutator contacts, and rotor windings are

such that when power is applied, the polarities of the energized winding and the stator

magnet(s) are misaligned, and the rotor will rotate until it is almost aligned with the

stator's field magnets. As the rotor reaches alignment, the brushes move to the next

commutator contacts, and energize the next winding. Given our example two-pole motor,

the rotation reverses the direction of current through the rotor winding, leading to a "flip"

of the rotor's magnetic field, and driving it to continue rotating.

In real life, though, DC motors will always have more than two poles (three

is a very common number). In particular, this avoids "dead spots" in the commutator.

You can imagine how with our example two-pole motor, if the rotor is exactly at the

middle of its rotation (perfectly aligned with the field magnets), it will get "stuck" there.

Meanwhile, with a two-pole motor, there is a moment where the commutator shorts out

the power supply (i.e., both brushes touch both commutator contacts simultaneously).

45

This would be bad for the power supply, waste energy, and damage motor components as

well. Yet another disadvantage of such a simple motor is that it would exhibit a high

amount of torque” ripple" (the amount of torque it could produce is cyclic with the

position of the rotor).

So since most small DC motors are of a three-pole design, let's tinker with the workings

of one via an interactive animation (JavaScript required):

You'll notice a few things from this -- namely, one pole is fully energized at a time (but

two others are "partially" energized). As each brush transitions from one commutator

contact to the next, one coil's field will rapidly collapse, as the next coil's field will

rapidly charge up (this occurs within a few microsecond). We'll see more about the

effects of this later, but in the meantime you can see that this is a direct result of the coil

windings' series wiring:

46

There's probably no better way to see how an average dc motor is put together, than by

just opening one up. Unfortunately this is tedious work, as well as requiring the

destruction of a perfectly good motor.

This is a basic 3-pole dcmotor, with 2 brushes and three commutator contacts.

PWM technique:

A pulse width modulator (PWM) is a device that may be used as an

efficient light dimmer or DC motor speed controller. A PWM works by making a square

wave with a variable on-to-off ratio; the average on time may be varied from 0 to 100

percent. In this manner, a variable amount of power is transferred to the load. The main

advantage of a PWM circuit over a resistive power controller is the efficiency, at a 50%

level, the PWM will use about 50% of full power, almost all of which is transferred to the

load, a resistive controller at 50% load power would consume about 71% of full power,

50% of the power goes to the load and the other 21% is wasted heating the series resistor.

Load efficiency is almost always a critical factor in solar powered and other alternative

energy systems. One additional advantage of pulse width modulation is that the pulses

reach the full supply voltage and will produce more torque in a motor by being able to

overcome the internal motor resistances more easily. Finally, in a PWM circuits, common

47

small potentiometers may be used to control a wide variety of loads whereas large and

expensive high power variable resistors are needed for resistive controllers.

Pulse width modulation consists of three signals, which are modulated by a

square wave. The duty cycle or high time is proportional to the amplitude of the square

wave. The effective average voltage over one cycle is the duty cycle times the peak-to-

peak voltage. Thus, the average voltage follows a square wave. In fact, this method

depends on the motor inductance to integrate out the PWM frequency.

A very simply off line motor drive can be built using a TRIAC and a control IC. This

circuit can control the speed of a universal motor. A universal motor is a series wound

DC motor. The circuit uses phase angle control to vary the effective motor voltage.

A micro controller can also be used to control a triac. A PNP of transistor may be used to

drive the triac. As shown, the MCU ground is connected to the AC line. The gate trigger

current is lower if instead the MCU 5V supply is connected to the AC line. The MCU

must have some means of detecting zero crossing and a timer, which can control the triac

firing. A general-purpose timer with one input capture and one output compare makes an

ideal phase angle control.

48

STEPPER MOTOR

Introduction

Stepping motors can be used in simple open-loop control systems; these are

generally adequate for systems that operate at low accelerations with static loads, but

closed loop control may be essential for high accelerations, particularly if they

involve variable loads. If a stepper in an open-loop control system is over torqued, all

knowledge of rotor position is lost and the system must be reinitialized; servomotors

are not subject to this problem.

Stepping motors are known in German as Schrittmotoren, in French as moteurs pas à

pas, and in Spanish as motor paso paso.

Stepper motor control may be based on open loop or closed loop models. We are

primarily interested in open loop models, because this is where stepping motors excel,

but we will treat closed loop models briefly because they are somewhat simpler. Figure

7.1 illustrates an extreme

Example:

Fig.6.4.1 Stepper motor open loop model

Rotary shaft encoders are typically rated in output pulses per channel per revolution;

for this example to be useful, for a motor with n steps per revolution, the shaft

encoder output must gives n/2 pulses per channel per revolution. If this is the case,

the behavior of this system will depend on how the shaft encoder is rotated around the

motor shaft relative to the motor. If the shaft encoder is rotated into a position where

49

the output of the shaft encoder translates to a control vector that holds the motor shaft

in its initial position, the motor shaft will not rotate of itself, and if the motor shaft is

rotated by force, it will stay wherever it is left. We will refer to this position of the

shaft encoder relative to the motor as the neutral position.

If the shaft encoder is rotated one step clockwise or counterclockwise from the

neutral position, the control vector output by the shaft encoder will pull the rotor

clockwise (or counterclockwise). As the rotor turns, the shaft encoder will change the

control vector so that the rotor is always trying to maintain a position one step

clockwise (or counterclockwise) from where it is at the moment. The torque

produced by this method will fall off with rotor speed, but this control system will

always produce the maximum torque the motor is able to deliver at any speed.

In effect, with this one-step displacement, we have constructed a brushless DC motor

from a stepping motor and a collection of off-the-shelf parts. In practice, this is rarely

done, but there are numerous applications of stepping motors in closed-loop control

systems that are based on this model, usually with a microprocessor included in the

feedback loop between the shaft encoder and the motor controller. In an open-loop

control system, this feedback loop is broken, but at a high level, the basic principle

remains quite similar, as illustrated in Figure 6.4.2

Figure 6.4.2 Stepper motor open loop model

In Figure 6.4.2, we replace the shaft encoder from Figure 6.4.1 with a simulation

model of the response of the motor and load to the control vector. At any instant,

the actual position of the rotor is unknown! Nonetheless, we can use the

simulation model to predict, based on an assumed rotor position and velocity,

50

how the motor will respond to the control vector, and we can construct this model

so that its output is the control vector generated by a simulated shaft encoder.

So long as the model is sufficiently accurate, the behavior of the motor controlled by this

model will be the same as the behavior of the motor controlled by a closed loop system!

STEPPER MOTOR TYPES

Stepping motors come in two varieties, permanent magnet and variable. Lacking a

label on the motor, We can generally tell the two apart by feel when no power is

applied. Permanent magnet motors tend to "cog" as you twist the rotor with your

fingers, while variable reluctance motors almost spin freely (although they may cog

slightly because of residual magnetization in the rotor). We can also distinguish

between the two varieties with an ohmmeter. Variable reluctance motors usually have

three (sometimes four) windings, with a common return, while permanent magnet

motors usually have two independent windings, with or without center taps. Center-

tapped windings are used in uni-polar permanent magnet motors. Stepping motors

come in a wide range of angular resolution. The coarsest motors typically turn 90

degrees per step, while high resolution permanent magnet motors are commonly able

to handle 1.8 or even 0.72 degrees per step. With an appropriate controller, most

permanent magnet and hybrid motors can be run in half-steps, and some controllers

can handle smaller fractional steps or micro-steps. For both permanent magnet and

variable reluctance stepping motors, if just one winding of the motor is energized, the

rotor (under no load) will snap to a fixed angle and then hold that angle until the

torque exceeds the holding torque of the motor, at which point, the rotor will turn,

trying to hold at each successive equilibrium point.

51

Variable Reluctance Motors

Figure 6.4.3 Variable Reluctance motorsIf motor has three windings, typically connected as shown in the schematic

diagram in Figure 1.1, with one terminal common to all windings, it is most likely

a variable reluctance stepping motor. In use, the common wire typically goes to

the positive supply and the windings are energized in sequence.

The cross section shown in Figure 1.1 is of 30 degree per step variable reluctance

motor. The rotor in this motor has 4 teeth and the stator has 6 poles, with each

winding wrapped around two opposite poles. With winding number 1 energized, the

rotor teeth marked X are attracted to this winding's poles. If the current through

winding 1 is turned off and winding 2 is turned on, the rotor will rotate 30 degrees

clockwise so that the poles marked Y line up with the poles marked 2. To rotate this

motor continuously, we just apply power to the 3 windings in sequence. Assuming

positive logic, where a 1 means turning on the current through a motor winding, the

following control sequence will spin the motor illustrated in Figure 1.1 clockwise 24

steps or 2 revolutions:

Winding 1 1001001001001001001001001

Winding 2 0100100100100100100100100

Winding 3 0010010010010010010010010

time --->

There are also variable reluctance stepping motors with 4 and 5 windings, requiring 5

or 6 wires. The principle for driving these motors is the same as that for the three

winding variety, but it becomes important to work out the correct order to energize

the windings to make the motor step nicely. The motor geometry illustrated in Figure

52

1.1, giving 30 degrees per step, uses the fewest number of rotor teeth and stator poles

that performs satisfactorily. Using more motor poles and more rotor teeth allows

construction of motors with smaller step angle. Toothed faces on each pole and a

correspondingly finely toothed rotor allows for step angles as small as a few degrees.

Unipolar Motors

Figure 6.4.4 Unipolar motor

The motor cross section shown in Figure 1.2 is of a 30 degree per step permanent

magnet or hybrid motor -- the difference between these two motor types is not

relevant at this level of abstraction. Motor winding number 1 is distributed

between the top and bottom stator pole, while motor winding number 2 is

distributed between the left and right motor poles. The rotor is a permanent

magnet with 6 poles, 3 south and 3 north, arranged around its circumference.

For higher angular resolutions, the rotor must have proportionally more poles.

The 30 degree per step motor in the figure is one of the most common permanent

magnet motor designs, although 15 and 7.5 degree per step motors are widely

available. Permanent magnet motors with resolutions as good as 1.8 degrees per

step are made, and hybrid motors are routinely built with 3.6 and 1.8 degrees per

step, with resolutions as fine as 0.72 degrees per step available.

As shown in the figure, the current flowing from the center tap of winding 1 to

terminal a causes the top stator pole to be a north pole while the bottom stator

pole is a south pole. This attracts the rotor into the position shown. If the power to

53

winding 1 is removed and winding 2 is energized, the rotor will turn 30 degrees,

or one step.

To rotate the motor continuously, we just apply power to the two windings in

sequence. Assuming positive logic, where a 1 means turning on the current

through a motor winding, the following two control sequences will spin the motor

illustrated in Figure 1.2 clockwise 24 steps or 4 revolutions:

Winding 1a 1000100010001000100010001

Winding 1b 0010001000100010001000100

Winding 2a 0100010001000100010001000

Winding 2b 0001000100010001000100010

time --->

Winding 1a 1100110011001100110011001

Winding 1b 0011001100110011001100110

Winding 2a 0110011001100110011001100

Winding 2b 1001100110011001100110011

time --->

Note that the two halves of each winding are never energized at the same time.

Both sequences shown above will rotate a permanent magnet one step at a time.

The top sequence only powers one winding at a time, as illustrated in the figure

above; thus, it uses less power. The bottom sequence involves powering two

windings at a time and generally produces a torque about 1.4 times greater than

the top sequence while using twice as much power.

The step positions produced by the two sequences above are not the same; as a result,

combining the two sequences allows half stepping, with the motor stopping

alternately at the positions indicated by one or the other sequence. The combined

sequence is as follows:

Winding 1a 11000001110000011100000111

Winding 1b 00011100000111000001110000

54

Winding 2a 01110000011100000111000001

Winding 2b 00000111000001110000011100 time --->

Bipolar Motors

Figure 6.4.5 Bipolar motorBipolar permanent magnet and hybrid motors are constructed with exactly the same

mechanism as is used on unipolar motors, but the two windings are wired more

simply, with no center taps. Thus, the motor itself is simpler but the drive circuitry

needed to reverse the polarity of each pair of motor poles is more complex. The

schematic in Figure 1.3 shows how such a motor is wired, while the motor cross

section shown here is exactly the same as the cross section shown in Figure 1.2.

Briefly, an H-bridge allows the polarity of the power applied to each end of each

winding to be controlled independently. The control sequences for single stepping

such a motor are shown below, using + and - symbols to indicate the polarity of the

power applied to each motor terminal:

Terminal 1a +---+---+---+--- ++--++--++--++--

Terminal 1b --+---+---+---+- --++--++--++--++

Terminal 2a -+---+---+---+-- -++--++--++--++-

Terminal 2b ---+---+---+---+ +--++--++--++--+

time --->

Note that these sequences are identical to those for a unipolar permanent magnet

motor, at an abstract level, and that above the level of the H-bridge power switching

electronics, the control systems for the two types of motor can be identical.

55

Note that many full H-bridge driver chips have one control input to enable the output

and another to control the direction. Given two such bridge chips, one per winding,

the following control sequences will spin the motor identically to the control

sequences given above:

Enable 1 1010101010101010 1111111111111111

Direction 1 1x0x1x0x1x0x1x0x 1100110011001100

Enable 2 0101010101010101 1111111111111111

Direction 2 x1x0x1x0x1x0x1x0 0110011001100110

time --->

To distinguish a bipolar permanent magnet motor from other 4 wire motors, measure the

resistances between the different terminals. It is worth noting that some permanent

magnet stepping motors have 4 independent windings, organized as two sets of two.

Within each set, if the two windings are wired in series, the result can be used as a high

voltage bipolar motor. If they are wired in parallel, the result can be used as a low voltage

bipolar motor. If they are wired in series with a center tap, the result can be used as a low

voltage uni polar motor.

STEPPER MOTOR CONTROL CIRCUITS

This section of the stepper motor deals with the basic final stage drive circuitry for

stepping motors. This circuitry is centered on a single issue, switching the current in

each motor winding on and off, and controlling its direction. The circuitry discussed

in this section is connected directly to the motor windings and the motor power

supply, and this circuitry is controlled by a digital system that determines when the

switches are turned on or off. This section covers the most elementary control

circuitry for each class of motor. All of these circuits assume that the motor power

supply provides a drive voltage no greater than the motor's rated voltage, and this

significantly limits motor performance. The next section, on current limited drive

circuitry, covers practical high-performance drive circuits.

56

Fig 6.4.6 Boxes Used for representing switches

In Figure 3.1, boxes are used to represent switches; a control unit, not shown, is

responsible for providing the control signals to open and close the switches at the

appropriate times in order to spin the motors. In many cases, the control unit will be a

computer or programmable interface controller, with software directly generating the

outputs needed to control the switches, but in other cases, additional control circuitry

is introduced, sometimes gratuitously! Motor windings, solenoids and similar devices

are all inductive loads. As such, the current through the motor winding cannot be

turned on or off instantaneously without involving infinite voltages! When the switch

controlling a motor winding is closed, allowing current to flow, the result of this is a

slow rise in current. When the switch controlling a motor winding is opened, the

result of this is a voltage spike that can seriously damage the switch unless care is

taken to deal with it appropriately. There are two basic ways of dealing with this

voltage spike. One is to bridge the motor winding with a diode, and the other is to

bridge the motor winding with a capacitor. Figure 3.2 illustrates both approaches:

Figure 6.4.7 Bridge motor winding with a diode capacitor

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The diode shown in Figure must be able to conduct the full current through the motor

winding, but it will only conduct briefly each time the switch is turned off, as the

current through the winding decays. If relatively slow diodes such as the common

1N400X family are used together with a fast switch, it may be necessary to add a

small capacitor in parallel with the diode. The capacitor shown in Figure 3.2 poses

more complex design problems! When the switch is closed, the capacitor will

discharge through the switch to ground, and the switch must be able to handle this

brief spike of discharge current. A resistor in series with the capacitor or in series

with the power supply will limit this current. When the switch is opened, the stored

energy in the motor winding will charge the capacitor up to a voltage significantly

above the supply voltage, and the switch must be able to tolerate this voltage. To

solve for the size of the capacitor, we equate the two formulas for the stored energy in

a resonant circuit:

P = C V2 / 2

P = L I2 / 2

Where:

Fig 6.4.8 Boxes used to represent switches

58

In Figure as in previous Figure boxes are used to represent switches; a control unit,

not shown, is responsible for providing the control signals to open and close the

switches at the appropriate times in order to spin the motors. The control unit is

commonly a computer or programmable interface controller, with software directly

generating the outputs needed to control the switches. As with drive circuitry for

variable reluctance motors, we must deal with the inductive kick produced when each

of these switches is turned off. Again, we may shunt the inductive kick using diodes,

but now, 4 diodes are required, as shown in Figure 3.4:

Figure 6.4.9 Drive circuitry of stepper motorThe extra diodes are required because the motor winding is not two independent

inductors; it is a single center-tapped inductor with the center tap at a fixed voltage.

This acts as an autotransformer! When one end of the motor winding is pulled down,

the other end will fly up, and visa versa. When a switch opens, the inductive kickback

will drive that end of the motor winding to the positive supply, where it is clamped by

the diode.

The opposite end will fly downward, and if it was not floating at the supply voltage

at the time, it will fall below ground, reversing the voltage across the switch at that

end. Some switches are immune to such reversals, but others can be seriously

damaged. A capacitor may also be used to limit the kickback voltage, as shown in

Figure 6.4.10:

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Figure 6.4.10 Capacitor used to limit the kickback voltage

The rules for sizing the capacitor shown in Figure 3.5 are the same as the rules for

sizing the capacitor shown in Figure 3.2, but the effect of resonance is quite different!

With a permanent magnet motor, if the capacitor is driven at or near the resonant

frequency, the torque will increase to as much as twice the low-speed torque! The

resulting torque versus speed curve may be quite complex, as illustrated in

Figure 6.4.11 Torque speed Characteristics

Figure 3.6 shows a peak in the available torque at the electrical resonant frequency,

and a valley at the mechanical resonant frequency. If the electrical resonant frequency

is placed appropriately above what would have been the cutoff speed for the motor

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using a diode-based driver, the effect can be a considerable increase in the effective

cutoff speed. The mechanical resonant frequency depends on the torque, so if the

mechanical resonant frequency is anywhere near the electrical resonance, it will be

shifted by the electrical resonance! Furthermore, the width of the mechanical

resonance depends on the local slope of the torque versus speed curve; if the torque

drops with speed, the mechanical resonance will be sharper, while if the torque

climbs with speed, it will be broader or even split into multiple resonant frequencies.

Fast decay mode or coasting mode, all switches open.

Any current flowing through the motor winding will be working against the full

supply voltage, plus two diode drops, so current will decay quickly. This mode

provides little or no dynamic braking effect on the motor rotor, so the rotor will coast

freely if all motor windings are powered in this mode. Figure 3.11 illustrates the

current flow immediately after switching from forward running mode to fast decay

mode.

Figure 3.11 Drive Ckt of Stepper Motor

Slow decay modes or dynamic braking modes.

In these modes, current may re circulate through the motor winding with minimum

resistance. As a result, if current is flowing in a motor winding when one of these

modes is entered, the current will decay slowly, and if the motor rotor is turning, it

will induce a current that will act as a brake on the rotor. Figure 3.12 illustrates one of

the many useful slow-decay modes, with switch D closed; if the motor winding has

recently been in forward running mode, the state of switch B may be either open or

closed:

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Fig 6.4.14 Slow Decay Modes

This circuit is effective for driving motors with up to about 50 ohms per winding at

voltages up to about 4.5k about twice the current it can source, and the internal

resistance of the buffers is sufficient, when sourcing current, to evenly divide the

current between the drivers that are run in parallel. This motor drive allows for all of

the useful states achieved by the driver in Figure 3.13, but these states are not

encoded as efficiently:

XYE Mode

--1 Fast decay

000 Slower decay

010 Forward 100 Reverse 110 Slow decay

Tab 6.4.1 Stepper Motor Types and their Modes

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The second dynamic braking mode, XYE=110, provides a slightly weaker braking

effect than the first because of the fact that the LS244 drivers can sink more current

than they can source.

Figure 6.4.12 Pin connection of stepper motor

This chip may be viewed as 4 independent half H-bridges, enabled in pairs, or as two full H-bridges. This is a power DIP package, with pins 4, 5, 12 and 13 designed to conduct heat to the PC board or to an external heat sink.

ULN2003:

DESCRIPTION

The ULN2003 is high voltage, high current Darlington arrays each containing seven open

collectors Darlington pairs with common emitters. Each channel rated at 500mAand can

withstand peak currents of 600mA.Suppressiondiodesare included for inductive load

driving and the inputs are pinned opposite the outputs to simplify board layout.

The four versions interface to all common logic families:

63

Tab 6.5.1 types of ULN series and their voltages

These versatile devices are useful for driving a wide range of loads including solenoids,

relays DC motors; LED displays filament lamps, thermal print heads and high power

buffers.

Fig 6.5.1 DIP 16

PIN CONNECTION

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Fig 6.5.2 Pin connection of ULN 2003

SCHEMATIC DIAGRAM

Fig 6.5.3 Schematic Diagram of ULN 2003

ABSOLUTE MAXIMUM RATINGS

65

Tab 6.5.2 Absolute max ratings of ULN 2003

THERMAL DATA

Tab 6.5.3 Thermal Data of ULN 2003

ELECTRICAL CHARACTERISTICS (Tamb = 25oC unless otherwise specified)

66

Tab 6.5.4 Electrical Characteristics of ULN 2003

67

LIGHT EMITTING DIODE

The term LED stands for Light Emitting Diode. Modern electronics relies heavily upon

LED light bulbs. For instance, LED’s transmit information from remote controls, are

used in traffic lights, digital LED clocks, flashlights, and to form images on jumbo

television screens.

These low-power, smaller-sized light emitting diode (LED) devices are based on the

company's existing standard and high brightness silicon carbide (sic) product technology.

These new devices consume 50% the power and represent cost savings over the current

standard and high brightness blue and green LED’s.

These devices are available in production quantities and are currently shipping into high

volume consumer applications. Target applications for these new devices include cellular

phones, high-resolution video boards and segmented LED displays.

Physical function:

A LED is a special type of semiconductor diode. Like a normal diode, it consists of a

chip of semi conducting material impregnated, or doped, with impurities to create a

structure called a p-n junction. As in other diodes, current flows easily from the p-side or

anode to the n-side, or cathode, but not in the reverse direction. Charge-carriers -

electrons and holes flow into the junction from electrodes with different voltages. When

an electron meets a hole, it falls into a lower energy level, and releases energy in the form

of a photon as it does so.

The wavelength of the light emitted, and therefore its color, depends on the band gap

energy of the materials forming the p-n junction. In silicon or germanium diodes, the

electrons and holes recombine by a non - radiative transition which produces no optical

emission, because these are indirect band gap materials. The materials used for an LED

have a direct band gap with energies corresponding to near-infrared, visible or near-

ultraviolet light.

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LED development began with infrared and red devices made with gallium arsenide.

Advances in materials science have made possible the production of devices with ever-

shorter wavelengths, producing light in a variety of colors.

Advantages and Disadvantages of LED’s:

Advantages: LED’s are capable of emitting light of an intended color without the use of color

filters that traditional lighting methods require.

The shape of the LED package allows light to be focused. Incandescent and

fluorescent sources often require an external reflector to collect light and direct it

in a useable manner.

LED’s are insensitive to vibration and shocks, unlike incandescent and discharge

sources.

LED’s are built inside solid cases that protect them, making them hard to break

and extremely durable.

LED’s have an extremely long life span: typically ten years, twice as long as the

best fluorescent bulbs and twenty times longer than the best incandescent bulbs.

Further LED’s fail by dimming over time, rather than the abrupt burnout of

incandescent bulbs.

LED’s give off less heat than incandescent light bulbs with similar light output.

LED’s light up very quickly. An illumination LED will achieve full brightness in

approximately 0.01 seconds, 10 times faster than an incandescent light bulb (0.1

second), and many times faster than a compact fluorescent lamp, which starts to

come on after 0.5 seconds or 1 second, but does not achieve full brightness for 30

seconds or more. A typical red indicator LED will achieve full brightness in

microseconds, or possibly less if it's used for communication devices.

69

Disadvantages:

LED’s are currently more expensive than more conventional lighting

technologies. The additional expense partially stems from the relatively low

lumen output (requiring more light sources) and drive circuitry/power supplies

needed. A good measure to compare lighting technologies is lumen/dollar.

LED performance largely depends on the ambient temperature of the operating

environment. "Driving" an LED 'hard' in high ambient temperatures may result in

overheating of the LED package, eventually to device failure. Adequate heat

sinking is required to maintain long life. This is especially important when

considering automotive/military applications where the device must operate over

a large range of temperatures, with government-regulated output.

LED applications:

List of known applications for LEDs

.LED’s are used as informative indicators in various types of embedded systems:

Status indicators, e.g. on/off lights on professional instruments and consumers

audio/video equipment.

In toys, especially as light up "eyes" of robot toys.

Seven segment displays, in calculators and measurement instruments, although

now mostly replaced by liquid crystal displays.

Thin, lightweight message displays, e.g. in public information signs (at airports

and railway stations and as destination displays for trains, buses, trams and

ferries).

Red or yellow LED’s are used in indicator and [alpha] numeric displays in

environments where night vision must be retained: aircraft cockpits, submarine

and ship bridges, astronomy observatories, and in the field, e.g. night time animal

watching and military field use.

70

LED’s may also be used to transmit digital information:

Remote controls for TVs, VCRs, etc, using Infrared LED’s.

In fiber optic communications.

In dot matrix arrangements for displaying messages.

LED’s find further application in safety devices, where high brightness and reliability are

critical:

In traffic signals, LED clusters are replacing colored incandescent bulbs.

In level crossing lights, red LED’s have been used to replace incandescent bulbs.

In car brake and indicator lights, where the quick-on characteristic of LED’s

enhances safety.

In bicycle lighting; also for pedestrians to be seen by car traffic.

Signaling and emergency beacons or strobes.

Navigation lights on boats, which are red, green, and white and shine in specific

directions. Boats use direct current batteries to power their lights, so not only does

that match the requirements of LED’s, but the efficiency of colored LED’s is a

big advantage.

LED’s are also used for illumination:

In photographic darkrooms, red or yellow LED’s are also used for providing

lighting, which does not lead to unwanted exposure of the film.

In flashlights (US) / torches (UK), and backlights for LCD screens.

As a replacement for incandescent and fluorescent bulbs in home and office

lighting, an application known as Solid State Lighting (SSL).

As disco/club lighting products.

In projectors. LED projectors are smaller, lighter, and produce much less heat

than incandescent technology.

LED’s have additional applications not categorized above:

71

Movement sensors, for example, in mechanical and optical computer mice and

trackballs.

In pulse oximeters, both a red and an infra-red LED are used.

In LED printers such as high-end color printers.

In phototherapy, the use of light for healing purposes.

More recently, LEDs have been used as a replacement to incandescent bulbs for

Christmas lights.

LCD DISPLAY

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INTRODUCTION:

Liquid crystal displays (LCDs) have materials which combine the properties of

both liquids and crystals. Rather than having a melting point, they have a temperature

range within which the molecules are almost as mobile as they would be in a liquid, but

are grouped together in an ordered form similar to a crystal.

An LCD consists of two glass panels, with the liquid crystal material sand

witched in between them. The inner surface of the glass plates are coated with transparent

electrodes which define the character, symbols or patterns to be displayed polymeric

layers are present in between the electrodes and the liquid crystal, which makes the liquid

crystal molecules to maintain a defined orientation angle.

One each polarisers are pasted outside the two glass panels. These polarisers

would rotate the light rays passing through them to a definite angle, in a particular

direction

When the LCD is in the off state, light rays are rotated by the two polarisers and

the liquid crystal, such that the light rays come out of the LCD without any orientation,

and hence the LCD appears transparent.

When sufficient voltage is applied to the electrodes, the liquid crystal molecules

would be aligned in a specific direction. The light rays passing through the LCD would

be rotated by the polarisers, which would result in activating / highlighting the desired

characters.

The LCD’s are lightweight with only a few millimeters thickness. Since the

LCD’s consume less power, they are compatible with low power electronic circuits, and

can be powered for long durations.

The LCD’s don’t generate light and so light is needed to read the display. By

using backlighting, reading is possible in the dark. The LCD’s have long life and a wide

operating temperature range.

Changing the display size or the layout size is relatively simple which makes the

LCD’s more customer friendly.

The LCDs used exclusively in watches, calculators and measuring instruments are

the simple seven-segment displays, having a limited amount of numeric data. The recent

advances in technology have resulted in better legibility, more information displaying

73

capability and a wider temperature range. These have resulted in the LCDs being

extensively used in telecommunications and entertainment electronics. The LCDs have

even started replacing the cathode ray tubes (CRTs) used for the display of text and

graphics, and also in small TV applications.

POWER SUPPLY:

The power supply should be of +5V, with maximum allowable transients of

10mv. To achieve a better / suitable contrast for the display, the voltage (VL) at pin 3

should be adjusted properly.

A module should not be inserted or removed from a live circuit. The ground

terminal of the power supply must be isolated properly so that no voltage is induced in it.

The module should be isolated from the other circuits, so that stray voltages are not

induced, which could cause a flickering display.

HARDWARE:

Develop a uniquely decoded ‘E’ strobe pulse, active high, to accompany each

module transaction. Address or control lines can be assigned to drive the RS and R/W

inputs.

Utilize the Host’s extended timing mode, if available, when transacting with the

module. Use instructions, which prolong the Read and Write or other appropriate data

strobes, so as to realize the interface timing requirements.

If a parallel port is used to drive the RS, R/W and ‘E’ control lines, setting the ‘E’

bit simultaneously with RS and R/W would violate the module’s set up time. A separate

instruction should be used to achieve proper interfacing timing requirements.

MOUNTING:

Cover the display surface with a transparent protective plate, to protect the

polarizer.

74

Don’t touch the display surface with bare hands or any hard materials. This will

stain the display area and degrade the insulation between terminals.

Do not use organic solvents to clean the display panel as these may adversely

affect tape or with absorbant cotton and petroleum benzene.

The processing or even a slight deformation of the claws of the metal frame will

have effect on the connection of the output signal and cause an abnormal display.

Do not damage or modify the pattern wiring, or drill attachment holes in the PCB.

When assembling the module into another equipment, the space between the module and

the fitting plate should have enough height, to avoid causing stress to the module surface.

Make sure that there is enough space behind the module, to dissipate the heat

generated by the ICs while functioning for longer durations.

When an electrically powered screwdriver is used to install the module, ground it

properly.

While cleaning by a vacuum cleaner, do not bring the sucking mouth near the

module. Static electricity of the electrically powered driver or the vacuum cleaner may

destroy the module.

ENVIRONMENTAL PRECAUTIONS:

Operate the LCD module under the relative condition of 40C and 50% relative

humidity. Lower temperature can cause retardation of the blinking speed of the display,

while higher temperature makes the overall display discolor.

When the temperature gets to be within the normal limits, the display will be

normal. Polarization degradation, bubble generation or polarizer peel-off may occur with

high temperature and humidity.

Contact with water or oil over a long period of time may cause deformation or

color fading of the display. Condensation on the terminals can cause electro-chemical

reaction disrupting the terminal circuit.

TROUBLE SHOOTING

75

INTRODUCTION:

When the power supply is given to the module, with the pin 3 (VL) connected to

ground, all the pixels of a character gets activated in the following manner:

All the characters of a single line display, as in CDM 16108.

The first eight characters of a single line display, operated in the two-line display

mode, as in CDM 16116.

The first line of characters of a two-line display as in CDM 16216 and 40216. The

first and third line of characters of a four-line display operated in the two-line display

mode, as in CDM 20416.

If the above mentioned does not occur, the module should be initialized by

software.

Make sure that the control signals ‘E’ , R/W and RS are according to the interface

timing requirements.

IMPROPER CHARACTER DISPLAY:

When the characters to be displayed are missing between, the data read/write is

too fast. A slower interfacing frequency would rectify the problem.

When uncertainty is there in the start of the first characters other than the

specified ones are rewritten, check the initialization and the software routine.

In a multi-line display, if the display of characters in the subsequent lines does’nt

take place properly, check the DD RAM addresses set for the corresponding display

lines.

When it is unable to display data, even though it is present in the DD RAM, either

the display on/off flag is in the off state or the display shift function is not set properly.

When the display shift is done simultaneous with the data write operation, the data may

not be visible on the display.

If a character not found in the font table is displayed, or a character is missing, the

CG ROM is faulty and the controller IC have to be changed

If particular pixels of the characters are missing, or not getting activated properly,

there could be an assembling problem in the module.

76

In case any other problems are encountered you could send the module to our

factory for testing and evaluation.

CRYSTALONICS DISPLAY

INTRODUCTION:

Crystalonics dot –matrix (alphanumeric) liquid crystal displays are available in

TN, STN types, with or without backlight. The use of C-MOS LCD controller and driver

ICs result in low power consumption. These modules can be interfaced with a 4-bit or 8-

bit micro processor /Micro controller.

The built-in controller IC has the following features:

Correspond to high speed MPU interface (2MHz)

80 x 8 bit display RAM (80 Characters max)

9,920 bit character generator ROM for a total of 240 character fonts. 208

character fonts (5 x 8 dots) 32 character fonts (5 x 10 dots)

64 x 8 bit character generator RAM 8 character generator RAM 8 character fonts

(5 x 8 dots) 4 characters fonts (5 x 10 dots)

Programmable duty cycles

1/8 – for one line of 5 x 8 dots with cursor

1/11 – for one line of 5 x 10 dots with cursor

1/16 – for one line of 5 x 8 dots with cursor

Wide range of instruction functions display clear, cursor home, display on/off,

cursor on/off, display character blink, cursor shift, display shift.

Automatic reset circuit, that initializes the controller / driver ICs after power on.

77

FUNCTIONAL DESCRIPTION OF THE CONTROLLER IC REGISTERS:

The controller IC has two 8 bit registers, an instruction register (IR) and a data

register (DR). The IR stores the instruction codes and address information for display

data RAM (DD RAM) and character generator RAM (CG RAM). The IR can be written,

but not read by the MPU.

The DR temporally stores data to be written to /read from the DD RAM or CG

RAM. The data written to DR by the MPU, is automatically written to the DD RAM or

CG RAM as an internal operation.

When an address code is written to IR, the data is automatically transferred from

the DD RAM or CG RAM to the DR. data transfer between the MPU is then completed

when the MPU reads the DR. likewise, for the next MPU read of the DR, data in DD

RAM or CG RAM at the address is sent to the DR automatically. Similarly, for the MPU

write of the DR, the next DD RAM or CG RAM address is selected for the write

operation.

The register selection table is as shown below:

RS R/W Operation

0 0 IR write as an internal operation

0 1 Read busy flag (DB7) and address counter

(DB0 to DB6)

1 0 DR write as an internal operation (DR to DD

RAM or CG RAM)

1 1 DR read as an internal operation (DD RAM

or CG RAM to DR)

BUSY FLAG:

When the busy flag is1, the controller is in the internal operation mode, and the

next instruction will not be accepted.

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When RS = 0 and R/W = 1, the busy flag is output to DB7.

The next instruction must be written after ensuring that the busy flag is 0.

ADDRESS COUNTER:

The address counter allocates the address for the DD RAM and CG RAM

read/write operation when the instruction code for DD RAM address or CG RAM

address setting, is input to IR, the address code is transferred from IR to the address

counter. After writing/reading the display data to/from the DD RAM or CG RAM, the

address counter increments/decrements by one the address, as an internal operation. The

data of the address counter is output to DB0 to DB6 while R/W = 1 and RS = 0.

DISPLAY DATA RAM (DD RAM)

The characters to be displayed are written into the display data RAM (DD RAM),

in the form of 8 bit character codes present in the character font table. The extended

capacity of the DD RAM is 80 x 8 bits i.e. 80 characters.

CHARATCER GENERATOR ROM (CG ROM)

The character generator ROM generates 5 x 8 dot 5 x 10 dot character patterns

from 8 bit character codes. It generates 208, 5 x 8 dot character patterns and 32, 5 x 10

dot character patterns.

CHARACTER GENERATOR RAM (CG RAM)

In the character generator RAM, the user can rewrite character patterns by

program. For 5 x 8 dots, eight character patterns can be written, and for 5 x 10 dots, four

character patterns can be written.

INTERFACING THE MICROPROCESSOR / CONTROLLER:

The module, interfaced to the system, can be treated as RAM input/output,

expanded or parallel I/O.

79

Since there is no conventional chip select signal, developing a strobe signal for

the enable signal (E) and applying appropriate signals to the register select (RS) and

read/write (R/W) signals are important.

The module is selected by gating a decoded module – address with the host – processor’s

read/write strobe. The resultant signal, applied to the LCDs enable (E) input, clocks in the

data.

The ‘E’ signal must be a positive going digital strobe, which is active while data and

control information are stable and true. The falling edge of the enable signal enables the

data / instruction register of the controller. All module timings are referenced to specific

edges of the ‘E’ signal. The ‘E’ signal is applied only when a specific module transaction

is desired.

The read and write strobes of the host, which provides the ‘E’ signals, should not be

linked to the module’s R/W line. An address bit which sets up earlier in the host’s

machine cycle can be used as R/W.

When the host processor is so fast that the strobes are too narrow to serve as the ‘E’ pulse

a. Prolong these pulses by using the hosts ‘Ready’ input

b. Prolong the host by adding wait states

c. Decrease the Hosts Crystal frequency.

Inspite of doing the above mentioned, if the problem continues, latch both the data and

control information and then activate the ‘E’ signal

When the controller is performing an internal operation he busy flag (BF) will set and

will not accept any instruction. The user should check the busy flag or should provide a

delay of approximately 2ms after each instruction.

The module presents no difficulties while interfacing slower MPUs.

The liquid crystal display module can be interfaced, either to 4-bit or 8-bit MPUs.

For 4-bit data interface, the bus lines DB4 to DB7 are used for data transfer, while DB0

to DB3 lines are disabled. The data transfer is complete when the 4-bit data has been

transferred twice.

The busy flag must be checked after the 4-bit data has been transferred twice. Two more

4-bit operations then transfer the busy flag and address counter data.

For 8-bit data interface, all eight-bus lines (DB0 to DB7) are used.

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POWER SUPPLIES

INTRODUCTION:

The present chapter introduces the operation of power supply circuits built using

filters, rectifiers, and then voltage regulators. Starting with an ac voltage, a steady dc

voltage is obtained by rectifying the ac voltage, then filtering to a dc level, and finally,

regulating to obtain a desired fixed dc voltage. The regulation is usually obtained from an

IC voltage regulator unit, which takes a dc voltage and provides a somewhat lower dc

voltage, which remains the same even if the input dc voltage varies, or the output load

connected to the dc voltage changes.

A block diagram containing the parts of a typical power supply and the voltage at

various points in the unit is shown in fig 19.1. The ac voltage, typically 120 V rms, is

connected to a transformer, which steps that ac voltage down to the level for the desired

dc output. A diode rectifier then provides a full-wave rectified voltage that is initially

filtered by a simple capacitor filter to produce a dc voltage. This resulting dc voltage

usually has some ripple or ac voltage variation. A regulator circuit can use this dc input to

provide a dc voltage that not only has much less ripple voltage but also remains the same

dc value even if the input dc voltage varies somewhat, or the load connected to the output

dc voltage changes. This voltage regulation is usually obtained using one of a number of

popular voltage regulator IC units.

Transformer Rectifier Filter IC regulator Load

IC VOLTAGE REGULATORS:

81

Voltage regulators comprise a class of widely used ICs. Regulator IC units

contain the circuitry for reference source, comparator amplifier, control device, and

overload protection all in a single IC. Although the internal construction of the IC is

somewhat different from that described for discrete voltage regulator circuits, the external

operation is much the same. IC units provide regulation of either a fixed positive voltage,

a fixed negative voltage, or an adjustably set voltage.

A power supply can be built using a transformer connected to the ac supply line to

step the ac voltage to a desired amplitude, then rectifying that ac voltage, filtering with a

capacitor and RC filter, if desired, and finally regulating the dc voltage using an IC

regulator. The regulators can be selected for operation with load currents from hundreds

of milliamperes to tens of amperes, corresponding to power ratings from milliwatts to

tens of watts.

THREE-TERMINAL VOLTAGE REGULATORS:

Fig shows the basic connection of a three-terminal voltage regulator IC to a load.

The fixed voltage regulator has an unregulated dc input voltage, Vi, applied to one input

terminal, a regulated output dc voltage, Vo, from a second terminal, with the third

terminal connected to ground. For a selected regulator, IC device specifications list a

voltage range over which the input voltage can vary to maintain a regulated output

voltage over a range of load current. The specifications also list the amount of output

voltage change resulting from a change in load current (load regulation) or in input

voltage (line regulation).

Fixed Positive Voltage Regulators:

GND

82

IN OUT 7805 GND From

Transformer secondary

The series 78 regulators provide fixed regulated voltages from 5 to 24 V. Figure

19.26 shows how one such IC, a 7812, is connected to provide voltage regulation with

output from this unit of +12V dc. An unregulated input voltage Vi is filtered by capacitor

C1 and connected to the IC’s IN terminal. The IC’s OUT terminal provides a regulated +

12V which is filtered by capacitor C2 (mostly for any high-frequency noise). The third IC

terminal is connected to ground (GND). While the input voltage may vary over some

permissible voltage range, and the output load may vary over some acceptable range, the

output voltage remains constant within specified voltage variation limits. These

limitations are spelled out in the manufacturer’s specification sheets. A table of positive

voltage regulated ICs is provided in table 19.1.

TABLE 19.1 Positive Voltage Regulators in 7800 series

IC Part Output Voltage

(V)

Minimum Vi (V)

7805 +5 7.3

7806 +6 8.3

7808 +8 10.5

7810 +10 12.5

7812 +12 14.6

7815 +15 17.7

7818 +18 21.0

7824 +24 27.1

83