verilogxl tut

8/6/2019 Verilogxl Tut

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1

Introduction

CGo BackTable of ContentsIndexnus 1 of 68

I n t r o d u c t i o nVe r i lo g -XL is a s i m u l a t o r t h a t a l lo w s y o u t o t e s t t h e l o gi c of a d e s i gn .The p roces s o f logic s imu la t ion in Ver i log-XL is a s fo l lows :

1 . D e s c r ib e t h e d e s i gn t o Ve r ilo g- XL.2 . Te ll Ve r ilo g- XL h o w t o a p p ly s t i m u li t o t h e d e s i gn .3 . Te ll Ve r ilo g- XL h o w t o r e p o r t it s r es u lt s .A des cr ip t ion o f a d es ign i s ca l led a m ode l . In Ver i log-XL, you wr i t em o d e l s i n t h e Ver i lo g H a r d w a r e D e s c r i p t io n La n g u a g e (t h e Ve r i lo gHDL).

You te l l Ver i log-XL h ow to ap p ly s t imu l i to a m ode l o f your des ign an dh o w t o r e p o r t t h e r e s u l t s b y w r it i n g a m o d e l of a t e s t fi xt u r e fo r y ou rd e v ic e . Ve r i lo g -XL h a s a u n i fi ed m o d e l in g a n d c o m m a n d l a n g u a g e .

P u r p o s eTh e p u r p o s e o f t h i s t u t o r ia l is t o s h o w yo u h o w t o m o d e l a n d s i m u la t ea b a s i c d e s i g n . I t s h o w s y o u h o w t o u s e t h e Ve r i lo g H D L t o m o d e l a n da p p l y s t i m u l i t o a d e v ic e a n d t e l l Ve r i lo g -XL h o w t o r e p o r t t h e r e s u l t s .

I n t e n d e d A u d i e n c eT h i s t u t o r i a l i s in t e n d e d f o r n e w u s e r s o f Ve r i lo g -XL w h o u n d e r s t a n dd i g it a l l og ic a n d h a v e e x p e r i e n c e w it h a h i gh - l e ve l p r o g r a m m i n gla n g u a g e . Th i s t u t o r ia l is a ls o i n t e n d e d fo r u s e r s w h o a r e e va l u a t i n gVerilog-XL.

C o n v e n t i o n sTh i s t u t o r ia l c o n t a i n s a n u m b e r o f g r a p h i c s t o h e lp y o u fin dim p o r t a n t in f or m a t io n a n d k e y c on c e p t s . T h e s e g r a p h ic s a n d t h e irp u r p o s e a r e a s fo ll ow s :

N o t e s (ind icat ed by a poin t in g finger )su ggest different ways tocover the m ater ia l in this tu tor ia l or point out importan t facts a bout theconcepts discussed.


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2

Introduction


C o n c e p t s (i n a fo ld e r m a r k e d C O N C E P TS )d e fi n e i d e a s t h a t a r ee s s e n t i a l t o y ou r u n d e r s t a n d i n g o f t h e Ve r i lo g- XL m o d e li n g a n ds i m u la t i on p r o c e s s .

C o m p a r i s o n s (i n d i c a t e d b y a b a l a n c e s c a l e ) c o m p a r e im p o r t a n tc o n c e p t s

M e t h o dT h i s t u t o r i a l u s e s t h e f ol lo w in g m e t h o d s :

P r es e n t t h e m o d e lin g a n d s i m u la t in g p r o ce s s e s on e s t e p a t a t im e ,e x p la i n i n g w h y yo u t a k e e a c h s t e p .

P r es e n t c on c e p t s a s t h e y a r e n e e d ed t o p e r fo r m a s t e p .

C om p a r e c on c e p t s wh e n t h e c o m p a r is o n is w or t h w h i le .

T h i s t u t o r i a l e xp l a i n s h o w t o d e v e lo p t h r e e m o d e l s . Tw o o f t h e s e m o d e l sd e s c r i b e t h e d e s i gn . T h e t h i r d m o d e l d e s c r i b e s h o w a t e s t fi xt u r e d r i ve st h e d e s ig n a n d r e p o r t s t h e s i m u la t i on r e s u lt s . T h e s e m o d e ls w o r k

t o g e t h e r i n a h i er a c h y. Aft e r t h e e xp l a n a t i o n o f t h e m o d e l s , t h i s t u t o r i a le x p la i n s h o w t o r u n t h e s im u la t i on o f t h e s e m o d e ls .

E a c h s t e p i n t h e m o d e li n g p r oc e s s i s a n e n t r y in a m o d e l of a s t a t e m e n t ,d e c la r a t i o n , o r s o m e o t h e r l a n g u a g e c o n s t r u c t o r p a r t o f a l a n g u a g ec o n s t r u c t . Wit h e a c h n e w e n t r y, t h is t u t o r ia l s h o ws t h e e n t i r e m o d e l wit ht h e n e w e n t r y in b o ld f a c e t yp e . Th e t u t o r i a l t h e n e x p l a i n s o r i ll u s t r a t e st h e c o n t e n t s a n d p u r p o s e o f e a c h e n t r y.

Pl e a s e n o t e : This tut orial provides a n explan ation of each ent ry or step inthe m odeling a nd s imu lat ion processes . Som e entr ies are very s imilar to previousentr ies and you ma y be able to un derstan d them without reading the explanat ion.If you u nd erstan d an entry you can save t ime by skipping the explana t ion an dmoving on to the n ext entry. If you are n ot su re abou t what an entry does or why

you ma de an entry, you can read th e explana t ion th at follows it .

g a t e - l e v e l m o d e l a m o d e l t h a td e s c r i b e s t h e g a t e s , a n d t h ec o n n e c t i o n s b e t w e e n g a t e s , i n ad e s i g n .

k e y w o r d a t e r m t h a t h a s a s p e c i a lmeaning in the Ver i log HDL. Akeyword te l l s Ver i log-XL tha t i t i sb e g i n n i n g t o r e a d a s t a t e m e n t ,d e c l a r a t i o n o r s o m e o t h e r k i n d o f

l a n g u a g e c o n s t r u c t . K e y w o r d s a r e t h ee s s e n t i a l p a r t s o f l a n g u a g ec o n s t r u c t s .

C O N C E P T S


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The Fu n ctiona l Spec for th e Design


Th e F u n c t i o n a l S pe c fo r t h e D e s i g nTh i s s e c t i on d e s c r ib e s t h e d e s i gn t h a t t h is t u t o r ia l m o d e ls a n d

s i m u l a t e s .Th e d e s i gn is a 4 - b i t c lo c k e d r e gis t e r t h a t o p e r a t e s o n b o t h p h a s e s o f t h ec l oc k . T h e d e s i gn i n c l u d e s a c l e a r l in e t h a t i s a c t i ve w h e n l ow. It sc o m p o n e n t s a r e D - t y p e m a s t e r - s l a v e fl ip - fl op s . F i gu r e 1 s h o w s as c h e m a t i c f o r t h i s r e g i s t e r.

Figure 1:A 4-bit register

T h e in p u t s t o t h i s r e g is t e r a r e t h e fo ll ow in g s ig n a l s :

a s i n gle b it c le a r lin e

a s i n gle b it c lo ck lin e

a 4 -b it da ta b u s

Th e o u t p u t fr o m t h is r e g is t e r i s a 4 - b it b u s .

F i gu r e 2 s h o w s a s c h e m a t i c o f t h e D - t yp e m a s t e r - s l a ve fl ip - fl op t h a t i st h e b a s ic c o m p o n e n t o f t h e r e gis t e r.

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The Fu n ctiona l Spec for th e Design


Figure 2: A D-type master-slave flip-flop

In th i s D- type mas te r- s lave f l ip - f lop , the NAND ga tes l abe l led nd3 a n dnd7 h a v e a p r o p a g a t i on d e l a y o f n i n e n a n o s e c o n d s . Al l o t h e r N AN D ga t e sa n d i n v er t e r s h a v e a p r o p a g a t i on d e la y o f 1 0 n a n o s e c on d s .

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5

Writing a Hierar chical Model


Wri t i ng a H ie r a r ch i ca l Mode lTh i s t u t o r ia l u s e s t h e "b o t t o m - u p " a p p r o a c h t o a d e s i gn . It s h o w s y ou

h o w t o w r it e a h i er a r c h i c a l m o d e l of t h i s 4 - b i t r e g is t e r b y fi r s t m o d e l in gt h e D - t y p e m a s t e r - s l a v e fl ip - fl op a n d u s i n g c o p i es o f t h a t m o d e l a sb u i ld i n g b l o ck s .

B e fo r e yo u b e g in t o w r i t e t h i s m o d e l yo u m u s t u n d e r s t a n d t h e fo ll ow in gc o n c e p t s :

C O N C E P T S

g a t e - l e v e l m o d e l a m o d e l t h a t d e s c r ib e s t h e ga t e s a n d t h ec o n n e c t i on s b e t w e en g a t e s in a d e s i gn .

k e y w o r d A t e r m t h a t h a s a s p e c i a l m e a n i n g in t h e Ve r i lo g H D L. Ak e y w o r d t e l ls Ve r il og - XL t h a t i t is b e g in n i n g t o r e a d a s t a t e m e n t ,d e c la r a t io n o r s o m e o t h e r k i n d o f la n g u a g e c o n s t r u c t . Ke yw o r d s a r et h e e s s e n t ia l p a r t s o f la n g u a g e c on s t r u c t s .

l o g i c v a l u e s Ver i log-XL ha s fou r b as ic log ic va lu es :

1 logic 1 , h igh or tr u e c on d it ion0 logic 0 , low or fa ls e con d it ionx u n k n own va lu ez h igh -im ped a n c e s t a t e

Ver i log-XL repor t s a logic va lue o f x fo r m o s t o b j e c t s in a d e s i gn t h a ts t o r e o r t r a n s m it v a lu e s a t t h e s t a r t o f a s im u la t i on , b e fo r e yo u a p p l ys t i m u l u s . I t a l s o r e p o r t s a l og ic va l u e o f x w h e n it c a n n o t d e c id eb e t we e n a 1 a n d a 0 .

Ver i log-XL repor t s a logic va lue o f z w h e n a n o b j e ct in a d e s i gn t h a tt r a n s m it s a va l u e h a s n o c o n n e c t io n t h r o u g h w h i ch Ve r ilo g- XL ca na s s ig n o r p r o p a g a t e a v a l u e o f 1 , 0 o r x t o t h a t o b j ec t .

m o d u l e Th e b a s i c c o n s t r u c t t h a t y ou u s e t o b u i ld Ve r i lo g H D Lm o d e ls . Al l t h e e le m e n t s o f t h e Ve r i lo g la n g u a g e m u s t b e c o n t a i n e dw it h i n a m o d u l e. Al l m o d u l es c o n t a i n d e s c r i p t i on s o f a d e s i gn o r p a r to f a d e s i g n , o r d e s c r i b e h o w a t e s t f ix t u r e fo r t h e d e v ic e d r i ve s t h ed e vic e a n d r e p o r t s it s r e s u lt s .

por t A c o n n e c t i on t o a m o d u l e . Lo g ic va l u e s p r o p a g a t e i n t o a n d o u to f a m o d u l e t h r o u g h i t s p o r t s .

s c a l a r An a t t r i b u t e o f a d e s i gn c o m p o n e n t t h a t s t o r e s o rp r o p a g a t e s o n l y o n e b i t o f d a t a .

v e c t o r An a t t r i b u t e o f a d e s i gn c o m p o n e n t t h a t c a n s t o r e o rp r o p a g a t e m o r e t h a t o n e b i t o f d a t a .

i d e n t i f i e r A n a m e t h a t y o u a s s i g n t o a n o b j e c t . Id e n t i fi er s a l lo wy o u t o r e fe r t o o n e o b je c t in m o r e t h a n o n e p l a c e in y o u r d e s i g n . S o m eo f t h e o b j e ct s t o w h i c h y o u c a n a s s ig n a n id e n t i fi er a r e m o d u l e s a n dg a t e s .


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T h e fo ll ow in g c o m p a r i s o n m a y b e h e lp f u l :

k e y w o rd v s . i d e n t i f i e r Ke y wo r d s a r e t h e p r e - d e fi n e d i d e n t i fy in ge l em e n t s o f l a n g u a g e c o n s t r u c t s t h e y t e l l Ve r i lo g -XL t h a t i s h a s

e n c o u n t e r e d a l a n g u a g e c o n s t r u c t o r h o w t o ex e cu t e a la n g u a g ec o n s t r u c t . Id e n t i fi er s a r e t h e id e n t i fy in g e le m e n t s o f d e s i g n o b j e c t s s u c ha s m o d u le s o r g a t e s y ou u s e t h e m t o d i s t in g u is h b e t w e en d e s i gnobjec t s . You te l l Ver i log-XL how t o de fine an iden t i fi e r.

T h e F l i p - F l o p M o d e lThe f ir s t m ode l i s a ga t e - leve l mode l o f a D- t ype m as te r- s lave fl ip - f lop .Yo u w r i t e t h i s m o d e l a s a Ve r i lo g H D L m o d u l e .

1 . T h e fi r s t s t e p i s t o o p e n a t e x t fi le . U s e t h e c o m m a n d s a n d t e x t e d i t o rt h a t a p p l ie s t o y o u r p l a t f o r m a n d o p e r a t i n g s y s t e m t o o p e n t h i s fi le . Yo uc a n a s s ig n a n y n a m e t o t h i s file , b u t fo r p u r p o s e s o f t h is t u t o r ia l , e n t e r

t h e n a m e flop.v .T h e M o d u l e H e a d e r

Al l m o d u l es b e g in w it h a m od u le h ea d er . The fo l lowing s teps show yout h e e n t r i e s in a m o d u l e h e a d e r.

2 . T h e fi r s t e n t r y is t h e fi r s t t e r m i n a m o d u l e .

Al l m o d u l e h e a d e r s b e g i n w i t h t h e k e y w or d module .

3 . T h e n e x t e n t r y is t h e m o d u l e i d e n t i fi er.

T h i s e n t r y a s s i gn s t h e id e n t i fi er flop t o t h e m o d u l e . Yo u e n t e r t h isid e n t i fie r w h e n y ou u s e a c o p y of t h i s m o d u l e in a n o t h e r m o d u l e .

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4 . T h e n e x t e n t r y is a p o r t c o n n e c t io n l is t .

All m o d u l e s t h a t h a v e p o r t s m u s t i n c l u d e a p o r t c o n n e c t io n l is t i n t h e irm o d u l e h e a d e r .

P o r t c on n e c t io n l is t s b e g in w it h a l e ft p a r e n t h e s is a n d e n d w it h a r ig h tp a r e n t h e s i s .

T h i s p o r t c o n n e c t io n l is t c o n t a i n s fi ve p o r t s ; t h e i r n a m e s o r id en tif iersare as fo l lows :

1 . d a t a2 . c loc k 3 . c le a r4 . q5 . q bIn a p o r t c on n e c t io n l is t , y ou s e p a r a t e p o r t n a m e s w it h c o m m a s .

Th e p o r t c o n n e c t io n l is t i s t h e la s t e n t r y i n t h i s m o d u l e h e a d e r s o t h ep o r t c o n n e c t i on l is t i s fo ll ow e d b y a s e m i c ol on ( ; ). A s e m i c ol on e n d s t h em o d u l e h e a d e r .

P o r t D e c l a r a t i o n s

T h e fo ll ow in g e n t r i e s a r e p o r t d e c l a r a t i on s . P o r t d e c l a r a t i o n s t e l lVer i log-XL the fo l lowing in format ion about a por t :

t h e p or ts t yp e

t h e p or t s s ize

A m o d u le c a n h a v e t h r e e t y p e s o f p o r t s :

1 . in p u t p or t s2 . ou t p u t p or ts3 . in ou t p or tsLo gi c v a lu e s p r o p a g a t e i n t o a m o d u l e t h r o u g h a n in p u t p o r t , a n dp r o p a g a t e o u t o f a m o d u l e t h r o u g h a n o u t p u t p o r t . Lo gic va l u e s c a n

p r o p a g a t e b o t h i n t o a n d o u t o f a m o d u le t h r o u g h a n i n o u t p o r t .P o r t d e c l a r a t i o n s c a n a l s o s p e c i fy t h e s i z e of t h e p o r t . T h e r e a r e s cala r a n d vector p o r t s . S c a l a r p o r t s a r e c o n n e c t i on s fr o m a n d t o o n e - b ito b je c t s i n a n o t h e r m o d u l e . Ve c t or p o r t s a r e c o n n e c t i on fr o m a n d t om u lt ib i t o b je c t s i n a n o t h e r m o d u l e . If a p o r t is a ve c t or p o r t , y o u m u s ts p e c ify i t s s i z e in i t s p o r t d e c l a r a t i o n .

module flop (data,clock,clear,q,qb);


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Th i s e n t r y a l s o e n d s t h e p o r t d e c la r a t io n s in t h i s e x a m p le . Th e la b e l edi t e m s i n t h e fo ll ow in g c o p y of t h e s c h e m a t i c s h o w s t h e o b j e c t s t h a t a r en o w in m o d u l e flop.

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G a t e D e c l a r a t i o n s

Th e e n t r i es t h a t y o u m a k e n e x t s p e c ify ga t e s a n d t h e i r c on n e c t io n s .B e fo r e yo u m a k e t h e s e e n t r i e s , yo u m u s t u n d e r s t a n d t h e fo llo w in gc o n c e p t s :

C O N C E P T S

d a t a t y p e A c la s s i fi c a t io n o f a v a r i a b l e t h a t c a n s t o r e o r p r o p a g a t ev a lu e s . Th e m a i n g r o u p s o f d a t a t y p e s a r e n e t s a n d reg is te rs .

n e t A g r ou p o f d a t a t y p e s t h a t r e p r e s e n t s p h y s i c a l c o n n e c t i on sb e t w e e n o b j e c t s i n y o u r d e s i g n .

r e g i s t e r In t h e Ve r i lo g H D L r e g is t e r s a r e a g r o u p o f d a t a t y p e st h a t s t o r e s d a t a ; a r e g is t e r i s a p r o gr a m m i n g v a r ia b l e , n o t ah a r d w a r e r e g is t e r t h a t c a n b e d r i ve n b y a n o t h e r p a r t o f a d e s ig n .

re g A r e gis t e r d a t a t y p e t h a t y o u c a n u s e fo r g en e r a l p u r p o s e ss u c h a s h o ld i n g a v a lu e .

wire A n e t d a t a t y p e t h a t m o d e l s a p h y s ic a l co n n e c t io n t h a tn e it h e r p e r f o r m s w i r e d l o gi c n o r s t o r e s a c h a rg e . I t is t y p i c a l ly u s e dt o c o n n e c t a g a t e t o t h e g a t e s l o a d .

p r i m i t i v e A g a t e o r a t r a n s i s t o r.

p ri m i t i v e d e c l a ra t i o n A s t a t em en t th a t t e l ls Ver i log-XL to ap p lyi t s d e f in i t i o n fo r a t y p e o f g a t e o r t r a n s i s t o r t o c e r t a i n o b j e c t s .P r i m i t iv e d e c la r a t i on s c o n t a i n prim it ive ins ta nce s t h a t s p e c i f y t h eiden t i fi e r s o f the ob jec t s to wh ich Ver i log-XL ap p l ies th e def in i t iona n d t h e c o n n e c t io n s t o t h o s e o b je c t s . P r im i t ive d e c la r a t io n s a r es o m e t i m e s c a l l e d prim it ive ins ta nt iations . P r i m i t iv e d e c l a r a t i o n s o f g a t e s a r e s o m e t i m e s c a l l e d ga te i n s t an t ia t i ons .

p ri m i t i v e i n s t a n c e A s ingle u se of Veri log-XLs de f in i t ion for at y p e o f g a t e o r t r a n s i s t o r. A p r i m i t i ve in s t a n c e i n c l u d e s a t e r m i n a ll is t t h a t s p e c ifi es t h e in p u t a n d o u t p u t c o n n e c t i on s t o t h e g a t e or t h es o u r c e , d r a i n , a n d g a t e c o n n e c t io n s t o a t r a n s is t o r. P r im i t ivei n s t a n c e s o f g a t e s a r e s o m e t i m e s c a l le d g a t e i n s t an ces . Verilog-XLa p p l ie s t h e va l u e s o n t h e g a t e s i n p u t t e r m i n a l s t o t h e d e f in i t io n t od e t e r m i n e t h e v a l u e o f t h e o u t p u t t e r m i n a l .

d e l a y e x p r e s s i o n An e x p r e s s i on t h a t s p e c ifie s a n a m o u n t o f s i m u la t i on t im e t h a t e l a p s e s b e t w ee n t w o e ve n t s . In a g a t ed e c l a r a t i on , a d e l a y e x p r e s s i o n s p e c i fi e s t h e i n t e r v a l of s i m u l a t i ont i m e b e t w e en a t r a n s i t io n o f t h e v a lu e o f a g a t e s in p u t t e r m in a l a n dt h e s u b s e q u e n t t r a n s it io n o f t h e v a l u e o f t h e g a t e s o u t p u t t e r m i n a l.T h e t e r m d e l a y e x p r e s s i on is s o m e t i m e s a b b r e vi a t e d t o d e l a y .


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7 . N ow b e g in t o e n t e r g a t e d e c la r a t i on s .

T h e k e y wo r d nand b e g in s a d e c l a r a t i o n fo r a N AN D g a t e .

8 . N ow e n t e r a d e l a y e x p r e s s i o n f or t h i s g a t e d e c la r a t i on .

T h i s e n t r y t e l ls Ve r il og - XL t h a t i n t h e g a t e i n s t a n c e s t h a t fo ll ow i n t h i sd e c la r a t i o n , t h e v a lu e o f t h e g a t e s o u t p u t t e r m i n a l c h a n g es 1 0 t i m eu n i t s a ft e r a c h a n g e i n t h e v a lu e o f t h e g a t e s i n p u t t e r m i n a l. Th i s m o d e ld o e s n o t s p e c ify t h e s c a l e of t h e t i m e u n i t s o yo u c a n a s s u m e t h a t a t im e

u n it i s o n e n a n o s e co n d .

module flop (data,clock,clear,q,qb);input data,clock,clear;output q,qb;

nand


nand #10


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9 . N ow e n t e r a g a t e in s t a n c e .

T h i s e n t r y c o n s i s t s o f o n e g a t e in s t a n c e fo ll ow e d b y a c o m m a t o s e p a r a t et h i s g a t e i n s t a n c e fr o m o t h e r g a t e i n s t a n c e s i n t h e d e c la r a t i o n . T h is g a t ein s t a n c e h a s t w o p a r t s :

n d 1 Th e ga t e in s t a n ce id en t ifie r . Ga t e in s t a n c e n a m e s

a r e o p t io n a l ; t h e y a r e u s e fu l wh e n y ou d e b u gy o u r m o d e l .

(a , da t a ,c lo ck ,c le a r) Th e ga t es term ina l con n ection l is t . Ter m i n a lc o n n e c t i on lis t s a r e t h e r e q u i r e d p a r t o f a g a t ei n s t a n c e .

A t e r m i n a l c o n n e c t i on l i s t s p e c i fi es h o w a g a t e c o n n e c t s t o t h e r e s t o f t h em o d e l . Th i s t e r m i n a l c o n n e c t i on l is t c o n t a i n s fo u r n e t id e n t i fi e r s ,s e p a r a t e d b y c o m m a s . Ve r i lo g -XL c o n n e c t s t h e fi r s t n e t i n t h e li s t t o t h eg a t e ou t p u t t e r m i n a l a n d t h e r e m a i n i n g n e t s t o it s i n p u t t e r m i n a l s . Afo u r - t e r m i n a l c o n n e c t i on l is t t e l ls Ve r il og - XL t h a t t h i s g a t e c o n n e c t s t ot h e r e s t o f y ou r m o d e l t h r o u g h o n e o u t p u t t e r m i n a l a n d t h r e e in p u tt e r m i n a l s .

Th e f ir s t t e r m in a l in a t e r m in a l c on n e c t io n l is t i s a lw a y s a n o u t p u tt e r m i n a l . T h i s o u t p u t t e r m i n a l i d e n t i f i e r, a , t h e fi r s t i d e n t i fi er i n t h et e r m i n a l c o n n e c t io n l is t , i s a n i d e n t i fi e r t h a t y o u h a v e n o t u s e d b e fo r e int h i s m o d u l e. Wh e n Ve r i lo g -XL e n c o u n t e r s t h i s id e n t i fi er, it a s s u m e s t h a ta i s a s c a l a r w ir e t h a t c o n n e c t s N AN D g a t e nd1 t o s o m e o t h e r p r i m i t i vei n y o u r d e s i gn . W h e n y o u e n t e r i n a t e r m i n a l c o n n e c t io n l is t a n i d e n t i fi e rt h a t y ou h a ve n o t u s e d b e fo r e , yo u m a k e b y d e fa u lt a n im plicit d ecla ration of a wire .

T h e r e m a i n i n g t e r m i n a l i d e n t i fi e r s in t h i s t e r m i n a l c o n n e c t io n l is t a r ei n p u t t e r m i n a l s . Ter m i n a l id e n t i fi e r s data , clock a n d clear h a v e t h es a m e id e n t i fie r s a s t h e in p u t p o r t s o f t h is m o d u l e . B y e n t e r i n g t h e s ei d e n t i fi e r s i n t h e t e r m i n a l c o n n e c t io n l i s t fo r g a t e nd1 , you s pec i fy ac o n n e c t i on b e t w ee n t h e m o d u le s i n p u t p o r t s a n d t h e g a t e s i n p u tt e r m i n a l s .


nand #10 nd1 (a,data,clock,clear),


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T h e fo ll ow in g c o p y o f t h e s c h e m a t i c s h o w s t h e i d e n t i fi er s i n t h i si n s t a n c e .

T h e fo ll ow in g s t e p s a r e e n t r i e s o f m o r e g a t e i n s t a n c e s i n t h i s g a t ed e c l a r a t i o n .

qb

q

iv1nd2

nd3

nd4

nd5

nd6

nd7

nd8

iv2

ndatab d

c

nclock

e

nd1

clear

a

f

data

clock


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1 0 . Now ins tan t ia te NAND ga te nd2 .

W h e n y o u ins tan t ia te y o u m a k e a u s e o f a d e f in i t io n .



nand #10 nd1 (a,data,clock,clear),nd2 (b,ndata,clock),

qb

q

data

and1

clear

iv1nd2

nd3

nd4

nd5

nd6

nd7

nd8

iv2

ndatab d

c

nclock

e

f

clock


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1 5




Yo u d o n o t e n t e r a g a t e i n s t a n c e fo r N AN D ga t e nd3 i n t h i s d e c l a r a t i o nb e c a u s e t h e d e s i gn s p e c ifie s a n i n e n a n o s e c on d p r o p a g a t i on d e la y fo rg a t e nd3 a n d t h i s d e c l a r a t i o n i s f o r N A N D g a t e s w i t h a 1 0 n a n o s e c o n dd e l a y.



nand #10 nd1 (a,data,clock,clear),nd2 (b,ndata,clock),

nd4 (d,c,b,clear),

ndata

clock

nd2

qb

q

data

and1

clear

iv1

nd3

nd4

nd5

nd6

nd7

nd8

iv2

b d

c

nclock

e

f

NAND ga te nd3


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1 6




T h e fo ll ow in g c o p y o f t h e s c h e m a t i c s h o w s t h e i d e n t i fi er s i n t h i s

i n s t a n c e .


nand #10 nd1 (a,data,clock,clear),nd2 (b,ndata,clock),nd4 (d,c,b,clear),nd5 (e,c,nclock),

clear

b dnd4ndata

clock

nd2

qb

q

data

and1

iv1

nd3

nd6

nd7

nd8

iv2

c

nclock

e

f

nd5


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1 7






input data,clock,clear;output q,qb;

nand #10 nd1 (a,data,clock,clear),nd2 (b,ndata,clock),nd4 (d,c,b,clear),nd5 (e,c,nclock),nd6 (f,d,nclock),

clear

cnd5 e

b dnd4ndata

clock

nd2

qb

q

data

and1

iv1

nd3

nd7

nd8

iv2 nclock

fnd6


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1 8




Yo u d o n o t i n s t a n t i a t e N AN D ga t e nd7 i n t h i s d e c l a r a t i on b e c a u s e i t a l s od o e s n o t h a ve a d e la y o f 1 0 t i m e u n i t s .

T h i s g a t e in s t a n c e i s t h e la s t e n t r y in t h i s NAN D ga t e d e c la r a t i on s o it i sfo ll ow e d b y a s e m i c o lo n i n s t e a d o f a c o m m a . S e m i co lo n s t e r m i n a t e g a t ed e c l a r a t i o n s .

T h i s N AN D ga t e d e c la r a t i on c o n t a i n s g a t e i n s t a n c e s f or a l l t h e N AN Dg a t e s in t h e m o d e l wh o s e d e l a y s a r e 1 0 t i m e u n i t s .



input data,clock,clear;output q,qb;


nd8 (qb,q,f,clear);

d

nclock

nd6

cnd5 e

b nd4ndata

clock

nd2

qb

q

data

and1

clear

iv1

nd3

nd7

iv2

f nd8

NAND ga te nd7


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1 9



1 5 . B e g in t h e d e c l a r a t i o n f o r NAN D ga t e s w it h a n i n e t i m e u n i t d e la y.

Th e N AND g a t e i n s t a n c e s t h a t y o u e n t e r i n t h is d e c la r a t io n h a v e ap r o p a g a t i o n d e l a y o f n i n e t i m e u n i t s .


input data,clock,clear;

output q,qb;

nand #10 nd1 (a,data,clock,clear),

nd2 (b,ndata,clock),

nd4 (d,c,b,clear),

nd5 (e,c,nclock),

nd6 (f,d,nclock),

nd8 (qb,q,f,clear);

nand #9


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2 0



1 6 . In s t a n t i a t e N AN D ga t e nd3 .


.


nand #10 nd1 (a,data,clock,clear),nd2 (b,ndata,clock),nd4 (d,c,b,clear),nd5 (e,c,nclock),nd6 (f,d,nclock),nd8 (qb,q,f,clear);

nand #9 nd3 (c,a,d),

clear

nd1

f

q

qbnd8d

nclock

nd6

cnd5 e

b nd4ndata

clock

nd2data

a

iv1

nd3nd7

iv2


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2 1



1 7 . In s t a n t i a t e N AN D ga t e nd7




nand #9 nd3 (c,a,d),nd7 (q,e,qb);

a c

d

nd3

clear

nd1

f

q

qbnd8

nclock

nd6

nd5 e

b nd4ndata

clock

nd2dataiv1

nd7

iv2


22/68


23/68

2 3



1 9 . In s t a n t ia t e in v e r t e r iv1 .





not #10 iv1 (ndata,data),

eq

qb

nd7

ac

d

nd3

clear

nd1

f nd8

nclock

nd6

nd5

b nd4ndata

clock

nd2dataiv1

iv2


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2 0 . In s t a n t ia t e in v e r t e r iv2 .





not #10 iv1 (ndata,data),

iv2(nclock,clock);

ndatadata iv1

eq

qb

nd7

ac

d

nd3

clear

nd1

f nd8

nclock

nd6

nd5

b nd4

clock

nd2

iv2


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2 5



T h e E n d o f t h e Mo d u l e

2 1 . N ow e n d t h e m o d u l e.

This en t ry comple tes the def in i t ion o f the module o f the f l ip - f lop . Al lm o d u l es e n d w it h t h e k e yw o r d endmodule .



nd8 (qb,q,f,clear);nand #9 nd3 (c,a,d),

nd7 (q,e,qb);not #10 iv1 (ndata,data),

iv2(nclock,clock);endmodule

ndatadata iv1

eq

qb

nd7

ac

d

clear

fnd8

nclock

nd6

nd5

b

clock

iv2

nd1

nd2

a

b

cnd3

nd4 d

e

f


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2 6



Wri t i n g a Mo d u l e D e f i n i t i o n f o r t h e R e g i s t e rT h e n e x t m o d e l is t h e 4 - b i t r e g is t e r. B e f o r e yo u b e g in t o w r i t e t h i s m o d e l ,y ou m u s t u n d e r s t a n d t h e fo llo win g c o n c e p t s :

C O N C E P T S

h i e r a rc h i c a l m o d e l A m o d e l t h a t c o n s i s t s , a t l ea s t in p a r t , o f o t h e r m o d e ls .

m o d u l e h i e r a r c h y A s y s t e m o f m o d u le s a n d h ie r a r c h i c a lm o d u le s t h a t d e s c r ib e a d e s i gn . A t yp i ca l m o d u le h i e r a r c h y c o n t a i n sthe fo l lowing mode ls :

a t o p - le ve l h i e r a r c h i c a l m o d e l t h a t d e s c r ib e s t h e e n t i r e d e s ig n ;i t s d e s c r i p t i o n i n c l u d e s r e f e r e n c e s t o m o d e l s o f l a rg e p a r t s o f ades ign

m o d e ls t h a t d e s c r ib e la r g e p a r t s o f t h e d e s i gn ; t h e ird e s c r i p t io n s i n c l u d e r e f e r e n c e s t o m o d e l s o f s m a l l p a r t s o f t h edes ign

b o t t o m - le ve l o r le a f m o d e l s t h a t d e s c r i b e s m a l l p a r t s o f t h edes ign

T h e fo ll ow in g fi gu r e s h o w s a m o d u l e h i e r a r c h y.

top-level module

bottom-level modules

other modules in the hierarchy


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2 7



T h e fo ll ow in g c o m p a r i s o n m a y b e h e lp f u l :

m o d u l e i n s t a n c e v s . g a t e i n s t a n c e B o t h a m o d u le in s t a n c e a n d ag a t e i n s t a n c e a r e u s e s o f a d e f in i t io n ga t e d e f in i t i o n s a r e in t h eexecu tab le f i l e tha t i s Ver i log-XL, you wr i t e module def in i t ions in yours o u r c e d e s c r i p t io n .

T h e fo ll ow in g s c h e m a t i c i ll u s t r a t e s t h i s m o d e l of a 4 - b i t r e g is t e r :

C O N C E P T S

m o d u l e d e f i n i t i o n a n e n t i r e m o d u l e c om p r i s e s a m o d u le

d e f in i t io n . T h e e n t i r e c on t e n t s o f a m o d u l e d e s c r i b e h o w it w o r k s o rh o w i t is p u t t o g et h e r.

m o d u l e i n s t a n c e A r e fe r e n c e t o a m o d u l e d e fi n i t io n t o d e s c r i b ea p a r t o f a h i e r a r c h i c a l m o d e l . E n t e r in g a m o d u le in s t a n c e in as o u r c e d e s c r i p t i o n i s c a l le d ins tan t ia t ing a m o d u l e d e fi n i t io n . W h e nyou ins tan t ia te a m odu le def in i t ion you te l l Ver i log-XL th a t a pa r t o f a d e s i gn i s a c o p y o f, o r b e h a v e s li k e , t h e d e s i g n d e s c r i b e d in t h a tm o d u l e .

d

clk

q

clr

d

clk

q

clr

d

clk

q

clr

d

clk

q

clr

clrb

clk

q3 q2 q1 q0

d3 d2 d1 d0


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2 8



1 . O p e n a t e x t f ile w it h t h e n a m e hardreg.v .

T h e M o d u l e H e a d e r

2 . E n t e r t h e m o d u l e h e a d e r .

T h i s e n t r y s p e c i fi es t h a t t h e r e i s a m o d u l e w it h t h e id e n t i fi er hardregw h o s e p o r t s h a v e t h e i d e n t i fi e r s d , clk , clrb , a n d q .

P o r t D e c l a r a t i o n s3 . D e c la r e t h e s c a la r i n p u t p o r t s .

T h i s i n p u t p o r t d e c l a r a t i o n s p e c i fi e s n o b i t w id t h s o Ve r il og - XL u s e s t h ed e f a u l t w id t h o f o n e b i t fo r p o r t s clk a n d clrb . Th i s i n p u t p o r td e c la r a t i o n d o e s n o t i n c l u d e d b e c a u s e d i s fo u r b i t s w i d e .

4 . D e c l a r e t h e v e c t o r i n p u t p o r t .

Th e p a r t o f t h i s e n t r y t h a t is e n c lo s e d in b r a c k e t s i s a r a n g e

s p e c ifi c a t io n . A r a n g e s p e c i fi ca t i o n e s t a b l is h e s t h e b i t w i d t h o f a n o b j e c ts u c h a s a p o r t a n d s p e c ifi es t h e in d i c e s . A r a n g e s p e c ifi c a t io n b e g i n swi th the b i t number o f the ob jec t s mos t s ign i f i can t b i t (MSB) , fo l lowedb y a c o lo n ( :) a n d t h e b i t n u m b e r o f t h e o b j e c t s l e a s t s i gn i fi ca n t b i t(LSB).

Th i s i n p u t p o r t d e c la r a t io n s p e c i fie s t h a t d is a n in p u t p o r t t h a t i s fo u rb i t s w id e , a n d t h a t f r om t h e MS B t o t h e LS B t h e b i t s a r e n u m b e r e d 3 , 2 ,1 a n d 0 .

module hardreg (d,clk,clrb,q);

module hardreg (d, clk,clrb,q);input clk, clrb;

module hardreg (d, clk,clrb,q);input clk, clrb;

input [3:0] d;


29/68

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5 . D e c la r e t h e v ec t o r o u t p u t p o r t .

Th i s o u t p u t p o r t d e c la r a t i o n s p e c ifie s t h a t q is a n o u t p u t p o r t t h a t i sfo u r b it s w id e a n d t h a t f r om t h e MS B t o t h e LS B , t h e b i t s a r e n u m b e r e d3 , 2 , 1 , a n d 0 .

T h i s e n t r y e n d s t h e p o r t d e c l a r a t i on s . Th e l a b e l e d i t e m s i n t h e fo ll ow in gc o p y of t h e s c h e m a t ic s h o w t h e i d e n t i fie r s t h a t a r e n o w in m o d u lehardreg .

module hardreg (d, clk,clr,q);input clk, clrb;input [3:0] d;output [3:0] q;

D

CLK

Q

CLR

D

CLK

Q

CLR

D

CLK

Q

CLR

D

CLK

Q

CLR

clrb

clk

q[3] q[2] q[1] q[0]

d[3] d[2] d[1] d[0]


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3 0



Mo d u l e In s t a n t i a t i o n a n d M o d u le I n s t a n c e s

6 . B e g in t o i n s t a n t i a t e t h e m o d u l e of t h e fl ip - fl op .

T h i s e n t r y b e g in s a m o d u l e in s t a n t i a t i on . It t e l ls Ve r il og - XL t h a t o n e o rm o r e p a r t s o f m o d u le hardreg a r e i n s t a n c e s o f a m o d u l e d e f in i t i o nn a m e d flop .

7 . E n t e r o n e in s t a n c e of m o d u le flop .

Th i s e n t r y is a m o d u le in s t a n c e o f m o d u le flop . B e c a u s e i t is t h e fi r s to f a s e r i e s o f i n s t a n c e s o f flop , i t is f o ll ow e d b y a c o m m a i n s t e a d o f as e m i c o lo n . C om m a s s e p a r a t e m o d u le in s t a n c e s in a m o d u l ei n s t a n t i a t i o n .

M od u le in s t a n c e s h a v e t wo p a r t s . In t h is i n s t a n c e t h e p a r t s a r e a sfollows:

f1 Th e i d e n t i fi er o f t h i s i n s t a n c e o f m o d u l eflop .

(d[0],clk,clrb,q[0],) Th e p o r t c o n n e c t i on l i s t .

Yo u m u s t e n t e r a m o d u l e in s t a n c e n a m e . A m o d u l e in s t a n c e n a m e c a nh e l p yo u t o d e b u g a h i e r a r c h i c a l m o d u le t h a t c o n t a i n s m o r e t h a n o n e

in s t a n c e o f a m o d u l e .

module hardreg (d, clk,clrb,q);input clk, clrb;input [3:0] d;output [3:0] q;

flop


flop f1 (d[0],clk,clrb,q[0],),


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T h i s p o r t c o n n e c t io n l is t i s a n ord er-ba s ed p o r t c o n n e c t i on l is t . T h eVe r i lo g H D L h a s t w o t y p e s o f p o r t c o n n e c t io n l is t s :

n a m e-b as ed

or de r -b a sed

In a n a m e - b a s e d p o r t c o n n e c t i on l i s t , y ou e x p l ic i t ly s p e c i fy t h ec o n n e c t i on b e t w ee n t h e va r i a b l e o r p o r t in t h e m o d u le t h a t c o n t a i n s t h ein s t a n c e a n d t h e p o r t in t h e i n s t a n t i a t e d m o d u l e.

In a n o r d e r - b a s e d p o r t c o n n e c t io n lis t , y o u s p e c ify c o n n e c t io n s b ym a t c h i n g t h e o r d e r - b a s e d p o r t c o n n e c t i on l is t i n t h e m o d u l e in s t a n c ew it h t h e o r d e r o f t h e p o r t c o n n e c t i on li s t in t h e m o d u le h e a d e r o f t h ei n s t a n t i a t e d m o d u l e .

C om p a r e m o d u le flop s m o d u l e h e a d e r w it h t h i s i n s t a n c e o f m o d u l eflop t o s e e h o w t h e i n s t a n c e s p o r t c o n n e c t i on l is t s h o w s Ve r i lo g -XLh o w t o c o n n e c t hardreg t o t h i s in s t a n c e o f flop .

T h e i n s t a n c e s o r d e r - b a s e d p o r t c o n n e c t i on l is t t e l ls Ve r il og - XL t o m a k e

t h e f ol lo w in g c o n n e c t io n s : c on n e ct b it n u m b e r 0 of m o du le hardreg s 4 - b i t in p u t p o r t d t o t h i s

in s t a n c e o f m o d u le flop s i n p u t p o r t data

con n ec t m od u le hardreg s i n p u t p o r t clk t o t h i s i n s t a n c e o f m o d u leflop s i n p u t p o r t clock

con n ec t m od u le hardreg s i n p u t p o r t clrb t o t h i s in s t a n c e of m o d u l e flop s i n p u t p o r t clear

c on n e ct b it n u m b e r 0 of m o du le hardreg s 4 - b it o u t p u t p o r t q t o t h i sin s t a n c e o f m o d u le flop s o u t p u t p o r t q

f1 (d[0], clk, clrb, q[0],),

module flop (data, clock, clear, q, qb);

module instance

module header


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Pl e a s e n o t e : The comm a b etween q[0] and the r igh t pa ren thes i s in themod u le insta nce tells Verilog-XL th at you kn ow tha t mod u le flop h as a fifth port,bu t tha t you m ake n o conn ect ion to that port . Module hardreg does n o t need the

da ta on modu le flop s ou tpu t port qb .

T h e fo ll ow in g s c h e m a t i c s h o w s in s t a n c e f1 .

D

CLK

Q

CLR

D

CLK

Q

CLR

D

CLK

Q

CLR

D

CLK

Q

CLR

clrb

clk

q[3] q[2] q[1] q[0]

d[3] d[2] d[1] d[0]

f1


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8 . E n t e r a n o t h e r in s t a n c e of m o d u le flop .

H e r e , t h e i n s t a n c e n a m e is f2 . T h e i n s t a n c e s p o r t c o n n e c t io n l i s t t e l lsVer i log-XL to m ak e th e fo l lowing conn ec t ions :

c on n e ct b it n u m b e r 1 of m o du le hardreg s 4 - b i t in p u t p o r t d t o t h i sin s t a n c e o f m o d u le flop s i n p u t p o r t data



c on n e ct b it n u m b e r 1 of m o du le hardreg s 4 - b it o u t p u t p o r t q t o t h i sin s t a n c e o f m o d u le flop s o u t p u t p o r t q

Als o i n t h i s i n s t a n c e y o u m a k e n o c on n e c t io n t o m o d u le flop s o u t p u tp o r t qb .



flop f1 (d[0],clk,clrb,q[0],),f2 (d[1],clk,clrb,q[1],),

D

CLK

Q

CLR

D

CLK

Q

CLR

D

CLK

Q

CLR

D

CLK

Q

CLR

clrb

clk

q[3] q[2] q[1] q[0]

d[3] d[2] d[1] d[0]

f2


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9 . E n t e r a t h i r d in s t a n c e of m o d u le flop .

In t h is e n t r y, t h e i n s t a n c e n a m e is f3 . Th e i n s t a n c e s p o r t c o n n e c t i onl is t t e l l s Ver i log-XL to ma ke t h e fol lowing con n ec t ions :




c on n e ct b it n u m b er 2 o f m o du le hardreg s 4 - b i t o u t p u t p o r t q t o t h i sin s t a n c e o f m o d u le flop s o u t p u t p o r t q




flop f1 (d[0],clk,clrb,q[0],),f2 (d[1],clk,clrb,q[1],),f3 (d[2],clk,clrb,q[2],),

D

CLK

Q

CLR

D

CLK

Q

CLR

D

CLK

Q

CLR

D

CLK

Q

CLR

clrb

clk

q[3] q[2] q[1] q[0]

d[3] d[2] d[1] d[0]

f3


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1 0 . E n t e r t h e fo u r t h a n d fin a l i n s t a n c e of m o d u le flop .

Th i s e n t r y e n d s w it h a s e m i c o lo n b e c a u s e t h i s i s t h e l a s t i n s t a n c e in t h isin s t a n t ia t i on o f m o d u le flo p . T h e i n s t a n c e n a m e is f4 . T h e i n s t a n c e spor t connec t ion l i s t t e l l s Ver i log-XL to make the fo l lowing connec t ions :




c on n e ct b it n u m b er 3 o f m o du le hardreg s 4 - b i t o u t p u t p o r t q t o t h i sin s t a n c e o f m o d u le flop s o u t p u t p o r t q




flop f1 (d[0],clk,clrb,q[0],),f2 (d[1],clk,clrb,q[1],),f3 (d[2],clk,clrb,q[2],),f4 (d[3],clk,clrb,q[3],);

D

CLK

Q

CLR

D

CLK

Q

CLR

D

CLK

Q

CLR

D

CLK

Q

CLR

clrb

clk

q[3] q[2] q[1] q[0]

d[3] d[2] d[1] d[0]

f4


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1 1 . E n t e r t h e k e y wo r d t o en d t h e m o d u l e .

T h i s e n t r y e n d s t h e d e fi n i t io n o f m o d u l e hardreg .

module hardreg (d,clk,clrb,q);input clk, clrb;input [3:0] d;output [3:0] q;

flop f1 (d[0],clk,clrb,q[0],),f2 (d[1],clk,clrb,q[1],),f3 (d[2],clk,clrb,q[2],),f4 (d[3],clk,clrb,q[3],);

endmodule


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Writing a Test Fixtu re Model


Wri t i n g a Te s t F i x t u re Mo d e lN ow t h a t y o u h a v e c om p l et e d y o u r m o d e l o f t h e 4 - b i t r e gi s t e r, t h e n e x t

s t e p i s t o w r it e a m o d e l of a t e s t f ix t u r e t h a t t e s t s t h e l og ic o f t h e d e s i g n .1 . O p e n a n o t h e r t e x t file n a m e d harddrive.v .

T h e t e s t f ix t u r e m o d e l h a s t h e fo ll ow in g p a r t s :

m o d u l e h e a d e r, va r ia b l e d e c la r a t i on s , a n d d e s ig n in s t a n c e

a p p l ic a t io n o f s t im u lu s t h e d e s i gn d r ivin g p a r t

r es u lt s m on it or in g pa r t

T h e t e s t fi xt u r e m o d e l is a behav io ra l m o d e l , n o t a s t ruc tu ra l m o d e l. Th efo ll ow in g c o m p a r i s o n d e s c r i b e s t h e d i ffe r e n c e b e t w e e n t h e s e t y p e s o f m o d e l s :

b e h a v i o r m o d e l v s . s t r u c t u ra l m o d e l A behav iora l mode l

d e s c r i b e s t h e b e h a v io r o f a d e v ic e i t c o n t a i n s a p r o c e d u r e t h a t p e r fo r m st h e o p e r a t i o n s o f t h e d e v ic e . It d o e s n o t d e s c r i b e h o w y o u c o n n e c tc o m p o n e n t s t o p e r fo r m t h a t b e h a v io r. A s t r u c t u r a l m o d e l d e s c r i b e s h o wy ou c o n n e c t t h e c om p o n e n t g a t e s o r t r a n s is t o r s i n t h e d e vic e .

Th e t e s t fix t u r e m o d e l a p p lie s v a lu e s t o y o u r d e s ig n a n d d i s p la y s t h er e s u lt s o n y ou r s c r e e n .

Pl e a s e n o t e : You can also model your design with a behavioral model. Abehavioral model of a design models at a more abstract level.

Mo d u l e H e a d e r , De c l ara t i o n s , a n d D e s i g n In s t a n c eTh i s s e c t i on s h o w s h o w t o e n t e r t h e m o d u le h e a d e r , t h e v a r ia b l ed e c la r a t i o n s a n d t h e d e s i gn i n s t a n c e .

To p -Le v e l Mo d u l e H e a d e r

2 . E n t e r t h e m o d u l e h e a d e r .

T h i s e n t r y is t h e m o d u l e h e a d e r fo r a t o p - l e ve l m o d u l e. To p - l ev el m o d u l eh e a d e r s d o n o t c on t a in a p o r t c o n n e c t i on l is t .

module hardrive;


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D a t a Ty p e D e c l a r a t i o n s

T h e n e x t s t e p s a r e d e c l a r a t i o n s o f va r i a b l e s o f t h e d a t a t y p e reg a n dwire . A reg is a n a b s t r a c t s t o r a g e e le m e n t . N o p a r t o f a d e s i gnp r o p a g a t e s v a l u e s t o a reg b u t yo u c a n c o n n e ct a reg t o p a r t o f y o u rd e s i gn t o p r o p a g a t e va l u e s t o t h a t p a r t . A wire i s a p h y s i c a l c o n n e c t i onb e t w e e n o b j e c t s .

3 . D e c la r e t h e s c a l a r reg s clr a n d clk .

Th i s e n t r y d e c la r e s t w o va r i a b l es w i t h t h e n a m e clk a n d clr t h a t h a vet h e reg d a t a t y p e . S in c e y o u e n t e r e d n o b i t w id t h , t h e y a r e o n e b i t w id e .

4 . D e c la r e t h e v e c t or reg data .

T h i s e n t r y d e c l a r e s a reg n a m e d data t h a t i s fo u r b i t s w id e . F r o m t h eM S B t o t h e LS B , t h e b i t s a r e n u m b e r e d 3 , 2 , 1 a n d 0 .

module hardrive;reg clr, clk;

module hardrive;reg clr, clk;reg [3:0] data;


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5 . D e c la r e t h e v e c t o r w ir e q .

T h e D e s i g n I n s t a n c e

6 . E n t e r a n i n s t a n c e o f m o d u l e hardreg .

T h i s e n t r y h a s t h e fo ll ow in g p a r t s :

hardreg t h e m o d u l e i d e n t i fi e r o f t h e m o d u l e t h a t

c o n t a i n s t h e m o d e l of t h e 4 - b i t r e gi s t e rh1 t h e n a m e o f t h i s i n s t a n c e o f m o d u le

hardreg

(data, clk, clr, q); t h e o r d e r - b a s e d p o r t c o n n e c t i o n l i s t f o rt h i s i n s t a n c e o f m o d u le hardreg

T h e p o r t c o n n e c t io n l is t m a k e s t h e fo ll ow in g co n n e c t i on s fr o m m o d u l ehardrive t o m o d u le hardreg :

con n ec t m od u le hardrive s 4 -b i t r eg data t o t h i s in s t a n c e o f m o d u lehardreg s 4 - b i t in p u t p o r t d

con n ec t m od u le hardrive s on e-b i t r eg clk t o t h i s in s t a n c e of m o d u l e hardreg s o n e - b i t in p u t p o r t clk

con n ec t m od u le hardrive s on e-b i t r eg clr t o t h i s in s t a n c e of m o d u l e hardreg s o n e - b i t in p u t p o r t clr

con n ec t m od u le hardrive s fou r-b i t wire q t o t h i s i n s t a n c e o f m o d u lehardreg s o u t p u t p o r t q

F ig u r e 3 s h o w s h o w d a t a v a l u e s p r o p a g a t e i n t o t h e 4 - b it r e g is t e r f r omt h e m o d e l o f t h e t e s t f ix t u r e .

module hardrive;reg clr, clk;reg [3:0] data;wire [3:0] q;


hardreg h1 (data, clk, clr, q);


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4 0



Figure 3: Propagating data values

D a t a va l u e s p r o p a g a t e d o w n t h e h i e r a r c h y a l o n g t h e f ollo w in g p a t h s :

1 . D a t a va lu e s o rigin a t e in m o d u le hardrive s 4 -b i t r eg data .2 . D a t a va lu e s p r op a ga t e fr om m o d u le hardrive s 4 -b i t r eg data

t h r o u g h t h e h i e r a r c h i c a l ly lo w e r- le ve l m o d u l e hardreg s 4-bi tin p u t p o r t d .

3 . Th e va lu e s o n e a ch b it o f m o d u le hardreg s 4 - b i t in p u t p o r t dp r o p a g a t e t h r o u g h t h e s i n g le b it p o r t s n a m e d data i n e a c hin s t a n c e o f m o d u le flop .

Ap p l y i n g S t i m u l i t o t h e D e s i g nT h i s t e s t fi xt u r e m o d u l e u s e s t h e f ol lo w in g s t r a t e g y t o a p p l y s t i m u l u s :

1 . In it ia lize clr t o 1 , clk t o 0 , a n d a p p l y a t e s t p a t t e r n v e c t o r o f a l l0 s t o t h e fo u r b i t s o f d a t a .

2 . Toggle clk e ve r y 5 0 t i m e u n i t s .3 . Ap p ly a n e w t es t p a t t er n ve ct or t o data e ve r y 1 0 0 t i m e u n it s u n t i l

hardrive a p p lie s t e s t p a t t e r n s fr o m 0 0 0 0 t o 1111 .4 . Aft e r t h e la s t t e s t p a t t e r n ve ct o r p r o p a ga t e s t o t h e ou t p u t , t o gg le

clr a n d o n c e a g a i n a p p l y t h e t e s t p a t t e r n v ec t o r s fr o m 0 0 0 0 t o1 1 1 1 .

D

CLK

Q

CLR

D

CLK

Q

CLR

D

CLK

Q

CLR

D

CLK

Q

CLR

d[3] d[2] d[1] d[0]

portdata

portdata

portdata

portdata

moduleflopinstancef4




portd[3:0]

module hardreg instance h1

reg

data [3:0]

module hardrive


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In i t i a l i z i n g t h e C l o c k a n d C l e a r Li n e s

Th e n e x t s t e p i s t o m a k e t h e e n t r i e s t h a t m o d e l t h e b e h a vio r o f a p p ly in gt h e fi r s t v a lu e s t o clk a n d clr . B e fo r e yo u m a k e t h e s e e n t r i e s yo u m u s tu n d e r s t a n d t h e fo llo w in g c o n c e p t s a b o u t b e h a v io r m o d e lin g :

Pl e a s e n o t e : You ca n enter m ore than one procedur al block. If you ha vemu ltiple i nitial or always procedu ra l blocks , Verilog-XL execu tes th emconcurrent ly.

C O N C E P T S

p r o c e d u r a l b l o c k O n e o r m o r e p r o ce d u r a l s t a t e m e n t s t h a t s p e c i fya n a c t i vi t y o r a c t i vi t ie s t h a t Ve r i lo g -XL p e r fo r m s d u r i n g t h es i m u l a t i on . Pr o c e d u r a l b l oc k s a r e s o m e t i m e s c a l le d p r o c e d u r e s . Yo us p e c ify p r o c e d u r a l b l o c k s i n o n e o f t h e fo ll ow in g s t a t e m e n t s :

initial s t a t e m e n talways s t a t e m e n ttask

functionT h i s t u t o r i a l i n c l u d e s initial a n d always s t a t e m e n t s .

p ro c e d u r al s t a t e m e n t A s t a t e m e n t t h a t c o n t r o l s t h e s im u la t i ono r m a n ip u la t e s v a r ia b l e s s u c h a s r e gis t e r s a n d n e t s .

p ro c e d u r al as s i g n m e n t s t a t e m e n t A p r o c e d u r a l s t a t e m e n t t h a ta s s ig n s a va l u e t o a r e gis t e r.

i n i t i al s t a t e m e n t A s t a t e m e n t t h a t s p e c ifi e s t h a t Ve r i lo g -XLe x ec u t e s s t a r t i n g a t s im u la t i on t im e 0 o n e o r m o r e p r o c ed u r a ls t a t e m e n t s w h e n t h e s i m u l a t io n s t a r t s , a n d d o es n o t e xe c u t e t h e ma g a i n .

a lw a y s s t a t e m e n t A s t a t e m e n t t h a t s p e c ifi e s t h a t Ve r i lo g -XLe x ec u t e s s t a r t i n g a t s im u la t i on t im e 0 o n e o r m o r e p r o c ed u r a ls t a t e m e n t s c o n t i n u o u s l y u n t i l t h e s i m u l a t i o n s t o p s .

b lo c k s t a t e m e n t A s t a t e m e n t t h a t p e r m it s m u lt ip l e s t a t e m e n t s i np l a c e s w h e r e t h e Ve r i lo g H D L s y n t a x c a l ls f o r o n e s t a t e m e n t . Th eVe r i lo g H D L c o n t a i n s t w o b l oc k s t a t e m e n t s :

begin-end T h e s e q u e n t i a l b l oc k . Ve r il og - XL e xe c u t e s t h ep r o c e d u r a l s t a t e m e n t s i n s i d e t h i s b lo c k s t a t e m e n to n e a f t er t h e o t h e r.

fork-join The p ar a l l e l b lock . Ver i log-XL execu tes th ep r o c e d u r a l s t a t e m e n t s i n s i d e t h i s b l oc k c o n c u r r e n t l y.


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7 . B e g in a n initial p r o c e d u r a l b l oc k .

This en t ry i s a keyword . It sp ec i fi es th a t Ver i log-XL execu tes on ceonlyo n e t i m e t h e p r o c ed u r a l s t a t e m e n t o r b l o ck o f p r o c e d u r a l s t a t e m e n t s

t h a t fo ll ow t h i s k e y w o r d .T h i s s t e p i s t h e b e g in n i n g of a p r o c e d u r a l b l o ck t h a t a s s i gn s l o gi c v a lu e st o s o m e o f m o d u l e hardrive s regs .

8 . Th i s s t e p e n t e r s a b lo ck s t a t e m e n t t h a t i n c lu d e s a s s ign m e n t s t a t e m e n t st o a s s ig n v a lu e s t o clr a n d clk . T h e Ve r i lo g H D L h a s t h r e e k i n d s o f a s s i gn m e n t s t a t e m e n t s :

con t in u o u s a s s ign m e n ts

p r oc ed u r a l co n tin u o u s a s s ign m e n t s

p r oc ed u r a l a s s ign m e n t s

Th i s t u t o r ia l o n l y in c l u d e s p r o c e d u r a l a s s i gn m e n t s . In a l l t h r e e k i n d s o f

a s s ig n m e n t s t h e r e a r e t w o b a s ic p a r t s t h a t a r e o n o p p o s i t e s id e s o f t h ee q u a l s ig n (= ), t h e l eft - h a n d s id e a n d t h e r i gh t - h a n d s id e .

In a p r o ce d u r a l a s s i gn m e n t s t a t e m e n t t h e s e p a r t s m u s t c o n t a in t h efo l lowing types o f va r iab les :

Th e le ft -h a n d s id e Th is s id e m u s t b e a ll or p a r t of a ve ct or or s ca la rr e g or a n e le m e n t o f a m e m o r y (a m e m o r y i s a na r r a y o f r e g is t e r s w it h b o t h a b i t -s i z e a n dd e p t h ). Th e le ft - h a n d s id e c a n a l s o c on t a in ac o n c a t e n a t i on o r g r o u p i n g o f a l l o r p a r t o f m o r et h a n o n e r e g o r m e m o r y e le m e n t .

Th e r igh t -h a n d s id e Th is s id e ca n c on t a in a n y exp re ss ion .



initial


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4 3



E n t e r a b e gin - e n d b lo c k t h a t c o n t a i n s p r o c e d u r a l a s s i gn m e n ts t a t e m e n t s t h a t a s s ig n va l u e s t o clr a n d clk w h e n t h e s im u la t i ons t a r t s .

T h i s e n t r y s p e c i fi e s t h a t w h e n t h e s i m u l a t i on t i m e i s 0 , Ve r il og - XL t a k e sthe fo l lowing s teps :

1 . a s s ign s a va lu e o f 1 t o reg c lr2 . a s s ign s a va lu e o f 0 t o reg c lk

Al l a s s i g n m e n t s t a t e m e n t s e n d w i t h a s e m i c o lo n ( ;). Th e b e g in - e n d b l o c k d o e s n ot e n d w it h a s e m i c olo n .

T h i s p r o c e d u r a l b l o c k h a s t h e f o l l o w i n g p u r p o s e s : Th e f u n c t io n a l s p e c s p e c ifie s t h a t t h e c le a r l in e i s a c t i ve lo w. Th e v a l u e

in reg c lr p r o p a ga t e s o n t o t h e n e t n a m e d clrb in modulehardreg . As s i gn i n g a 1 t o clr m a k e s t h e c le a r l in e i n a c t ive s o t h a tt h e d a t a i n p u t c a n p r o p a g a t e t h r o u g h t h i s m o d e l of a r e g is t e r.

Th e c lo c k lin e b e g in s t h e s i m u la t i on w i t h n o k n o wn l o gic va l u e . Th eva l u e y o u a s s i gn t o reg clk p r o p a g a t e s o n t o t h e c l o ck l in e s o t h a t i th a s a n i n i t ia l va l u e a n d s o t h a t a n o t h e r p a r t o f t h e m o d e l c a n t o gg let h a t va l u e .



initial begin

clr = 1;clk = 0;

end


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4 4



To g g li n g t h e Cl o c k

9 . E n t e r a p r o c e d u r a l b lo c k t h a t t o g gle s t h e c lo c k .

T h i s e n t r y i s a n always p r o c e d u r a l b l oc k t h a t in c l u d e s a d e l a ye x p r e s s i o n a n d a p r o c e d u r a l a s s i g n m e n t .

T h e t il d e (~ ) i n t h e e x p r e s s i o n o n t h e r ig h t - h a n d s i d e o f t h e p r o c e d u r a la s s ig n m e n t i s t h e b i t - wis e u n a r y o p er a t o r t h a t i n v e r t s a l l t h e b it s i n t h eo p e r a n d . T h e e x e cu t io n o f t h i s p r o c e d u r a l a s s ig n m e n t t o g gle s clk ; ita s s ig n s a n e w v a lu e o f 0 w h e n t h e va l u e o f clk is 1 , a n d a s s ign s a n e wv a lu e o f 1 w h e n t h e va l u e o f clk i s 0 .

Pl e a s e n o t e : This entry specifies th at a s long as the s imu lat ion ru ns ,Verilog-XL in verts th e valu e of clk after every 50 time u n its. Th is entry would notchan ge the value of clk at a ny t ime in the s imu lat ion if you ha d n ot firs t ch an gedthe value of clk from x to 0 with th e procedu ral ass ignm ent in the initialblock, becau se th e inverted valu e of x is x .

A p p l y i n g Te s t Ve c t o r sTh e n e x t s t e p s a p p l y t h e t e s t p a t t e r n v ec t o r s . Th e r e a r e s e ve r a l wa y s t h a ty ou c a n a p p ly s t im u li t o a d e s i gn ; t h e m e t h o d u s e d i n t h is m o d u l e is

ca l l ed vectored pat terns .



initialbegin

clr = 1;clk = 0;

end

always #50 clk = ~clk;


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4 5



1 0 . Th e s t r a t e g y t o a p p ly s t i m u l u s t o t h e d e s ig n s p e c ifie s t h a t t h e t e s t f ix t u r em o d e l a p p l ie s t h e t e s t p a t t e r n ve c t or s t w ic e . To a c c o m p l is h t h i s t a s k ,e n t e r a p r o c e d u r a l b lo c k t h a t s c h e d u le s t h e a p p l ic a t i on o f t h e t e s tp a t t e r n v e c t o r s t w i c e .

T h i s e n t r y s p e c ifi es a n initial p r o c e d u r a l b l oc k t h a t c o n t a i n s abegin-end b lo ck s t a t e m e n t . Th e fir s t s t a t e m e n t i n t h i s b lo ck s t a t e m e n t i s a repeat s t a t e m e n t . A repeat s t a t e m e n t b e g in s w i t h t h ek e y w o r d repeat fo ll ow e d b y a n e x p r e s s i o n i n p a r e n t h e s e s . T h e v a lu e o f t h i s e x p r e s s i on s p e c ifi e s t h e n u m b e r o f t i m e s t h a t Ve r il og - XL e x e c u t e st h e s t a t e m e n t t h a t f ollo w s .



initial

beginclr = 1;clk = 0;

end


initial begin

repeat (2)


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1 1 . B e gin a n o t h e r b e g in - e n d b l oc k a n d i n c lu d e in i t a p r o c e d u r a l a s s i g n m e n ts t a t e m e n t .

Th i s e n t r y b e gi n s a n o t h e r b e g in - e n d b l oc k s t a t e m e n t . Th e f ir s tp r o c e d u r a l s t a t e m e n t i n t h i s b lo c k s t a t e m e n t i s a p r o c ed u r a l a s s i gn m e n tt o a l l fo u r b i t s i n t h e ve c t o r r e g n a m e d data .

Th e e x p r e s s i o n o n t h e r ig h t - h a n d s i d e o f t h i s p r o c e d u r a l a s s ig n m e n ts t a t e m e n t i s a c on s t a n t n u m b e r s p e c ific a t i on ; it h a s t h r e e p a r t s :

4 Th e s izet h e s pe c ific a tion of t h e n u m b er of b it s Ve r ilog-XLn e e d s f or t h e c o n s t a n t . Yo u s p e c i fy t h e s i ze w it h b a s e 1 0d ig i t s .

b T h e b a s e f o r m a t b a s e f o r m a t s c o n s i s t s o f a s i n g l e q u o t e

c h a r a c t e r ( ) fo ll ow e d b y a c h a r a c t e r t h a t s p e c i fi es t h e b a s e ,o r r a d i x , o f t h e n u m b e r. Th e c h a r a c t e r b in d ic a t e s t h a t t h isi s a b i n a r y n u m b e r. Th e d e f a u l t b a s e f or m a t i s d fo r a d e c i m a ln u m b e r .

0000 Th e n u m b e r va l u e .

Wit h t h i s e n t r y, yo u s c h e d u l e Ve r i lo g -XL t o a p p l y a t e s t p a t t e r n o f a l lz er o e s t o t h e in p u t d a t a b u s o f t h e d e s ig n a t t h e s t a r t o f t h e s im u la t i on .



initialbegin

clr = 1;clk = 0;

end


initialbegin

repeat (2)

begindata = 4b0000;


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1 2 . T h e s t r a t e g y t o a p p l y s t i m u l u s c a l ls f or t h e t e s t fi xt u r e t o a p p l y a n e wt e s t p a t t e r n v e ct o r t h a t is t h e n e x t h i gh e r b in a r y n u m b e r a ft e r e ve r y 1 0 0t i m e u n i t s . T h e m o s t e l e m e n t a r y w a y t o d o t h i s is t o m a k e t h e f ol lo w in ge n t r y :

#100 data = 4b0001

Yo u c a n r e d u c e t h e a m o u n t o f t y p in g n e e d e d t o e n t e r a l l t h e t e s t p a t t e r nv e ct o r s f r o m b i n a r y 0 t o b i n a r y 1 5 b y d e f in i n g a t e x t m a c r o .

module hardrive;reg clr, clk;reg [3:0] data;wire [3:0] q;define stim #100 data = 4b


initialbegin

clr = 1;clk = 0;nd


initialbegin

repeat (2)begindata = 4b0000;


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T h i s e n t r y is a c o m p i l e r d ir e c t i ve t h a t d e fi n e s a t e x t m a c r o . C o m p i l erd i r e c t iv es a n d t e x t m a c r o s h a v e t h e fo ll ow in g d e fi n i t io n s :

Th i s e n t r y h a s t h r e e p a r t s :

define t h e s i n g le q u o t e c h a r a c t e r a n d k e y wo r d t h a t t e llVer i log-XL tha t th i s l in e i s a comp i le r d i rec t ivet h a t d e fin e s a t e x t m a c r o

stim t h e t e xt m a c r o n a m e

#100 data = 4b t h e m a c r o t e xt

D u r i n g c o m p i la t i o n o f t h e s o u r c e d e s c r i p t i o n , w h e n Ve r i lo g -XLe n c o u n t e r s t h e t e x t m a c r o n a m e p r e c ed e d b y a n a c c e n t g r a v e c h a r a c t e r( )stim it s u b s t i t u t e s t h e m a c r o t ex t #100 data = 4b .

U n l ik e s t a t e m e n t s , d e c la r a t io n s , a n d in s t a n t ia t i on s , c o m p i le r d i r e c t ive s

d o n o t e n d w it h a s e m i c olo n .

C O N C E P T S

c o m p i le r d i re c t i v e a n a c c e n t g r a v e ch a r a c t e r ( ) followed by ak e y w o r d t h a t c o n t r o ls h o w Ve r i lo g -XL c o m p i le s a n d s i m u l a t e s y o u rs o u r c e d e s c r i p t io n .

t e x t m a c ro A c h a r a c t e r s t r i n g t h a t Ver i lo g -XL s u b s t i t u t e s f o ra n o t h e r c h a r a c t e r s t r i n g w h e n it c o m p i le s y o u r s o u r c e d e s c r ip t i on .


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4 9



1 3 . U s e t h i s t e x t m a c r o t o a p p l y a ft e r e v e r y 1 0 0 t i m e u n i t s t e s t v e ct o r s f r o mb i n a r y 1 t o b i n a r y 1 5 .

T h e s e e n t r i e s t e l l Ve r i lo g -XL w h e n t o a p p l y t h e t e s t p a t t e r n s .

module hardrive;reg clr, clk;reg [3:0] data;wire [3:0] q;define stim #100 data = 4b


initialbegin

clr = 1;clk = 0;

end


initialbegin

repeat (2)begin

data = 4b0000;stim 0001;stim 0010;stim 0011;stim 0100;stim 0101;stim 0110;stim 0111;stim 1000;stim 1001;

stim 1010;stim 1011;stim 1100;stim 1101;stim 1110;stim 1111;


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5 0



1 4 . T h e s t r a t e g y t o a p p l y s t i m u l u s s p e c i fi e s t h a t a f t e r t h e t e s t f ix t u r e a p p l ie sa s e r i e s o f t e s t p a t t e r n , i t t o gg le s clr a n d a p p l ie s a l l t h e t e s t p a t t e r n sagain. To te l l Veri log-XL when to toggle clr y ou c a n u s e a n a m e d e ve n ta f te r t h e la s t t e s t p a t t e r n . A n a m e d e v en t i s a d a t a t y p e t h a t h a s t h efol lowing def ini t ion:

C O N C E P T S

n a m e d e v e n t a n e v e n t t h a t y o u t r i gg er i n a p r o c e d u r a l b lo c k t oe n a b l e a c t io n s .

Yo u m u s t d e c la r e a n a m e d e ve n t b e fo r e yo u c a n s c h e d u le it t o o c cu rin a p r o c ed u r a l b l oc k .


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5 1



Th i s e n t r y d e c la r e s a n a m e d e ve n t w it h t h e n a m e end_first_pass .

module hardrive;reg clr, clk;

reg [3:0] data;wire [3:0] q;define stim #100 data = 4bevent end_first_pass;


initialbegin

clr = 1;

clk = 0;end


initialbegin

repeat (2)begin

data = 4b0000;

stim 0001;

stim 1111;


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5 2



1 5 . S c h e d u l e Ve r i lo g -XL t o t r i gg e r t h e e v e n t a n d e n d t h e b l o ck s t a t e m e n t .

T h e d a s h a n d r i gh t a n g le b r a c k e t (- > ) c o m p o s e t h e e v e n t t r i gg e r op e r a t o r.Th is en t ry t e l l s Ver i log-XL to t r igger the even t n am ed end_first_passa f te r a d e l a y o f 2 0 0 t i m e u n i t s a n d e n d s t h e b lo c k s t a t e m e n t .

module hardrive;reg clr, clk;reg [3:0] data;wire [3:0] q;define stim #100 data = bevent end_first_pass;


initialbegin

clr = 1;clk = 0;

end


initialbegin

repeat (2)begin

data = b0000;stim 0001;

stim 1111;#200 ->end_first_pass;

end


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5 3



1 6 . E n t e r a p r o c e d u r a l b lo c k t h a t t o g gle s clr a t t h e r ig h t s i m u la t i on t im e .

module hardrive;reg clr, clk;reg [3:0] data;wire [3:0] q;define stim #100 data = 4bevent end_first_pass;


initialbegin

clr = 1;clk = 0;

end


always @(end_first_pass)clr = ~clr;

initial

beginrepeat (2)begin

data = 4b0000;stim 0001;


end


54/68


55/68

5 5



1 7 . S c h e d u le a n e n d t o t h e s im u la t i on a n d c l os e t h e b l oc k s t a t e m e n t .

module hardrive;reg clr, clk;reg [3:0] data;wire [3:0] q;define stim #100 data = bevent end_first_pass;


initialbegin

clr = 1;clk = 0;

end



initialbegin

repeat (2)begin

data = b0000;stim 0001;


end$finish;

end


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5 6



T h e fi r s t l in e i n t h i s e n t r y i s a s y s te m ta s k . To u s e s y s t e m t a s k s y o um u s t k n o w t h e f o l l o w i n g c o n c e p t s :

Th e $finish s y s t e m t a s k t e l ls Ve r il og - XL t o e n d t h e s i m u l a t i on .Ve r i lo g -XL e x e c u t e s t h i s s y s t e m t a s k a ft e r i t e x e cu t e s t h e repeats t a t e m e n t t w i ce .

Th e end k e y w o r d in t h e s e c o n d l i n e o f t h i s e n t r y e n d s t h e b l oc k s t a t e m e n t t h a t in c lu d e s t h e repeat s t a t em e n t a n d t h e $finish s y s t e mt a s k .

Mo n i t o ri n g t h e R e s u l t sTh e r e a r e s e v e r a l m e t h o d s t h a t y o u c a n u s e t o m o n i t or t h e r e s u lt s o f t h es im u la t ion . You can t e l l Ver i log-XL to wr i t e th e res u l t s to a f il e or d i sp layt h e r e s u lt s o n t h e s c r e e n . Yo u c a n a l s o u s e t h e g r a p h i c a l o u t p u t fa c i lit yt o d r a w w a v e fo r m s o n t h e s c r e e n . T h i s t u t o r ia l d e s c r ib e s h o w yo u c a nd i s p la y t h e va l u e s o f t h e i n p u t s a n d o u t p u t s o n t h e s c r e en .

Th e r e a r e a ls o s e v er a l m e t h o d s t h a t y ou c a n u s e t o d i s p la y t h e s e v a lu e so n t h e s c r e e n . T h e t u t o r ia l u s e s t h e $strobe s y s t em t a s k .

C O N C E P T S

t a s k a b u i l t - i n o r u s e r - d e f i n e d p r o c e d u r e .

u s e r-d e f i n e d t a s k a p r o c e d u r a l b l oc k t h a t b e gin s w it h t h ek e y w o r d task fo llo we d b y t h e n a m e o f t h e t a s k a n d e n d s w it h t h ek e y w o r d endtask . Th i s p r o c e d u r a l b l o c k s p e c i fi es t h e u s e r - d e f in e dt a s k s o t h a t y ou c a n e n a b l e it in a n o t h e r p r o c ed u r a l b lo c k .

s y s t e m t a s k a t a s k t h a t i s b u i lt i n t o Ve r il og - XL in s t e a d o f d e fi n e din a p r o c e d u r a l b lo c k i n y o u r s o u r c e d e s c r i p t io n . All s y s t e m t a s k sb e g in w i t h a d o lla r s i g n ($ ). S o m e s y s t e m t a s k s t a k e a rg u m e n t s s u c ha s c h a r a c t e r s t r i n g s , v a r ia b l e n a m e s , o r e x p r e s s i o n s . All s ys t e m t a s k c a l ls e n d w it h a s e m i c ol on .


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5 7



1 8 . B e g in t o e n t e r a n always p r o c e d u r a l b l oc k t h a t c o n t a i n s a n e v en tcon t ro l l ed $strobe s y s t em t a s k .



initialbegin

clr = 1;clk = 0;

end



always @(posedge clk)$strobe

initialbegin

repeat (2)begin

data = 4b0000;stim 0001;


end$finish;

end


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5 8



Th e $strobe s y s t e m t a s k d i s p la y s a m e s s a g e o n y ou r s c r e e n . U n l ik eo t h e r s y s t e m t a s k s t h a t d i s p l a y m e s s a g e s , if o t h e r e ve n t s o c c u r a t t h es a m e t im e d u r in g t h e s i m u la t io n e ve n t s s u c h a s va l u e c h a n g es a n d t h ee x e c u t i o n o f o t h e r s y s t e m t a s k s t h e d i s p l a y o f t h e $strobe m e s s a g eo c cu r s l a s t . Yo u u s e t h e $strobe s y s t em t a s k t o g u a r a n t e e th a t yo u s e es t a b l e v a lu e s t h e s e t t l e d v a lu e s a ft e r Ve r il og - XL e xe c u t e s a l l o t h e re ve n t s d u r i n g t h a t t im e i n t h e s i m u la t i on .

Th e $strobe s y s t e m t a s k t a k e s a l is t o f a rg u m e n t s a n d e x p r e s s i onp a r a m e t e r s . T h e a rg u m e n t s s p e c ify t h e t e xt o f t h e m e s s a g e t h a t t h es y s t em t a s k d is p l a ys a n d t h e e x p r es s i on p a r a m e t er s s u p p ly va l u e s t h a tVer i log-XL d i sp lays in the message .

Th e e v en t t h a t c o n t r o l s t h e s t a t e m e n t i s a v a l u e c h a n g e in clk . Th ek e y w o r d posedge q u a l ifi e s t h i s v a lu e c h a n g e . Th e posedge k e y w o r ds p e c ifi e s t h a t Ve r i lo g -XL s y n c h r o n i z e s t h e e x e c u t i o n o f t h e s t a t e m e n tw it h t h e fo ll ow in g v a l u e c h a n g e s o f clk :

0 t o 1 0 t o x

x t o 1


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5 9



1 9 . E n t e r a c h a r a c t e r s t r in g a r g u m e n t t o t h e $strobe s y s t em t a s k .



initialbegin

clr = 1;clk = 0;

end



always @(posedge clk)$strobe ("at time %0d clr =%b data=%d q=%d",

initialbegin

repeat (2)begin

data = 4b0000;stim 0001;


end$finish;

end


60/68

6 0



Th i s e n t r y b e g in s t h e l is t o f a rg u m e n t s a n d e x p r e s s i on p a r a m e t e r s t o t h e$strobe s y s t em t a s k .

Th e lis t i s p r e c ed e d b y a l e ft p a r e n t h e s i s c h a r a c t e r.

Th e p a r t o f t h e e n t r y t h a t i s e n c l os e d i n d o u b l e qu o t a t io n m a r k s i s ac h a r a c t e r s t r i n g a rg u m e n t t o t h e s y s t e m t a s k . All c h a r a c t e r s t r i n ga rg u m e n t s a r e en c l os e d in d o u b l e q u o t a t i o n m a r k s .

T h i s c h a r a c t e r s t r i n g i n c l u d e s t h e p e r c e n t s i g n ( % ) w h i c h i s a s p e c i a lc h a r a c t e r t o Ver i lo g -XL. T h e p e r c e n t s i g n i s t h e b e g i n n i n g o f a form a t s pecification . W h e n Ve r i lo g -XL d is p l a y s t h i s c h a r a c t e r s t r i n g , it r e p l a c e st h e fo r m a t s p e c ifi c a t io n w i t h a v a lu e .

T h e t y p e o f fo r m a t s p e c ifi c a t io n d e t e r m i n e s t h e t y p e o f v a lu e t h a tr e p l a c e s i t . Th i s c h a r a c t e r s t r i n g c on t a i n s t h e fo ll ow in g fo r m a ts p e c i f i c a t i o n s :

%d The d ec ima l fo rm at sp ec i fi ca t ionVer i log-XL rep laces t h i s

f o r m a t s p e c i f i c a t i o n w i t h a d e c i m a l n u m b e r.%b The b inary fo rmat spec i f i ca t ionVer i log-XL rep laces th i s

fo r m a t s p e c ific a t i on w it h a b i n a r y n u m b e r.

In a f o r m a t s p e c ifi c a t io n , i n c l u d i n g a z e r o (0 ) b e t w e e n t h e p e r c e n t s i g n(% ) a n d t h e a l p h a b e t i c c h a r a c t e r s p e c i fi e s t h a t Ve r i lo g- XL u s e s t h em i n i m u m n u m b e r o f s p a c e s t o d i s p la y t h e v a lu e . If y ou o m i t t h e z e r o,Ve r i lo g -XL u s e s t h e n u m b e r o f s p a c e s r e q u i r e d b y t h e la rg e s t p o s s i b l es ize o f the va lue .

C h a r a c t e r s t r in g a r g u m e n t s m u s t b e o n o n e l in e .

T h i s a rg u m e n t is fo ll ow e d b y a c o m m a t

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