uop rfics workgroup (rflab): research activitieskilyos.ee.bilkent.edu.tr/~newcomd3/third...

UoP RFICs Workgroup (RFLab):Research Activities

April 29, 2005 - Torino

B. Neri, D. Zito, L.Fanucci

Università di Pisa

Dipartimento di Ingegneria dell’Informazione:

Elettronica, Informatica, Telecomunicazioni

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Outline• RFLab & Partners• Fully Integrated Multi-Standard RF Transceiver for

5-6 GHz WLANsTX/RX Antenna SwitchLow Noise Amplifier & Power Amplifier1° Down-Converter MixerFrequency SynthesizerPower AmplifierUp-Converter Mixer2° Down-Converter Mixer

• Open Projects and InterestsApril 29, 2005 - Torino

RFICs Workgroup

D.Zito, ICECS 2002, September 17, 2002, DubrovnikApril 29, 2005 - Torino

• University of Pisa (RFLab) B. Neri, D. Zito, et al.

• University of Parma A. Boni, R. Menozzi, et al.

• University of Perugia F.Alimenti, L.Roselli, A. Scorzoni, V. Palazzari, et al.

• University of Modena and R.E. M.Borgarino, M.Pifferi, R.Codeluppi, et al.

• University of Messina C.Ciofi, G.Scandurra, et al.

Design Framework (Pisa)


• Computer Aided Design (CAD) Cadence Design System (CDS) Advanced Design System (ADS) RF Design Environment (RFDE)

• Electromagnetic Simulators EM Sight (MO), Momentum (ADS), Ansoft HFSS

• Technologies SiGe-CMOS 0.35um - Austriamicrosystems SiGe-CMOS 0.25um - IBM

• Instruments Signal Gen. (HP ESG-D3000A, 3 GHz) Spectrum Analyzer (Anritsu MS 2665C, 21 GHz) Probe Station (Karl Suss PM 5) Vector Network Analyzer (Anritsu37369D,40 GHz)

RF Transceivers: Scenario and Aims


TX/RX Antenna Switch

LNA Dem

odulator

PA

f0M

odulator

Single Silicon Die

Image Reject Filter

RX

TX

Fully Integrated Multi-standard RFTransceiver for 5-6 GHz WLANs


Funded by MIUR (266.000 Euro)

Units: University of Pisa, Parma, Perugia, Modena and R.E.

1th phase:stand-alonecells integration

2nd phase: test,re-design, macro-cells integration

TX/RX Antenna Switch: State of the Art


RX

TX

Off-chip

Limited ZOFF /ZON

(Q-factor integrated inductors)

Limited Frequency Range

Limited Power Switch Capability

Insertion Loss ≈1-2 dB


]cos[]sin[ 121121 ϕωϕω ⋅⋅+⋅+⋅⋅⋅−= fefe hMLjhMRZ p

IntegratedTransformer

)( 1211 MhLjRIpVpZ fep ⋅+⋅+== ω

CurrentAmplifier

Boot-Strapped Inductor (BSI): Idea

feh ϕje

L ≈ 10·L1

Integrated Band-pass Low Noise Amplifier:Basic Idea


Boot-Strapped Inductor

Input Stage Buffer Stage

LNA

f0

Vin Vout

Previous works:

Design (HSB2/3)

Chip Test

Re-design

Previous works:

Design (HSB2/3)

Chip Test

Re-design


LNA @ 1 GHz:Measure and Re-Design (temperature)

Tuning1,2,3 tre diverse coppie di (Ibias,Vbias)

∆f0< 0.42 %

∆GTmax < 3.8 %

Re-Design (temperature)

NF ≈ 2.3 dB

18 < Q< 33

D.Zito, 27 Novembre 2002, Pisa

Self-adaptive Band-pass LNA for5-6 GHz Multi-standard WLANs


High-Q LNA with Digital Tuning System

Multi-standard 5-6 GHzWLANs

Digital Calibration(Spreading)

IBM SiGe Contest

(Berkeley, University ofCalifornia)

D.Zito, 27 Novembre 2002, Pisa

Self-adaptive Band-pass LNA for5-6 GHz Multi-standard WLANs


feh ϕje

eqL

bI

bV

( ), , ,b bI V Tϕ ω( ), , ,fe b bh I V T ω

BSI Modeling and analytic synthesis (LC filter)

f0

Reverse relationships (tuning)

( ) 1,20 b b

eq

f I VL Cπ

=

( ), 0 eqb b

eq

LQ I V

Rω

=

( )0, ,b bI f Q V ( )0, ,b bV f Q I 25< Q <112, ∆Q<35% 5.15< f0< 5.85,∆f0 < 3%

Boot-Strapped Inductor (BSI): “Switching mode”


• Switching Mode (ON/OFF) Biasing (IB1, VB2)

• Low/High Impedance (ZIN) High state if CA is ON Low state if CA is OFF

TX/RX Antenna Switch based on BSI: Idea


Patented Time Division Duplexing

Different linearity constrains (R/T)

Receive Time Interval (RX)

CA OFF in Receiver

CA ON in Transmitter

Transmit Time Interval (TX)

CA ON in Receiver

CA OFF in Transmitter

Not de-embedded from LNA/PA

TX/RX Antenna Switch based on BSIfor 2.4 GHz WLANs (HSB3)


Base Coupled Differential LNA [*] RXTime Interval

ZR = 50Ω

ZT ≈ 2KΩ

PR = ZT/ZR ≈ 40

Insertion Loss < 0.1 dB

Power Switch Capability > -20 dBm

Noise Figure = 3.2 dB

Voltage Gain ≈ 20 dB

TX Time Interval ZR ≈ 2KΩ

ZT ≈ 50Ω

PR = ZR/ RANT ≈ 40

Insertion Loss ≈ 0.1 dB

Power Switch Capability > 0 dBm

*Base Coupled Differential LNA: Aims


Low Noise Figure (NF) Wide Linearity Range Differential Topology Input Matching (50 Ω)

Bonding wire

inside

*Base Coupled Differential (BCD) LNA


Down -Bonding to

Ground Plane (GP)

1) ib2 = - ib4

ic2 = - ic4

Single to Differential

No integrated inductors

Differential outputs

Bonding to

Input Lead

2) hfe2 = hfe4

TX/RX Antenna Switch 5-6 GHz:Performance

D.Zito, ICECS 2002, September 17, 2002, Dubrovnik

RX Time Interval ZR = 50Ω

ZT ≈ 1020Ω

PR = ZR/ZT ≈ 20

Insertion Loss < 0.236 dB

Power Switch Capability > -10 dBm

Power Consumption = 15 mW

TX Time Interval ZT = 50Ω

ZR ≈ 930 Ω

PR = Rant/ZR ≈ 18

Insertion Loss ≈ 0.585 dB

Power Switch Capability > +17 dBm

Power Consumption = 26 mW

Simplified scheme (resonant)


TX/RX Antenna Switch (resonant):Performance vs. Specifications (1/2)


Insertion Loss (IL) and Power Ratio (PR) in RX mode

Performance Insertion Loss < 0.236 dB < 2 dB

Specification

TX/RX Antenna Switch (resonant):Performance vs. Specifications


Insertion Loss (IL) and Power Ratio (PR) in TX mode

Performance Insertion Loss < 1.1 dB < 2 dB

Specification

TX/RX Antenna Switch: Chip (1/2)


“SwitChIP”

+ 7 dBm

+ 17 dBm

(resonant)

TX/RX Antenna Switch : Chip (2/2)


“SwitChIP”

• De-embedding

• EM Simulators Test

TX/RX Antenna Switch: Conclusions


The feasibility of a Fully Integrated Antenna Switchon standard silicon technology has been demonstratedand Patented (Europe)

The main performances are widely within therequirements of several Wireless LAN standards(ILRXmax = 0.235 dB, ILTXmax = 1.1 dB, @ 5-6 GHz)

The circuits are currently under test for finalexperimental confirmations

Multistandard Transceiver for 5-6 GHzWLANs : other Building Blocks


Tuned LNA (with notch filter @ fIM)


Schematic (Base Coupled Differential topology)

LNA 2nd fab-run: Performance vs.Specifications


Performance

25.7 dB

PD=27 mW

NF= 2.6 dB

GT= 17.8 dB

IIP3rd= -8.6 dBm

ICP1dB= -15.8 dBm

< 4 dB

~ 18 dB

> -20 dBm

Return Loss=-21 dB < -12 dBm

Specifications Transducer Gain (GT) vs. freq

Integrated inductors instead of bonding wires used in 1th fab-run

Power Amplifier


Schematic (2 stages BCD topology)

PA 2nd fab-run: Performance vs.Specifications


Performance

PD=144 mW

Psat = +12 dBm

GP= 21.5 dB

OIP3= ? dBm

OCP1dB= +10.2 dBm

+17 dBm

~ 30 dB

> +24 dBm

Specifications Transducer Gain (GT) vs. freq

> 30 dBc

Integrated inductors instead of bonding wires used in 1th fab-run

Image Reject Mixer: Building blocks


Image Reject Mixer (Hartley)

• Double Balanced Mixer• ALO Common Emitter• B Emitter Follower• AIF Common Emitter

Image Reject Mixer 2nd fab-run: Schematic


ALO has been revised (not shown in figure)

Buffer stage in AFI (ZL=90-j200 Ω, ZL=100 Ω)

Image Reject Mixer 2nd fab-run:Performance vs. Specifications


Performance

PD=158.6 mW

NF= 23.4 dB

GC= 5 - 6.84 dB

ICP1dB> -5.18 dBm

< 30 dB

~ 5 dB

> 5 dBm

IMR> 50 dB (90%) > 35 dBm

Specifications 1 dB Compression Point

• ZL= 90 - j200 Ω

• ZL= 100 Ω


LNA & Image Reject Mixer: Chip 2nd fab-run


“IF-Receiver”

Chip 1th fab-run: Chip Packaging


Bonding Diagram and Electromagnetic Simulations

LPCC (leadless) 48 with Exposed Pad 7x7 mm2


Chip 1th run: Microstrip Test Board

LNA Test Board


LNA (with notch filter @ fIM): chip test

|S21|dB

Image signal attenuation ≈ 55 dB

Power Saving 80 %


Image Reject Mixer: chip test

Image Rejection ≈ 47 dB

fRF (radiofrequency) fIM (image)

Frequency Synthesizer (by Parma): Scheme


Multi-standard(Digital selection)

fin = 4 MHzVCO “crossedColpitts”2 PFD: “fine” and“coarse”Mixed simulations(transistor leveland behaviouralAHDL)

Frequency Synthesizer (by Parma): Layout


CQFP 44

Frequency Synthesizer (by Parma): Board


Test Board (Layout)

Frequency Synthesizer (by Parma): Performance


Tuning (measured) Phase noise

-100 dBc/Hz @ 100 KHz

Frequency Synthesizer (by Parma): test


Locking

Power Amplifier (by Perugia)


Cascode Emitter Differential Pair (1 stage)

S21 measured

Power Amplifier (by Perugia): Performance


DC test 2nd fab-runLinearity range (measured)

Psat = +8 dBm GT= 13 dB OIP3= +18 dBmOCP1dB= +6 dBm PC= 84 mW

Power Amplifier and Up-converter Mixer(by Perugia and Modena):


Linearity range (measured)

IIP3= +7 dBmICP1dB= -3 dBmArea= 2.52 mm2

Transmitter

2ndDown-Converter Mixer (by Modena):Chip test


CMOS Buffer Stage (Bipolar) Performance (measured)

GC= -1 dB

ICP1dB> 0 dBm

IIP3 = +10 dBm

Area= 0.248 mm2


Remarks


Dem

odulator

PA

Modulator

Single Silicon Die

RX

TX

f0

LNA

Ant

enna

Sw

itch

RF Front-end for 5-6 GHz Multi-standard WLANs


Publications and Patentswithin the Project (1/3)


[1] S. Di Pascoli, L. Fanucci, B. Neri and D. Zito, “Base coupleddifferential amplifier: a new topology for RF integrated LNA”,International Journal of Circuit Theory and Applications, Wiley,Volume 31, Issue 4, July/August 2003, pp.351-360;

[2] S. Di Pascoli, L. Fanucci, F. Giusti, B. Neri, D. Zito, “Fully integratedheterodyne RF receiver for ISM band applications”, IEEE InternationalSymposium on Signals, Circuits and Systems, 2003 (SCS 2003),Volume 1, 10-11 July 2003, pp. 125 –128;

[3] S. Di Pascoli, L. Fanucci, B. Neri, G. Scandurra, D. Zito, “Single chip1.8 GHz band pass LNA with temperature self-compensation”, IEEEInternational Symposium on Signals, Circuits and Systems, 2003 (SCS2003), Volume 1, 10-11 July 2003, pp. 121 –124;

[4] L. Fanucci, A. Hopper, B. Neri, D. Zito, “A Novel Fully IntegratedAntenna Switch for Wireless Systems”, IEEE European Solid StateDevice Research Conference, 2003 (ESSDERC 2003), 16-18September 2003;

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Publications

[5] D. Zito, F. De Bernardinis and B. Neri, “Modeling and Design of aTunable high Q LNA for WLAN”, Proceedings of IEEE InternationalConference on Signals and Electronic Systems 2004 (ICSES 2004),Poznan (PL), 13-15 Sept. 2004, pp.253-256;

[6] L. Fanucci, E. Greco, N. Nardini, B. Neri, G. Scandurra, D. Zito, “5.25GHz Fully Integrated Heterodyne Down-converter with Hi-imageRejection”, Proceedings of IEEE International Conference on Signalsand Electronic Systems 2004 (ICSES 2004), Poznan (PL), 13-15 Sept.2004, pp.505-508;

[7] L.Benedettini, B. Neri and D. Zito, “5.25 GHz SiGe-CMOS 0.35 µmFully Integrated Power Amplifier”, Proceedings of IEEE InternationalConference on Signals and Electronic Systems 2004 (ICSES 2004),Poznan (PL), 13-15 Sept. 2004, pp.509, 512;

[8] B. Neri and D. Zito, “A Novel Differential LNA Topology for ModernWireless Applications”, International Journal of Analog IntegratedCircuit and Signal Processing, Kluwer Academic Publisher, to beconfirmed for publication;




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Publications

[9] D. Zito, F. D’ascoli and B. Neri “A Novel Fully Integrated AntennaSwitch for 5-6 GHz Wireless LAN Systems”, accepted for IEEE ISSCS2005

[10] D. Zito, F. D’ascoli and B. Neri, “High Image Rejection Fully IntegratedHeterodyne Receiver Front-end for 5-6 GHz Wireless LAN”, accepted forIEEE ISSCS 2005




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[11] B. Neri, D. Zito, L.Fanucci, “Commutatore integrato per terminali mobili /integrated antenna switch for mobile terminals”, Italian Patent n.PI/2003/a/000044, 09.06.2003, Università di Pisa;

[12] B. Neri, D. Zito, L.Fanucci, “Commutatore integrato per terminali mobili /integrated antenna switch for mobile terminals”, PCT n.PCT/IB2004/001881, 09.06.2004, Università di Pisa.

Publications

Patents


Open Projects


Other Partners (University of Parma, Perugia,Modena and Reggio Emilia)

STMicroelectronics – RFGroup

Ride the Wave (Pisa of University spin-off)


Research Activities


Low Power Radio (Active Tags for RFID,“Short Range Wireless”, “Consumer”)(Preliminary results: Low-IF receiver for 2.44 GHzPower Gain of 10 dB, Input Linearity range up to -20dBm, Power Consumption of 5-7mW)

Very High Frequency RF Front-ends PRIN2005 (Radiometry, civil and

environmental safeguard, 13 GHz) Short Range Radar (automotive 24/76 GHz) WLANs (17/60 GHz)


Research Activities: Technologies


Austriamicrosystems SiGe/CMOS 0.35um(fT = 75 GHz, NFmin = 1.9 dB @ 5 GHz)

STMicroelectronics SiGe/CMOS 0.25 um(7RF, fT = 90 GHz, NFmin = 1.6 dB @10 GHz)

IBM SiGe/CMOS 0.18 um (fT = 120 GHz)

IBM SiGe/CMOS 0.13 um (fT = 210 GHz)

STMicroelectronics CMOS 90nm(BiCMOC9, fT = 150 GHz, NFmin = 0.5 dB @ 5GHz)

Conclusions


RFLab & Partners4 Universities (Pisa, Parma, Perugia, Modena and R.E.)8 Professors, 5 Researchers, 8 PhD Students20 Thesis per year on RF Systems (only in Pisa)

PRIN 2002: Fully Integrated (antenna switch included)Multi-Standard RF Transceiver for 5-6 WLANsPresent and Future Works

Low Power Radio (Active Tags for RFID, “Short RangeWireless”, Wifi, Bluetooth, et al.)Very High Frequency RF Front-end (PRIN2005, ShortRange Radar, WLANs)


Common Research Activities within NEWCom


Partners interests?

How to integrate the common activities?

Next steps and deadlines?

How to proceed (plan)?

e-mail:[email protected]

uop rfics workgroup (rflab): research activitieskilyos.ee.bilkent.edu.tr/~newcomd3/third...

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