unit 1: definition of architecture -...

Unit 1: DEFINITION OF ARCHITECTURE.

1. Concept of architecture.

2. Analysis of architecture performance.

3. Instruction set design.

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Lecture 1: CONCEPT OF ARCHITECTURE.

1. Introduction.

2. Concept of architecture.

3. Factors to consider in the design of an architecture.

4. Description languages.

Bibliography:

S. Dasgupta, Computer Architecture: A Modern Synthesis, Volume 2: Ad-vanced Topics, John Wiley & Sons, 1989.

J.L. Hennessy, D.A. Patterson, Computer Architecture: A Quantitative Ap-proach, 3a edicion, Morgan Kaufmann Publishers, 2002.

Departamento de Informatica de Sistemas y Computadores (DISCA)Facultad de Informatica de Valencia

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1 INTRODUCTION

1. Introduction

Evolution of computer performance

Before the 70s: 1.3X per year.

• Technological improvements.

• Design innovations.

70s and 80s: 1.35X per year.

• Microprocessors become widespread.

• Technological improvement of the integrated circuits.

80s to present time: 1.58X per year.

• RISC architecture

• Architectural improvements: caches and instruction level parallelism.

• Technological improvements.

→ Remarkable increase of the available computing power: a current microprocessoris comparable to a 10-year old supercomputer.

→ Use of the microprocessor in a wide range of machines: from PCs to supercom-puters.

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1 INTRODUCTION

→ The ever increasing integration scale has allowed old architectures (for example,the x86 instruction set) to use many of the innovations originally designed for theRISCs. In the x86, there is a module that decodes x86 instructions and translatesthem to a RISC repertoire.

→ The performance increase is due to the combination of technological and archi-tectural improvements.

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1 INTRODUCTION

Platform evolution

60s: mainframes↓

70s: minicomputers↓

80s: PCs and workstations, servers↓

90s: Internet, PDAs, consoles, ...

Three platforms to be considered by designers

Desktop computer. To optimize cost/performance.

Server. Availability, scalability and productivity (throughput).

Embedded computers. To reach the required performance with a low cost.Small memory. Reduced consumption. Real time.

The task of the computer designer

When designing a new computer, the designer:

Determines what attributes are important,

Designs the system to maximize performance, and

Takes into account cost and power consumption constraints.

What has to be designed?Instruction set, functional organization, logical design and implementation

→ Optimizing the design requires knowing a wide set of technologies: compilers,operating systems, integrated circuit design, energy consumption, cooling...

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2 CONCEPT OF ARCHITECTURE

2. Concept of architecture

The architecture of a computer includes the instruction set as well as its implemen-tation.

Included issues:

1. Instruction Set Architecture (ISA):

It describes the behavior of the computer, as seen by the system pro-grammers.

Synonymous: exo-architecture, external architecture, logical architec-ture.

2. Organization:

The instructions are executed by the hardware. The organization of a com-puter describes the hardware using several abstraction levels.

Defines the features and characteristics of the main components (arith-metic operators, memory subsystem, . . . ), its interconnection (buses,multiplexors, . . . ) and control.

Synonymous: endo-architecture, internal architecture, physical architec-ture, structure, microarchitecture.

3. Implementation:

It includes the detailed logical design and the specific implementationaspects.

The design of an architecture must cover the three design issues mentioned above.

These three issues are not independent: the decisions made in each of them mayinfluence the rest.

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2 CONCEPT OF ARCHITECTURE

ORGANIZATION

HARDWARE

SOFTWARE

INSTRUCTION SETARCHITECTURE

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3 ARCHITECTURE DESIGN ISSUES

3. Issues to consider in the design of an architecture.

1. Functional requirements

Application scopeGeneral purpose Good performance for a wide range of applications,

including graphics, video and audioScientific computation Floating point operations, graphicsCommercial servers Data bases, transactions,

availability, scalabilityEmbedded systems Specific support, energy consumption constraints

Software compatibility levelSource code More flexible design,

needs to develop new compilersBinary Fixed ISA (little flexibility),

new software is not needed

Operating system requirementsAddress space It limits the application sizeMemory management Pagination, segmentation, . . .ProtectionProcess management Multitask support

Standards required by the marketFloating point IEEE 754I/O Ultra ATA, Ultra SCSI, PCI . . .Operating system UNIX, Windows, PalmOS, proprietary . . .Networks Ethernet, InfiniBand, PCI Express AS . . .Languages C, C++, Java, FORTRAN, . . .

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2. Selecting the best design

Different criteria:

Desktop PC: To optimize the cost/performance ratio.

Server: To optimize the availability, scalability, and throughput versuscost ratios.

Embedded: To reduce cost and energy consumption.

Strategies to achieve it:

Desktop PC: Development of advanced techniques in the processor;graphics and I/O well integrated with the processor.

Server: Microprocessor-based multiprocessors; scalable I/O subsystems.

Embedded: Adaptation of the techniques used in high-end processorsto obtain a good balance between performance and reduced cost andenergy consumption.

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3. Knowledge of the trends in the technology and usage of computers.

Trends in technology.

• Microprocessors:

◦ The number of transistors per chip increases by 58 % every year(2X every 18 months) (Moore’s Law).

Feature size: Size of the smallest transistor. The number of tran-sistors grows quadratically with the reduction of the transistorsize.

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From 10µm (10·10−6) in 1971 to 0.09µm (90 nm) in 2004.

◦ Transistor speed increases when we reduce its size. Clock fre-quency is doubled every two years (2X in 2 years). The numberof logic gates traversed in a clock cycle is also reduced.

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◦ Increase of the relative delay of the interconnections.Delay α R ·C of the wire. When transistor size is reduced, wirelength is also reduced, but R and C increase.The fraction of a chip reachable in a clock cycle continuouslydecreases: from 100 % with 0.25µm to 5 % with 0.06µm.

◦ Power consumption. From 0.01 W in the first microprocessorsto almost 100 W in a Pentium 4.Energy per transistor α C · f · V 2. The increase in the numberof transistors and the frequency dominates over the reductionin voltage and capacitance.

Distribution of the supply current to the microprocessor.Evacuation of the generated heat.

◦ Design time. Approx 6 years to complete the logical design,plus 2 additional years to start production.

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• DRAM memories: The integration density increases by 60 % everyyear.Memory access time decreases by 7 % every year (2X every 10years).

Memory interface improvements have considerably contributed toincrease memory bandwidth: from 1 GB/s (PC133, 1996) to 6.4GB/s (PC6400, 2003).

• Discs: Until 1990, disk capacity increased by 30 % every year. Sincethen, capacity doubles every year (2X every year).

The access time is reduced by 30 % every 10 years (1.5X every 10years).

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• Network interfaces. Slow evolution in the past: 10 years for Ether-net to move from 10 Mbps to 100 Mbps.Currently, improvement is faster: 4X in 4 years.New high-performance interconnection technologies have appeared.

→ There is an architecture ↔ technology interaction: certain archi-tectures require certain technology whereas the technology available ata given time may dictate certain architectural decisions.

Some examples:

• 32-bit microprocessor. When MOS technology was able to integratefrom 25,000 to 50,000 transistors in a single chip in early 80s, itbecame feasible to design a 32-bit microprocessor in a single chip.

• Caches. The speed difference between the processor and the mem-ory motivated the introduction of the cache memory between theprocessor and the main memory. The continuous growth of this dif-ference has suggested the use of several cache levels (L1, L2, L3)in the designs.

• Pipeline stages to propagate signals. The increasing wire delay mo-tivated the inclusion in the Pentium 4 of two pipeline stages dedi-cated solely to the propagation of signals through wires.

→ It is often necessary to design for the next technology available.

“an architecture that takes n years to be designed must have at least alifetime of n years”

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Trends in computer usage.

• Application’s memory requirements: every year, programs and theirdata require 1.5 to 2 times more memory → memory addresses re-quire 1 additional bit per year!

• Languages: high-level languages have replaced the assembly lan-guage for computer programming.→ The compiler is the main user of the machine (for developmentcomputers).

4. Trends in the cost.

Cost of an integrated circuit.

DIESSILICON BAR WAFERS DIES IN A WAFER INTEGRATEDCIRCUIT

FAULTY DIES

Final cost ≈ f (die surface4)Die surface = f (design complexity)

Factors that reduce component cost:

• Learning curve: The cost of a component decreases over time be-cause yield increases (thus reducing the rate of defective compo-nents).

• Sales volume: Cost decreases by 10 % when the sales volume isdoubled.

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• Use of commodity components: DRAM, discs, monitors. The strongcompetition lowers the prices.

• Cost as opposed to price.

47%

10%

25%

19%

COMP. COMP. COMP. COMP.COST COST COST COST

COSTSDIRECTCOSTS

DIRECTCOSTS

MARGIN MARGINGROSS GROSS

AVERAGEDISCOUNT

DIRECT

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4 DESCRIPTION LENGUAJES

4. Description lenguajes

CHDL’s: Computer hardware description languages.ADL’s: Architectural description languages.

Usefulness of the description languages:

1. Design documentation.

2. Design simulation.

The description is executed, with two objectives:

a) To verify its functional correctness.

b) To evaluate its performance.

without having implemented the system!

3. Automatic synthesis.

Two examples:

a) Hardware example.

b) Code generated by the compilers.

4. Formal verification.

How to achieve an error-free design?

a) Using automatic synthesis, if the components have been verified and theused transformations are correct.

b) Performing an exhaustive functional verification. Only feasible in sim-ple systems.

c) Performing a formal verification: Mathematical model (the description)+ symbolic computation on the model.

5. Fault diagnosis.

Injection of faults in the description, and observation of the resulting behavior.

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Examples of description languages: VHDL

VHDL (“Very high speed integrated circuits Hardware Description Language”)

Support for multilevel description: it allows the specification of a system from thelogical level (gate level) to the architecture level (instruction set architecture).

VHDL supports descriptions from three different points of view (description styles):

Behavioral. It explains the functionality of the system, specifying only itsinputs and outputs, as well as the relationship between them.

Structural. It describes the system by specifying the most primitive compo-nents it consists of, as well as the interconnection among them.

Data flow. It specifies the behavior of a system using equations that repre-sent movement of data within the system. These equations also represent theinternal structure.

The three description styles can be used simultaneously in the specification of asystem.

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Example 1: Description of a half-adder.

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entity half_adder isport (A,B : in bit; -- input ports

Sum,Carry : out bit); -- output portsend half_adder;

architecture structural_view of half_adder iscomponent not_gate

port (I: in bit; 0: out bit);end component;

component and_gateport (Il, I2: in bit; 0: out bit);

end component;

component or_gateport (I1, I2: in bit; 0: out bit);

end component;

signal w,x,y,z : bit;

begin

Gl: not_gate port map (A,x);G2: not_gate port map (B,y);G3: and_gate port map (x,B,z);G4: and_gate port map (y,A,w);G5: or_gate port map (z,w,Sum);G6: and_gate port map (A,B,Carry);end structural_view;

architecture data_flow_view of half_adder isbegin

Sum <= (not A and B) or (A and not B) after 30 ns;Carry <= A and B after 10 ns;

end data data_flow_view;

architecture behavioral_view of half_adder isbegin

processvariable na,nb,ns: natural;variable ns_v: bit_vector(0 to 1);

beginna := bin2int(A);nb := bin2int(B);ns := A+B;ns_v := int2bin(ns);Sum <= ns_v(1) after 30ns;Carry <= ns_v(0) after 10ns;

end process;end behavioral_view;

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Example 2: Description of a computer.

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architecture structural_view of computer iscomponent CPU

port (DATA: inout tri_vector (O to 7);ADDR: out bit_vector(3 downto 0);CLOCK, INT: in bit;MR, RW, IO_REQ: out bit);

end component;

component RAMport (DATA: inout tri_vector(0 to 7);

ADDR: in bit_vector(2 downto 0);CSO, CSl, RW: in bit);

end component;

component DECport (DEC_IN: in bit; DEC_OUT: out bit_vector(0 to 1))

end component;

component CLKport (C: out bit);

end component;

signal M: bit_vector(0 to 1);signal cl, mr, rw: bit;

beginPROCESSOR: CPU port map (DATA, ADDR, cl, INT, mr, rw, IO_REQ);M0: RAM port map (DATA, ADDR(2 downto 0), mr, M(0), rw);Ml: RAM port map (DATA, ADDR(2 downto 0), mr, M(l), rw);DECODER: DEC port map (ADDR(3), M);CLOCK: CLK port map (cl);

end structural_view;

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unit 1: definition of architecture -...

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