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Al-Qura University 1422/1423 Faculty of Engineering Subject: Computer Orga Department of Computer Engineering 1st Midterm Exam

Answer the following questions: Time allowed: 1 (one) Hour 1) The 4-bit adder-subtractor given in figure has the following values for input mode M and data inputs A and B. In each case, determine the values of the outputs: S3, S2, S1, So and C4.

M A B A 0 0111 1010 B 1 1001 1100 C 0 1100 1000 D 0 0101 1101 e 1 0001 1010

2) Register A holds the 8-bit binary 11011001. Determine the B operand and the logic microoperation to be performed in order to change the value in A to:

a- 01101101 b- 11111101.

3) Explain the operation of an arithmetic-logic shift unit, use the different select values for ( s3,s2,s1,s0) to give a function table for such a unit. 4) Starting from an initial value of R = 11101101, determine the sequence of binary values in R after a logical shift-left, followed by a circular shift-right, followed by a logical shift-right and a circular shift-left. 5) What is the value of H in the 4-bit combinational circuit shift if input A is 1101, S= 1, IR= 0 and IL = 1.

Best Wishes Prof. Dr. Kadry Montasser Umm Al-Qura University 1422/1423 Faculty of Engineering Subject: Computer Organization

Department of Computer Engineering 2nd Midterm Exam

Answer the following questions: Time allowed: 1 (one) Hour 1) An instruction at address 021 in the basic computer has I = 0, an operation code of the

AND instruction, and an address part equal to 083 (all numbers are in hexadecimal). The memory word at address 083 contains the operand BBF2 and the content of AC is A937. Go over the instruction cycle and determine the contents of the following registers at the end of the execute phase: PC. AR, DR, AC, and IR..

2) Show the contents in hexadecimal of registers PC, AR, OR, IR, and SC of the basic computer when an ISZ indirect instruction is fetched from memory and executed. The initial content of PC is 7FF. The content of memory at address 7FF is EA9F. The content of memory at address A9F is 0C35. The content of memory at address C35 is FFFF. Give the answer in a table with five columns, one. for each register and a row for each timing signal. Show the contents of the registers after the positive transition of each clock pulse.

3) List the main registers for the basic computer with their number of bits, symbol, and

function. 4) Aided with neat sketches describe the control unit of the basic computer. Give an example

of control timing signals. 5) Aided with a flowchart show the interrupt cycle. Illustrate your answer with a memory

example before and after interrupt cycle.

Best Wishes Prof. Dr. Kadry Montasser Umm Al-Qura University 1422/1423 Faculty of Engineering Subject: Computer Organization Department of Computer Engineering 2nd Midterm Exam

Answer the following questions: Time allowed: 1 (one) Hour 1) Differentiate between the direct and indirect addressing. Demonstrate your answer with an

example for an ADD operation. 2) An instruction at address 021 in the basic computer has I = 0, an operation code of the

AND instruction, and an address part equal to 083 (all numbers are in hexadecimal). The memory word at address 083 contains the operand BBF2 and the content of AC is A937. Go over the instruction cycle and determine the contents of the following registers at the end of the execute phase: PC. AR, DR, AC, and IR.

3) Differentiate between the different basic computer instruction formats. Illustrate your answer with a flowchart for instruction cycle.

4) Show the contents in hexadecimal of registers PC, AR, OR, IR, and SC of the basic computer when an ISZ indirect instruction is fetched from memory and executed. The initial content of PC is 7FF. The content of memory at address 7FF is EA9F. The content of memory at address A9F is 0C35. The content of memory at address C35 is FFFF. Give the answer in a table with five columns, one. for each register and a row for each timing signal. Show the contents of the registers after the positive transition of each clock pulse.

Best Wishes Prof. Dr. Kadry Montasser Umm Al-Qura University 1422/1423 (2nd Term) Faculty of Engineering Subject: Computer Organization Department of Computer Engineering Final Exam

Answer the following questions: Time allowed: 2 (two) Hours

1)a- Register A holds the 8-bit binary 10110110. Determine the B operand and the microoperation to be performed in order to change the value in A to: i- 11111111 ii- 11001111 iii- 00000000 ______________________________________________________________________ 1) a- An 8-bit register contains the binary value 11110010. What is the register value after an

arithmetic shift right? Starting from the initial number 11110010, determine the register value after an arithmetic shift left.

c- Starting from an initial value of R = 11001110, determine the sequence of binary values in R after a logical shift- right, followed by a circular shift-left, followed by a logical shift-left and circular shift-left again.

____________________________________________________________________ 2) A computer uses a memory unit with 256 kwords of 32 bits each. A binary instruction

code is stored in one word of memory. The instruction has four parts: and indirect bit, an operation code, a register code part to specify one of 64 registers, and an address part.

a- How many bits are there in the operation code, the register code part, and the address part?

b- Draw the instruction word format and indicate the number of bits in each part. c- How many bits are there in the data and address inputs of the memory? ______________________________________________________________________ 4) The content of PC in. the basic computer is 3AF (all numbers are in hexadecimal). The

content of AC is 7EC3. The content of memory at address 3AF is 932E. The content of memory at address 32E is 09AC. The content of memory at address 9AC is 8B9F.

a. What is the instruction that will be fetched and executed next? b. Show the binary operation that will be performed in the AC when the instruction is

executed. c. Give the contents of registers PC, AR, DR, AC, and IR in hexadecimal and the values of E,

I, and the sequence counter SC in binary at the end of the instruction cycle. 5) A relative mode branch type of instruction is stored in memory at an address equivalent to

decimal 750. The branch is made to an address equivalent to decimal 500. a. What should be the value of the relative address field of the instruction (in decimal)? b. Determine the relative address value in binary using 12 bits. c. Determine the binary value in PC after the fetch phase and calculate the binary value of

500. Then show that the binary value in PC plus the relative address calculated in part (b) is equal to the binary value of 500.

Best Wishes Prof. Dr. Kadry Montasser Umm Al-Qura University 1423/1424 Faculty of Engineering Subject: Computer Organization Department of Computer Engineering Midterm Exam

Answer the following questions: Time allowed: 1 (one) Hour 1) An instruction address 021 in the basic computer has I= 0, an operation code of the

AND instruction, and an address part equal to 074 ( all numbers are in hexadecimal). The memory word at address 074 contains the operand B8E3 and the content of AC is

C836. Go over the instruction cycle and determine the contents of the following registers at the end of the execute phase: PC, AR, AC, DR, and IR. Repeat the problem 3 more times starting with an operation code of another memory- reference instruction.

2) The content of PC in the basic computer is 4CE. The content of AC is 6FB5. The content

of memory at address 4CE is 932E. The content of memory at address 32E is 18BD. The content of memory at address 18BD is 8B9F. a- What is the instruction that will be fetched and executed next? b- Show the binary operation that will be performed in the AC when the instruction is

executed. c- Give the contents of registers PC, AR, DR, AC, and IR in hexadecimal and the values

of E, I, and the sequence counter SC in binary at the end of the instruction cycle.

3) The memory unit of the basic computer shown in Fig. 5-3 is to be changed to a 65,536 x 16 memory, requiring an address of 16 bits. The instruction format of a memory-reference instruction shown in Fig. 5-5 remains the same for I= 1 with the address part of the instruction residing in positions 0 through 11. But when I= 0, the address of the instruction is given by the 16 bits in the next word following the instruction. Modify the microoperations during times T2, T3, ( and T4 if necessary) to conform with this configuration.

Best Wishes Prof. Dr. Kadry Montasser Umm Al-Quraa University 1423/1424 (1st Term) Faculty of Engineering Subject: Computer Organization Department of Computer Engineering Final Exam

Answer the following questions: Time allowed: 2 (two) Hours 1)a- The 8-bit registers AR, BR, CR, and DR initially have the following values:

AR = 11110010, BR = 11111111,

CR = 10111001, DR = 11101010

Determine the 8-bit values in each register after the execution of the following sequence of microoperations.

AR ←AR + BR

CR ←CR ΛDR, BR ←-BR + 1

AR← AR -CR

b- An 8-bit register contains the binary value 11010111. What is the register value after an arithmetic shift right? Starting from the initial number 11010111, determine the register value after an arithmetic shift left.

____________________________________________________________________ b- A computer uses. a memory of 65,536 words with eight bits in each word. It has the

following registers: PC, AR, TR (16 bits each), and AC, DR, IR (eight bits each). A memory-reference instruction consists of three words: an 8-bit operation-code (one word) and a 16-bit address (in the next two words). All operands are eight bits. There is no indirect bit.

i. Draw a block diagram of the computer showing the memory and registers as in Fig. 5-3. (Do not use a common bus).

ii. Draw a diagram showing the placement in memory of a typical three-word instruction and the corresponding 8-bit operand.

iii. List the sequence of microoperations for fetching a memory reference instruction and then placing the. operand in DR.. Start from timing signal To. ______________________________________________________________________ 3)a- Aided with a flowchart show the interrupt cycle. Illustrate your answer with a memory

example before and after interrupt cycle. b- The content of PC in. the basic computer is 5DE (all numbers are in hexadecimal). The

content of AC is 6BC7. The content of memory at address 5DE is 854E. The content of memory at address 32E is 09AC. The content of memory at address 9AC is 6C9E.

i. What is the instruction that will be fetched and executed next? ii. Show the binary operation that will be performed in the AC when the instruction is executed. iii. Give the contents of registers PC, AR, DR, AC, and IR in hexadecimal and the values of E, I, and the sequence counter SC in binary at the end of the instruction cycle. ___________________________________________________________________ 4)a- Write a program to evaluate the arithmetic statement: X = [(A + B*C) – D] / [ E – F]

i- Using a general register computer with three address instructions. ii- Using a general register computer with two address instructions. iii- Using an accumulator type computer with one address instructions. iv- Using a stack organized computer with zero-address operation instructions.

b- Determine the microperation that will be executed in the processor of Fig. 8-2, when the

following 14-bit control words are applied. i) 00101001100101 ii) 11110001110000 iii) 00000000000000 iv) 01001001001100

v) 00000100000010 Best Wishes Prof. Dr. Kadry Montasser Umm Al-Qurah University 1426/1427 (1st Term) Faculty of Engineering Subject: Computer Organization Department of Computer Engineering 1st Midterm Exam

Answer the following questions: Time allowed: 1½ Hours 1) a- Design a common bus system for 8 registers of 16 bits each. b- Draw a diagram for the bus system of part (a),but use three-state buffers and a decoder instead of the multiplexers. ______________________________________________________________________ 2) a- What is the value of H in the 4-bit combinational circuit shift if input A is 1011, S= 1, IR= 0 and IL = 1.

b- The 8-bit registers AR, BR, CR, and DR initially have the following values:

AR = 11010010, BR = 11100101,

CR = 10001111, DR = 10010101


AR ←AR + BR

CR ←CR ∨DR, BR ←-BR - 1

AR← AR -CR

______________________________________________________________________ 3) a- Register A holds the 8-bit binary 11010010. Determine the B operand and the microoperations to be performed in order to change the value in A to: i- 11111111 ii- 11001111 iii- 00000000 b- Starting from an initial value of R = 11001110, determine the sequence of binary values in R after a logical shift- right, followed by a circular shift-left, followed by a logical shift-left and circular shift-left again. Best Wishes Prof. Dr. Kadry Montasser Umm Al-Qurah University 1426/1427 (1st Term) Faculty of Engineering Subject: Computer Organization Department of Computer Engineering 2nd Midterm Exam

Answer the following questions: Time allowed: 1 Hours 1) a- An instruction at address 021 in the basic computer has I = 0, an operation code of the

ADD instruction, and an address part equal to 092 (all numbers are in hexadecimal). The memory word at address 092 contains the operand C7E3 and the content of AC is B8E3. Go over the instruction cycle and determine the contents of the following registers at the end of the execute phase: PC. AR, DR, AC, and IR..

b- Repeat four more times starting with an operation code of another memory-reference instruction.

______________________________________________________________________ 2) The content of PC in. the basic computer is 3AF (all numbers are in hexadecimal). The


a. What is the instruction that will be fetched and executed next? b. Show the binary operation that will be performed in the AC when the instruction is executed.

c. Give the contents of registers PC, AR, DR, AC, and IR in hexadecimal and the values of E, I, and the sequence counter SC in binary at the end of the instruction cycle.

______________________________________________________________________ 3)a- What hardware components does the basic computer consist of? Assign the number of

bits of each component. b- For each of the following 16-bit instruction, give the equivalent hexadecimal code and

give the meaning of each instruction to be executed and the address in memory, if exists I ) 1111000001000000 II ) 0111000100000000 III) 0110100100110111 IV) 1101100001011010 V ) 0111000001000000 Given that the contents of AC and E are F3A4 and 1, respectively. Best Wishes Prof. Dr. Kadry Montasser Umm Al-Qurah University 1426/1427 (1st Term) Faculty of Engineering Subject: Computer Organization Department of Computer Engineering Final Exam

Attempt the following questions: Time allowed: 2 Hours 1)a- An 8-bit register contains the binary value 11010111. What is the register value after

executing the following microoperations, consecutively: i) arithmetic shift right, ii) circulate shift right, iii) arithmetic shift left. b- A computer uses a memory unit with 512 kwords of 32 bits each. A binary instruction


i) How many bits are there in the operation code, the register code part, and the address part?

ii) Draw the instruction word format and indicate the number of bits in each part.

iii) How many bits are there in the data and address inputs of the memory? ______________________________________________________________________

2) a- An instruction at address 032 in the basic computer has I = 0, an operation code of the AND instruction, and an address part equal to 0A2 (all numbers are in hexadecimal). The memory word at address 0A2 contains the operand C7F6 and the content of AC is A6C3. Go over the instruction cycle and determine the contents of the following registers at the end of the execute phase: PC. AR, DR, AC, and IR..

b- Apply the following instructions: ADD, LDA, STA, BUN, BSA, and ISZ, consecutively and determine the contents of the same registers.

______________________________________________________________________ 3) a- Differentiate between the direct and indirect addressing. Demonstrate your answer with an example for an ADD operation b- Show the contents in hexadecimal of registers PC, AR, OR, IR, and SC of the basic

computer when an ISZ indirect instruction is fetched from memory and executed. The initial content of PC is 6EE. The content of memory at address 6EE is EA9D. The content of memory at address A9D is 0A6B. The content of memory at address A6B is FEA6. Give the answer in a table with five columns, one. for each register and a row for each timing signal. Show the contents of the registers after the positive transition of each clock pulse.

______________________________________________________________________ 4) a- Derive the control gates associated with both the read and write inputs of memory in the

basic computer. b- The content of PC in. the basic computer is 3AF (all numbers are in hexadecimal). The




5) The following program is stored in the memory unit of the basic computer. _________________________ Location Instruction 010 CLA 011 ADD 016 012 Bun 014 013 HLT 014 AND 017 015 BUN 013 016 C1A5 017 93C6 _________________________ a- Show the contents of the AC, PC, and IR ( in hexadecimal), at the end, after each instruction is executed. All numbers below are in hexadecimal. b- write down the program with assembly language.

Best Wishes Prof. Dr. Kadry Montasser

Umm Al-Qurah University 1426/1427 (2nd Term) Faculty of Engineering Subject: Computer Organization Department of Computer Engineering 1st Midterm Exam(G2)

Answer the following questions: Time allowed: 1 Hour 1) a- Design a common bus system for 16 registers of 32 bits each. b- Draw a diagram for the bus system of part (a),but use three-state buffers and a decoder instead of the multiplexers. ______________________________________________________________________ 2) a- What is the value of H in the 4-bit combinational circuit shift if input A is 1011, S= 0, IR= 1 and IL = 0. b- The 8-bit registers AR, BR, CR, and DR initially have the following values:

AR = 11010010, BR = 11100101,

CR = 10001111, DR = 10010101


AR ←AR + BR

CR ←CR ∨DR, BR ←-BR - 1

AR← AR -CR

______________________________________________________________________ 3) a- Register A holds the 8-bit binary 10011110. Determine the B operand and the microoperations to be performed in order to change the value in A to: i- 11111111 ii- 11001111 iii- 00000000 b- Starting from an initial value of R = 10011100, determine the sequence of binary values in R after a logical shift- right, followed by a circular shift-left, followed by a arithmetic shift-left and circular shift-left again. Best Wishes Prof. Dr. Kadry Montasser Umm Al-Qurah University 1426/1427 (2nd Term) Faculty of Engineering Subject: Computer Organization Department of Computer Engineering 1st Midterm Exam(G3)

Answer the following questions: Time allowed: 1 Hour 1) a- Design a common bus system for 32 registers of 32 bits each. b- Draw a diagram for the bus system of part (a),but use three-state buffers and a decoder instead of the multiplexers. ______________________________________________________________________ 2) a- What is the value of H in the 4-bit combinational circuit shift if input A is 1001, S= 1, IR= 1 and IL = 1 b- The 8-bit registers AR, BR, CR, and DR initially have the following values:

AR = 10111011, BR = 10100111,

CR = 11101001, DR = 10110001


AR ←AR + BR

CR ←CR ^DR, BR ←-BR + 1

AR← AR -BR

______________________________________________________________________ 3) a- Register A holds the 8-bit binary 11110011. Determine the B operand and the microoperations to be performed in order to change the value in A to: i- 11100011 ii- 01001001 iii- 00000000 b- Starting from an initial value of R = 10011010, determine the sequence of binary values in R after a arithmetic shift-right, followed by a circular shift-left, followed by a logical shift-left and circular shift-left again. Best Wishes Prof. Dr. Kadry Montasser Umm Al-Qurah University 1426/1427 (2nd Term) Faculty of Engineering Subject: Computer Organization Department of Computer Engineering 2nd Midterm Exam (G2&3)

Attempt the following questions: Time allowed: 1 Hours 1) A computer uses a memory unit with 512 kwords of 32 bits each. A binary instruction code

is stored in one word of memory. The instruction has four parts: and indirect bit, an operation code, a register code part to specify one of 128 registers, and an address part. i) How many bits are there in the operation code, the register code part, and the

address part? ii) Draw the instruction word format and indicate the number of bits in each part. iii) How many bits are there in the data and address inputs of the memory?

______________________________________________________________________ 2) a- Differentiate between the direct and indirect addressing. Demonstrate your answer with

an example for an AND operation b- Show the contents in hexadecimal of registers PC, AR, M[AR], IR, and SC of the basic

computer when an BSA indirect instruction is fetched from memory and executed. The initial content of PC is 7AF. The content of memory at address 7AF is EA9F. The content of memory at address A9F is 0C35. The content of memory at address C35 is 5BC7. Give the answer in a table with five columns, one for each register and a row for each timing signal. Show the contents of the registers after the positive transition of each clock pulse.

______________________________________________________________________ 3)a- Derive the control gates associated with the program counter PC in the basic computer. b- For each of the following 16-bit instruction, give the equivalent hexadecimal code and

give the meaning of each instruction to be executed and the address in memory, if exists

i) 1111001000000000 ii) 0111000000001000 iii) 0010100100110101 iv) 1100100011011011 v) 0111000001000000 If the contents of AC and M[AR] are F3A4 and 36D4, respectively, while E is

0, find the contents of AC and E. Best Wishes Prof. Dr. Kadry Montasser Umm Al-Qurah University 1426/1427 (2nd Term) Faculty of Computer& Information Systems Subject: Computer Organization Department of Computer Engineering Final Exam

Attempt the following questions: Time allowed: 2 Hours 1) a- Aided with neat sketches, explain the theory of operation of the bidirectional shift

register with parallel load. b- Correct, if needed; the following register transfer statements: i) XT: R1← R2, R1← R3 ii) Y + T: PC ← AR, PC ← PC +1 iii) Z ^ T: R1 + R2, R1 ← 0 ______________________________________________________________________ 2) a- The register transfer statements for a register R and the memory M in a computer

are as follows: X3

’X1 X2: R← M [AR] X2

’X1’X3: R← AC

X2’X1 : R ← TR

X3X1’ X2: M [AR] ← R

Draw the hardware implementation of R and the memory in block diagram form. b- Show the contents in hexadecimal of registers PC, AR, M [AR], IR, and SC of the basic

computer when an BSA indirect instruction is fetched from memory and executed. The initial content of PC is 3BE. The content of memory at address 3BE is FB9E. The content of memory at address B9E is BC35. The content of memory at address C35 is 5BC7. Give the answer in a table with five columns, one for each register and a row for each timing signal. Show the contents of the registers after the positive transition of each clock pulse.

______________________________________________________________________

3) a- Differentiate between the indirect addressing and BSA instruction execution. Demonstrate your answer with examples.

b- A computer uses a memory of 16384 words, 40 bits in each word. The instruction code

format consists of six bits for the operation part and 14 bits for the address part (no indirect mode bit). Two instructions are packed in one memory word, and a 40-bit instruction register IR is available in the control unit. Formulate a procedure for fetching and executing instructions for this computer.

______________________________________________________________________ 4) A computer uses. a memory of 65,536 words with eight bits in each word. It has the


i. Draw a block diagram of the computer showing the memory and registers. (Do not use a common bus).


iii. List the sequence of microoperations for fetching a memory reference instruction and then placing the. operand in DR.. Start from timing signal To.

5) a- Aided with neat sketches, derive the gate structure for controlling the accumulator

register in the basic computer. b- The following program is stored in the memory of the basic computer. Location Instruction 100 7800 101 1106 102 4104 103 7001 104 0107 105 4103 106 B3E6 107 A3D4 i) Show the contents of the AC, PC, and IR ( in hexadecimal), at the end, after each

instruction is executed. All numbers below are in hexadecimal. ii) Write down the corresponding program with assembly language.


Umm Al-Qurah University 1426/1427 (2nd Term) Faculty of Engineering Subject: Computer Organization Department of Computer Engineering Substitution Exam

Attempt the following questions: Time allowed: 1 Hours 1)a- Differentiate between the indirect addressing and BSA instruction execution.

Demonstrate your answer with examples. b-A computer uses a memory unit with 512 kwords of 16 bits each. A binary instruction



iv) Draw the instruction word format and indicate the number of bits in each part.

v) How many bits are there in the data and address inputs of the memory? ______________________________________________________________________ 2) a- An instruction at address 032 in the basic computer has I = 0, an operation code of the

AND instruction, and an address part equal to 0A2 (all numbers are in hexadecimal). The memory word at address 0A2 contains the operand C7F6 and the content of AC is A6C3. Go over the instruction cycle and determine the contents of the following registers at the end of the execute phase: PC. AR, DR, AC, and IR..


______________________________________________________________________ 3) a- Derive the control gates associated with the program counter AR in the basic computer. b- Show the contents in hexadecimal of registers PC, AR, DR, IR, and SC of the basic

computer when an ISZ indirect instruction is fetched from memory and executed. The initial content of PC is 6EE. The content of memory at address 6EE is EA9D. The content of memory at address A9D is 0A6B. The content of memory at address A6B is FEA6. Give the answer in a table with five columns, one. for each register and a row for

each timing signal. Show the contents of the registers after the positive transition of each clock pulse.

______________________________________________________________________ 4) The content of PC in. the basic computer is 3AF (all numbers are in hexadecimal). The




Best Wishes Prof. Dr. Kadry Montasser Umm Al-Qurah University 1428/1429 (1st Term) Faculty of Engineering Subject: Computer Organization Department of Computer Engineering 1st Midterm Exam G 3,4

Answer the following questions: Time allowed: 1 Hour 1) a- Aided with neat sketches, explain the theory of operation of the bidirectional shift

register with parallel load. b- Correct, if needed; the following register transfer statements: i) XT : R1← R2, R1← R3 ii) Y + T: PC ← AR, PC ← PC +1 iii) Z ^ T: R1 + R2, R1 ← 0 ______________________________________________________________________ 2) a- Starting from an initial value of R = 11001110, determine the sequence of binary values

in R after an arithmetic shift- right, followed by a circular shift-left, followed by an arithmetic shift-left and circular shift-left again.

b- The 8-bit registers AR, BR, CR, and DR initially have the following values:

AR = 11010010, BR = 11100101,

CR = 10001111, DR = 10010101


AR ←AR + BR

CR ←CR ∨DR, BR ←-AR - 1

AR← AR -CR

______________________________________________________________________ 3) a- Register A holds the 8-bit binary 11010010. Determine the B operand and the microoperations to be performed in order to change the value in A to: i- 11111111 ii- 11001111 iii- 00000000

b- Consider the following register transfer statements for two 4-bit registers R1 and R2 xT1 : R1← R1- R2 x’T1 : R1← R1+1 yT2 : R1← R2 Draw a diagram showing the hardware implementation of the three statements. Best Wishes Prof. Dr. Kadry Montasser Umm Al-Qurah University 1428/1429 (2nd Term) Faculty of Engineering Subject: Computer Organization Department of Computer Engineering 2nd Midterm Exam

Attempt the following questions: Time allowed: 1 Hours 1)a- Differentiate between the indirect addressing and BSA instruction execution.

Demonstrate your answer with examples. b-A computer uses a memory unit with 512 kwords of 16 bits each. A binary instruction



ii) Draw the instruction word format and indicate the number of bits in each part. iii)How many bits are there in the data and address inputs of the memory?

______________________________________________________________________ 2) a- An instruction at address 032 in the basic computer has I = 0, an operation code of the

AND instruction, and an address part equal to 0C5. The memory word at address 0C5 contains the operand D6E3 and the content of AC is A6C3. Go over the instruction cycle and determine the contents of the following registers at the end of the execute phase: PC. AR, DR, AC, and IR..


______________________________________________________________________ 3) a- Derive the control gates associated with the program counter AR in the basic computer. b- Show the contents in hexadecimal of registers PC, AR, DR, IR, and SC of the basic

computer when an ISZ indirect instruction is fetched from memory and executed. The initial content of PC is 6EE. The content of memory at address 6EE is EA9D. The content of memory at address A9D is 0A6B. The content of memory at address A6B is FEA6. Give the answer in a table with five columns, one. for each register and a row for each timing signal. Show the contents of the registers after the positive transition of each clock pulse.


Umm Al-Qurah University 1428/1429 (1st Term) Faculty of Computer& Information Systems Computer Organization Department of Computer Engineering Final Exam

Answer ONLY 4(four) questions: Time allowed: 2 Hours 1)a- An 8-bit register contains the binary value 10101101. What is the register value after

executing the following microoperations, consecutively: i) arithmetic shift right, ii) circulate left right, iii) arithmetic shift left. b- Given that the contents of AC, E and M[AR} are C3A4, 1, and 3B6D, respectively.

Find for each of the following 16-bit instruction: i ) 1111000001000000 ii ) 0111001000000000 iii) 0010100100110111 iv) 1001100001011010 v ) 0111000001000000

1- the equivalent hexadecimal code, 2- the meaning of each instruction to be executed, 3- the address in memory, if exists, 4- the contents of AC after the execution of each instruction.

___________________________________________________________________________ 2) a- Derive the control gates associated with both the read and write inputs of memory in the

basic computer. b- Show the contents in hexadecimal of registers PC, AR, DR, IR, and SC of the basic

computer when an ISZ indirect instruction is fetched from memory and executed. The initial content of PC is 7FE. The content of memory at address 7FE is A6BF. The content of memory at address 6BF is 23B5. The content of memory at address 3B5 is FFFF. Give the answer in a table with five columns, one. for each register and a row for each timing signal. Show the contents of the registers after the positive transition of each clock pulse.

___________________________________________________________________________ 3) a- Design a common bus system for 16 registers of 32 bits each. b- Draw a diagram for the bus system of part (a),but use three-state buffers and a decoder instead of the multiplexers. c- The register transfer statements for a register R and the memory M in a computer are as

follows: X3

’X1 X2: R← M [AR] X2

’X1’X3: R← AC

X3X1’ X2: M [AR] ← R

Draw the hardware implementation of R and the memory in block diagram form. ___________________________________________________________________________ 4) The content of PC in. the basic computer is 5BD (all numbers are in hexadecimal). The

content of AC is 6BC4. The content of memory at address 5BD is A5C6. The content of memory at address 5C6 is 0C8B. The content of memory at address C8B is 8B9F.

i. What is the instruction that will be fetched and executed next? ii. Show the binary operation that will be performed in the AC when the instruction is

executed. iii. Give the contents of registers PC, AR, DR, AC, and IR in hexadecimal and the values of

E, I, and the sequence counter SC in binary at the end of the instruction cycle.

5) The following program is stored in the memory of the basic computer. Location Instruction 100 7800 101 1106 102 4104 103 3109 104 7001 105 0107 106 4103 107 B3E6 108 A3D4 109 0000 i) Show the contents of the AC, PC, and IR ( in hexadecimal), at the end, after each

instruction is executed. All numbers below are in hexadecimal. ii) Write down the corresponding program with assembly language.


Umm Al-Qurah University 1428/1429 (2nd Term) Faculty of Computer& Information Systems Computer Org.& Assembly Language Department of Computer Science 1st Midterm Exam

Attempt the following questions: Time allowed: 1 (one) Hour 1) a- Aided with neat sketches, explain the theory of operation of the bidirectional shift

register with parallel load. b- Correct, if needed; the following register transfer statements: i) XT : R1← R2, R1← R3 ii) Y + T: PC ← AR, PC ← PC +1 iii) Z ^ T: R1 + R2, R1 ← 0 ___________________________________________________________________________ 2)a- An 8-bit register contains the binary value 11010111. What is the register value after

executing the following microoperations, consecutively: i) arithmetic shift right, ii) circulate left right, iii) arithmetic shift left. b- Given that the contents of AC, E and M[AR} are C3A4, 1, and 3B6D, respectively.


1- the equivalent hexadecimal code, 2- the meaning of each instruction to be executed, 3- the address in memory, if exists, 4- the contents of AC after the execution of each instruction.

___________________________________________________________________________ 3) A computer uses a memory unit with 512 kwords of 32 bits each. A binary instruction code

is stored in one word of memory. The instruction has four parts: and indirect bit, an operation code, a register code part to specify one of 128 registers, and an address part. i) How many bits are there in the operation code, the register code part, and the

address part? ii) Draw the instruction word format and indicate the number of bits in each part. iv) How many bits are there in the data and address inputs of the memory?

___________________________________________________________________________ 4) a- Design a common bus system for 32 registers of 16 bits each. b- Draw a diagram for the bus system of part (a),but use three-state buffers and a decoder instead of the multiplexers.


Umm Al-Qurah University 1428/1429 (2nd Term) Faculty of Engineering Subject: Computer Organization Department of Computer Engineering 1st Midterm Exam G 3,4

Answer the following questions: Time allowed: 1 Hour 1) a- Aided with neat sketches, explain the theory of operation of the bidirectional shift

register with parallel load. b- The register transfer statements for a register R and the memory M in a computer are as

follows: X3

’X1 X2: R← M [AR] X2

’X1’X3: R← AC

X3X1’ X2: M [AR] ← R

Draw the hardware implementation of R and the memory in block diagram form. ___________________________________________________________________________ 2) a- Starting from an initial value of R = 11001110, determine the sequence of binary values

in R after an arithmetic shift- right, followed by a circular shift-left, followed by an arithmetic shift-left and circular shift-left again.

b- Design a common bus system for 16 registers of 32 bits each. c- Draw a diagram for the bus system of part (b), but use three-state buffers and a decoder instead of the multiplexers.

___________________________________________________________________________ 3) The content of PC in. the basic computer is 3AF (all numbers are in hexadecimal). The



c. Give the contents of registers PC, AR, DR, AC, and IR in hexadecimal and the values of E, I, and the sequence counter SC in binary at the end of the

instruction cycle. ____________________________________________________________________________ 4) a- An instruction at address 032 in the basic computer has I = 0, an operation code of the

AND instruction, and an address part equal to 0C5. The memory word at address 0C5 contains the operand D6E3 and the content of AC is A6C3. Go over the instruction cycle and determine the contents of the following registers at the end of the execute phase: PC. AR, DR, AC, and IR..



Umm Al-Qurah University 1428/1429 (2nd Term) Faculty of Engineering Subject: Computer Organization Department of Computer Engineering 2nd Midterm Exam

Answer the following questions: Time allowed: 1 Hour 1) Explain why each of the following microoperations cannot be executed during a single

clock pulse in the system of basic computer. Specify a sequence of microoperations that will perform the operation.

a- IR ← M[PC], b- AC ← AC + TR, c- DR ← DR + AC ___________________________________________________________________________ 2) The content of PC in. the basic computer is 5BE (all numbers are in hexadecimal). The

content of AC is 2B4E. The content of memory at address 5BE is 952D. The content of memory at address 52D is 24BA. The content of memory at address 4BA is 6A9E.



___________________________________________________________________________ 3) A computer uses. a memory of 65,536 words with eight bits in each word. It has the


i. Draw a block diagram of the computer showing the memory and registers. (Do not use a common bus).


iii. List the sequence of microoperations for fetching a memory reference instruction and then placing the. operand in DR.. Start from timing signal To.

___________________________________________________________________________ 4) a- Derive the control gates associated with both the read and write inputs of memory in the

basic computer. b- A digital computer has a memory unit with a capacity of 16384 words, 40 bits per word.

The instruction code format consists of six bits for the operation part and 14 bits for the address part(no indirect mode bit). Two instructions are thus packed in one memory word, and a 40-bit instruction register IR is available in the control unit. Formulate a procedure for fetching and executing instructions for this computer.

Best Wishes Prof. Dr. Kadry Montasser Umm Al-Qurah University 1428/1429 (2nd Term)

Faculty of Computer& Information Systems Computer Organization Department of Computer Engineering Final Exam


executing the following microoperations, consecutively: i) arithmetic shift left, ii) circulate shift right, iii). logic shift right b- Given that the contents of AC, E and M[AR} are C3A4, 1, and 3B6D, respectively.


1- the meaning of each instruction to be executed, 2- the contents of PC, AR, AC, E after the execution of each instruction.

___________________________________________________________________________ 2) a- Aided with neat sketches, derive the control gates associated with the program counter

PC in the basic computer. b- Suppose that an interrupt occurs and the flip-flop R is set to 1 while the control is

executing the instruction at address 300, aided with neat sketches; demonstrate the interrupt cycle through which the program returns to the original situation at the end of the interrupt. Give the sequence of microoperations.

___________________________________________________________________________ 3) a- Design a common bus system for 256 registers of 32 bits each. b- Draw a diagram for the bus system of part (a),but use three-state buffers and a decoder instead of the multiplexers.

c-The following register transfers are to be executed in the bus system, specify: (1) the binary value that must be applied to buss select inputs S2, S1 and S0; (2) the register whose LD control input must be active; (3) a memory read or write operation (if needed); and (4) the operation in the adder and logic circuit(if any).

i) AC ←M[AR], ii) M[AR] ←TR, iii) M[AR] ←PC iv) AC←DR and DR←AC (done simultaneously)

___________________________________________________________________________ 4) a- Aided with neat sketches describe the control unit of the basic computer. Give an

example of control timing signals. b- Show the contents in hexadecimal of registers PC, AR, DR, IR, and SC of the basic

computer when an ADD indirect instruction is fetched from memory and executed. The initial content of PC is 7FE. The content of memory at address 7FE is A6BF. The content of memory at address 6BF is 23B5. The content of memory at address 3B5 is FFFF. Give the answer in a table with five columns, one for each register and a row for each timing signal. Show the contents of the registers after the positive transition of each clock pulse.

___________________________________________________________________________ 1/2 5) The following program is stored in the memory of the basic computer.

Location Instruction 250 A256 251 7200 252 7020 253 1257 254 3259 255 7001 256 0258 257 0069 258 FFE6 259 0000 i) Show the contents of the AC, PC, and IR ( in hexadecimal), at the end, after each

instruction is executed. All numbers below are in hexadecimal. ii) Write down the corresponding program with assembly language. iii) Write the address symbol table for the derived program in assembly language.

Best Wishes Prof. Dr. Kadry Montasser 2/2 Umm Al-Qurah University 1428/1429 (2nd Term)

Faculty of Computer& Information Systems Computer Organization& Assembly Language Department of Computer Engineering Final Exam علوم الحاسب


executing the following microoperations, consecutively: i) logic shift right, ii) circulate shift left, iii) arithmetic shift left. b- The content of PC in. the basic computer is 6BE (all numbers are in hexadecimal). The

content of AC is 7EC3. The content of memory at address 6BE is A4C5. The content of memory at address 4C5 is 16DE. The content of memory at address 6DE is C3B5.

i) What is the instruction that will be fetched and executed next? ii) Show the binary operation that will be performed in the AC when the instruction is executed.

iii) Give the contents of registers PC, AR, DR, AC, and IR in hexadecimal and the values of E, I, and the sequence counter SC in binary at the end of the instruction cycle. ___________________________________________________________________________ 2) a- Aided with neat sketches for circuits associated and gates structure for the control,

design the accumulator logic of the basic computer. b- Suppose that an interrupt occurs and the flip-flop R is set to 1 while the control is

executing the instruction at address 294, aided with neat sketches; demonstrate the interrupt cycle through which the program returns to the original situation at the end of the interrupt. Give the sequence of microoperations.

___________________________________________________________________________ 3) a- Design a common bus system for 128 registers of 32 bits each. b- Draw a diagram for the bus system of part (a),but use three-state buffers and a decoder instead of the multiplexers. c- A computer uses a memory unit with 512 kwords of 32 bits each. A binary instruction

code is stored in one word of memory. The instruction has four parts: and indirect bit, an operation code, a register code part to specify one of 128 registers, and an address part. i- How many bits are there in the operation code, the register code part, and the

address part? ii- Draw the instruction word format and indicate the number of bits in each part. iii-How many bits are there in the data and address inputs of the memory? ___________________________________________________________________________ 4) The content of AC in the basic computer is (5BC3)16 and the initial value of E is 1.

Determine the contents of AC, E, PC, AR, and IR in hexadecimal after the execution of the CLA instruction. Repeat 11 more times, starting from each one of the register-reference instruction. The initial value of PC is (034)16.

___________________________________________________________________________ 1/2 5) The following program is stored in the memory of the basic computer.

Location Instruction 100 7800 101 1107 102 4105 103 3110 104 7001 105 0109 106 4103 107 0108 108 B3E6 109 A3D4 110 0000 i) Show the contents of the AC, PC, and IR ( in hexadecimal), at the end, after each

instruction is executed. All numbers below are in hexadecimal. ii) Write down the corresponding program with assembly language. iii) Write the address symbol table for the derived program in assembly language.

Best Wishes Prof. Dr. Kadry Montasser 2/2

umm al-qura university - kadry montasserkadmont.synthasite.com/resources/computer organization...

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