ug-1001 6cpp4 central processor panel...cpu ds6 re-start indicator turns on during restart of the...

UG-1001 6CPP4 Central Processor

Panel

December 2018

6CPP4 Central Processor Panel UG-1001

Copyright © 2016 by QEI UG-1001 6CPP4 Central Processor Panel ALL RIGHTS RESERVED

NOTICE

The information in this document has been carefully checked and is believed to be accurate. However, no responsibility is assumed or implied for inaccuracies. Furthermore, QEI, reserves the right to make changes to any products herein described to improve reliability, function or design. QEI does not assume liability arising from the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.

This manual and all data contained constitutes proprietary information of QEI and shall not be reproduced, copied or disclosed to others, or used as the basis for manufacture without written consent of QEI

45 Fadem Road Springfield, NJ 07081 Phone: (973) 379-7400 Fax: (973) 379-2138 Web Site: www.qeiinc.com

http://www.qeiinc.com/

UG-1001 6CPP4 Central Processor Panel

Revisions

Revision Description Date

A Release to Production August 1994

B Formatting Update August 2001

C Formatting Update September 2012

D Formatting Update January 2016

E

F

Formatting Update

Updated QEI Address

June 2017

December 2018


Copyright © 2016 QEI

Contents

1 General Description .................................................................3

2 Specifications ...........................................................................4 2.1 Microprocessor .................................................................... 4 2.2 Data Word Size ................................................................... 4 2.3 Address Range .................................................................... 4 2.4 Memory Size ........................................................................ 4 2.5 Communication Ports .......................................................... 4 2.6 Parallel Output Ports ............................................................ 5 2.7 Status Multiplexer Input Port, J6 .......................................... 5 2.8 Control Output Port, J5 (matrix output selects column and row) ....................................................................................... 5 2.9 Analog Multiplexer Input Port, J7 ......................................... 5 2.10 Power Input, J8 .................................................................... 5 2.11 -12 volts Output, part of J8 ................................................... 5 2.12 Environment ........................................................................ 6 2.13 Physical Dimensions ............................................................ 6 2.14 Weight ................................................................................. 6

3 Strapping Descriptions ............................................................6 3.1 Pluggable Jumpers .............................................................. 6 3.2 Platform and Dipswitch, Standard SCADA Functions .......... 8

4 Connector Descriptions ...........................................................9

5 Interconnecting Cables .......................................................... 10

6 Typical Connection Diagram ................................................. 11

7 Optional Adapters .................................................................. 12 7.1 Ribbon Cable Adapter ....................................................... 12 7.2 QUICS Board(s) Adapter ................................................... 15 7.3 Communication and Relay Power (C/R) Adapter ............... 17

8 Ordering Information .............................................................. 19 8.1 Major Functions Selection .................................................. 20 8.2 Port Speed Selection ......................................................... 21

9 Mechanical Outline ................................................................. 22


Copyright © 2016 QEI General Description 3

1 General Description The 6CPP4 is a single-board computer incorporating specialized I/O functions for operating SCADA sub-systems, such as Remote Terminal Units (RTUs), Distribution Management Units (DMUs), Communication Interface Units (CIUs), etc.

The central processing unit consists of a 6809 microprocessor, EPROM memory for programs and tables, and static RAM for data storage. For special applications, EEPROM memory is optionally utilized.

Communication options include asynchronous and synchronous data ports with bit (Serial Bit Stream, SBS) or byte-oriented data streams. A Bell 202-compatible internal modem is available, for most standard applications.

Parallel inputs, parallel outputs and special checkback control outputs are contained on the board.

A high-speed Analog-to-Digital converter and address multiplexer port is built in for measuring external analog quantities. The output signals of the A/D converter are optocoupled to provide electrical isolation from the logic circuits.

An optional co-processor is available to perform mathematical computations on special applications.

A Firmware Link (program), residing in EPROM is required for operation. Several standard, and special, Firmware Links are available

An external single 12 volts power supply is required for operation of the 6CPP4. An internal DC/DC inverter generates -12 volts to power the -12 volts needs of other modules within the sub-system.

The 6CPP4 has eight LEDs to indicate circuit operation as follows:

CIRCUIT LED FUNCTION INDICATION

Port 0 (Main) DS4 Transmit (Tx) indicator Turns ON when Port 0 is transmitting.

DS2 Receive (Rx) indicator Turns ON when Port 0 is receiving.

Port 1 (Spare) DS5 Transmit (Tx) indicator Turns ON when Port 1 is transmitting.

DS3 Receive (Rx) indicator Turns ON when Port 1 is receiving.

CPU DS6 Re-start indicator Turns ON during restart of the CPU.

A/D Converter DS7 A/D Busy Turns ON to indicate A/D conversion.

Controls DS8 Control execute indicator Turns ON for the duration of the control execute pulse.

Push-to-Talk DS2 Push-to-Talk indicator Turns ON when the PTT is energized (radio systems only).


4 Specifications Copyright © 2016 QEI

2 Specifications These specifications apply to the standard 6CPP4 alone and do not necessarily match those of a particular application incorporating this board.

2.1 Microprocessor

Motorola 6809 running at 2 MHz clock rate.

2.2 Data Word Size

Internal to microprocessor: 16 bits.

External on board: 8 bits.

2.3 Address Range

16 bits (64K bytes). I/O is memory mapped.

2.4 Memory Size

EPROM: 32K bytes min, 39.75K max. RAM: 8K bytes min, 15K bytes max. EEPROM (byte-wide): 0 min, 15.75K bytes max. EEPROM (serial): Optional, 256 bytes.

2.5 Communication Ports

Port 0, J1 (Main):

Protocols: Asynchronous byte or bit-oriented. Interface: RS232 or 202 type modem. Bit Rate: 150 to 9600 bps. up to 1200 bps with internal 202 type modem.

Port 1, J2 (Spare):

Protocols: Asynchronous or synchronous byte-oriented. Interface: RS232 Bit Rate: 150 to 9600 bps.

Port 2, J3 (Test Panel):

Protocols: Asynchronous byte-oriented. Interface: RS232. Bit Rate: 9600 bps standard.

Modem, J10 (when supplied at Comm Port 0):

Compatibility: Bell 202. (Mark freq: 1200 Hz,Space freq:2200 Hz). Receiver sensitivity: Strappable for -30 dB or -45 dBm. Transmitter level: Strappable for 0, -3, -6, -9 or -12 dBm. Output Impedance: 2-wire: 1000 ohms, 4-wire: 200 ohms. Input Impedance: 2-wire: 1000 ohms, 4-wire: 1000 ohms.

NOTE Input and Output Impedance is 600 ohms with QEI supplied matching external transformers (located either at the Power Supply Panel or the C/R Adapter, depending on the particular application) and is suitable to interface to communications mediums that comply with TARIFF

F.C.C. No. 260 TYPE 3002 CHANNELS, or equivalent.


Copyright © 2016 QEI Specifications 5

2.6 Parallel Output Ports

Primary Port, J13 (Open collector current sinking):

Number Bits: 8 Current: +500 mA max per bit. Saturation Voltage: 1.3 volts @ 200 mA. Off-state Voltage: 40 volts max.

Secondary Port, J11 (Open collector current sinking):

Number Bits: 6 Current: +500 mA max per bit. Saturation Voltage: 1.3 volts @ 200 mA. Off-state Voltage: 40 volts max.

2.7 Status Multiplexer Input Port, J6

Bit Width: 16 bits.

Addressability: 512 points, in up to 32 standard QEI status input panels.

2.8 Control Output Port, J5 (matrix output selects column and row)

Addressability: 128 points (On/Off pairs)

Number Columns: 16 Number Rows: 8 pairs (8 Trip, 8 Close). Drive Voltage: 28 VDC, nominal. Control Pulse Duration: 250 msec., default. Relay Coil Resistance: 234 ohms min.

2.9 Analog Multiplexer Input Port, J7

Input Voltage: -5 to +5 volts.

Addressability: 128 points.

Converter:

Number Bits: 12 bits (11 bits + sign bit).

Accuracy: 10 bits. Conversion Rate: 50 conversions per second minimum. Common Mode Rejection: 80 dB min. for power line fundamental (signal with respect to Earth). Normal Mode Rejection: 80 dB min for power line fundamental. Voltage Isolation: 500 VDC analog common to logic common.

2.10 Power Input, J8

Voltage: +10.5 to +14.0 volts.

Current: 1.2 Amps DC max.

2.11 -12 volts Output, part of J8

Voltage: -11 to -13 volts.

Current: 200 mA max load.


6 Strapping Descriptions Copyright © 2016 QEI

2.12 Environment

Temperature: -30 to +70 degrees C.

Humidity: 5 to 95% @ +70 degrees C, non-condensing.

2.13 Physical Dimensions

11.63 in x 10.35 in x 2.25 in.

2.14 Weight

2 1/4 lbs.

3 Strapping Descriptions Individual pluggable jumpers, jumpers on platforms, or dipswitches, select some hardware and firmware options. Individual pluggable jumpers are designated E1 through E29, while platforms (flat pieces of plastic with pins) and 8-position dipswitches are designated X1 through X9. Wires are soldered to platform pins to select options. Platforms and dipswitches are installed in dual-in-line IC sockets.

Where appropriate, usage and/or function, of jumpers for standard SCADA RTU and DMU applications will be indicated in bold characters. On special applications, reference should be made to the specific system documentation (Parts Lists, Point Assignment Charts, etc.) for their usage or function description.

3.1 Pluggable Jumpers

JUMPER REF DESIGNATION

PURPOSE

E1, E2, E3 External/Internal modem for Comm Port 0

Jumpers are IN if external modem is used. Jumpers are OUT if

internal modem is used.

E6 Clock source for SBS communications

Jumper is IN if the available 153.6 KHz clock drives the SBS circuit (oscillator Y2 not used). Jumper is OUT if SBS communications are not used, or if oscillator Y2 is needed for a special frequency.

E9, E10 Data guard timing for Comm Port 0

The data guard forces receive data high until 10 or 23 ms after carrier detect goes true. 23 ms delay : E9 = IN, E10 = OUT 10 ms delay : E9 = OUT, E10 = IN

NOTE ONE and ONLY ONE jumper (either E9 or E10, but not both)

MUST be installed.

E11, E12, E13 Modem 2-wire/4-wire operation Comm Port 0

2-wire: E11 = OUT, E12 = IN, E13 = OUT

4-wire: E11 = IN, E12 = OUT, E13 = IN

E14 Modem receiver gain for Comm Port 0

Reduces receiver sensitivity from -45 db to -30 db. -30 db (less sensitive): E14 = IN -45 db (more sensitive): E14 = OUT

E15, E16 External modem CTS/ DCD pull-ups Comm Port 0

These must be installed if the external modem or device does not support Clear-to-Send or Data Carrier Detect handshaking.


Copyright © 2016 QEI Strapping Descriptions 7

E17, E18 SBS quiescent data output state

These jumpers determine the state of the SBS data output when it is not transmitting.

logic 1: E17=IN, E18=OUT

logic 0: E17=OUT, E18=IN

E19 Watchdog timer disable

Disables the 3.3 ms "timer tick" watchdog chip U32.

E19 = IN

NOTE

This jumper should only be removed during firmware debugging.

E20, E21, E22, E23, E24

Modem transmit level Comm Port 0

Sets the transmit output level of the internal modem as follows:

E26, E27, E28 Memory boundary straps

Jumpers determine the memory mapped address ranges for the (special options) expansion EPROM chip U46 and the EEPROM chip U71 as given below.

E29 A/D converter 50/60 Hz operation

Sets the optimum rejection of the power line fundamental frequency.

-60 Hz rejection: E29 = OUT -50 Hz rejection: E29 = IN


8 Strapping Descriptions Copyright © 2016 QEI

3.2 Platform and Dipswitch, Standard SCADA Functions

X1 through X4 are normally supplied with miniature DIPswitches. The function of each switch is determined by the firmware (*require firmware and/or hardware options, refer to APPENDICES, if supplied). Their standard SCADA RTU and DMU functions are described bellow. For special applications function descriptions, refer to the specific system documentation.

PLATFORM X1, X2, X3 AND X4 STRAPPING NOTE: Switch OFF = 0, Switch ON = 1


Copyright © 2016 QEI Connector Descriptions 9

X5 is a platform supplied only on RTUs with special applications firmware.

X6 is used to establish the baud rate for Comm Port 0, or the internal modem.

X7 establishes the baud rate for Comm Port 1, the spare (auxiliary) port, which is normally supplied on RTUs performing Load Management (DMUs) or requiring communications through this auxiliary port.

X8 sets the baud rate for Comm Port 2, the test port. It is normally omitted and a connection for 9600 baud is etched on the top surface of the PC board. If a different bit rate is desired, the printed circuit run connecting X8-1 to X8-16 must be carefully cut, and a properly jumped platform in-stalled.

X9, normally not supplied, sets the baud rate for the SBS, serial bit stream, communications transmitter and receiver.

For strapping information for platforms X5, X6, X7 and X9 refer to drawing of paragraph Error! Reference source not found. Port Speed Selection and Component Identification.

4 Connector Descriptions Connections to and from the 6CPP4 are by plug in connectors. These are listed below with a short description for each.

J1: Comm Port 0 (main) RS232 interface, 9-pin in-line, MOLEX header-type connector.

PIN Function

1 CTS 2 RTS 3 DCD 4 TXD 5 RXD 6 COM (0 volts) 7 TXCLK (external) 8 RXCLK (external) RING

J2: Comm Port 1 (auxiliary) RS232 interface, 6-pin in-line, MOLEX header-type connector.

PIN Function

1 CTS 2 RTS 3 DCD 4 TXD 5 RXD 6 COM (0 Volts)

J3: Comm Port 2 (test) RS232 interface, 4-pin, MOLEX connector.

PIN Function

1 +5 Volts 2 RXD 3 TXD 4 COM (0 Volts)

J5: Control output interface (CONTROL BUS), 34-pin connectors for flat ribbon cable.

J6: Status input interface (STATUS BUS), 26-pin connectors for flat ribbon cable.

J7: Analog input interface (ANALOG BUS), 16-pin connectors for flat ribbon cable.


10 Interconnecting Cables Copyright © 2016 QEI

J8: Input power and -12 volt output power, 3-pin in-line, MOLEX connector.

PIN Function

1 +12 Volts (Input) 2 COM (0 Volts) 3 -12 Volts (Output)

J9: 28-volt control relay power input, 2-pin, MOLEX connector.

PIN Function

1 Not Used 2 +28 Volts (Input)

J10: Comm Port 0, 2-wire/4-wire interface, 6-pin, MOLEX connector.

PIN Function

1 4WXMT HI 2 4WXMT RET 3 COM (0 Volts) 4 4WRCV (2WXMT/RCV) HI 5 4WRCV (2WXMT/RCV) RET 6 P.T.T.

J11: Secondary parallel output port (DATA BUS), 9-pin in-line, MOLEX header-type connector.

J12: 12-volt tap to power C/R Adapter Board, 2-pin, MOLEX connector.

PIN Function

1 COM (0 Volts) 2 +12 Volts

J13: Primary parallel output port (DATA BUS), 14-pin connectors for flat ribbon cable.

J14: QUICS adapter port; may be used for special piggy-back adapters (DATA and ADDRESS BUS), 26-pin connector.

5 Interconnecting Cables Interconnecting cables part numbers for "standard" RTU applications are listed below, these cables must be ordered separately, unless otherwise indicated. For RTUs with non-standard or special applications, refer to the documentation supplied with those systems.

CABLE PART No. FUNCTION FROM TO 30-057915-XXX Analog Bus J7 1st Analog Input Panel 30-057916-XXX Control Bus J5 1st Control Output Panel 30-057917-XXX Status Bus J6 1st Status Input Panel 30-058402-XXX Power Input J8 Power Supply Panel 30-057922-XXX Control Pwr. J9 Power Supply Panel 30-057925-XXX Communications J10 Power Supply Panel *30-058569-001 Data Bus J13 Ribbon Cable Adapter *30-058569-001 Data Bus J13 QUICS Board Adapter *30-057922-009 +12 Volts Pwr J12 C/R Adapter *30-057922-010 +30 V Ctrl Pwr J9 C/R Adapter *30-057925-017 Communications J10 C/R Adapter

XXX Indicates cable length option. * These cables are supplied with their respective adapters.


Copyright © 2016 QEI Typical Connection Diagram 11

6 Typical Connection Diagram


12 Optional Adapters Copyright © 2016 QEI

7 Optional Adapters

7.1 Ribbon Cable Adapter

The Ribbon Cable Adapter is used to interface the 14-pin connector J13 to a 34-conductor cable used in Load Management applications.



7.2 QUICS Board(s) Adapter

The QUICS Board(s) Adapter is an small daughter board that contains the necessary buffers for the data and address bus used to interface to QUICS plug-in boards such as the 6TM2, 6DA1, etc. It can also be used to interface with the Load Management transceiver in conjunction with the QUICS plug-in boards. This adapter connects to connector J13 and J14 on the 6CPP4.



7.3 Communication and Relay Power (C/R) Adapter

The Communications and Relay Power (C/R) Adapter is a small daughter board that contains 600-ohm isolation transformers to provide the interface between the 6CPP4's internal modem and the communications medium. It also contains a DC/DC inverter that generates the 28 VDC used to power the relays on the control output panels, one LED indicates the presence of this voltage. The C/R Adapter is used to configure the 6CPP4 as a replacement panel for the discontinued 6CPP2.


Copyright © 2016 QEI Ordering Information 19

8 Ordering Information Full ordering information includes a panel assembly Part Number and a panel assembly Model Designation.

The panel assembly Part Number is a number in the form of 40-057935-YYYYY, where -YYYYY is the number specifying major functions assembly options per drawing of 7.1., in the following page.

The Model Designation is a generic alpha-numeric sequence of characters specifying optional strapping information, and is in the form of 6CPP4-A/B/C/D/E/MOD XX, per drawing of 7.2, also in the next pages.

In addition to this, the Central Processor Panel requires a Firmware Link. The Firmware Link number is in the form of 80-XXXXXX-YYY#, where -XXXXXX is the base firmware program link, -YYY is a configuration option, and # is the current revision level. To specify the required Firmware Link, please refer to the System Parts Lists, and in particular to the Parts List for the specific Remote Station Assembly.

NOTE Not all the RTUs in a system have to be equipped with the same Firmware Link. RTUs performing special functions may have different Firmware Links. Also, Links for standard

MINI-RTUs are different than those used in larger standard RTUs.

ug-1001 6cpp4 central processor panel...cpu ds6 re-start indicator turns on during restart of the...

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