BLOCK DIAGRAM

CONNECTION DIAGRAM

UC1524UC2524UC3524

DESCRIPTIONThe UC1524, UC2524 and UC3524 incorporate on a single monolithic chipall the functions required for the construction of regulating power supplies, in-verters or switching regulators. They can also be used as the control elementfor high-power-output applications. The UC1524 family was designed forswitching regulators of either polarity, transformer-coupled dc-to-dc convert-ers, transformerless voltage doublers and polarity converter applications em-ploying fixed-frequency, pulse-width modulation techniques. The dualalternating outputs allow either single-ended or push-pull applications. Eachdevice includes an on-chip reference, error amplifier, programmable oscilla-tor, pulse-steering flip-flop, two uncommitted output transistors, a high-gaincomparator, and current-limiting and shut-down circuitry. The UC1524 ischaracterized for operation over the full military temperature range of -55Cto +125C. The UC2524 and UC3524 are designed for operation from -25Cto +85C and 0 to +70C, respectively.

Advanced Regulating Pulse Width ModulatorsFEATURES Complete PWM Power Control

Circuitry Uncommitted Outputs for

Single-ended or Push-pullApplications

Low Standby Current8mATypical

Interchangeable with SG1524,SG2524 and SG3524,Respectively

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ELECTRICAL CHARACTERISTICS:

PARAMETER TEST CONDITIONSUC1524/UC2524 UC3524

UNITSMIN TYP MAX MIN TYP MAX

Reference SectionOutput Voltage 4.8 5.0 5.2 4.6 5.0 5.4 VLine Regulation VIN = 8 to 40V 10 20 10 30 mVLoad Regulation IL = 0 to 20mA 20 50 20 50 mVRipple Rejection f = 120Hz, TJ = 25C 66 66 dBShort Circuit Current Limit VREF = 0, TJ = 25C 100 100 mATemperature Stability Over Operating Temperature Range 0.3 1 0.3 1 %Long Term Stability TJ = 125C, t = 1000 Hrs. 20 20 mV

Oscillator SectionMaximum Frequency CT = .001mfd, RT = 2k 300 300 kHzInitial Accuracy RT and CT Constant 5 5 %Voltage Stability VIN = 8 to 40V, TJ = 25C 1 1 %Temperature Stability Over Operating Temperature Range 5 5 %Output Amplitude Pin 3, TJ = 25C 3.5 3.5 VOutput Pulse Width CT = .01mfd, TJ = 25C 0.5 0.5 s

Error Amplifier SectionInput Offset Voltage VCM = 2.5V 0.5 5 2 10 mVInput Bias Current VCM = 2.5V 2 10 2 10 AOpen Loop Voltage Gain 72 80 60 80 dBCommon Mode Voltage TJ = 25C 1.8 3.4 1.8 3.4 VCommon Mode Rejection Ratio TJ = 25C 70 70 dBSmall Signal Bandwidth AV = 0dB, TJ = 25C 3 3 MHzOutput Voltage TJ = 25C 0.5 3.8 0.5 3.8 V

Comparator SectionDuty-Cycle % Each Output On 0 45 0 45 %Input Threshold Zero Duty-Cycle 1 1 V

Maximum Duty-Cycle 3.5 3.5 VInput Bias Current 1 1 A

Current Limiting SectionSense Voltage Pin 9 = 2V with Error Amplifier

Set for Maximum Out, TJ = 25C190 200 210 180 200 220 mV

Sense Voltage T.C. 0.2 0.2 mV/CCommon Mode Voltage -1 +1 -1 +1 V

Output Section (Each Output)Collector-Emitter Voltage 40 40 VCollector Leakage Current VCE = 40V 0.1 50 0.1 50 ASaturation Voltage IC = 50mA 1 2 1 2 VEmitter Output Voltage VIN = 20V 17 18 17 18 VRise Time RC = 2k ohm, TJ = 25C 0.2 0.2 sFall Time RC = 2k ohm, TJ = 25C 0.1 0.1 s

Total Standby Current VIN = 40V 8 10 8 10 mA(Excluding oscillator charging current, error and current limitdividers, and with outputs open)

UC1524UC2524UC3524

Unless otherwise stated, these specifications apply for TA = 55C to+125C for the UC1524, 25C to +85C for the UC2524, and 0C to+70C for the UC3524, VIN = 20V, and f = 20kHz, TA=TJ.

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ABSOLUTE MAXIMUM RATINGS (Note 1)Supply Voltage, VCC (Notes 2 and 3) . . . . . . . . . . . . . . . . . . 40VCollector Output Current. . . . . . . . . . . . . . . . . . . . . . . . . 100mAReference Output Current . . . . . . . . . . . . . . . . . . . . . . . . 50mACurrent Through CT

Terminal . . . . . . . . . . . . . . . . . . . . . . . -5mAPower Dissipation at TA = +25C (Note 4) . . . . . . . . . . 1000mWPower Dissipation at TC

= +25C (Note 4) . . . . . . . . . . 2000mWOperating Junction Temperature Range . . . . . -55C to +150CStorage Temperature Range . . . . . . . . . . . . . . -65C to +150CNote 1: Over operating free-air temperature range unless otherwise noted.Note 2: All voltage values are with respect to the ground

terminal, pin 8.Note 3: The reference regulator may be bypassed for operation

from a fixed 5V supply by connecting the VCC and reference output pins both to the supply voltage. In thisconfiguration the maximum supply voltage is 6V.

Note 4: Consult packaging section of databook for thermallimitations and considerations of package.

UC1524UC2524UC3524

RECOMMENDED OPERATING CONDITIONSSupply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . 8V to 40VReference Output Current . . . . . . . . . . . . . . . . . . . . . 0 to 20mACurrent through CT Terminal . . . . . . . . . . . . . -0.03mA to -2mATiming Resistor, RT . . . . . . . . . . . . . . . . . . . . . 1.8k to 100kTiming Capacitor, CT . . . . . . . . . . . . . . . . . . . 0.001F to 0.1FOperating Ambient Temperature Range UC1524 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55C to +125C UC2524 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25C to +85C UC3524 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to +70C

TYPICAL CHARACTERISTICSOscillator Frequency vs

Timing ComponentsOpen-Loop Voltage Amplificationof Error Amplifier vs Frequency

Output Dead Time vsTiming Capacitance Value

Output Saturation Voltagevs Load Current

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PRINCIPLES OF OPERATIONThe UC1524 is a fixed-frequency pulse-width-modulationvoltage regulator control circuit. The regulator operates ata frequency that is programmed by one timing resistor(RT), and one timing capacitor (CT), RT establishes a con-stant charging current for CT. This results in a linear volt-age ramp at CT, which is fed to the comparator providinglinear control of the output pulse width by the error ampli-fier. The UC1524 contains an on-board 5V regulator thatserves as a reference as well as powering the UC1524sinternal control circuitry and is also useful in supplying ex-ternal support functions. This reference voltage is loweredexternally by a resistor divider to provide a referencewithin the common-mode range of the error amplifier oran external reference may be used. The power supplyoutput is sensed by a second resistor divider network togenerate a feedback signal to the error amplifier. The am-plifier output voltage is then compared to the linear volt-age ramp at CT. The resulting modulated pulse out of the

high-gain comparator is then steered to the appropriateoutput pass transistor (Q1 or Q2) by the pulse-steeringflip-flop, which is synchronously toggled by the oscillatoroutput. The oscillator output pulse also serves as a blank-ing pulse to assure both outputs are never on simultane-ously during the transition times. The width of theblanking pulse is controlled by the valve of CT. The out-puts may be applied in a push-pull configuration in whichtheir frequency is half that of the base oscillator, or paral-leled for single-ended applications in which the frequencyis equal to that of the oscillator. The output of the erroramplifier shares a common input to the comparator withthe current limiting and shutdown circuitry and can beoverridden by signals from either of these inputs. Thiscommon point is also available externally and may beemployed to control the gain of, or to compensate, the er-ror amplifier or to provide additional control to the regula-tor.

TYPICAL APPLICATIONS DATAOscillatorThe oscillator controls the frequency of the UC1524 and isprogrammed by RT and CT according to the approximateformula:

f 1.18RTCT where RT is in kilohms where CT is in microfarads where f is in kilohertzPractical values of CT fall between 0.001 and 0.1 micro-farad. Practical values of RT fall between 1.8 and 100kilohms. This results in a frequency range typically from120 hertz to 500 kilohertz.BlankingThe output pulse of the oscillator is used as a blankingpulse at the output. This pulse width is controlled by thevalue of CT. If small values of CT are required for fre-quency control, the oscillator output pulse width may stillbe increased by applying a shunt capacitance of up to100pF from pin 3 to ground. If still greater dead-time is re-quired, it should be accomplished by limiting the maxi-

mum duty cycle by clamping the output of the error ampli-fier. This can easily be done with the circuit below:

Synchronous OperationWhen an external clock is desired, a clock pulse of ap-proximately 3V can be applied directly to the oscillatoroutput terminal. The impedance to ground at this point isapproximately 2 kilohms. In this configuration RT CT mustbe selected for a clock period slightly greater than that ofthe external clock.If two or more UC1524 regulators are to operated synchro-nously, all oscillator output terminals should be tied together,all CT terminals connected to single timing capacitor, andthe timing resistor connected to a single RT, terminal. Theother RT terminals can be left open or shorted to VREF. Mini-mum lead lengths should be used between the CT termi-nals.

UC1524UC2524UC3524

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UC1524UC2524UC3524

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UNITRODE INTEGRATED CIRCUITS7 CONTINENTAL BLVD. MERRIMACK, NH 08054TEL. 603-424-2410 FAX 603-424-3460

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