two-switch voltage equalizer using a series-resonant voltage

842IEICE TRANS. COMMUN., VOL.E98–B, NO.5 MAY 2015

PAPER

Two-Switch Voltage Equalizer Using a Series-Resonant VoltageMultiplier Operating in Frequency-Multiplied DiscontinuousConduction Mode for Series-Connected Supercapacitors

Masatoshi UNO†a), Member and Akio KUKITA††, Nonmember

SUMMARY Cell voltage equalizers are necessary to ensure years ofoperation and maximize the chargeable/dischargeable energy of series-connected supercapacitors (SCs). A two-switch voltage equalizer usinga series-resonant voltage multiplier operating in frequency-multiplied dis-continuous conduction mode (DCM) is proposed for series-connected SCsin this paper. The frequency-multiplied mode virtually increases the oper-ation frequency and hence mitigates the negative impact of the impedancemismatch of capacitors on equalization performance, allowing multi-layerceramic capacitors (MLCCs) to be used instead of bulky and costly tanta-lum capacitors, the conventional approach when using voltage multipliersin equalizers. Furthermore, the DCM operation inherently provides theconstant current characteristic, realizing the excessive current protectionthat is desirable for SCs, which experience 0 V and equivalently becomean equivalent short-circuit load. Experimental equalization tests were per-formed for eight SCs connected in series under two frequency conditionsto verify the improved equalization performance at the increased virtualoperation frequencies. The standard deviation of cell voltages under thehigher-frequency condition was lower than that under the lower-frequencycondition, demonstrating superior equalization performance at higher fre-quencies.key words: cell voltage equalizer, discontinuous conduction mode (DCM),frequency multiplier, series-resonant voltage multiplier, supercapacitors(SCs)

1. Introduction

Secondary battery-based energy storage plays an importantrole in various applications, including industry, telecommu-nications, vehicular, aerospace, etc. Among various bat-tery chemistries, lithium-ion batteries are the most promis-ing technology, and their applications are rapidly expandingfrom small portable electronic devices to relatively large-scale systems, such as electric vehicles and grid-connectedapplications.

Supercapacitors (SCs) are drawing significant attentionas they offer some major advantages over traditional sec-ondary batteries, including longer service life, higher powercapability, and extended operation temperature range [1].Since their specific energy and energy density are ratherlower than those of traditional secondary batteries, theirchief applications are limited to hybrid energy storage sys-

Manuscript received June 23, 2014.Manuscript revised December 21, 2014.†The author is with Ibaraki University, Hitachi-shi, 316-8511

Japan.††The author is with the Japan Aerospace Exploration Agency,

Sagamihara-shi, 252-5210 Japan.a) E-mail: [email protected]

DOI: 10.1587/transcom.E98.B.842

tems where SCs function as a high-power energy buffer tocomplement the main battery. Lithium-ion capacitors arean emerging energy storage device offering higher specificenergy and energy density than traditional SCs by combin-ing the features of SCs and lithium-ion batteries [2]. Asthe performance of SCs, including lithium-ion capacitors,is steadily improving, the likelihood of SCs being consid-ered as alternatives to traditional secondary batteries is alsogrowing [3].

Generally, multiple cells are connected in seriesto form a string to meet the voltage requirement ofloads/systems. The voltages of series-connected cells in astring are gradually imbalanced due to the mismatch in indi-vidual cell characteristics in terms of capacity/capacitance,internal impedance, and self-discharge rate. The tempera-ture gradient in an energy storage module/system is also amajor cause of voltage imbalance because the self-dischargerate is temperature-dependent; the self-discharge accelerateswith temperature. Within a voltage-imbalanced energy stor-age module/system, cells deteriorate at different rates — thehigher the cell voltage, the faster the degradation — , result-ing in accelerated deterioration of the system as a whole.In addition, the dischargeable (or chargeable) energy of thesystem is limited by a cell with the lowest (or highest) volt-age in the string. Therefore, cell voltages must be equal-ized to ensure years of operation and maximize the charge-able/dischargeable energy.

Various cell voltage equalization techniques have beenproposed and demonstrated for series-connected lithium-ioncells and SCs. The most straightforward solution involvesusing multiple individual bidirectional converters, such asbuck-boost [4]–[11] and switched capacitor [12]–[21] con-verters, as shown in Figs. 1(a) and (b). These solutions re-quire (n − 1) individual converters for n cells connected inseries, and each bidirectional converter requires at least twoswitches. The switch count is considered a good index to as-sess circuit complexity because each switch requires a gatedriver circuit comprising a gate driver IC, auxiliary powersupply, and several passive components. This tendency sug-gests that these equalizers are prone to complexity as thenumber of cells connected in series increases. By intro-ducing a multi-winding transformer to an isolated converter,such as forward and flyback converters, the switch count canbe dramatically reduced, as shown in Fig. 1(c) [22]–[24].However, the existence of a multi-winding transformer is

Copyright c© 2015 The Institute of Electronics, Information and Communication Engineers

UNO and KUKITA: TWO-SWITCH VOLTAGE EQUALIZER USING A SERIES-RESONANT VOLTAGE MULTIPLIER OPERATING843

Fig. 1 Conventional cell voltage equalizers based on (a) buck-boost con-verters, (b) switched capacitor converters, (c) multi-winding forward con-verter, (d) multi-stacked buck-boost converters, and (e) series-resonantvoltage multiplier.

considered a major design hurdle, since if the parameters ofmultiple secondary windings are not strictly matched, cellvoltages cannot be properly equalized. In addition to thedesign difficulty, the modularity, or extendibility, is poorbecause the multi-winding transformer must be redesignedfrom scratch when the number of cells connected in se-ries varies, depending on system requirements. A single-switch equalizer using multi-stacked buck-boost converters,as shown in Fig. 1(d) [25], requires neither multiple switchesnor a multi-winding transformer and offers simplified cir-cuitry and good modularity. However, (n + 1) inductors arenecessary for n cells connected in series, likely increasingthe volume and cost.

We have proposed two-switch equalizers using volt-age multipliers, as shown in Fig. 1(e) [26]–[28]. The half-bridge inverter drives the voltage multiplier that automati-

cally equalizes all cell voltages. A single-switch configu-ration is also feasible if the voltage multiplier is driven bya forward-flyback inverter [29]. The two-switch configura-tion with only one magnetic component (i.e. a transformer)achieves the simple circuitry, miniature design, and goodmodularity.

However, challenges for better performance remain.The voltage equalization performance of this type of equal-izers depends on how accurately impedances of capacitors(∝ 1/C f , where C and f represent the capacitance and fre-quency, respectively) are matched in the voltage multiplier(i.e. C1–C4 in Fig. 1(e)). Although multi-layer ceramic ca-pacitors (MLCCs) are desirable from cost and volume per-spectives, their voltage-dependent capacitance is unsuitablefor use in the voltage multiplier, where the voltage appliedto each capacitor varies depending on position; for instance,the applied voltages of C1 and C4 exceed those of C2 and C3.Accordingly, bulky and costly tantalum capacitors, whosecapacitances are independent of applied voltage, have beenused. Another challenge is the fact that equalizers for SCsshould possess excessive current protections. Voltages ofSCs vary significantly, typically 0–3.0 and 2.0–4.0 V for tra-ditional SCs and lithium-ion capacitors, respectively. Giventhat SCs at 0 V are equivalent to a short-circuit load, protec-tion against excessive current is considered indispensable.

In this paper, a two-switch cell voltage equalizer usinga series-resonant voltage multiplier operating in frequency-multiplied discontinuous conduction mode (DCM) is pro-posed for series-connected SCs. The proposed equalizer canvirtually increase the operation frequency by the frequency-multiplied mode, and hence mitigate the impact of anyimpedance mismatch of capacitors, allowing MLCCs to beused instead of tantalum capacitors. Furthermore, the DCMoperation provides an inherent constant current characteris-tic, achieving excessive current protection. The rest of thispaper is organized as follows. Section 2 describes the circuittopology and the major advantages of the proposed equal-izer. A detailed operational analysis is performed in Sect. 3,followed by simulation analysis for the derived dc equiva-lent circuit in Sect. 4. Experimental results of equalizationtests performed for eight SCs connected in series are shownin Sect. 5. Finally, the proposed equalizer is compared withvarious conventional equalizers from the viewpoints of com-ponent counts, circuit simplicity, volume, and efficiency, inSect. 6.

2. Two-Switch Voltage Equalizer Using a Series-Resonant Voltage Multiplier Operating in Freq-uency-Multiplied Discontinuous Conduction Mode

2.1 Circuit Description

The representative topology of the proposed voltage equal-izer for four cells connected in series is shown in Fig. 2,where energy storage cells are represented as voltagesources of B1–B4. This equalizer basically combines theseries-resonant inverter (SRI) and voltage multiplier. Al-


Fig. 2 Proposed two-switch voltage equalizer using series-resonant volt-age multiplier for four cells connected in series.

though the illustrated equalizer is a transformer-less topol-ogy, a transformer can naturally be added, similar to theconventional voltage equalizers using a voltage multiplier,as shown in Fig. 1(e). Rbias is a high-resistance bias resis-tor that stabilizes average voltages of Cr and C1–C4, and itsaverage voltage is zero.

The string comprising B1–B4 provides the input powerfor the SRI, whereupon the SRI transfers the power to thevoltage multiplier as a sinusoidal current wave. The volt-age multiplier then rectifies the supplied sinusoidal currentwave and operates so that supplied power is preferentiallyredistributed to the least charged cell with the lowest volt-age in the string. In other words, the energy of the string isredistributed to the least charged cell through the proposedvoltage equalizer. Consequently, all the cell voltages aregradually equalized by the power redistribution.

2.2 Advantages of the Proposed Equalizer

Similar to the previously-proposed equalizer shown inFig. 1(e) [26], [28], the switch count is only two, achievingsimplified circuitry compared with conventional equalizersrequiring numerous switches in proportion to the number ofcells (see Figs. 1(a) and (b)). Besides, the number of mag-netic components necessary is only one (the resonant induc-tor Lr in Fig. 2), allowing a compact design.

Since the circuit topology of the proposed voltageequalizer shown in Fig. 2 is very similar to that of the con-ventional equalizer shown in Fig. 1(e) (e.g. [28]), the key ad-vantages of the proposed equalizer should be clarified on thebasis of the comparison with the conventional one. The pro-posed voltage equalizer offers two major advantages overthe conventional one, as discussed below.

The first advantage is the inherent constant currentcharacteristic realized by the SRI operating in DCM, whichis considered a very desirable feature for SCs. The conven-tional voltage equalizer [28] basically operates as a voltagesource, and therefore, excessively large currents may flow

and destroy the circuit when cell voltage mismatch is sig-nificant and some cell voltages are very low. This is verylikely for SCs whose voltages vary significantly, down to aslow as 0 V, as mentioned in Sect. 1, suggesting protectionagainst excessive current is indispensable for the conven-tional equalizer to be used for SCs. The proposed equalizer,on the other hand, inherently provides the constant currentcharacteristic when operated in DCM, as will be detailedin the next section, achieving an essentially-safer operationand possibly eliminating a protection circuit.

The second advantage is the virtually-increased opera-tion frequency realized by the frequency-multiplied mode;the operation frequency can be virtually boosted without in-creasing the gate driving loss. As will be discussed in detailin the next section, the increased operation frequency miti-gates the negative impact of impedance mismatch of capaci-tors (C1–C4) on equalization performance, allowing MLCCsto be used for C1–C4 instead of bulky and costly tantalumcapacitors, the conventional approach when using voltagemultipliers for equalizers. In addition, virtually-increasedoperation frequency helps to reduce the size of the resonanttank. Although simply increasing the switching frequencyfor the conventional equalizer [28] might achieve the sameadvantage, it naturally requires a faster gate driver IC andresults in increased gate driving loss.

Thus, the proposed equalizer realizes an essentially-safer operation and more compact design than does the con-ventional equalizer using a voltage multiplier.

3. Operational Analysis

3.1 Overall Operation

This section deals with a 4× frequency-multiplied mode,in which the switching frequency is virtually quadrupled.Key operation waveforms and current flow directions undervoltage-balanced conditions (i.e. all cell voltages are uni-form) are shown in Figs. 3 and 4, respectively. For simplic-ity, smoothing capacitors Cout1–Cout4 are not illustrated inFig. 4. The resonant angular frequency ωr, neper frequencyγ, and characteristic impedance Z0 are given by:

ωr =

√1

LrCr−

(R

2Lr

)2

, γ =R

2Lr, Z0 =

√Lr

Cr, (1)

where Lr is the inductance of the resonant inductor Lr, Cr

is the capacitance of the resonant capacitor Cr, and R is thecollective resistance in the current flow path of the series-resonant tank.

The upper and lower switches, Qa and Qb, are alter-nately driven at a fixed switching frequency with a fixedduty cycle of slightly less than 50%.

i) Modes 1 and 3 (T1 < t < T2 and T3 < t < T4):In the first mode, Mode 1, the gating signal for Qa,

vGS a, is applied and Qa is turned on at zero current, achiev-ing zero-current switching (ZCS). Current flow directions inMode 1 are identical to those in Mode 3 (see Fig. 4(a)); the


odd-numbered diodes D(2i) (i = 1 . . . 4) in the voltage multi-plier conduct to discharge Ci. Introducing k as a mode num-ber (i.e. k = 1 . . . 5, 1’. . . 5’), the current of Lr, iLr−k(t), andthe voltage of Cr, vCr−k(t), in Modes 1 and 3 are expressedas

iLr−k (t)=VString−VE−VCr(Tk)

Z0e−γ(t−Tk) sinωr (t−Tk) , (2)

vCr−k (t) =(VString − VE

)−

(VString − VE − VCr(Tk)

)e−γ(t−Tk) cosωr (t − Tk) , (3)

where VString is the string voltage or the total cell voltagesof V1–V4, VE is the input voltage of the voltage multiplierduring D(2i)-conducting periods (see Fig. 4(a)). vCr−k(t) att = Tk+1, VCr−k(Tk+1), is

VCr−k (Tk+1)=(VString−VE

)+(VString−VE−VCr(Tk)

)e−πγωr . (4)

ii) Modes 2 and 4 (T2 < t < T3 and T4 < t < T5):

Fig. 3 Key operation waveforms in frequency-multiplied DCM.

Fig. 4 Current flow directions.

Qa remains on, while the current flow directions are re-versed in these operation modes. Similar to Modes 1 and 3,the current flow directions in Modes 2 and 4 are also identi-cal. In these operation modes, Ci in the voltage multiplier ischarged through the even-numbered diodes D(2i−1). iLr−k(t),vCr−k(t), and VCr−k(Tk+1) in Modes 2 and 4 are expressed as

iLr−k (t)=VString−VO−VCr(Tk)

Z0e−γ(t−Tk) sinωr (t−Tk) , (5)

vCr−k (t) =(VString−VO

)−(VString−VO−VCr(Tk)

)e−γ(t−Tk)

cosωr (t−Tk) , (6)

VCr−k (Tk+1)=(VString−VO

)+(VString−VO−VCr(Tk)

)e−πγωr ,

(7)

where VO is the input voltage of the voltage multiplier dur-ing D(2i−1)-conducting periods (see Fig. 4(b)).

In Mode 4, vGS a is removed so that all the currents inthe equalizer cease in the next operation mode. Qa is turnedoff at zero voltage, and iLr starts flowing through the bodydiode of Qa and Da.

iii) Modes 5 (T5 < t < T1′ ):As iLr reaches zero, the operation shifts to Mode 5, in

which there is no current flowing in the equalizer. Providedthis operation mode exists, DCM operation is ensured.

For this operation mode to exist, half the switching pe-riod (TS /2) must exceed double the resonant period (2Tr).Accordingly, the proposed equalizer must be designed tomeet the following criterion:

TS

2≥ 2Tr or

frfS≥ 4, (8)

where fS is the switching frequency, and fr (= ωr/2π) is theresonant frequency.

iv) Modes 1’ and 3’ (T1′ < t < T2′ and T3′ < t < T4′ ):The gating signal for Qb, vGS b, is applied at the begin-

ning of Mode 1’, and Qb is turned on at ZCS. The currentflow paths in Mode 3’ are identical to those in Mode 1’.Similar to Modes 2 and 4, D(2i−1) conducts to charge Ci inthe voltage multiplier. iLr−k(t), vCr−k(t), and VCr−k(Tk+1) inModes 1’ and 3’are yielded as


iLr−k′ (t)=−VO−VCr(Tk′ )

Z0e−γ(t−Tk′ ) sinωr (t−Tk′) , (9)

vCr−k′ (t)=−VO−(−VO−VCr(Tk′ )

)e−γ(t−Tk′ ) cosωr (t − Tk′) , (10)

VCr−k′ (Tk′+1) = −VO+(−VO−VCr(Tk′ )

)e−πγωr . (11)

v) Modes 2’ and 4’ (T2′ < t < T3′ and T4′ < t < T5′):Qb remains on, while the current flow directions in

these modes are opposite to those in Modes 1’ and 3’.iLr−k(t), vCr−k(t), and VCr−k(Tk+1) in Modes 2’ and 4’are

iLr−k′ (t)=−VE−VCr(Tk′ )

Z0e−γ(t−Tk′ ) sinωr (t−Tk′ ) , (12)

vCr−k′ (t) = −VE −(−VE − VCr(Tk′ )

)e−γ(t−Tk′ ) cosωr (t − Tk′) , (13)

VCr−k′ (Tk′+1) = −VE +(−VE − VCr(Tk′ )

)e−πγωr . (14)

vGS b is removed in Mode 4’ to cease all currents in thenext operation mode, Mode 5’. iLr starts flowing throughthe body diode of Qb and Db, after Qb is turned off at zerovoltage.

vi) Modes 5’ (T5′ < t < T1):This mode begins when iLr reaches zero. Similar to

Mode 5, no current flows in this mode. The criterion equa-tion for this operation mode to exist is also identical to (8).

3.2 Series-Resonant Inverter

As shown in Figs. 3 and 4, Modes 1–5 are symmetric toModes 1’–5’. Assuming V1–V4 are balanced, the averagevoltage of Cr is equal to VString/2, thanks to Rbias with anaverage voltage of zero. Accordingly:

VCr(Tk) + VCr(Tk′ ) = 0. (15)

Introducing VP, which is the amplitude of the inputvoltage of the voltage multiplier vV M (see Fig. 3), as

2VP = VE + VO. (16)

From (4), (7), (11), (14), (15), and (16),

⎧⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎨⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎩

VCr(T1)=−VCr(T ′1)

= 11+ε4

{VString

(ε4

2 +ε+12

)+VP

(ε4+2ε3+2ε2−1

)}VCr(T2)=−VCr(T ′2)

= 11+ε4

{VString

(ε4

2 −ε2+ 12

)+VP

(−ε4−2ε3+2ε+1


= 11+ε4

{VString

(ε4

2 +ε3+ 1

2

)+VP

(ε4−2ε2−2ε−1


= 11+ε4

{VString

(− ε4

2 +12

)+VP

(ε4+2ε3+2ε2+2ε+1

)}(17)

where ε = exp(−πγ/ωr). From (2), (5), (9), (12), and (17),the current in each operation mode can be yielded as

⎧⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎨⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎩

iLr−1 (t) = −iLr−1′ (t)

=VString+VP(2ε3+2ε2+2ε)

Z0(1+ε4) e−γt sinωrt

iLr−2 (t) = −iLr−2′ (t)

= −VStringε+VP(2ε3+2ε2−2)Z0(1+ε4) e−γt sinωr (t − T2)

iLr−3 (t) = −iLr−3′ (t)

=VStringε

2+VP(2ε3−2ε−2)Z0(1+ε4) e−γt sinωr (t − T3)

iLr−4 (t) = −iLr−4′ (t)

= −VStringε3+VP(−2ε2−2ε−2)

Z0(1+ε4) e−γt sinωr (t − T4)

(18)

The absolute average current supplied from the SRI to thevoltage multiplier, IV M , is yielded as

IV M =1

TS

∫ 0.5TS

0|iLr−k (t)|dt

=ωS

2πωr

ε + 1

1 +(γωr

)2

VString

(ε3+ε2+ε+1

)+VP

(6ε3+2ε2−2ε−6

)Z0

(1+ε4

) . (19)

By assuming all the resistances in the equalizer are zero orγ = 0 (i.e. ε = 1), (19) can be simplified to

IV M ≈ 2VStringωS

πωrZ0. (20)

This equation implies that currents in the equalizer are inde-pendent of cell voltages and inherently constant at a givenvalue of VString.

The average input current of the SRI is expressed as

Iin−ave =1

TS

∫ 0.5TS

0iLr−k (t)dt

=ωS

2πωr

ε + 1

1 +

(γ

ωr

)2

VString

(−ε3+ε2−ε+1

)+VP

(2ε3+2ε2+2ε+2

)Z0

(1+ε4

) .

(21)

Similarly, assuming γ = 0 (i.e. ε = 1), (21) can be rewrittenas

Iin−ave ≈ 4VPωS

πωrZ0. (22)

From (19) and (21), a dc equivalent circuit of the SRIcan be derived, as shown in Fig. 5. The string comprisingB1–B4 supplies the current of Iin−ave for the SRI while IV M

is produced and fed to the voltage multiplier, which will beanalyzed in the following subsection.

3.3 Voltage Multiplier

A simple voltage multiplier comprising two cells, Bm andBn, is taken as an example for the operational analysis. The


Fig. 5 DC equivalent circuit of a series-resonant inverter.

Fig. 6 Waveforms of Ci in the voltage multiplier.

waveforms of Ci and operation modes are shown in Figs. 6and 7, respectively, while Modes E and O represent D(2i)-and D(2i−1)-conducting periods, respectively. The voltage ofCi (i = m or n) in Mode E at Tk+1 (i.e. k = 1, 3, 2’, and 4’),VCi(Tk+1), is expressed as{

VCm(Tk+1)=Vm+VD−VE+ICm−k (rm + rD)VCn(Tk+1)=Vm+Vn+VD−VE+ICn−k (rn+rD) , (23)

where VD is the forward voltage drop of diodes, ICi−k is theaverage current of Ci in each mode (designated in Fig. 6), ri

is the equivalent series resistance (ESR) of Ci, and rD is theresistance of diodes.

Similarly, VCi(Tk+1) in Mode O (i.e. k = 2, 4, 1’, and 3’)is {

VCm(Tk+1) = −VD − VO − ICm−k (rm + rD)VCn(Tk+1) = Vm − VD − VO − ICn−k (rn + rD) . (24)

From the difference between (23) and (24), the voltage vari-ation of Ci in a single switching cycle, ΔVCi, is yielded as⎧⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎨⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎪⎩

ΔVCm = 4 (VE − VO) − 4 Vm − 8 VD

− (rm + rD)4∑

k=1(ICm−k + ICm−k′)

ΔVCn = 4 (VE − VO) − 4Vn − 8VD

− (rn + rD)4∑

k=1(ICm−k + ICm−k′)

. (25)

From the operational symmetry between Modes 1–5 and 1’–5’, the relationship among ICi−k, ICi−k′ , and IV M is given by

Fig. 7 Operation modes in (a) Mode E and (b) Mode O.

Fig. 8 Derived dc equivalent circuit of the voltage multiplier.

Tr

2

4∑k=1

ICi−k =Tr

2

4∑k=1

ICi−k′ =TS

2IV M . (26)

In general, a voltage variation of a capacitor is ex-pressed using an average current and frequency, as ΔVCi =

ICi/2Ci fS . From (25) and (26),

VE − VO = 2VP = Vi + 2VD +ICi

2Req−i, (27)

where Req−i is the equivalent resistance that can be derivedfrom the voltage variation of Ci and its value is

Req−i =1

4Ci fS+ (ri + rD)

frfS. (28)

A dc equivalent circuit of the voltage multiplier can bederived from (27), as shown in Fig. 8. Cells are connectedto the common terminal with voltage of 2VP = VE − VO,


Fig. 9 Impedance of MLCC at various dc voltages as a function of fre-quency.

whereupon currents preferentially flow toward the cell withthe lowest voltage. If the values of Req−i are completelymatched for all cells, all cell voltages eventually becomeperfectly uniform. However, the mismatch in Req−i naturallyleads to a residual voltage imbalance that corresponds to thevoltage drop across Req−i.

The value of Req−i in (28) is inversely proportionalto 4 fS , indicating that the equalizer operates in the 4×frequency-multiplied mode. Since the impedance of a ca-pacitor is inversely proportional to frequency, increasing thevirtual frequency by the frequency-multiplied mode can mit-igate the negative impact of any impedance mismatch ofMLCCs whose capacitance depends on the applied voltage.

For example, impedance characteristics of a 47-μFMLCC with a rated voltage of 16 V, which will be usedfor the prototype in Sect. 5, are shown in Fig. 9. Since anequivalent series inductance (ESL) of MLCCs is incorpo-rated into Lr in the resonant circuit, impedance characteris-tics are extrapolated with straight dashed lines, as illustratedin Fig. 9. The impedance mismatch at 100 kHz is approxi-mately 20 mΩ. Meanwhile, the mismatch can be decreasedto as low as 4 mΩ at 1 MHz.

4. DC Equivalent Circuit

By combining the derived dc equivalent circuits of the SRIand voltage multiplier, shown in Figs. 5 and 8, respectively,a dc equivalent circuit of the proposed equalizer as a wholecan be obtained, as shown in Fig. 10, which basically re-sembles that of conventional equalizers using a voltage mul-tiplier [26], [27]. An ideal multi-winding transformer isintroduced for cells to be connected in series. This de-rived dc equivalent circuit provides an intuitive understand-ing of how cell voltages are equalized by the proposed volt-age equalizer. The string supplies Iin−ave for the SRI input.Meanwhile, the SRI transfers IV M to the voltage multiplier.IV M flows preferentially toward the least charged cell havingthe lowest voltage in the string. Accordingly, the voltage ofthe least charged cell increases by receiving a current fromthe equalizer, while other cell voltages decrease by supply-

Fig. 10 Derived dc equivalent circuit of proposed voltage equalizer as awhole for four cells connected in series.

Table 1 Component values.

ing the input current for the SRI. All the cell voltages areeventually unified as the energy redistribution progresses.

The derived dc equivalent circuit is considered a usefultool to briefly investigate equalization profiles. In general,equalization takes several tens of minutes to hours to com-pletely equalize all cell voltages while the equalizer itselfoperates at a switching frequency exceeding several hun-dred kHz. Meanwhile, since the derived dc equivalent cir-cuit contains no switching device, this slashes the simulationburden and time.

Simulation-based equalizations were performed emu-lating Ci-mismatched condition for both original and de-rived dc equivalent circuits, as shown in Figs. 2 and 10. Thecircuit parameters used to analyze the simulation analyseswere basically identical to those for the prototype, whichwill be shown in Table 1, except for the capacitance valueused for C1 and C4; C2 and C3 were 47 μF while C1 and C4

were intentionally extremely mismatched as 4.7 μF to clar-ify results. Simulation equalizations were performed un-der two frequency conditions; the higher-frequency condi-tion was fr ≈ 1 MHz (Lr = 1 μH, Cr = 22 nF) and fS =245 kHz, and the lower one was fr ≈ 100 kHz (Lr = 10 μH,Cr = 220 nF) and fS = 24.5 kHz. Iin−ave and IV M were pro-grammed to obey (19) and (21), respectively. Accordingto (28), the values of Req−1 (= Req−4) and Req−2 (= Req−3)were determined to be 462 and 270 mΩ, respectively, forthe higher-frequency condition, while those for the lower-frequency condition were 2.38Ω and 462 mΩ. Capacitorswith a capacitance of 10 mF were used for B1–B4.

The simulation results are shown in Fig. 11. In bothcases, equalization profiles of original and dc equivalent


Fig. 11 Simulation-based equalization profiles under (a) higher-frequency condition ( fr ≈ 1 MHz, fS = 245 kHz) and (b) lower-frequencycondition ( fr ≈ 100 kHz, fS = 24.5 kHz).

circuits agreed well, verifying the operational analysis andderivation procedure for the equivalent circuit. The leastcharged cell (B1) received an equalization current and itsvoltage V1 increased at the beginning of equalizations.Meanwhile, the other cell voltage decreased by supplyingIin−ave for the SRI input. Although the initial voltage of V1

was 0 V, no excessive current flowed thanks to the inher-ent constant current characteristic by the DCM operation, asdiscussed in Sect. 3.2. As V1 overtook V2, B2 started to re-ceive the equalization current and its voltage V2 increasedtogether with V1 because both V1 and V2 were the lowestin the string at this moment. Over time, the voltage imbal-ance was gradually eliminated and all the cell voltages wereeventually equalized at the end of the simulation.

Cell voltages under the higher-frequency conditionwere adequately equalized at the end of the analysis, asshown in Fig. 11(a). Under the lower-frequency conditionshown in Fig. 11(b), conversely, a major residual voltage im-balance remained due to the huge difference in Req−i. Theresultant contrast between Figs. 11(a) and (b) verifies thatoperating the equalizer at a higher frequency can mitigateany negative impact of capacitance mismatch on the voltageequalization performance.

Fig. 12 Photograph of a 4-W prototype built for eight cells connected inseries.

5. Experimental Results

5.1 Prototype and Experimental Setup

In general, the power rating required for voltage equalizersis relatively smaller than the charging/discharge power forenergy storage modules. In float-charging applications, forexample, an equalization current one hundred times smallerthan the charging/discharging current (i.e. 1/100 C rate forequalization current) is considered sufficient to eliminateand preclude voltage imbalance [13], [30]. Although the op-timum equalization current rate varies depending on appli-cations, a 4-W prototype was designed and built for eightSC cells connected in series; each with capacitance of 250 Fat a rated charge voltage of 5.0 V, as shown in Fig. 12. Com-ponent values are listed in Table 1.

To demonstrate the efficacy of the mitigated impe-dance-mismatch impact at higher frequency, experimentswere performed with two different resonant tanks to achievehigher- and lower-frequency conditions; a resonant tankwith Lr = 1 μH and Cr = 22 nF for the higher-frequency con-dition ( fr ≈ 1 MHz, fS = 245 kHz), while Lr = 10 μH and Cr

= 220 nF for the lower-frequency condition ( fr ≈ 100 kHz,fS = 24.5 kHz).

The experimental setup used to measure the character-istics is shown in Fig. 13. The SC cells were removed whilean external power supply Vin was used to power the equal-izer. A variable resistor Rvar was connected through the se-lectable intermediate tap, with which the current flow pathsunder voltage-balanced and -imbalanced conditions can beemulated. When the tap X is selected, all the capacitorsand diodes in the voltage multiplier are in operation, mean-ing the current flow paths under the voltage-balanced con-dition shown in Fig. 4 can be emulated. Conversely, closingthe tap Y emulates the current flow paths under the voltage-imbalanced condition where V1 is the lowest in the string.

5.2 Measured Waveforms and Characteristics

In this subsection, only the experimental results under thehigher-frequency condition are shown to save the page


Fig. 13 Experimental setup for characteristic measurement.

length; similar results were also obtained under the lower-frequency condition.

The measured efficiencies and output currents un-der voltage-balanced and -imbalanced conditions under thehigher-frequency condition ( fr ≈ 1 MHz, fS = 245 kHz) areshown in Fig. 14. The output current characteristics werenearly constant, but declined slightly with increasing Vout,due to the resistive components in the circuit. Efficienciesalso fell with decreasing Vout because the diode forwardvoltage drops took a significant portion of the relatively lowVout of voltage equalizers. Efficiencies under the voltage-imbalanced condition were slightly lower than those underthe voltage-balanced condition. The inferior efficiencies un-der the voltage-imbalanced condition were attributable tothe increased Joule loss due to current concentration. Allthe diodes and capacitors in the voltage multiplier are in op-eration under the voltage-balanced condition, meaning cur-rents are uniformly distributed to all components in the volt-age multiplier. Under the voltage-balanced condition, con-versely, currents concentrate to flow through C1, D1 and D2,increasing the Joule losses.

The measured waveforms under voltage-balanced and-imbalanced conditions under a higher frequency conditionare shown in Fig. 15. These were nearly the same, indicat-ing that the SRI operation is independent of whether volt-ages are imbalanced. This tendency is also supported by thefact that VP determines iLr (see (18)) and its value is onlydependent on the cell with the lowest voltage; not whethervoltages are imbalanced, as Fig. 10 implies.

5.3 Equalization Tests for Series-Connected SCs

Voltage equalization tests were performed from initially-voltage imbalanced conditions. The resultant equalizationprofiles under the higher- and lower-frequency conditionsare shown in Fig. 16. Similar to the simulation results shownin the previous section, cells with lower initial voltages re-ceived currents and their voltages increased, while those

Fig. 14 Measured efficiencies and output current characteristics under(a) voltage-balanced and (b) voltage-imbalanced conditions at the higher-frequency condition ( fr ≈ 1 MHz, fS = 245 kHz).

with higher initial voltages supplied the input current forthe equalizer and their voltages decreased. The voltage im-balance was gradually eliminated, and all the cell voltageswere eventually unified at the end of the experiments. Simi-lar equalization profiles were observed under both frequencyconditions.

The standard deviations of cell voltages under higher-and lower-frequency conditions were calculated and com-pared in Fig. 17. These consistently decreased over time,and these were nearly identical at the beginning of equal-izations. However, the higher-frequency condition showed alower standard deviation tendency than that under the lower-frequency condition 60 minutes after the start of equaliza-tion tests. This reduced standard deviation is attributableto the fact that the impedance mismatch was mitigated un-der the higher-frequency condition, as discussed in Sect. 3.3and as supported by the simulation results shown in Sect. 4.These results demonstrated the efficacy of the increased vir-tual operation frequency by the frequency-multiplied mode.

Another experimental equalization test under thehigher-frequency condition was performed from a different


Fig. 15 Measured waveforms under (a) voltage-balanced and (b)voltage-imbalanced conditions at the higher-frequency condition ( fr ≈1 MHz, fS = 245 kHz).

initial imbalanced condition, and the results are shown inFig. 18; initial voltages were increased in the order of V8–V1. The resultant equalization profiles and the standarddeviation of cell voltages were similar to those shown inFigs. 16(a) and 17, respectively, verifying that the equaliza-tion process and performance were dependent on cell volt-age levels and were independent on the positions of cellswithin the string.

6. Comparison with Conventional Voltage Equalizers

The proposed and representative conventional voltageequalizer are compared and arbitrary rated from the per-spectives of component counts, circuit simplicity, volume,and efficiency, as shown in Table 2. The listed equalizersare categorized into two equalization architectures: cell-to-cell and string-to-cell equalization architectures. Equalizersin the cell-to-cell equalization architecture transfer energiesbetween adjacent cells, while those in the string-to-cell ar-

Fig. 16 Resultant equalization profiles under (a) higher-frequency con-dition ( fr ≈ 1 MHz, fS = 245 kHz) and (b) lower-frequency condition( fr ≈ 100 kHz, fS = 24.5 kHz).

Fig. 17 Comparison on standard deviations of cell voltages underhigher- and lower-frequency conditions.

chitecture delivers energies from a string to directly the leastcharged cell(s) in the string.

Cell-to-cell equalizers require numerous switches inproportion to the number of cells n, while string-to-cellequalizers can dramatically reduce the switch count, achiev-ing the simplified circuit. In addition, the string-to-cellequalizers are considered advantageous in terms of volumebecause most string-to-cell equalizer topologies listed in thetable requires only a single magnetic component.

Efficiencies of string-to-cell equalizers are inferior tothose of cell-to-cell equalizers, as can be found in Table 2,because switches with relatively high voltage rating are nec-essary to withstand string voltages. However, string-to-cell


Table 2 Comparison between proposed and representative conventional equalizers.

Fig. 18 Experimental results of equalization test under higher-frequencycondition performed from different initial voltage condition.

equalizers are simpler and more compact than cell-to-cellequalizers, thanks to the reduced switch and magnetic com-ponent counts. Among the string-to-cell equalizers, the pro-posed equalizer offers two remarkable features, as discussedin Sect. 2.2, whereas its efficiency performance is inferior.However, given that the power rating required for equaliz-ers is far smaller than charge/discharge power for energystorage modules (e.g., 1/100 C rate for equalization cur-rent [30]), as mentioned in Sect. 5.1, this inferior efficiencywould not be a major drawback.

Although the proposed equalizer, in terms of circuitsimplicity and volume, is comparable to conventional string-to-cell equalizers, the two major features would make theproposed equalizer a more attractive solution than conven-tional ones.

7. Conclusions

A two-switch cell voltage equalizer using a series-resonantvoltage multiplier operating in frequency-multiplied DCM

has been proposed in this paper. The operation frequency ofthe proposed equalizer can be virtually increased without in-creasing the gate driving loss in frequency-multiplied mode,meaning the impact of any mismatch in capacitor impedancecan be mitigated. This allows MLCCs to be used instead ofbulky and costly tantalum capacitors, the conventional ap-proach when using voltage multipliers in equalizers. In ad-dition, the DCM operation inherently provides the constantcurrent characteristic, realizing excessive current protection.

Experimental equalization tests for eight SCs con-nected in series were performed under two frequency con-ditions. The resultant standard deviation trend under thehigher-frequency condition was lower than that under thelower-frequency condition, demonstrating superior equal-ization performance under the virtually-increased operatingfrequency condition

References

[1] M. Uno and K. Tanaka, “Accelerated charge-discharge cycling testand cycle life prediction model for supercapacitors in alternativebattery applications,” IEEE Trans. Ind. Electron., vol.59, no.12,pp.4704–4712, Dec. 2012.

[2] S.M. Lambert, V. Pickert, J. Holden, X. He, and W. Li, “Compar-ison of supercapacitor and lithium-ion capacitor technologies forpower electronics applications,” Proc. Power Electron. Machinesand Drives, 2010, pp.1–5, April 2010.

[3] M. Uno and K. Tanaka, “Spacecraft electrical power system usinglithium-ion capacitors,” IEEE Trans. Aerosp. Electron. Syst., vol.49,no.1, pp.175–188, Jan. 2013.

[4] K. Nishijima, H. Sakamoto, and K. Harada, “A PWM controlledsimple and high performance battery balancing system,” Proc. IEEEPower Electron. Spec. Conf., pp.517–520, June 2000.

[5] T.H. Phung, A. Collet, and J. Crebier, “An optimized topology fornext-to-next balancing of series-connected lithium-ion cells,” IEEETrans. Power Electron., vol.29, no.9, pp.4603–4613, Sept. 2014.

[6] Y.S. Lee and M.W. Cheng, “Intelligent control battery equalizationfor series connected lithium-ion battery strings,” IEEE Trans. Ind.Electron., vol.52, no.5, pp.1297–1307, Oct. 2005.

[7] Y.S. Lee and G.T. Cheng, “Quasi-resonant zero-current-switchingbidirectional converter for battery equalization applications,” IEEETrans. Power Electron., vol.21, no.5, pp.1213–1224, Sept. 2006.

[8] Y.S. Lee, M.W. Cheng, S.C. Yang, and C.L. Hsu, “Individualcell equalization for series connected lithium-ion batteries,” IEICETrans. Commun., vol.E89-B, no.9, pp.2596–2607, Sept. 2006.


[9] Y.S. Lee, M.W. Cheng, and S.C. Yang, “Fuzzy controlled individualcell equalizers for lithium-ion batteries,” IEICE Trans. Commun.,vol.E91-B, no.7, pp.2380–2392, July 2008.

[10] P.A. Cassani and S.S. Williamson, “Feasibility analysis of a novelcell equalizer topology for plug-in hybrid electric vehicle energy-storage systems,” IEEE Trans. Veh. Technol., vol.58, no.8, pp.3938–3946, Oct. 2009.

[11] P.A. Cassani and S.S. Williamson, “Design, testing, and validationof a simplified control scheme for a novel plug-ion hybrid electricvehicle battery cell equalizer,” IEEE Trans. Ind. Electron., vol.57,no.12, pp.3956–3962, Dec. 2010.

[12] C. Pascual and P.T. Krein, “Switched capacitor system for automaticseries battery equalization,” Proc. IEEE Appl. Power Electron. Conf.Expo., pp.848–854, Feb. 1997.

[13] J.W. Kimball, B.T. Kuhn, and P.T. Krein, “Increased performanceof battery packs by active equalization,” Proc. IEEE Veh. PowerPropulsion Conf., pp.323–327, Sept. 2007.

[14] A. Baughman and M. Ferdowsi, “Double-tiered switched-capacitorbattery charge equalization technique,” IEEE Trans. Ind. Appl.,vol.55, no.6, pp.2277–2285, June 2008.

[15] Y.S. Lee, Y.Y. Chiu, M.W. Cheng, Y.P. Ko, and S.H. Hsiao, “Invert-ing quasi-resonant switched-capacitor bidirectional converter andits application to battery equalization,” IEICE Trans. Commun.,vol.E92-B, no.4, pp.1326–1336, April 2009.

[16] R. Lu, C. Zhu, L. Tian, and Q. Wang, “Super-capacitor stacksmanagement system with dynamic equalization techniques,” IEEETrans. Magn., vol.43, no.1, pp.254–258, Jan. 2007.

[17] M. Uno and H. Toyota, “Supercapacitor-based energy storage sys-tem with voltage equalizers and selective taps,” Proc. IEEE PowerElectron. Spec. Conf., pp.755–760, June 2008.

[18] M. Uno and H. Toyota, “Equalization technique utilizing series-parallel connected supercapacitors for energy storage system,” Proc.IEEE Int. Conf. Sustainable Energy Technology, pp.999–1003, Nov.2008.

[19] H.S. Park, C.H. Kim, K.B. Park, G.W. Moon, and J.H. Lee, “Designof a charge equalizer based on battery modularization,” IEEE Trans.Veh. Technol., vol.58, no.7, pp.3216–3223, Sept. 2009.

[20] M. Uno and K. Tanaka, “Influence of high-frequency charge-discharge cycling induced by cell voltage equalizers on the life per-formance of lithium-ion cells,” IEEE Trans. Veh. Technol., vol.60,no.4, pp.1505–1515, May 2011.

[21] Y. Yuanmao, K.W.E. Cheng, and Y.P.B. Yeung, “Zero-currentswitching switched-capacitor zero-voltage-gap automatic equaliza-tion system for series battery string,” IEEE Trans. Power Electron.,vol.27, no.7, pp.3234–3242, July 2012.

[22] N.H. Kutkut, D.M. Divan, and D.W. Novotny, “Charge equalizationfor series connected battery strings,” IEEE Trans. Ind. Appl., vol.31,no.3, pp.562–568, May/June 1995.

[23] N.H. Kutkut, H.L. N. Wiegman, D.M. Divan, and D.W. Novotny,“Charge equalization for an electric vehicle battery system,” IEEETrans. Aerosp. Electron. Syst., vol.34, no.1, pp.235–246, Jan. 1998.

[24] N.H. Kutkut, H.L.N. Wiegman, D.M. Divan, and D.W. Novotny,“Design considerations for charge equalization of an electric vehi-cle battery system,” IEEE Trans. Ind. Appl., vol.35, no.1, pp.28–35,Jan. 1999.

[25] M. Uno and K. Tanaka, “Single-switch cell voltage equalizer us-ing multistacked buck — Boost converters operating in discontin-uous conduction mode for series-connected energy storage cells,”IEEE Trans. Veh. Technol., vol.60, no.8, pp.3635–3645, Oct. 2011.

[26] M. Uno and K. Tanaka, “Double-switch single-transformer cell volt-age equalizer using a half-bridge inverter and voltage multiplierfor series-connected supercapacitors,” IEEE Trans. Veh. Technol.,vol.61, no.9, pp.3920–3930, Nov. 2012.

[27] M. Uno and A. Kukita, “Double-switch equalizer using parallel-or series-parallel-resonant inverter and voltage multiplier for series-connected supercapacitors,” IEEE Trans. Power Electron., vol.29,no.2, pp.812–828, Feb. 2014.

[28] M. Uno and A. Kukita, “Double-switch series-resonant cell voltageequalizer using voltage multiplier for series-connected energy stor-age cells,” Electrical Engineering Japan, vol.189, no.3, pp.41–51,Nov. 2014.

[29] M. Uno and A. Kukita, “Single-switch single-transformer cell volt-age equalizer based on forward-flyback resonant inverter and voltagemultiplier for series-connected energy storage cells,” IEEE Trans.Veh. Technol., vol.63, no.9, pp.4232–4247, Nov. 2014.

[30] S. West and P.T. Krein, “Equalization of valve-regulated lead-acidbatteries: Issues and life test results,” Proc. Int. Telecommun. EnergyConf., pp.439–446, Sept. 2000.

Masatoshi Uno was born in Japan in1979. He received a B.E. degree in electron-ics engineering and an M.E. degree in electricalengineering from Doshisha University, Kyoto,Japan, in 2002 and 2004, respectively, and aPh.D. degree from the Graduate University forAdvanced Studies, Kanagawa, Japan, in 2012.In 2004, he joined Japan Aerospace ExplorationAgency, Kanagawa, Japan, developing space-craft power systems including battery, photo-voltaic, and fuel cell systems. In 2014, he joined

the Department of Electrical and Electronics Engineering, Ibaraki Univer-sity, Ibaraki, Japan, where he is currently an Associate Professor of Electri-cal Engineering. His research interests include switching power converters,cell equalizers, life evaluation for supercapacitors and lithium-ion batteries,and development of fuel cell systems.

Akio Kukita was born in Japan in 1967.He received a B.E. degree in physics from ChuoUniversity, Japan, in 1993. From 1993 to 1996and 1996 to 2008, he was with SEIKO Hold-ings Corporation and Ebara Corporation, re-spectively. Since 2008, he has been with JapanAerospace Exploration Agency as a senior engi-neer. His recent work has focused on the devel-opment of spacecraft power systems.

two-switch voltage equalizer using a series-resonant voltage

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