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    FPGA-Based System Design: Chapter 2 Copyright 2004 Prentice Hall PTR

    Transistor Characteristics

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    FPGA-Based System Design: Chapter 2 Copyright 2004 Prentice Hall PTR

    Introduction

    During transistor operation we use the gate

    voltage to modulate the current through the

    channel.

    An ideal transistor would act as a switch,

    but realistic transistors have more complex

    characteristics that we can be understand bylooking at the structure of the transistor.

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    FPGA-Based System Design: Chapter 2 Copyright 2004 Prentice Hall PTR

    Transistor structure

    n-type transistor:

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    FPGA-Based System Design: Chapter 2 Copyright 2004 Prentice Hall PTR

    Transistor structure (cont:)

    Fig: shows the cross-section of an n-type MOStransistor.

    It is embedded in a p-type substrate.

    The area where the intersection of an n-typediffusion region and a polysilicon wire is calledthe channel.

    The channel connects the two n-type wires which

    form the source and drain, but is itself doped to bep-type.

    Having a thin oxide at the channel is critical to thesuccessful operation of the transistor.

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    FPGA-Based System Design: Chapter 2 Copyright 2004 Prentice Hall PTR

    Transistor operation

    Gate-to-source voltage modulates the amount of current that can flow between thesource and drain.

    When the gate voltage (Vgs) is zero, no current can flow from the source to the drain.

    As Vgs rises above zero, current flows between the source and drain.

    While the channel region contains predominantly p-type carriers, it has also have some

    minority carriers. The positive voltage on the gate attracts the electrons, they collect at the top of the

    channel .

    At the critical voltage called the threshold voltage (Vt) , enough electrons have collectedat the channel boundary to form an inversion layer, a layer of electrons dense enough toconduct current between the source and drain.

    The size of the channel region is labeled relative to the direction of current flow.

    The channel length (L) is along the direction of current flow between the source anddrain, while the width (W) is perpendicular to current flow.

    The amount of current flow is a function of the W/Lratio.

    P-type transistors have identical structures but complementary materials.

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    FPGA-Based System Design: Chapter 2 Copyright 2004 Prentice Hall PTR

    P-type Device

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    FPGA-Based System Design: Chapter 2 Copyright 2004 Prentice Hall PTR

    N-type Device

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    FPGA-Based System Design: Chapter 2 Copyright 2004 Prentice Hall PTR

    Transistor equations

    The variables that describe a transistors behavior are:

    - Vgs : the gate-to-source voltage;

    - Vds : the drain-to-source voltage;

    - Id : the current flowing between the drain and source.

    The constants that determine the magnitude of source-to-drain current in thetransistor are:

    - Vt : the transistor threshold voltage, which is positive for an n-type transistor and negative for a p-type transistor;

    - k : the transistor transconductance, which is positive for bothtypes of transistors;

    -W/L : the width-to-length ratio of the transistor.

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    FPGA-Based System Design: Chapter 2 Copyright 2004 Prentice Hall PTR

    Drain current

    For an n-type transistor, we have:

    Linear region (Vds < Vgs - Vt):

    Id= k (W/L)(Vgs - Vt)(Vds - 0.5Vds2)

    Saturation region (Vds >= Vgs - Vt):

    Id= 0.5k (W/L)(Vgs - Vt)2

    For a p-type transistor, the drain current is negative and the device

    is on Vgs is the below the devices negative threshold voltage.

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    FPGA-Based System Design: Chapter 2 Copyright 2004 Prentice Hall PTR

    Fig: 2-4 Drain current characteristics

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    FPGA-Based System Design: Chapter 2 Copyright 2004 Prentice Hall PTR

    Fig: 2-4 plots the equations over some

    typical values for an n-type device.

    Each curve shows the transistor current as

    Vgs is held constant and Vds is swept from

    0V to a large voltage.