traffic lights discussion d8.3a. recall divide-by-8 counter use q2, q1, q0 as inputs to a...
TRANSCRIPT
Traffic Lights
Discussion D8.3a
Recall Divide-by-8 Counter
Use Q2, Q1, Q0 as inputs to a combinational circuitto produce an arbitrary waveform.
s0 0 0 0 0 0 1s1 0 0 1 0 1 0s2 0 1 0 0 1 1s3 0 1 1 1 0 0s4 1 0 0 1 0 1s5 1 0 1 1 1 0s6 1 1 0 1 1 1s7 1 1 1 0 0 0
State Q2 Q1 Q0 D2 D1 D0Present state Next state
CLK
D Q
~QCLK
D Q
~Q
CLK
D Q
~QCLK
D Q
~Q
CLK
D Q
~QCLK
D Q
~Q
Q0
Q1
Q2
D0
D1
D2
s0 0 0 0 0 0 1 1s1 0 0 1 0 1 0 1s2 0 1 0 0 1 1 0s3 0 1 1 1 0 0 1s4 1 0 0 1 0 1 0s5 1 0 1 1 1 0 1s6 1 1 0 1 1 1 0s7 1 1 1 0 0 0 0
State Q2 Q1 Q0 D2 D1 D0 y
Blink
Yellow
Red
Green
Yellow
Red
Green
North - South East - West
Table 7.5 Traffic Light States State North - South East - West Delay (sec.)
1 Green Red 2 2 Yellow Red 1 3 Red Red 1 4 Red Green 2 5 Red Yellow 1 6 Red Red 1
module lights ( clr ,RYG ,clk );
input clr ; // pushbutton switch S4 - pin 69wire clr ;input clk ; // 1 Hz clock - pin 12wire clk ;
output [5:0] RYG ; // RYGRYGreg [5:0] RYG ;reg [3:0] Q;
// 4-bit counteralways @(posedge clk or posedge clr)
if(clr == 1)Q <= 0;
elseQ <= Q + 1;
lights.v
// Traffic lights always @(Q[3:1])
case(Q[3:1]) // RYGRYG 0: RYG = 6'b001100; 1: RYG = 6'b001100; 2: RYG = 6'b010100; 3: RYG = 6'b100100; 4: RYG = 6'b100001; 5: RYG = 6'b100001; 6: RYG = 6'b100010; 7: RYG = 6'b100100;
default: RYG = 6'b001100; endcase
endmodule
lights.v
#PACE: Start of PACE I/O Pin AssignmentsNET "clk" LOC = "p12" ;NET "clr" LOC = "p69" ;NET "RYG<0>" LOC = "p32" ;NET "RYG<1>" LOC = "p31" ;NET "RYG<2>" LOC = "p26" ;NET "RYG<3>" LOC = "p25" ;NET "RYG<4>" LOC = "p20" ;NET "RYG<5>" LOC = "p13" ;
lights.ucf
G3VM-61A1 MOS FET Relay
Silicon-Controlled Rectifier (SCR)
Text: Section 11-12, pages 446 - 449
Triac
Using an AC Relay
74LS240
+ -
Relay
+5V
180 OhmsAC Voltage
AC Voltage Out
Control Signal