track c: a new method for automatic generation of drc and lvs runsets/ dr. elena ravve
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TRANSCRIPT
May 1, 2013 1
A new method for automatic
generation of DRC and LVS runsets
Dr. Elena Ravve
Software Engineering Department Ort Braude College, Karmiel
(common work with TowerJazz Semiconductor)
May 1, 2013
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What is the problem? From designer to manufacturer
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What is the problem? From manufacturer to designer
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Physical Design Kits Package
Physical Design Kits Package
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From Design Rule Manuscript to Runsets: multiple interpretations
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From DRM to Runsets: derivatives and revisions
Runsets
Runsets
Runsets
Runsets
Runsets
Runsets
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Definition of the problem
• Any semiconductor manufacturing process contains a set of physical design rules for geometrical configuration of available layers, wiring, placement and so on.
• Every chip, which is expected to be manufactured in the given technology, must satisfy the limitations of the design rules.
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Definition of the problem (ctnd)
• Design Rile Manual (DRM) may contain hundreds of physical design rules and definitions of dozens legal devices.
• Design rule checking (DRC) and Layout vs. Schematics (LVS) runsets are provided in order to guarantee that the given chip does not give the design rule violations.
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Definition of the problem (ctnd)
• Writing and testing of DRC and LVS runsets traditionally is done MANUALY
• It leads to
– Problematic knowledge accumulation and transfer
– Different interpretations of rules and definitions
– Inconsistency of revisions and derivatives
– Maintenance problems
– etc.
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Solution of the problem
• The proposed innovation is based on the fact that the set of legal devices for any process or technology may be divided into final set of technology independent categories such that transistors, capacitors, resistors, diodes and so on.
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Solution of the problem (cntd)
• Moreover, the set of physical design rules for any process or technology may be divided into final set of technology independent categories such that width, space, enclosure and so on.
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DRM composition rather than free style writing
• We create one set of parameterized templates for DRC/LVS purposes, such that one template (or rather sub-set of templates) corresponds to a DRC/LVS category.
• We force the DRM composer (integrator) to fulfill the templates (in any relevant way, for example, using GUI) instead of free-style writing of the document.
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DRM composition rather than free style writing (ctnd)
For any design rule or legal device for a given technology, the integrator
• chooses the relevant parameterized template,
• provides the specific values of required parameters or (preferably) chooses them from a choice list.
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DRM composition rather than free style writing (ctnd)
The obtained information is transformed and stored as a data structure that will be used for different purposes, such that DRC and LVS runsets generation in particular verification tools and so on.
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Auto Design Rules Tool
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Implementation: choice lists
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Implementation: code generation
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Implementation: main steps 1-7
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Implementation: generated code
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Benefits of the presented method
• Better quality and confidence level of the delivered DRC/LVS runsets
• Total elimination of the step of manual runsets coding for any verification tool
• Reduction of time and effort to implement runsets
• Full coverage of all physical design rules and legal devices
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Benefits (ctnd)
• Common base for different processes, technologies and verification tools
• Detection and correction of mistakes and bug at earliest stages of the flow
• Human independent accumulation and transfer of knowledge
• Reduction of manual writing
• Reduction of human factor
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Benefits (ctnd)
• Formal approach to DRM composition that allows precise formulation of physical design rules and description of legal devices
• Effective and safe way to change the DRC/LVS runsets for all verification tools, according to the changes in DRM and bug fixes
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Thank you for your attention!
Questions?
May 1, 2013