topic03c the freescale mc9s12x assembly instruction set part 2

Assembly Language: Instructions 2

Topic Video 03C3C

1Saturday, 22 August 2009

The HS12 Instruction SetArithmetic Instructions

• The arithmetic instruction set enables arithmetic operations to be performed between an accumulator and an operand.• The arithmetic operations supported by the

HC12 are:•Add and Subtract•Multiply and Divide


The HS12 Instruction SetArithmetic Instructions: Add and Subtract

• Adding and Subtracting is primarily done using the A, B, or D accumulators in combination with an immediate value or memory location (variable).

Addition SubtractionAccumulator A ADDA SUBAAccumulator B ADDB SUBBAccumulator D ADDD SUBD



Examples

... LDAA #32

ADDA #12 ;A = 32 +12...

...MOVB #45,DataLDX #DataMOVB #12,VariableLDAA 0,XADDA Variable ;A=45 +12...



• When adding or subtracting multi-byte or multi-word numbers, the carry or borrow bit must be passed on the next operation.

Add with Carry Subtract with Burrow

Accumulator A ADCA SBCAAccumulator B ADCB SBCB



Examples

... LDAA #$32

ADDA #$12 ;A = $32 +$12STAA LSB ;LSB = $32+$12LDAA #$67ADCA #$78 ;A=$67+$78 + CSTAA MSB ;MSB =$67+$78 + C...


The HS12 Instruction SetArithmetic Instructions: Decimal Adjustment

• When performing arithmetic on packed binary coded decimal numbers which contains two decimal numbers, an error will occur when the numbers are added.

• After performing and addition between two such numbers the DAA command must immediately follow.

• Using the status of the half-carry bit in the condition code register the DAA command will correct for any BCD errors.

• If the Half-Carry Flag is set in the CCR then it will add 6 on to the result.


The HS12 Instruction SetArithmetic Instructions: Negating and Sign Extension

• The arithmetic instruction set contains commands capable of performing two’s complement negation.

• It is also capable of extending the sign of an 8 bit number to form an equivalent 16 bit number. This would be useful if you wanted to added a negative 8 bit number to a 16 bit number.

Negate Memory NEGNegate Accumulator A NEGANegate Accumulator B NEGBExtend Sign SEX


The HS12 Instruction SetArithmetic Instructions: Negating and Sign Extension

Example

...

LDAA #32 ;A=32 (%00100000)‏NEGA ;A=-32 (%11100000)‏...


The HS12 Instruction SetArithmetic Instructions: Multiply

• On the HS12 we can multiply both 8 and 16 bit numbers, and these number can be signed or unsigned.• Multiplying eight bit numbers•When multiplying eight bit numbers, the number to be multiplied are loaded into the accumulators A and B.•The multiply command is issued and the result is made available in accumulator D.

Unsigned 8 bit Multiply MUL



Example

....LDAA #5 ; A=5LDAB #6 ; B=6MUL ; D=5 * 6 = 30...



• Multiplying sixteen bit numbers•When multiplying sixteen bit numbers, the numbers to be multiplied are loaded into the D accumulator and the Y index register.•The multiply command is issued and the result is made available, the most significant word is in Y and the least significant in D.

Unsigned 16 bit Multiply EMULSigned 16 bit Multiply EMULS



Example

....LDD #-250 ; D=-250LDY #6 ; Y=6EMULS ; Y:D=-250 * 6 = -1500...


The HS12 Instruction SetArithmetic Instructions: Division

• The CPU12 instruction set includes instruction for the division of 16 and 32 bit numbers.

• Dividing 16 bit numbers• The number to be divided is loaded into D and the number to

divide it by is loaded into X.• The divide command is then issued and the result is available in

X and the remainder in D.

Unsigned 16 bit Division IDIVSigned 16 bit Division IDIVS



Example

....LDD #32 ; D=32LDX #6 ; X=6IDIV ; 32/6 (X=5, D=2)...



• Dividing 32 bit numbers– The number to be divided is loaded into Y:D and the number to

divide it by is loaded into X.– The divide command is then issued and the result is available in Y

and the remainder in D.

Unsigned 32 bit Division EDIVSigned 32 bit Division EDIVS



Example

....LDY #$1234 ; Y=$1234LDD #$0032 ; D=$0032LDX #$6666 ; X=$6666EDIV ; $12340032/$6666

; (Y=$2d82,D=0)...


The HS12 Instruction SetLogic Instructions

• The CPU12 instruction set includes logical functions such as AND, OR, XOR and ones complement which can be applied to accumulator A, B or a memory location.

AND OR XOR 1's Compliment

Accumulator A ANDA ORAA EORA COMAAccumulator B ANDB ORAB EORB COMBMemory AND ORA EOR COM


The HS12 Instruction SetLogic Instructions

Example

....LDDA #23 ; A=23ANDA #08 ; A=A&8 = 0...


The HS12 Instruction SetData Test Instructions

Test Bits in A BITA Operand R=A&Operand

Test Bits in B BITB Operand R=B&Operand

Compare A to B CBA R=B-A

Compare A to Memory CMPA Operand R=A-Operand

Compare B to Memory CMPB Operand R=B-Operand

Compare D to Memory CPD Operand R=D-Operand

Compare X to Memory CPX Operand R=X-Operand

Compare Y to Memory CPY Operand R=Y-Operand

Compare SP to Memory CPS Operand R=SP-Operand



• We can also test if a accumulator A, B, or a memory location is negative or zero.

Test if memory loccation <=0 TST Operand

Test if Accumulator A <=0 TSTA

Test if Accumulator B <=0 TSTB



Examples

....

LDAA #23 ; A=23

TSTA ; Z=0,N=0,H=0,V=0,C=0

...

....

LDAA #23 ; A=23

CMPA #23 ; Z=1,N=0,H=0,V=0,C=0

...


The HS12 Instruction SetConditional Branch Instructions

• A program is rarely sequential, there are many times when the program flow needs to be changed because of some event.

• Condition branch instructions are used to change the program flow. • The operation of these instructions is directly controlled by the status

of the N, V, H, C, and Z flags in the condition code register.• The flags in the CCR are set depending on the result of previously

executed instructions.• Due to these commands the controller in fact works more like a

computer instead of a calculator that sequentially manipulates data.



• There are two forms of the branching instructions,

• those capable of only branching +127 to -128 memory locations from the current program counter value (short branches),

Short Branches (signed)‏

Branch if lessthan BLT Label <

Branch if greaterthan BGT Label >

Branch if lessthan or equal to BLE Label <=

Branch if greaterthan or equal to BGE Label >=

Branch if Overflow BVS Label V=1

Branch if no Overflow BVC Label V=0



Short Branches (Unsigned)

Branch if equal BEQ Label ==

Branch if not equal BNE Label !=

Branch if minus BMI Label <0

Branch if Plus BPL Label >0

Branch if Carry Set BCS Label C=1

Branch if Carry Clear BCC Label C=0



• Long Branches• Capable of branching anywhere.

Long Branches (Unsigned)Branch if equal LBEQ Label ==

Branch if not equal LBNE Label !=

Branch if minus LBMI Label <0

Branch if Plus LBPL Label >0

Branch if Carry Set LBCS Label C=1

Branch if Carry Clear LBCC Label C=0



Long Branches (signed)‏Branch if lessthan LBLT Label <

Branch if greaterthan LBGT Label >

Branch if lessthan or equal to LBLE Label <=

Branch if greaterthan or equal to LBGE Label >=

Branch if Overflow LBVS Label V=1

Branch if no Overflow LBVC Label V=0



Examples

....

LDAA #23 ; A=23,Z=0,N=0,H=0,V=0,C=0

BNE LOOP ; IF (Z==0) branch to “LOOP”

...


The HS12 Instruction SetLoop Primitive Instructions

• Used for creating loop structures.

• The counter variable may be contain in any of the registers A, B, D, X, Y, or SP.

Decrement Counter and branch if (counter != 0) DBNE

Decrement Counter and branch if (counter == 0) DBEQ

Increment Counter and branch if (counter != 0) IBNE

Increment Counter and branch if (counter == 0) IBEQ

Test Counter and branch if (counter != 0) TBNE

Test Counter and branch if (counter == 0) TBEQ


The HS12 Instruction SetLoop Primitive Instructions

Example

....

DBNE A,LOOP ; if(A!=0) Branch to label “LOOP”.

...

A!=0

A=A - 1

Back to “LOOP”

T F


The HS12 Instruction SetUnconditional Branch and Jump Instructions

• When we want to forcibly change the program flow we can use an unconditional jump and branch instruction.

• An unconditional jump or branch instruction always change the flow of the program without the need to check the status of the condition code register.

Jump to memory location JMP Label

Jump to Subroutine JSR Label

Branch Always to memory location BRA Label

Branch to Subroutine BSR Label


The HS12 Instruction SetUnconditional Branch and Jump Instructions

Example

....

LOOP: BRA LOOP ; Branch always to label “LOOP”.

...

...


The HS12 Instruction SetCondition Code Register Instructions

• The condition code register instructions consist of two instructions for setting and clearing the appropriate bits in the CCR.

• ORCC can be used for setting the bits.

ORCC #%10000000

This will set the msb of CCR (S=1)‏

• ANDCC can be used for clearing the bits.

ANDCC #%01111111

This will clear the msb of the CCR (S=0)‏


The HS12 Instruction SetInterrupt Instructions

• There exist two interrupt based commands:

Clear the I bit in CCR (enable all maskable interrupts) CLI

Set the I bit in the CCR( disable all maskable interrupts) SEI

• CLI and SEI are no longer directly supported by CPU12 however many assemblers translate this mnemonic to the CPU12 equivalent of:

CLI ANDCC #%11101111

SEI ORCC #%00010000


The HS12 Instruction SetOther Instructions

• Other instructions supported by the HS12 include:

No Operation NOP

This instruction tells the processor to do nothing, but it takes the processor exactly 1 clock cycle to do it.


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topic03c the freescale mc9s12x assembly instruction set part 2

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