today’s topics architecture overview architecture overview machine instructions machine...

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Today’s topics Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution Cycle CISC machines CISC machines Microprograms Microprograms RISC machines RISC machines Parallelism Parallelism Instruction-level Instruction-level Processor-level Processor-level Internal representation Internal representation Limits of representation Limits of representation External representation External representation Binary, octal, decimal, hexadecimal number systems Binary, octal, decimal, hexadecimal number systems

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Page 1: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Today’s topicsToday’s topics Architecture overviewArchitecture overview Machine instructionsMachine instructions Instruction Execution CycleInstruction Execution Cycle CISC machinesCISC machines

MicroprogramsMicroprograms RISC machinesRISC machines ParallelismParallelism

Instruction-levelInstruction-level Processor-levelProcessor-level

Internal representationInternal representation Limits of representationLimits of representation

External representationExternal representation Binary, octal, decimal, hexadecimal number systemsBinary, octal, decimal, hexadecimal number systems

Page 2: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution
Page 3: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

TermsTerms CPUCPU: Central Processing Unit: Central Processing Unit ALUALU: Arithmetic/Logic Unit: Arithmetic/Logic Unit MemoryMemory: storage for data and programs (separate : storage for data and programs (separate

from CPU)from CPU) RegisterRegister: fast temporary storage inside the CPU: fast temporary storage inside the CPU BusBus: parallel "wires" for transferring a set of : parallel "wires" for transferring a set of

electrical signals simultaneouslyelectrical signals simultaneously InternalInternal: Transfers signals among CPU components: Transfers signals among CPU components ControlControl: Carries signals for memory and I/O operations: Carries signals for memory and I/O operations AddressAddress: Links to specific memory locations: Links to specific memory locations DataData: Carries data CPU : Carries data CPU memory memory

MicroprogramMicroprogram: sequence of micro-instructions : sequence of micro-instructions required to execute a machine instructionrequired to execute a machine instruction

CacheCache: temporary storage for faster access: temporary storage for faster access Note: caching takes place at many levels in a computer Note: caching takes place at many levels in a computer

systemsystem

Page 4: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

RegistersRegisters General/TemporaryGeneral/Temporary: fast local memory inside the : fast local memory inside the

CPUCPU one type of one type of cachecache

ControlControl: dictates current state of the machine: dictates current state of the machine StatusStatus: indicates error conditions: indicates error conditions IRIR: Instruction Register (holds current instruction): Instruction Register (holds current instruction) IPIP: Instruction Pointer (holds memory address of : Instruction Pointer (holds memory address of

next instruction)next instruction) MARMAR: Memory Address Register (holds address of : Memory Address Register (holds address of

memory location currently referenced)memory location currently referenced) MDRMDR: Memory Data Register: holds data being set : Memory Data Register: holds data being set

to or retrieved from the memory address in the to or retrieved from the memory address in the MARMAR

Page 5: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Machine instructionsMachine instructions

Each computer architecture provides a set Each computer architecture provides a set of machine-level instructionsof machine-level instructions Instruction Set Architecture (Instruction Set Architecture (ISAISA)) Specific to one particular architectureSpecific to one particular architecture

Like Like everythingeverything inside a computer, inside a computer, machine instructionsmachine instructions are implemented are implemented electricallyelectrically Micro-instructions set the switches in the Micro-instructions set the switches in the

control registercontrol register

Page 6: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution
Page 7: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Hypothetical CISC* machineHypothetical CISC* machine Shows hardware componentsShows hardware components

Does not show digital logic level or Does not show digital logic level or microprograms.microprograms.

Shows how machine-level instructions Shows how machine-level instructions can be stored and executed.can be stored and executed.

IllustratesIllustrates Finite-state machineFinite-state machine *CISC*CISC

Complex Instruction Set ComputerComplex Instruction Set Computer VonNeumann architectureVonNeumann architecture Instruction execution cycleInstruction execution cycle

Page 8: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Real computers …Real computers …

Use the “stored program” conceptUse the “stored program” concept VonNeumannVonNeumann architecture architecture

Program is Program is stored in memorystored in memory, and is , and is executed under the control of the operating executed under the control of the operating systemsystem

Operate using an Operate using an Instruction Instruction Execution CycleExecution Cycle

Page 9: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Instruction Execution CycleInstruction Execution Cycle1.1. Fetch next instruction (at address in IP) into Fetch next instruction (at address in IP) into

IR.IR.

2.2. Increment IP to point to next instruction.Increment IP to point to next instruction.

3.3. Decode instruction in IRDecode instruction in IR

4.4. If instruction requires memory access, If instruction requires memory access, A.A. Determine memory address.Determine memory address.

B.B. Fetch operand from memory into a CPU register, Fetch operand from memory into a CPU register, or send operand from a CPU register to memory.or send operand from a CPU register to memory.

5.5. Execute micro-program for instructionExecute micro-program for instruction

6.6. Go to step 1.Go to step 1.

Note: default execution is sequentialNote: default execution is sequential

Page 10: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Example CISC InstructionExample CISC InstructionADDADD R1, mem1R1, mem1

;(Add contents of memory location ;(Add contents of memory location mem1mem1 to register to register R1R1))

1.1. Copy Copy contents of R1contents of R1 to to ALU Operand_1ALU Operand_1

2.2. Move Move address of mem1address of mem1 to to MARMAR

3.3. Signal memory Signal memory fetchfetch (gets (gets contents of memory contents of memory addressaddress currently incurrently in MAR MAR into into MDRMDR))

4.4. Copy contents of Copy contents of MDRMDR into into ALU Operand_2ALU Operand_2

5.5. Signal Signal ALUALU additionaddition

6.6. Check Status RegisterCheck Status Register

7.7. Copy contents of Copy contents of ALU ResultALU Result to to R1R1

Example Example ADDADD Microprogram Microprogram(each microinstruction executes in one clock (each microinstruction executes in one clock

cycle)cycle)

Page 11: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Improving CISCImproving CISC CISC speed (and convenience) is CISC speed (and convenience) is

increased byincreased by more efficient microprogramsmore efficient microprograms more powerful ISA level instructionsmore powerful ISA level instructions cache memorycache memory more registersmore registers wider buseswider buses making it smallermaking it smaller more processorsmore processors floating point instructionsfloating point instructions Etc.Etc.

Page 12: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Clock CyclesClock Cycles

So how “slow” is this?So how “slow” is this? It isn’t slowIt isn’t slow Execution near light-speedExecution near light-speed

Clock cycle length determines CPU Clock cycle length determines CPU speedspeed (mostly)(mostly)

Page 13: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Limitations of CISCLimitations of CISC

Improving a specific architecture Improving a specific architecture requires instructions to be backward requires instructions to be backward compatible.compatible.

So … how about a different So … how about a different architecture?architecture?

Page 14: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

RISC machinesRISC machinesReduced Instruction Set ComputerReduced Instruction Set Computer

Much smaller set of instructions at ISA levelMuch smaller set of instructions at ISA level Instructions are like CISC micro-instructionsInstructions are like CISC micro-instructions

RISC assembly level programs look much RISC assembly level programs look much longer (more instructions) than CISC longer (more instructions) than CISC assembly level programs, but they execute assembly level programs, but they execute faster. Why?faster. Why?

Page 15: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

RISC design principlesRISC design principles Instructions executed directly by Instructions executed directly by

hardware (no microprograms).hardware (no microprograms). Maximize rate of fetching instructions.Maximize rate of fetching instructions.

Instruction cacheInstruction cache Instructions easy to decodeInstructions easy to decode

Fetching operands, etc.Fetching operands, etc. Only LOAD and STORE instructions Only LOAD and STORE instructions

reference memory.reference memory. Plenty of registersPlenty of registers

Page 16: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

More speed improvementMore speed improvement

Minimize memory and I/O accessesMinimize memory and I/O accesses CacheCache Separate I/O unit (buffers/processing)Separate I/O unit (buffers/processing) Separate network communication unit Separate network communication unit

(NIC)(NIC) Etc.Etc.

Parallel processingParallel processing

Page 17: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Parallelism (overview)Parallelism (overview)

Instruction-level parallelismInstruction-level parallelism pipelinepipeline cachecache

Processor-level parallelismProcessor-level parallelism multiprocessor (multiple CPUs, common multiprocessor (multiple CPUs, common

memory)memory) multicomputer (multiple CPUs, each with own multicomputer (multiple CPUs, each with own

memory)memory)

Page 18: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

PipeliningPipelining

Page 19: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Instruction CachingInstruction Caching

Hardware provides area for multiple Hardware provides area for multiple instructions in the CPUinstructions in the CPU Reduces number of memory accessesReduces number of memory accesses Instructions are available for immediate Instructions are available for immediate

executionexecution Might cause problems with decision, Might cause problems with decision,

repetition, and procedure structures in repetition, and procedure structures in programsprograms

Page 20: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Multiprocessor (shared Multiprocessor (shared memory)memory)

Page 21: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Multicomputer (distributed Multicomputer (distributed memory)memory)

Page 22: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

ComparisonsComparisons Cache and PipeliningCache and Pipelining

Implemented in hardwareImplemented in hardware MultiprocessorMultiprocessor

Difficult to buildDifficult to build Relatively easy to programRelatively easy to program

MulticomputerMulticomputer Easy to build (given networking Easy to build (given networking

technology)technology) Extremely difficult to programExtremely difficult to program

Page 23: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Other types of parallelismOther types of parallelism

Hybrid systemsHybrid systems Scalable architecturesScalable architectures

Add more processors (nodes), without Add more processors (nodes), without having to re-invent the systemhaving to re-invent the system

Simulated parallelismSimulated parallelism

Page 24: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Applications of ParallelismApplications of Parallelism

Multi-user systemsMulti-user systems NetworksNetworks InternetInternet

Speed up single processesSpeed up single processes Chess exampleChess example Expert systemsExpert systems Other AI applicationsOther AI applications

Page 25: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

ParallelismParallelism … … more latermore later

Internal representationInternal representation DataData InstructionsInstructions Addresses Addresses

Page 26: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Internal representationInternal representation Just like everything else in a computer, the Just like everything else in a computer, the

representation of numbers is implemented representation of numbers is implemented electricallyelectrically

switches set to switches set to offoff or or onon with open/closed with open/closed gatesgates..

There are two There are two statesstates for each gate for each gate The binary number system uses two The binary number system uses two digitsdigits ( (00

and and 11)) In order to simplify discussion, we use the In order to simplify discussion, we use the

standard shorthand to transcribe the standard shorthand to transcribe the computer representation:computer representation:

offoff is written as digit is written as digit 00 onon is written as digit is written as digit 11

Page 27: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

External representationExternal representation Use the binary number system to Use the binary number system to

represent numeric values electrically.represent numeric values electrically. Switches (gates) are grouped into Switches (gates) are grouped into

bytesbytes, , wordswords, etc., to represent the , etc., to represent the digits of a binary number.digits of a binary number.

Note: The number of gates in a group Note: The number of gates in a group depends on the computer architecture depends on the computer architecture and the type of data represented. and the type of data represented. E.G.,E.G., For Intel-based architecturesFor Intel-based architectures

byte = 8-bits, word = 2 bytes (16 bits)byte = 8-bits, word = 2 bytes (16 bits) integers use 2, 4, 8, or 10 bytesintegers use 2, 4, 8, or 10 bytes

Page 28: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Binary number systemBinary number system has 2 digits: 0 and 1 (has 2 digits: 0 and 1 (bibinary diginary digitt)) has has placesplaces and and place valuesplace values determined by determined by

powers of 2.powers of 2. ((in theoryin theory) can ) can uniquelyuniquely represent any integer represent any integer

valuevalue A binary representation is just another way of A binary representation is just another way of

writing a number that we are accustomed to writing a number that we are accustomed to seeing in decimal form.seeing in decimal form.

((in practicein practice, inside the computer) , inside the computer) representation is finite representation is finite Representations with too many digits get chopped.Representations with too many digits get chopped.

Page 29: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Internal representationInternal representation Place values (right-to-left) are 2Place values (right-to-left) are 200,2,211,2,222,2,233,2,244, etc., etc. Bits are numbered (right-to-left) starting at 0Bits are numbered (right-to-left) starting at 0 Place value depends on number of "bits" defined Place value depends on number of "bits" defined

for the type.for the type. Example:Example:

A 16-bit integer might beA 16-bit integer might be ((redred is "on") is "on")

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 (bit numbers)

… transcribed by a human as 0000000010110010

To convert to its familiar decimal representation, just add up the place values of the places that are "on".

Page 30: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

0 0 0 0 0 0 0 0 1 0 1 1 0 0 1 00 0 0 0 0 0 0 0 1 0 1 1 0 0 1 0in decimal form:in decimal form:128 + 32 + 16 + 2 = 178128 + 32 + 16 + 2 = 178

How many different codes (integers) can be How many different codes (integers) can be represented using 16 bits? represented using 16 bits?

What is the largest (unsigned) integer that can be What is the largest (unsigned) integer that can be represented using 16 bits?represented using 16 bits?

What is the largest (unsigned) integer that can be What is the largest (unsigned) integer that can be represented using 32 bits?represented using 32 bits?

Prove that for n-bit representation, number of codes is Prove that for n-bit representation, number of codes is 22nn, largest unsigned integer is 2, largest unsigned integer is 2nn – 1, and largest – 1, and largest signed integer is 2signed integer is 2n-1n-1 - 1 - 1

221515

3276832768

221414

1638416384

221313

81928192

221212

40964096

221111

20482048

221010

10241024

2299

515122

2288

252566

2277

121288

2266

6464

2255

3232

2244

1616

2233

88

2222

44

2211

22

2200

11

Converting binary to decimal

Page 31: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Converting decimal to Converting decimal to binarybinary

Method 1:Method 1: Removing largest powers Removing largest powers of 2of 2

Method 2:Method 2: Successive division by 2Successive division by 2

Page 32: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Converting decimal to Converting decimal to binarybinary Example: Example: 157157

Method 1:Method 1: Removing largest powers of 2Removing largest powers of 2157 – 157 – 128128 = 29 = 2929 – 29 – 1616 = 13 = 1313 – 13 – 88 = 5 = 55 – 5 – 44 = 1 = 11 – 1 – 11 = 0 = 0 1 0 0 1 1 1 0 11 0 0 1 1 1 0 1

Method 2:Method 2: Successive division by 2Successive division by 2157 ÷ 2 =157 ÷ 2 = 78 R 78 R 1178 ÷ 2 =78 ÷ 2 = 39 R 39 R 0039 ÷ 2 =39 ÷ 2 = 19 R 19 R 1119 ÷ 2 =19 ÷ 2 = 9 R 9 R 119 ÷ 2 =9 ÷ 2 = 4 R 4 R 114 ÷ 2 =4 ÷ 2 = 2 R 2 R 002 ÷ 2 =2 ÷ 2 = 1 R 1 R 001 ÷ 2 =1 ÷ 2 = 0 R 0 R 11 1 0 0 1 1 1 0 11 0 0 1 1 1 0 1

Page 33: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Numeric representationNumeric representation

We will show (later) exactly how an We will show (later) exactly how an electrical operationelectrical operation can be performed on can be performed on two two electrical numeric representationselectrical numeric representations to to give an give an electrical resultelectrical result that is that is consistent consistent with the rules of arithmetic.with the rules of arithmetic.

Page 34: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

… … but not quite consistent but not quite consistent ……

Since the number of gates in each group Since the number of gates in each group (byte, word, etc.) is finite, computers can (byte, word, etc.) is finite, computers can represent numbers with represent numbers with finite precisionfinite precision only. only.

Example:Example: Suppose that signed integer data is represented Suppose that signed integer data is represented

using 16 gates. Then the largest integer that can using 16 gates. Then the largest integer that can be represented is 65535. What happens if we be represented is 65535. What happens if we add 1 ?add 1 ?

If necessary, representations are truncated; If necessary, representations are truncated; overflowoverflow / / underflowunderflow can occur, and the can occur, and the Status RegisterStatus Register will be set will be set

Page 35: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Representing negative Representing negative integersintegers

Must specify sizeMust specify size!! Specify Specify nn: number of bits (8, 16, 32, etc.): number of bits (8, 16, 32, etc.) There are 2There are 2nn possible "codes" possible "codes"

Separate the "codes" so that half of Separate the "codes" so that half of them represent negative numbers. them represent negative numbers. Note that exactly half of the codes have 1 Note that exactly half of the codes have 1

in the "leftmost" bit.)in the "leftmost" bit.)

Page 36: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Binary form of negative Binary form of negative numbersnumbers

Several methods, each with Several methods, each with disadvantages.disadvantages.

We will focus on We will focus on twos-complementtwos-complement form form For a negative number For a negative number x x ::

specify number of bitsspecify number of bits start with binary representation of |start with binary representation of |xx|| change every bit to its opposite, then add 1 change every bit to its opposite, then add 1

to the result.to the result.

Page 37: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Binary form of negative Binary form of negative numbersnumbers

Example: -13 in 16-bit twos-complementExample: -13 in 16-bit twos-complement |-13| = 13 = 0000000000001101|-13| = 13 = 0000000000001101 ones-complement is 1111111111110010ones-complement is 1111111111110010 add 1 to get 1111111111110011 = -13add 1 to get 1111111111110011 = -13

Note that -(-13) should give 13. Try it.Note that -(-13) should give 13. Try it.

Hexadecimal representation?Hexadecimal representation? Convert binary to hex in the usual wayConvert binary to hex in the usual way -13 = 1111111111110011 = FFF3 H = 0xfff3-13 = 1111111111110011 = FFF3 H = 0xfff3 Note: For byte, word, etc., if the first hex digit is Note: For byte, word, etc., if the first hex digit is

greater than or equal to 8, the value is negative.greater than or equal to 8, the value is negative. Convert negative binary to decimal?Convert negative binary to decimal?

Find twos complement, convert, and prepend a Find twos complement, convert, and prepend a minus sign.minus sign.

Page 38: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Signed numbers using 4-bit Signed numbers using 4-bit twos-complement formtwos-complement form

Notice that all of the negative numbers have Notice that all of the negative numbers have 11 in the leftmost bit. All of the non-negative in the leftmost bit. All of the non-negative numbers have numbers have 00 in the leftmost bit. in the leftmost bit. For this reason, the leftmost bit is called the For this reason, the leftmost bit is called the sign sign

bitbit Note: Nobody uses 4-bit representations Note: Nobody uses 4-bit representations

(“nibble”), but there’s not enough room to (“nibble”), but there’s not enough room to show 8-bit representations here.show 8-bit representations here. You can extend this diagram to 8-bit, 16-bit, etc.You can extend this diagram to 8-bit, 16-bit, etc.

-8-8 -7-7 -6-6 -5-5 -4-4 -3-3 -2-2 -1-1 00 11 22 33 44 55 66 77

10001000 10011001 10101010 10111011 11001100 11011101 11101110 11111111 00000000 00010001 00100010 00110011 01000100 01010101 01100110 01110111

Page 39: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

nn-bit twos-complement form-bit twos-complement form The 2The 2nn possible codes give possible codes give

all zeroall zero 22n-1n-1 - 1 positive numbers - 1 positive numbers 22n-1n-1 negative numbers negative numbers

Note: zero is its own complementNote: zero is its own complement Note: there is one “weird” numberNote: there is one “weird” number

01111111 + 1 = 1000000001111111 + 1 = 10000000 127 + 1 = -128127 + 1 = -128

(inconsistent with rules of arithmetic)(inconsistent with rules of arithmetic) 127 is the largest number that can be 127 is the largest number that can be

represented in 8 bits. This means that -(-128) represented in 8 bits. This means that -(-128) cannotcannot be represented with 8 bits. be represented with 8 bits.

i.e., the 2's-complement of 10000000 is 10000000i.e., the 2's-complement of 10000000 is 10000000

Page 40: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Signed or Unsigned?Signed or Unsigned?

A 16-bit representation could be used for signed A 16-bit representation could be used for signed or unsigned numbersor unsigned numbers 16-bit 16-bit signedsigned range is -32768 .. +32767 range is -32768 .. +32767 16-bit 16-bit unsignedunsigned range is 0 .. 65535 range is 0 .. 65535

Both forms use the same 2Both forms use the same 21616 codes codes

Example:Example: 1010101010101010 1010101010101010 unsignedunsigned is 43690 decimal is 43690 decimal 1010101010101010 1010101010101010 signedsigned is -21846 is -21846

Programmer must tell the computer which form is Programmer must tell the computer which form is being used. being used.

Page 41: Today’s topics Architecture overview Architecture overview Machine instructions Machine instructions Instruction Execution Cycle Instruction Execution

Other representationsOther representations Every integer number has a unique Every integer number has a unique

representation in each "base" representation in each "base" 2 2 HexadecimalHexadecimal is commonly used for is commonly used for

easily converting binary to a more easily converting binary to a more manageable form.manageable form.

example 16-bit binary example 16-bit binary hexadecimal: hexadecimal:BinaryBinary 0001 0111 1011 1101 0001 0111 1011 1101

Hexadecimal 1 7 B DHexadecimal 1 7 B D

Write it as 0x17BD or 17BDhWrite it as 0x17BD or 17BDh

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Questions?Questions?

Read Irvine Chapter 17.1Read Irvine Chapter 17.1