today… homework #4 due today. lab 4 – microarchitecture due friday. microarch430.exe – rev...
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Stacks / Interrupts 1
Today…
Homework #4 due today. Lab 4 – Microarchitecture due Friday.
microArch430.exe – Rev 2.1a Download from website Report any problems
Questions?
BYU CS 224
Stacks / Interrupts 2
Memory
BYU CS 224
Addressing Modes
Registers
Address Bus
Data Bus (+1 cycle)
Data Bus (+1 cycle)
CPU
ADDER
01 w/R0 = Symbolic Mode
cnt
add.w cnt,r10 ; r10 += M[cnt]
0x000c
PCPCPC
PC
R10
IRData Bus (1
cycle)0x501
a0x501a PC
ALU
Address
Bus
+2+2
*Also called PC Relative address mode
BYU CS 224 Stacks / Interrupts 3
Source: Symbolic Mode – label
PC
PC
PC
PC incremented
at end of phase
Evaluate Source Operand
Use PC to obtain relative index and for base register
Stacks / Interrupts 4
PCPCPCPC
BYU CS 224
Quiz 2.2.5Present the destination operand of the following instruction to the ALU: add.w r4,cnt ; M[cnt] += r4
cnt
Memory
Registers
CPU
ADDER
IR
PC
ALU
0x5480
R40x021
8
0x5480
Stacks / Interrupts 5
0x0218
0x5480
PCPCPCPC
BYU CS 224
Quiz 2.2.5 (solution)Present the destination operand of the following instruction to the ALU: add.w r4,cnt ; M[cnt] += r4
cnt
Memory
Registers
CPU
ADDER
IR
PC
ALU
Address
Bus
1. Put PC on Address Bus
Data Bus (+1 cycle)
2. Present ADDER Op1 w/Data Bus
PC
3. Present ADDER OP2 w/PC
Address Bus
4. Put ADDER on Address Bus
Data Bus (+1 cycle)
5. Load ALU OP2 from Data Bus
+2
6. Increment PC by 2
PC R4
0x5480
BYU CS 224 Stacks / Interrupts 6
Quiz 2.2.6Show how to retrieve a PC-relative destination operand from memory and present to the ALU:
BYU CS 224 Stacks / Interrupts 7
Quiz 2.2.6 (solution)
PC
PC
PC
Show how to retrieve a PC-relative destination operand from memory and present to the ALU:
Stacks / Interrupts 8
Memory
BYU CS 224
Addressing Modes
Registers
CPU
ADDER
Execute Phase: jne func
jne func ; pc += sext(IR[9:0]) << 1
PCPC R2
IRData Bus (1
cycle)0x3c2
a
Address Bus
PC0x3c2
1
ALU
+2
SEXT[9:0]<<1
func
CONDJump Next
BYU CS 224 Stacks / Interrupts 9
Execute Phase: JumpExecute Cycle
PC
2’s complement, sign-extended
Select “COND” to conditionally change PC
Stacks / InterruptsBYU CS 224
How Can This Be True?
13
5
13
5
?
10
S05: Stacks / Interrupts
1996199819821995
Required: PM: Ch 7.4, pgs 95-96Wiki: Stack_(
data_structure)Recommended: Google "Activation Record"
(Read 1 article)
BYU CS 224 Stacks / Interrupts 12
CS 224
Chapter Lab HomeworkS00: Introduction
Unit 1: Digital Logic
S01: Data TypesS02: Digital Logic
L01: Warm-upL02: FSM
HW01HW02
Unit 2: ISA
S03: ISAS04: MicroarchitectureS05: Stacks / InterruptsS06: Assembly
L03: BlinkyL04: MicroarchL05b: Traffic LightL06a: Morse Code
HW03HW04HW05HW06
Unit 3: C
S07: C LanguageS08: PointersS09: StructsS10: I/O
L07b: Morse IIL08a: LifeL09b: Snake
HW07HW08HW09HW10
Stacks / Interrupts 13BYU CS 224
Learning Outcomes…
The Stack Subroutines Subroutine Linkage Saving Registers Stack Operations Activation Records Recursive Subroutines Interrupt Stack Usage
Stacks / Interrupts 14BYU CS 224
Terms…
Activation Record – parameters activated on the stack by a subroutine call
Callee-Safe – subroutine saves registers used. Caller-Safe – caller saves registers needing to be saved. Interrupt – asynchronous subroutine call. LIFO – Last In First Out, a stack. Loosely Coupled – all parameters passed as arguments. Pop – removing top element of stack. Push – putting an element on a stack Stack – first in, first out abstract storage data structure. Stack Pointer – address of stack. Stong Cohesion – subroutine performs one specific task. Subroutine – synchronous task or unit.
Stacks / Interrupts 15BYU CS 224
Levels of Transformation
Problems
Algorithms
Language (Program)
Machine (ISA) Architecture
Microarchitecture
Circuits
Devices
Programmable
Computer Specific
Manufacturer Specific
Stacks / Interrupts 16BYU CS 224
Stacks
Stacks are the fundamental data structure of computers today.
A stack is a Last In, First Out (LIFO) abstract data structure.
A true stack is a restricted data structure with two fundamental operations, namely push and pop.
Elements are removed from a stack in the reverse order of their addition.
Memory stacks are used for random access of local variables.
The Stack
Stacks / Interrupts 17BYU CS 224
MSP430 Stack
Hardware support for stack Register R1 – Stack Pointer (SP) Initialized to highest address of available RAM
MSP430G2553 0x0400 (512 bytes) MSP430F2274 0x0600 (1k bytes)
Stack grows down towards lower memory addresses. Initialize stack pointer at beginning of program
STACK .equ 0x0400 ; top of stack
start: mov.w #STACK,SP ; init stack pointer
The Stack
Stacks / Interrupts 18BYU CS 224
MSP430 Stack
The MSP430 stack is a word structure Elements of the stack are 16-bit words. The LSB of the Stack Pointer (SP) is always 0. The SP points to the last word added to the stack (TOS).
The stack pointer is used by PUSH – push a value on the stack POP – pop a value off the stack CALL – push a return address on the stack RET – pop a return address off the stack RETI – pop a return address and status register
off the stack (Chapter 6) Interrupts – push a return address and status register
on the stack (Chapter 6)
The Stack
Stacks / Interrupts 19BYU CS 224
Computer Memory – Up or Down?x0000
xFFFF
Up
Down
xFFFF
x0000
Down
Up
The Stack
1996199819821995
Unlike a coin stack, a memorystack DOES NOT move theData in memory, just thepointer to the top of stack.
Stack
TOS
Stacks / Interrupts 20BYU CS 224
Quiz 2.3.1
List the values found in the stack and the value of the stack pointer after each instruction.
Push #0x0018 Push #0x0025Push #0x0058
Pop R15 Push #0036
0x0282
0x0280
0x027E
0x027C
0x027A
0x0278
x0280R1
TOP
Instructions:
Stacks / Interrupts 21BYU CS 224
Quiz 2.3.1 (solution)
List the values found in the stack and the value of the stack pointer after each instruction.
Push #0x0018 Push #0x0025Push #0x0058
Pop R15 Push #0036
0280R1
TOP
027E
0018 TOP
027A
0018
0025
0058 TOP
027C
00180025
0058
TOP
027A
00180025
0036 TOP
0x0282
0x0280
0x027E
0x027C
0x027A
0x0278
Instructions:
Stacks / Interrupts 22BYU CS 224
Subroutines
A subroutine is a program fragment that performs some useful function. Subroutines help to organize a program. Subroutines should have strong cohesion – perform
only one specific task. Subroutines should be loosely coupled – interfaced
only through parameters (where possible) and be independent of the remaining code.
Subroutines keep the program smaller Smaller programs are easier to maintain. Reduces development costs while increasing reliability. Fewer bugs – copying code repeats bugs.
Subroutines are often collected into libraries.
Subroutines
Stacks / Interrupts 23BYU CS 224
The Call / Return MechanismSubroutines
Smaller programs.Easier to maintain.Reduces development costs.Increased reliability.Fewer bugs do to copying code.More library friendly.
Faster programs.Less overhead.
Stacks / Interrupts 24BYU CS 224
Subroutine Linkage
A subroutine is “called” in assembly using the MSP430 CALL instruction.
The address of the next instruction after the subroutine call is saved by the processor on the stack.
Parameters are passed to the subroutine in registers and/or on the stack.
Local variables are created on the stack at the beginning of the subroutine and popped from the stack just before returning from the subroutine.
At the end of a subroutine, a RET instruction “pops” the top value from the stack into the program counter.
Subroutine Linkage
Stacks / Interrupts 25BYU CS 224
Stack Operations
Single operand instructions:
Emulated instructions:
Mnemonic Operation DescriptionPUSH(.B or .W) src SP-2SP, src@SP Push byte/word source on stack
CALL dst dsttmp ,SP-2SP, PC@SP, tmpPC
Subroutine call to destination
RETI TOSSR, SP+2SPTOSPC, SP+2SP
Return from interrupt
Mnemonic Operation Emulation DescriptionRET @SPPC
SP+2SPMOV @SP+,PC Return from subroutine
POP(.B or .W) dst @SPtempSP+2SPtempdst
MOV(.B or .W) @SP+,dst Pop byte/word from stack to destination
Subroutine Linkage
Stacks / Interrupts 26BYU CS 224
Quiz 2.3.2
1. What is the value of the stack pointer after the second call to delay?
2. Is there a problem with the program?
start: mov.w #0x0400,SPmov.w #WDTPW+WDTHOLD,&WDTCTLbis.b #0x01,&P1DIR ; P1.0 as output
mainloop: bis.b #0x01,&P1OUT ; turn on LEDpush #1000call #delaybic.b #0x01,&P1OUT ; turn off ledcall #delayjmp mainloop
delay: mov.w 2(sp),r15 ; get delay counter
delaylp2: sub.w #1,r15 ; delay over? jnz delaylp2 ; nret ; y
.sect ".reset" ; reset Vector
.word start ; start address
.end
Stacks / Interrupts 27BYU CS 224
Quiz 2.3.2 (solution)
1. What is the value of the stack pointer after the second call to delay?
2. Is there a problem with the program?
start: mov.w #0x0400,SPmov.w #WDTPW+WDTHOLD,&WDTCTLbis.b #0x01,&P1DIR ; P1.0 as output
mainloop: bis.b #0x01,&P1OUT ; turn on LEDpush #1000call #delaybic.b #0x01,&P1OUT ; turn off ledcall #delayjmp mainloop
delay: mov.w 2(sp),r15 ; get delay counter
delaylp2: sub.w #1,r15 ; delay over? jnz delaylp2 ; nret ; y
.sect ".reset" ; reset Vector
.word start ; start address
.end
...
0400
03fe
03fc
03fa
03f0
...
R1→ 1000
Yes! Stack Overflow.
R1→Returnaddress
Stacks / Interrupts 28
func
Memory
BYU CS 224
Call
Registers
CPU
Call Instruction
call #func ; M(--sp) = PC; PC = M(func)
PCPCPC
IRData Bus (1
cycle)0x12b0
0x12b0
fffe
(+1 cycle)
SP
Address Bus
SP
0x4130
Data Bus (+1 cycle)
Data Bus (+1 cycle)
(+1 c
ycle
)PC
ALU
ADDER
PCSP0x801
e
Address
Bus
+2+2
Stacks / Interrupts 29BYU CS 224
Subroutine Call
CALL Subroutine Syntax CALL dst Operation dst tmp
(SP−2) SPPC @SPtmp PC
Description A subroutine call is made to an address anywhere in the 64K address space. All addressing modes can be used. The return address (the address of the
following instruction) is stored on the stack. The call instruction is a word instruction.
Status Bits Status bits are not affected. Example
Subroutine Linkage
Stacks / Interrupts 30BYU CS 224
CALL Examples
CALL #EXEC ; Call on label EXEC or immediate address (e.g. #0A4h); @PC+ → tmp, SP−2 → SP, PC → @SP, tmp → PC
CALL EXEC ; Call on the address contained in EXEC; X(PC)→tmp, PC+2→PC, SP−2→SP, PC→@SP,
tmp→PC CALL &EXEC ; Call on the address contained in absolute address EXEC
; X(0)→tmp, PC+2→PC, SP−2→SP, PC→@SP, tmp→PC CALL R5 ; Call on the address contained in R5
; R5→tmp, SP−2→SP, PC→@SP, tmp→PC CALL @R5 ; Call on the address contained in the word pointed to by
R5; @R5→tmp, SP−2→SP, PC→@SP, tmp→PC
CALL @R5+ ; Call on the address contained in the word pointed to by R5 ; and increment pointer in R5.
; @R5+→tmp, SP−2→SP, PC→@SP, tmp→PC CALL X(R5) ; Call on the address contained in the address pointed to
by ; R5 + X (e.g. table with address starting at X); X can be an address or a label; X(R5)→tmp, PC+2→PC, SP−2→SP, PC→@SP,
tmp→PC
Subroutine Linkage
Stacks / Interrupts 31BYU CS 224
Caution…
The destination of branches and calls is used indirectly, and this means the content of the destination is used as the address.
Errors occur often when confusing symbolic and absolute modes:
CALL MAIN ; Subroutine’s address is stored in MAIN
CALL #MAIN ; Subroutine starts at address MAIN The real behavior is easily seen when looking to the
branch instruction. It is an emulated instruction using the MOV instruction:
BR MAIN ; Emulated instruction BR MOV MAIN,PC ; Emulation by MOV instruction
The addressing for the CALL instruction is exactly the same as for the BR instruction.
Subroutine Linkage
Stacks / Interrupts 32
Memory
BYU CS 224
Return
Registers
ALU
CPU
ADDER
Return Instruction
ret ; mov.w @sp+,PC
0x801e
PC
IR0x12b0
0002
SP
Address Bus
(+1 c
ycle
)
Data Bus (+1
cycle)
0x4130
Dat
a Bus
(+1
cycle)
0x4130
PCPCPC
Address
Bus
SPSP
PCSPPC
+2
Stacks / Interrupts 33BYU CS 224
Return from Subroutine
RET Return from subroutine Syntax RET Operation @SP→ PC
SP + 2 → SP Emulation MOV @SP+,PC Description The return address pushed onto the stack by a
CALL instruction is moved to the program counter. The program continues at the code address following
the subroutine call. Status Bits Status bits are not affected. Example
Subroutine Linkage
Stacks / Interrupts 34BYU CS 224
Saving and Restoring Registers
Called routine -- “callee-save” At beginning of subroutine, save all registers that will be
altered (unless a register is used to return a value to the calling program or is a scratch register!)
Before returning, restore saved registers in reverse order. Or, avoid using registers altogether.
Calling routine -- “caller-save” If registers need to be preserved across subroutine calls,
the calling program would save those registers before calling routine and restore upon returning from routine.
Obviously, avoiding the use of registers altogether would be considered caller-safe.
Values are saved by storing them in memory, preferably on the stack.
Saving Registers
Stacks / Interrupts 35BYU CS 224
Caller-Save vs. Callee-Save
call subroutine
Save Registers
subroutine
Restore Registers
call subroutine subroutine
Save Registers
Restore Registers
Saving Registers
Stacks / Interrupts 36BYU CS 224
Quiz 2.3.3
loop: xor.b #0x01,&P4OUT ; toggle LED call #myDelay ; delay some jmp loop ; repeat
myDelay: mov.w #0,r15 call #delay call #delay
delay: sub.w #1,r15 jne delay ret
1. What is wrong (if anything) with the following code?
2. How many times will delay execute for each loop?
3. How long will myDelay delay?
4. Is myDelay callee-save?
Stacks / Interrupts 37BYU CS 224
Quiz 2.3.3 (answers)
1. What is wrong (if anything) with the following code?
2. How many times will delay execute for each loop?
3. How long will myDelay delay?
4. Is myDelay callee-save?
loop: xor.b #0x01,&P4OUT ; toggle LED call #myDelay ; delay some jmp loop ; repeat
myDelay: mov.w #0,r15 call #delay call #delay
delay: sub.w #1,r15 jne delay ret
No, it’s a tail.3 times.
3 65536 3 cycles. No.
Stacks / Interrupts 38BYU CS 224
Stack Operations
Single operand instructions:
Emulated instructions:
Mnemonic Operation DescriptionPUSH(.B or .W) src SP-2SP, src@SP Push byte/word source on stack
CALL dst dsttmp ,SP-2SP, PC@SP, tmpPC
Subroutine call to destination
RETI TOSSR, SP+2SPTOSPC, SP+2SP
Return from interrupt
Mnemonic Operation Emulation DescriptionRET @SPPC
SP+2SPMOV @SP+,PC Return from subroutine
POP(.B or .W) dst @SPtempSP+2SPtempdst
MOV(.B or .W) @SP+,dst Pop byte/word from stack to destination
Stack Operations
Stacks / Interrupts 39
SP
r15r14
0xf826SP
BYU CS 224
Stack OperationsSubroutine Linkage
0xf820: ...0xf822: call #subroutine0xf826: ...
subroutine:0xf852: push r150xf854: push r14
...
0xf882: pop r140xf884: pop r150xf886: ret
0400:
03fe:
03fc:
03fa:
03f8:
03f6:
03f4:
03f2:
Unprotected!
0xf826 SPr15
0xf826SP
r15r14
0xf826 SPr15
r14
0xf826SP
r14r15
0xf826
SP
r14r15
0xf826
SP
Stacks / Interrupts 40BYU CS 224
Activation Records
A subroutine is activated when called and an activation record is allocated (pushed) on the stack.
An activation record is a template of the relative positions of local variables on the stack as defined by the subroutine.
Return address Memory for local subroutine variables Parameters passed to subroutine from caller Saved registers used in subroutine (callee-save)
A new activation record is created on the stack for each invocation of a subroutine or function.
A frame pointer indicates the start of the activation record. When the subroutine ends and returns control to the
caller, the activation record is discarded (popped).
Activation Records
Stacks / Interrupts 41BYU CS 224
.cdecls C,"msp430.h" ; MSP430DELAY .equ (50/8)
.text ; beginning of codereset: mov.w #0x0400,SP ; init stack pointer mov.w #WDTPW+WDTHOLD,&WDTCTL ; stop WDT bis.b #0x01,&P1DIR ; set P1.0 as output
mainloop: xor.b #0x01,&P1OUT ; toggle P1.0 push.w #DELAY ; pass delay count on stack call #delay ; call delay subroutine jmp mainloop
; delay subroutine: stack usage 4| DELAY | \; 2| ret | subroutine frame (6 bytes); (SP) => 0| r15 | /delay: push.w r15 ; callee-save mov.w #0,r15 ; use R15 as inner counter
delay02: sub.w #1,r15 ; inner delay over? jne delay02 ; n sub.w #1,4(SP) ; y, outer done? jne delay02 ; n pop.w r15 ; y, restore register(s) mov.w @SP+,0(SP) ; pop input delay count ret ; return from subroutine
.sect ".reset" ; MSP430 reset Vector .word reset ; start address .end
Activation Record Example
Delay Activation Record: 4(SP) = delay count 2(SP) = return address 0(SP) = r15
Activation Records
Stack: 2(SP) = delay count 0(SP) = return address
Stack: 0(SP) = return address
Stack: (emply)
Stacks / Interrupts 42BYU CS 224
Quiz 2.3.4Change the following code to use a callee-save, loosely coupled, cohesive subroutine..cdecls C,"msp430.h".text
start: mov.w #0x0400,SPmov.w #WDTPW+WDTHOLD,&WDTCTLbis.b #0x01,&P1DIR ; P1.0 as output
mainloop: bis.b #0x01,&P1OUT ; turn on LEDmov.w #10000,r15 ; delay counter
delaylp1: sub.w #1,r15 ; delay over? jnz delaylp1 ; nbic.b #0x01,&P1OUT ; turn off ledmov.w #0,r15 ; delay counter
delaylp2: sub.w #1,r15 ; delay over? jnz delaylp2 ; nmov.w #0,r15 ; delay counter
delaylp3: sub.w #1,r15 ; delay over? jnz delaylp3 ; njmp mainloop ; y, toggle led
.sect ".reset" ; reset vector
.word start ; start address
.end
Stacks / Interrupts 43BYU CS 224
Quiz 2.3.4 (solution)Change the following code to use a callee-save, loosely coupled, cohesive subroutine.
.cdecls C,"msp430.h"
.textstart: mov.w #0x0400,SP
mov.w #WDTPW+WDTHOLD,&WDTCTLbis.b #0x01,&P1DIR ; P1.0 as output
mainloop: bis.b #0x01,&P1OUT ; turn on LEDmov.w #10000,r15 ; delay countercall #delaybic.b #0x01,&P1OUT ; turn off ledmov.w #0,r15 ; delay countercall #delaycall #delayjmp mainloop ; y, toggle led
delay: push r15 ; callee save
delaylp1: sub.w #1,r15 ; delay over? jnz delaylp1 ; npop r15 ; y, restore r15ret
.sect ".reset" ; reset vector
.word start ; start address
.end
.cdecls C,"msp430.h"
.textstart: mov.w #0x0400,SP
mov.w #WDTPW+WDTHOLD,&WDTCTLbis.b #0x01,&P1DIR ; P1.0 as output
mainloop: bis.b #0x01,&P1OUT ; turn on LEDmov.w #10000,r15 ; delay counter
delaylp1: sub.w #1,r15 ; delay over? jnz delaylp1 ; nbic.b #0x01,&P1OUT ; turn off ledmov.w #0,r15 ; delay counter
delaylp2: sub.w #1,r15 ; delay over? jnz delaylp2 ; nmov.w #0,r15 ; delay counter
delaylp3: sub.w #1,r15 ; delay over? jnz delaylp3 ; njmp mainloop ; y, toggle led
.sect ".reset" ; reset vector
.word start ; start address
.end
Callee-save
Loosely coupled
Cohesive (delays)
Stacks / Interrupts 44BYU CS 224
Recursive Subroutine
A subroutine that makes a call to itself is said to be a recursive subroutine.
Recursion allows direct implementation of functions defined by mathematical induction and recursive divide and conquer algorithms
Factorial, Fibonacci, summation, data analysis Tree traversal, binary search
Recursion solves a big problem by solving one or more smaller problems, and using the solutions of the smaller problems, to solve the bigger problem.
Reduces duplication of code. MUST USE STACK!
Recursive Subroutines
Stacks / Interrupts 45BYU CS 224
Interrupts
Execution of a program normally proceeds predictably, with interrupts being the exception.
An interrupt is an asynchronous signal indicating something needs attention. Some event has occurred Some event has completed
The processing of an interrupt subroutine uses the stack. Processor stops with it is doing, stores enough information on the stack to later resume, executes an interrupt service routine (ISR), restores saved information from stack (RETI), and then resumes execution at the point where the
processor was executing before the interrupt.
Interrupts
Stacks / Interrupts 46BYU CS 224
Stacks / Interrupts 47BYU CS 224
Interrupt StackInterrupts
Execute Interrupt Service Routine (ISR)
Item 2Item 1
Prior to InterruptSPadd.w r4,r7 jnc $+4add.w #1,r6
add.w r5,r6
PC
Interrupt (hardware) Program Counter pushed on stack Status Register pushed on stack Interrupt vector moved to PC Further interrupts disabled Interrupt flag cleared
SRPC
Item 2Item 1
SP xor.b #1,&P1OUTreti
PC
Return from Interrupt (reti) Status Register popped from stack Program Counter popped from stackSR
PCItem 2Item 1
SPadd.w r4,r7 jnc $+4add.w #1,r6
add.w r5,r6
PC
Stacks / Interrupts 48BYU CS 224
Implementing Stacks in Memory
Unlike a coin stack, in a memory stack, the data does not move in memory, just the pointer to the top of stack.
/ / / /
/ / / /
/ / / /
/ / / /
/ / / /
TOP
Current SP
X0280 R1
x0282
x0280
x027E
x027C
x027A
/ / / /
/ / / /
#18
/ / / /
/ / / /
TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027E R1
Push #0x0018
/ / / /
/ / / /
#18
#25
#58
TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027C R1
Pop R15
#58 -> R15
/ / / /
/ / / /
#18
#25
#58 TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027A R1
Push #0x0025Push #0x0058
/ / / /
/ / / /
#18
#25
#36 TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027A R1
Push #0036
The Stack
Stacks / Interrupts 49BYU CS 224
Quiz 5.1
List the values found in the stack and the value of the stack pointer after each instruction.
/ / / /
/ / / /
/ / / /
/ / / /
/ / / /
TOP
Current SP
X0280 R1
x0282
x0280
x027E
x027C
x027A
/ / / /
/ / / /
#18
/ / / /
/ / / /
TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027E R1
Push #0x0018
/ / / /
/ / / /
#18
#25
#58
TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027C R1
Pop R15
#58 -> R15
/ / / /
/ / / /
#18
#25
#58 TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027A R1
Push #0x0025
Push #0x0058
/ / / /
/ / / /
#18
#25
#36 TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027A R1
Push #0036
The Stack
Stacks / Interrupts 50BYU CS 224
Implementing Stacks in Memory
Unlike a coin stack, in a memory stack, the data does not move in memory, just the pointer to the top of stack.
/ / / /
/ / / /
/ / / /
/ / / /
/ / / /
TOP
Current SP
X0280 R1
x0282
x0280
x027E
x027C
x027A
/ / / /
/ / / /
#18
/ / / /
/ / / /
TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027E R1
Push #0x0018
/ / / /
/ / / /
#18
#25
#58
TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027C R1
Pop R15
#58 -> R15
/ / / /
/ / / /
#18
#25
#58 TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027A R1
Push #0x0025Push #0x0058
/ / / /
/ / / /
#18
#25
#36 TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027A R1
Push #0036
The Stack
Stacks / Interrupts 51BYU CS 224
Quiz 5.1 (solution)
List the values found in the stack and the value of the stack pointer after each instruction.
/ / / /
/ / / /
/ / / /
/ / / /
/ / / /
TOP
Current SP
X0280 R1
x0282
x0280
x027E
x027C
x027A
/ / / /
/ / / /
#18
/ / / /
/ / / /
TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027E R1
/ / / /
/ / / /
#18
#25
#58
TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027C R1
/ / / /
/ / / /
#18
#25
#58 TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027A R1
/ / / /
/ / / /
#18
#25
#36 TOP
x0282
x0280
x027E
x027C
x027A
Current SP
x027A R1
The Stack
Push #0x0018 Push #0x0025
Push #0x0058
Pop R15 Push #0036
Stacks / Interrupts 52
Memory
BYU CS 224
Push
Registers
Address Bus
Data Bus (+1 cycle)
Data Bus (+1 cycle)
CPU
Push Instruction
cnt
push.w cnt ; M(--sp) = M(cnt)
0x000c
PCPCPC
IRData Bus (+1
cycle)0x1210
0x1210 PCPC
fffe
(+1 cycle)
Address Bus
SPSP
0xa5a5
Data Bus (+1 cycle)
0xa5a5 AL
U
ADDER
SP
+2
Address
Bus
+2
Stacks / Interrupts 53BYU CS 224
Push Operand
PUSH Push word or byte onto stack Syntax PUSH{.W or .B} src Operation SP − 2 → SP
src → @SP Description The stack pointer is decremented by two, then
the source operand is moved to the RAM word addressed by the stack pointer (TOS).
Status Bits Status bits are not affected. Example PUSH SR ; save SR
PUSH R8 ; save R8
PUSH.B &TCDAT ; save data at address
; TCDAT onto stack
Note: The system stack pointer (SP) is always decremented by two, independent of the byte suffix.
Stack Operations
Stacks / Interrupts 54BYU CS 224
Pop Operand
POP Pop word or byte from stack to destination Syntax POP{.W or .B} dst Operation @SP −> temp
SP + 2 −> SPtemp −> dst
Emulation MOV{.W or .B} @SP+,dst Description The stack location pointed to by the stack
pointer (TOS) is moved to the destination. The stack pointer is incremented by two afterwards.
Status Bits Status bits are not affected. Example POP R7 ; Restore R7
POP.B LEO ; The low byte of the stack is ; moved to LEO.
Note: The system stack pointer (SP) is always incremented by two, independent of the byte suffix.
Stack Operations
Stacks / Interrupts 55
Learning Objectives…
After discussing microarchitecture and studying the reading assignments, you should be able to:
Explain what a computer stack is. Describe how subroutines are used in computer programs. Program digital I/O using computer ports. Explain what an activation record is. Explain how a recursive program uses the stack. Explain the difference between clock cycles and instruction steps.
BYU CS 224