tms320dm355 evaluation module - spectrum digital inc
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TMS320DM355 Evaluation Module Technical Reference
509905-0001 Rev. E April 2008
SPECTRUM DIGITAL, INC.12502 Exchange Drive, Suite 440 Stafford, TX. 77477
Tel: 281.494.4505 Fax: [email protected] www.spectrumdigital.com
IMPORTANT NOTICE
Spectrum Digital, Inc. reserves the right to make changes to its products or to discontinue anyproduct or service without notice. Customers are advised to obtain the latest version of relevantinformation to verify that the data being relied on is current before placing orders.
Spectrum Digital, Inc. warrants performance of its products and related software to currentspecifications in accordance with Spectrum Digital’s standard warranty. Testing and other qualitycontrol techniques are utilized to the extent deemed necessary to support this warranty.
Please be aware that the products described herein are not intended for use in life-support appliances, devices, or systems. Spectrum Digital does not warrant nor is Spectrum Digital liable for the product described herein to be used in other than a development environment.
Spectrum Digital, Inc. assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does SpectrumDigital warrant or represent any license, either express or implied, is granted under any patent right,copyright, or other intellectual property right of Spectrum Digital, Inc. covering or relating to anycombination, machine, or process in which such Digital Signal Processing development products orservices might be or are used.
WARNING
This equipment is intended for use in a laboratory test environment only. It generates, uses, and canradiate radio frequency energy and has not been tested for compliance with the limits of computingdevices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonableprotection against radio frequency interference. Operation of this equipment in other environmentsmay cause interference with radio communications, in which case the user at his own expense will berequired to take whatever measures necessary to correct this interference.
Copyright © 2008 Spectrum Digital, Inc.
Contents
1 Introduction to the DM355 Evaluation Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 Provides you with a description of the DM355 Evaluation Module, key features, and block diagram. 1.1 Key Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Functional Overview of the DM355 EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 1.3 Basic Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 1.4 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 1.5 Configuration Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 1.6 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-62 Board Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 Describes the operation of the major board components on the DM355 Evaluation Module. 2.1 EMIF Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.1.1 Flash, NAND Flash, Ethernet Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.1.2 DDR2 Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.1.3 Memory Card Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.1.4 UART Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.1.5 USB Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 2.2 Input Video Port Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 2.2.1 On Chip Video Output DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 2.2.2 AIC33 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4 2.3 Ethernet Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.4 I2C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5 2.4.1 MSP430 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 2.5 Daughter Card Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 2.6 DM355 CPU Video Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 2.7 Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
3 Physical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 Describes the physical layout of the DM355 Evaluation Module and its connectors. 3.1 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 3.2 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5 3.2.1 J1, NTSC/PAL Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6 3.2.2 J2, Video In . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 3.2.3 J3, MSP430 JTAG Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 3.2.4 J4, Composite Video Out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 3.2.5 J5, USB Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 3.2.6 J6, 14 Pin External JTAG Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9 3.2.7 J8, ARM JTAG Emulation Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10 3.2.8 J9, USB Capacitance Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10 3.2.9 J10, USB ID Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11 3.2.10 J11, S-Video In . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11 3.2.11 J12, ATA/CE Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12 3.2.12 J16, +5 Volt Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13 3.2.13 J27, MMC/SD Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13 3.2.14 J28, MMC/SD Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14 3.2.15 J30, Imager Interface Connector 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15 3.2.16 J31, Imager Interface Connector 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16 3.2.17 P1, Microphone In . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16 3.2.18 P2, Headphone Out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-17 3.2.19 P3, Line Out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-17 3.2.20 P4, RS-232 UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-18 3.2.21 P5, Ethernet Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19 3.2.22 P6, Line In . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20 3.2.23 DC3, I/O Daughter Card Expansion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-21 3.2.24 DC5, TH8200 Daughter Card Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-22 3.2.25 DC6, Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-23 3.2.26 DC7, Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-23 3.2.27 U10, Infrared Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-24 3.3 LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-24 3.4 Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-25 3.4.1 SW1, EMU0/1 Select Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-25 3.4.2 SW5, Reset Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-26 3.4.3 SW6, User Readable 4 Position DIP Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-26 3.4.4 SW7, ARM Boot Mode Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-27 3.4.5 SW10 - SW14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-27 3.5 Test Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-28A Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1 Contains the schematics for the DM355 Evaluation ModuleB Mechanical Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1 Contains the mechanical information about the DM355 Evaluation Module
About This Manual
This document describes the board level operations of the DM355 Evaluation Module(EVM). The EVM is based on the Texas Instruments TMS320DM355 Processor.
The DM355 Evaluation Module is a table top card that allows engineers and softwaredevelopers to evaluate certain characteristics of the DM355 processor to determine ifthe processor meets the designers application requirements. Evaluators can createsoftware to execute on board or expand the system in a variety of ways.
Notational Conventions
This document uses the following conventions.
The DM355 Evaluation Module will sometimes be referred to as the DM355 EVM orEVM.
Program listings, program examples, and interactive displays are shown in a specialitalic typeface. Here is a sample program listing.
equations!rd = !strobe&rw;
Information About Cautions
This book may contain cautions.This is an example of a caution statement.A caution statement describes a situation that could potentially damage your software,or hardware, or other equipment. The information in a caution is provided for yourprotection. Please read each caution carefully.
Related Documents, Application Notes and User Guides
Information regarding the TMS320DM355 can be found at the following TexasInstruments website:
http://www.ti.com
Table 1: Manual History
Revision History
A Production Release
B Updated Figures
C Edited text
D Updated schematics
E Updated schematics, Silkscreens, Figures
Table 2: Board History
PWBRevision
History
A Production Release
B Updated Silk-screen
C2 0.55 mm. Production Release
D2 0.65 mm. Production Release
1-1
Chapter 1
Introduction to the DM355 EVM
Chapter One provides a description of the DM355 EVM along with the keyfeatures and a block diagram of the circuit board.
Topic Page
1.1 Key Features 1-21.2 Functional Overview of the DM355 EVM 1-41.3 Basic Operation 1-41.4 Memory Map 1-51.5 Configuration Switch Settings 1-61.6 Power Supply 1-6
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1-2 DM355 EVM Technical Reference
1.1 Key Features
The DM355 EVM is a standalone development platform that enables users toevaluate and develop applications for the TMS320DM355 processor. Schematics,logic equations and application notes are available to ease hardware development andreduce time to market.
The EVM comes with a full complement of on board devices that suit a wide variety ofapplication environments. Key features include:
• A Texas Instruments DM355 processor with an ARM processor operating up to 216 Mhz.
• 1 video input port, supports composite or S video
• 1 composite video DAC output
• 128 Mbytes of DDR2 DRAM
• UART, 2 SD/MMC card interfaces or 1 SD/MMC and 1 CE-ATA Disk Drive Interface
• 2 Gigabytes NAND Flash
• AIC33 stereo codec
• USB2 Interface
Figure 1-1, Block Diagram DM355 EVM
16
SW6
SW7
Reset
Switches
LINE OUT
LINE IN
MIC OUT
BatteryENETRJ45
IRMSP430
JTAG J1 J7
SPIROM
HP OUT
DC3
1 2 3 4
1 2
NAND
DM9000AMAC/PHY
DC6
3.3V I/O Supply
1.8V Supply
1.2V Core Supply
PWR
AIC33Codec
McBSPsSD/MMC
SD/MMCConnectors
SD0 on Bottom
USB 2.0
USB
LEDs
McBSPs
EMIF
JTAG
20 Pin ARM JTAG
14 Pin TI JTAG
UART0
RS-232 Com
p In
Video Out
Video In
VideoDecoderTVP5146
Com
p O
ut
J30
Imag
er
J31
Imag
er
I2C Bus
Mux
MSP430
DDR2
S-V
ideo
In
DM355
DC5
DC7
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• 10/100 MBS Memory Mapped Ethernet Controller
• SPI EEPROM
• IR Remote Interface, real time clock, via MSP430
• Configurable boot load options
• 8 user LEDs/4 position user DIP switch/5 user push button switches
• Single voltage power supply (+5V)
• Expansion connectors for daughter card use
• 14 Pin TI JTAG/20 Pin ARM JTAG Interfaces
Figure 1-2, DM355 EVM
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1.2 Functional Overview of the DM355 EVM
The DM355 on the EVM interfaces to on-board peripherals through the 8/16-bit wideEMIF peripheral interface pins. The DDR2 memory is connected to its own dedicated16 bit wide bus. The EMIF bus is also connected to the NAND Flash and ethernetcontroller.
On board video decoder and on chip encoder interface video streams to the DM355processor. One decoder and 1 on chip DAC channel are standard on the EVM. Onscreen display functions are implemented in software on the DM355 processor.
An on-board AIC33 codec allows the DSP to transmit and receive analog audio
signals. The I2C bus is used for the codec control interface, while the McBSP controlsthe audio stream. Signal interfacing is done through 3.5mm audio jacks that correspondto microphone input, headphone output, line input, and line output.
The EVM includes 8 user LEDs, a 4 position user DIP switch, an IR interface, a Realtime clock along with 5 user push button switches to provide the user with applicationinteraction. These interfaces are implemented via software on a MSP430 and are
accessed by reading and writing to the I2C registers.
An included +5V external power supply is used to power the board. On-board switchingvoltage regulators provide the +1.3V CPU core voltage, +3.3V for peripherals and+1.8V for DDR2 memory. The board is held in reset by the on board MSP430microcontroller until these supplies are within operating specifications.
Code Composer Studio communicates with the EVM through an external emulator viathe 14 pin external JTAG connector.
1.3 Basic Operation
The EVM is designed to work with TI’s Code Composer Studio development, orstandard GDB tool environments. Code Composer communicates with the boardthrough an external JTAG emulator. To start, follow the instructions in the Quick StartGuide to install Code Composer. This process will install all of the necessarydevelopment tools, documentation and drivers.
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1.4 Memory Map
The DM355 processor has a byte addressable address space. There are somelimitations to byte addressing which are determined by peripheral interconnection to theDM355 device. Program code and data can be placed anywhere in the unified addressspace. Addresses are multiple sizes depending on hardware implementation. Refer tothe appropriate device data sheets for more details.
The memory map shows the address space of a generic DM355 processor on the leftwith specific details of how each region is used on the right. By default, the internalmemory sits at the beginning of the address space. Portions of memory can beremapped in software as L2 cache rather than fixed RAM.
The part incorporates a dual EMIF interface. One dedicated EMIF directly interfaces tothe DDR2 memory. The other EMIF has 2 separate addressable regions called chipenable spaces (CE0 & CE1). The NAND Flash and ethernet controller are mapped intothese chip enable spaces.
DM355 EVM
Address0x00000000
0x00008000
0x00010000
0x04000000
0x06000000
0x80000000
CE1
DDR
Figure 1-3, Memory Map, DM355 EVM
ARM Instruction RAM
ARM Instruction ROM
CE00x02000000
Memory Map Address Space
0x8FFFFFFF
Reserved
ARM RAM (Data)
Reserved0x00020000
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Shown below is a break out of the memory spaces.
1.5 Configuration Switch Settings
The EVM has a configuration switch that allow users to control the operationalstate of the processor when it is released from reset and determine the source forprocessor booting. Switch SW7 configures the boot mode that will be used when theDSP starts executing. By default the switches are configured to NAND Flash boot.The EMIF configuration switch must be set accordingly.
* Default Setting
1.6 Power Supply
The EVM operates from a single +5V external power supply connected to the mainpower input (J14), a 2.5 MM. barrel-type plug. Internally, the +5V input is convertedinto +1.2V, +1.8V and +3.3V using Texas Instruments swift voltage regulators. The+1.3V supply is used for the DSP core while the +3.3V supply is used for the DSP's I/Obuffers and other chips on the board. The +1.8 volt supply is used for DM355 DDR2memory.
Table 1: SW7, Boot Mode Select
Pos 2 Pos 1Boot Pin
BTSEL1/BTSEL0Function
ON ON 0 0 NAND boot CE0 *
ON OFF 0 1 Not Supported
OFF ON 1 0 Boot from SD/MMC
OFF OFF 1 1 Boot from UART
Address
0x02004000
Figure 1-4, DM355 EVM Chip Enable Memory Space
0x04014000
Memory Space0x02000000
NAND Chip Select 0
NAND Chip Select 1
DM9000A ENET Controller
2-1
Chapter 2
Board Components
This chapter describes the operation of the major board components onthe DM355 EVM.
Topic Page
2.1 EMIF Interfaces 2-22.1.1 Flash, NAND Flash, Ethernet Interface 2-22.1.2 DDR2 Memory Interface 2-22.1.3 Memory Card Interface 2-22.1.4 UART Interface 2-32.1.5 USB Interface 2-32.2 Input Video Port Interfaces 2-32.2.1 On Chip Video Output DAC 2-32.2.2 AIC33 Interface 2-42.3 Ethernet Interface 2-52.4 I2C Interface 2-52.4.1 MSP430 2-62.5 Daughter Card Interface 2-62.6 DM355 CPU/Video Clocks 2-62.7 Battery 2-7
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2-2 DM355 EVM Technical Reference
2.1 EMIF Interfaces
A separate 16 bit EMIF with two chip enables divide up the address space and allowfor asynchronous accesses on the EVM.
2.1.1 Flash, NAND Flash, Ethernet Interface
The DM355 has 2 gigabytes of NAND Flash memory, and an ethernet interfacememory mapped into the CE0 and CE1 spaces. The NAND Flash memory is usedprimarily for boot loading and file system on the DM355 EVM. The CE0 and CE1 spaceare configured as 8 and 16 bits wide respectively on the DM355 EVM.
2.1.2 DDR2 Memory Interface
The DM355 device incorporates a dedicated 16 bit wide DDR2 memory bus. The EVMuses one gigabit 16 bit wide memories on this bus, for a total of 128 megabytes ofmemory for program, data, and video storage. The internal DDR controller uses a PLLto control the DDR memory timing. Memory refresh for DDR2 is handled automaticallyby the DM355 internal DDR controller.
2.1.3 Memory Card Interface
The EVM supports two (2) SD/MMC media card interfaces. The second SD connectoris connected in parallel to the CE-ATA disk drive connector.
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2.1.4 UART Interface
The internal UART0 on the DM355 device is driven to connector P4. The UART’sinterface is routed to the RS-232 line drivers prior to being brought out to a DB-9connector, P4.
2.1.5 USB Interface
The DM355 incorporates an on chip USB II controller. This interface is brought out to amini A/B connector with its own power regulator. Two jumpers are provided to make aflexible host peripheral, and USB on the go interface.
2.2 Input Video Port Interfaces/Imager Input Ports
The DM355 EVM supports video capture via the devices internal video ports. A TexasInstruments TVP5146 is used to decode composite video or S-video inputs into thedevice. J11 is used for the S-video inputs and J2 for the composite inputs on the EVM.
The input port can also be driven by LCD imagers connected to connectors J30 and
J31. The imager or encoder is selectable via software control on I2C bus by accessingMSP430 registers.
2.2.1 On Chip Video Output DAC
The DM355 incorporates 1 composite video output DAC to interface to various videooutput standards. The DAC is filtered and driven to RCA jack, J4.
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2.2.2 AIC33 Interface
The EVM uses a Texas Instruments TLV320AIC33 stereo codec for input and output ofaudio signals. The codec samples analog signals on the microphone or line inputs andconverts them into digital data so it can be processed by the DSP. When the DSP isfinished with the data it uses the codec to convert the samples back into analog signalson the line output so the user can hear the output.
The codec communicates using two serial channels, one to control the codec’s internal
configuration registers and one to send and receive digital audio samples. The I2C busis used as the AIC33’s control channel. The control channel is generally only usedwhen configuring the codec, it is typically idle when audio data is being transmitted,
McBSP1 is used as the bi-directional data channel. All audio data flows through thedata channel. Many data formats are supported based on the three variables ofsample width, clock signal source and serial data format. The EVM examples generallyuse a 16-bit sample width with the codec in master mode so it generates the framesync and bit clocks at the correct sample rate without effort on the DSP side.
The codec is clocked via a 27 Mhz oscillator. The internal sample rate generatorsubdivides the default system clock to generate common audio frequencies. Thesample rate is set by a codec register. The figure below shows the codec interface onthe DM355 EVM.
Figure 2-2, DM355 EVM CODEC INTERFACE
DOUTDIN
BCLKWCLK
MIC IN
LINE IN
LINE OUT
HP OUT
McBSP
I2S Format
AIC33 Codec
Digital Analog
MIC IN
LINE IN
LINE OUT
HP OUT
SCLSDA
I2CControlSCL
SDAI2C Format
DRDXCLKRCLKXFSRFSX
Control Registers
ADC
DAC
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2.3 Ethernet Interface
The DM355 EVM incorporates an ethernet controller chip. This interface is connectedto the DM355’s EMIF. The EVM uses an Intel DAVICOM DM9000A. The 10/100 Mbitinterface is isolated and brought out to a RJ-45 standard ethernet connector, P5. Theethernet address is stored in the ethernet controller’s SPI ROM during manufacturing.
The RJ-45 has 2 LEDs integrated into its connector. The LEDs are green and yellowand indicate the status of the ethernet link. The green LED, when on, indicates link andwhen blinking indicates link activity. The yellow LED, when illuminated, indicates fullduplex mode.
2.4 I2C Interface
The I2C bus on the DM355 is ideal for interfacing to the control registers of many
devices. On the DM355 EVM the I2C bus is used to configure the video decoder,
stereo Codec, I/O expanders, and communicate with the MSP430. An I2C ROM is alsointerfaced via the serial bus. The format of the bus is shown in the figure below.
The addresses of the on board peripherals are shown in the table below.
Table 1: I2C Memory Map
Device Address R/W Function
TVP5146 0x5D R/W Capture 1 Decoder
TLV320AIC33 0x1B R/W CODEC
MSP430 0x25 R/W LEDs, IR, RTC, User I/O
Figure 2-4, I2C Bus Format
Start Slave Address W ACK Sub Address ACK-S Data ACK-S Stop
Write Sequence
Start Slave Address R Data STOP
Read Sequence
Spectrum Digital, Inc
2-6 DM355 EVM Technical Reference
2.4.1 MSP430
The DM355 EVM incorporates infrared remote, real time clock, and user and system bit
I/O in a MSP430 microcontroller. The I2C interface is used on the DM355 processor to
communicate to the MSP430. The MSP430 acts as a slave device on the I2C bus.
2.5 Daughter Card Interfaces
The EVM provides expansion connectors that can be used to accept plug-in daughtercards. The daughter card allows users to build on their EVM platform to extend itscapabilities and provide customer and application specific I/O. The expansionconnectors are interfaces which include McBSP, and serial I/O expansion. The unusedEMIF signals are brought out as user GPIO signals. The video output port is broughtout to the daughter card interface along with I/O and imager interface.
2.6 DM355 CPU/Video Clocks
The DM355 EVM uses a 24 Megahertz crystal to generate the main input clock. TheDM355 has an internal PLL which can multiply the input clock to generate the internalclock. The PLL multiplier is set via software on the DM355 device.
The secondary clock is generated from a 27 Megahertz crystal. the clock domain isgenerally used for internal video clock generation.
Spectrum Digital, Inc
2-7
2.7 Battery
The DM355 EVM incorporates a battery holder to provide backup power to theMSP430’s real time clock when the power is not applied to the board. The optionalbattery should be +3 volt 20 millimeter coin type Lithium single cell.
Some common part numbers for batteries which should operate in the EVM are shownin the table below.
These batteries are available from Duracell, Eveready, Panasonic, Ray-O-Vac, Sanyo,Sony, Sieko, Toshiba, Varta, and other battery manufacturers.
Table 2: Battery Part Numbers
Part Numbers
CR2032
DL2032
BR2032
CR2025
BR2025
CR2016
BR2016
DL2016
3-1
Chapter 3
Physical Description
This chapter describes the physical layout of the DM355 EVM and itsinterfaces.
Topic Page
3.1 Board Layout 3-33.2 Connectors 3-53.2.1 J1, NTSC/PAL Select 3-63.2.2 J2, Video In 3-73.2.3 J3, MSP430 JTAG Header 3-73.2.4 J4, Composite Video Out 3-83.2.5 J5, USB Connector and Jumpers 3-83.2.6 J6, 14 Pin External JTAG Connector 3-93.2.7 J8, ARM JTAG Emulation Header 3-103.2.8 J9, USB Capacitance Select 3-103.2.9 J10, USB ID Select 3-113.2.10 J11, S-Video In 3-113.2.11 J12, ATA/CE Interface 3-123.2.12 J16, +5V Input 3-133.2.13 J27, MMC/SD Connector 3-133.2.14 J28, MMC/SD Connector 3-143.2.15 J30, Imager Interface Connector 1 3-153.2.16 J31, Imager Interface Connector 2 3-163.2.17 P1, Microphone In 3-173.2.18 P2, Headphone Out 3-183.2.19 P3, Line Out 3-183.2.20 P4, RS-232 UART 3-193.2.21 P5, Ethernet Interface 3-203.2.22 P6, Line In 3-213.2.23 DC3, I/O Daughter Card Expansion 3-223.2.24 DC5, TH8200 Daughter Card Interface 3-233.2.25 DC6, Expansion Connector 3-243.2.26 DC7, Expansion Connector 3-243.2.27 U10, Infrared Interface 3-25
Spectrum Digital, Inc
3-2 DM355 EVM Technical Reference
Topic Page
3.3 LEDs 3-253.4 Switches 3-263.4.1 SW1, EMU0/1 Select Switch 3-263.4.2 SW5, Reset Switch 3-273.4.3 SW6, User Readable 4 Position DIP Switch 3-273.4.4 SW7, ARM Boot Mode Select 3-283.4.5 SW10 - SW14 3-283.5 Test Points 3-29
Spectrum Digital, Inc
3-3
3.1 Board Layout
The DM355 EVM is a 5.0 x 6.5 inch (127 x 165 mm.) ten (10) layer printed circuit boardwhich is powered by an external +5 volt only power supply. Figure 3-1 shows the layoutof the top side of the DM355 EVM.
Figure 3-1, DM355 EVM, Interfaces Top Side
U10
J16
J1
P1
J2
P5BHT1
J5
DS14-DS21
DC5
J3 SW5
SW10
SW12
SW11
SW13
SW14
J31
J30
P6
P3
P2
J28
J8
J6
P4
DC6
DC3
SW6
J11
J4
DS5
S1
SW7
DC7
J13
J9
J10
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3-4 DM355 EVM Technical Reference
Figure 3-2 shows the layout of the bottom side of the DM355 EVM.
Figure 3-2, DM355 EVM, Interfaces Bottom Side
J12
J27
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3-5
3.2 Connectors
The EVM has numerous connectors and option jumpers to control and provideconnections to various peripherals. These connectors and jumpers are described in thefollowing sections.
Table 1: Connectors
Connector Size Function
J1 1 x 3 NTSC/PAL Video Select
J2 Video In
J3 2 x 7 MSP430 JTAG
J4 8 Composite Video Out
J5 1 x 4 Mini A/B USB Connector
J6 2 x 7 TI 14 Pin JTAG
J8 2 x 8 ARM JTAG Emulation Header
J9 2 x 1 USB Capacitor
J10 2 x 1 USB ID Jumper
J11 4 Video In
J12 12 x 1 ATA/CE Interface
J13 4 x 2 Spare Jumper Storage
J16 2 +5V In
J27 18 SD/MMC Connector
J28 18 SD/MMC Connector
J30 13 x 2 Imager Interface
J31 13 x 1 Imager Interface
P1 4 Microphone In
P2 2x5 Headphone Out
P3 4 Line Out
P4 9 RS-232 UART
P5 12 Ethernet
P6 4 Line In
DC3 15 x 2 I/O Daughter Card Expansion
DC5 25 x 2 THS8200 Daughter Card Interface
DC6 5 x 2 Expansion Connector
DC7 10 x 2 GP I/O Signals
U10 Infrared Receiver
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3-6 DM355 EVM Technical Reference
3.2.1 J1, NTSC/PAL Select
The J1 connector is a 3 position jumper located on the top side of the board and is usedto select the type of video data the DM355 will be working with. NTSC format isexpected if the jumper is in the 1-2 position. The selection of 2-3 indicates PAL formatdata will be used. Either the NTSC (1-2 position) or PAL (2-3 position) must beselected. To reconfigure this selection, power down the EVM, change the jumper, andthen power the board back up. Do NOT change this jumper with the power on. Theimage of this jumper is shown in the figure below.
Table 2: J15, NTSC/PAL Select
Video Format Position
NTSC 1-2
PAL 2-3
J1
Figure 3-3, J1, NTSC/PAL Select
1
NTSC
PAL
J1
1
NTSC
PALPAL FormatNTSC Format
Board Edge
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3.2.2 J2, Video In
J2 is an RCA jack used as a composite video input to the TVP5146 encoder. Thisconnector brings in a video signal to pin 8 on the TVP5146. Do NOT plug into thisconnector with the power on. The figure below shows this connector as viewed from thecard edge.
3.2.3 J3, MSP430 JTAG Header
The J3 MSP430 JTAG Header is located on the top side of the board and is used toprovide a programming interface to the MSP430 microcontroller. The pinout forthe J3 connector is shown in the table below. This connector is typically used for factoryuse only.
Table 3: J2, Video In, RCA Jack
Pin # Signal Name
1 Pin 8, TVP5146
2 GND
Table 4: J3, MSP430 JTAG Header
Pin # Signal Pin # Signal
1 430_TDO 2 NC
3 430_TDI 4 MSP430_3V3
5 430_TMS 6 NC
7 430_TCK 8 NC
9 GND 10 NC
11 430_RESET 12 NC
13 NC 14 NC
Figure 3-4, J2, Video In RCA Jack
Pin 2, Shield (ground)
Pin 1, Signal Input
J3
2
MSP430 EMU
1
Figure 3-5, J3, MSP430 JTAG Header
Board Edge
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3-8 DM355 EVM Technical Reference
3.2.4 J4, Composite Video Out
Connector J4 is an RCA jack used as a composite video output from the “TVOUT”signal of the TMS320DM355. Do NOT plug into this connector with the power on. Thefigure below shows this connector as viewed from the card edge.
3.2.5 J5, USB Connector and Jumpers
Connector J5 is a mini A/B USB connector. The pinout for the J5 connector is shown inthe figure below.
* Use internal register to swap DM/DP pair. This feature was used to improve printed circuit board routing.
The EVM incorporates the ability to toggle the ID pin on the USB connector viasoftware control. The GIO2 pin on the DM355 controls this function.
For “USB ON The Go” mode remove jumper J10. This will allow the cable to configurethe ID pin on the DM355 processor.
The EVM supplies up to 500 ma of current to the USB_VBUS via a TPS61092 DC/DCconverter. This is enabled via the DM355’s DRV_VBUS pin. J9 supplies extracapacitance for host mode operations. Remove J9 for “USB On The Go” operations.Spare jumpers can be stored on connector J13.
Table 5: J4, TV Out, RCA Jack
Pin # Signal Name
1 Composite video output
2 GND
Table 6: J5, USB Connector
Pins Signal
1 USB_VBUS
2 USB_DM
3 USB_DP
4 USB_ID
5-9 USB_SHIELD
Figure 3-6, J4, TV Out, RCA Jack
Pin 2, Shield (ground)
Pin 1, Composite Signal
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3.2.6 J6, 14 Pin External JTAG Connector
Connector J6 is a 2 x7 double row male header with pin 6 clipped to serve as a key.This is the standard interface used by JTAG emulators to interface to TexasInstruments DSPs. The pinout for the connector is shown in the figure below.
The signal names for each pin are shown in the table below.
* Note: EMU0/EMU1 mode must be selected to ICEPICK mode
Table 7: J6, JTAG Interface
Pin # Signal Name Pin # Signal Name
1 TMS 2 TRST-
3 TDI 4 GND
5 PD 6 no pin - key
7 TDO 8 GND
9 TCKRET 10 GND
11 TCK 12 GND
13 EMU0 14 EMU1
1 23 4
5 67 89 1011 1213 14
TMSTDI
PD (+3.3V)TDO
TCK-RET
TCKEMU0
TRST-GNDno pin (key)GNDGND
GNDEMU1
Header Dimensions
Pin-to-Pin spacing, 0.100 in. (X,Y)Pin width, 0.025-in. square post
Pin length, 0.235-in. nominal
Figure 3-7, JTAG INTERFACE
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3-10 DM355 EVM Technical Reference
3.2.7 J8, ARM JTAG Emulation Header
The J8 Emulation Header is located on the top side of the board and is used to providean interface to ARM compatible JTAG emulators. The pinout for this connector isshown in the table below.
* Note: EMU0/EMU1 switch must be set to ARM mode
3.2.8 J9, USB Capacitance Select
The J9 jumper is used to provide more capacitance when the USB connector is used inthe host mode. When the jumper is shorted the extra capacitance is provided. Theseopen and shorted position are shown below.
Table 8: J8, ARM JTAG Emulation Header
Pin # Signal Pin # Signal
1 VCC_3V3 2 VCC_3V3
3 ARM_TRSTn 4 Ground
5 ARM_TDI 6 Ground
7 ARM_TMS 8 Ground
9 ARM_TCK 10 Ground
11 ARM_TCKRET 12 Ground
13 ARM_TDO 14 Ground
15 ARM_RSTn 16 Ground
17 NC 18 Ground
19 NC 20 Ground
Table 9: J9, USB Capacitance Select
Position Function
Open 6.9 uF Capacitance
Shorted 106.8 uF Capacitance
J9
Figure 3-8, J9, USB Capacitance Select
USB VBUS
Open
J9
USB VBUS
Shorted
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3.2.9 J10, USB ID Select
The J10 jumper is used to allow the cable to configure the ID pin on the DM355. This isused for the “USB On The Go” mode. When the jumper is shorted, access to the ID isprovided. The open and shorted position are shown below.
3.2.10 J11, S-Video In
Connector J11 is a four pin mini din connector which interfaces to the TVP5146encoder. This connector brings in a video signal (LUMA) to pin 9 on the TVP5146. Do NOT plug into this connector with the power on. The figure below shows thisconnector as viewed from the card edge.
Table 10: J10, USB ID Select
Position Function
Open ID from USB connector
Shorted ID controlled from GIO2
Table 11: J11, Video In, Mini Din Connector
Pin # Signal Name
1 GND
2 GND
3 LUMA
4 Chroma
J10
Figure 3-9, J10, USB ID Select
USB ID
Open
J10
USB ID
Shorted
Pin 1 Pin 2Pin 3 Pin 4
Figure 3-10, J11, Front View, Mini Din Connector
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3-12 DM355 EVM Technical Reference
3.2.11 J12, ATA/CE Interface
Connector J12 is a 12 x 1 flex cable connector mounted on the bottom side of theboard. The signals on this connector parallel the signals present on the connector J28which is located on the top side of the board. The signals present on connector J12 areshown in the table below. when this connector is used the corresponding SD connectorcan not be used.
Table 12: J12, ATA/CE Interface
Pin # Signal Name
1 Ground
2 SD1_DAT2
3 SD1_DAT3
4 VCC_3V3
5 SD1_CMD
6 VCC_3V3
7 SD1_CLK
8 Ground
9 SD1_DATA0
10 SD1_DATA1
11 Ground
12 NC
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3.2.12 J16, +5V Input
Connector J16 is the input power connector. This connector bring in +5 volts to theEVM. This is a 2.5mm. jack. Inside of the jack is tied to through a fuse to VCC_5V.The other side is tied to ground and LED DS5. The figure below shows this connectoras viewed from the card edge.
3.2.13 J27, MMC/SD Connector
The J27 MMC/SD connector is located on the bottom side of the board and is used toprovide an interface to a MMC/SD card. The pinout for the J27 connector is shown inthe table below.
Table 13: J27, MMC/SD Connector
Pin # Signal Pin # Signal
1 SD0_DATA3 2 SD0_CMD
3 GND 4 VCC_3V3
5 SD0_CLK 6 GND
7 SD0_DATA0 8 SD0_DATA1
9 SD0_DATA2 10 Write Protect 0
11 GND 12 Insert 0
PC Board
J16+5V
Ground
Front ViewFigure 3-11, J16, +5 Volt Input Connector
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3-14 DM355 EVM Technical Reference
3.2.14 J28, MMC/SD Connector
The J28 MMC/SD connector is located on the top side of the board and is used toprovide an interface to a MMC/SD card. The signals present on J28 are also presenton J12. Therefore, when J28 is used the operator can not use J12 for a CE-ATA diskdrive. The pinout for the J28 connector is shown in the table below.
Table 14: J28, MMC/SD Connector
Pin # Signal Pin # Signal
1 SD1_DATA3 2 SD1_CMD
3 GND 4 VCC_3V3
5 SD1_CLK 6 GND
7 SD1_DATA0 8 SD1_DATA1
9 SD1_DATA2 10 Write Protect 1
11 GND 12 Insert 1
Spectrum Digital, Inc
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3.2.15 J30, Imager Interface Connector 1
The connector J30 is a 13 x 2 double row header which is part of the imager interface.It is used with connector J31. The pinout for the J30 connector is shown in the tablebelow.
Note: When using the imager the user needs to select the video input multiplier to
imager mode via I2C control registers in the MSP430.
Table 15: J30, Imager Interface Connector 1
Pin # Signal Pin # Signal
1 IMAGER_D4 2 IMAGER_D5
3 IMAGER_D6 4 IMAGER_D7
5 IMAGER_D8 6 IMAGER_D9
7 IMAGER_D10 8 IMAGER_D11
9 IMAGER_D2 10 IMAGER_D3
11 Ground 12 Ground
13 IMAGER_LINE_VALID 14 NC
15 NC 16 IMAGER_RESET
17 IMAGER_FRAME_VALID 18 I2C_DATA_IMG
19 I2C_SCLK_IMG 20 NC
21 IMAGER_VBUS 22 IMAGER_VBUS
23 IMAGER_PXCLK 24 Ground
25 Ground 26 Ground
Spectrum Digital, Inc
3-16 DM355 EVM Technical Reference
3.2.16 J31, Imager Interface Connector 2
The connector J31 is a 13 x 1 single row header which is part of the imager interface. It is used with connector J30. The pinout for the J31 connector is shown in the tablebelow.
Note: When using the imager the user needs to select the video input multiplier to
imager mode via I2C control registers in the MSP430.
3.2.17 P1, Microphone In
The microphone input, P1 is a 3.5 mm. stereo jack. Both inputs are connected to themicrophone so it is monaural. The signal is connected to signals “MIC3R” and “MIC3L”of the AIC33. The signals on the plug are shown in the figure below.
Table 16: J30, Imager Interface Connector 1
Pin # Signal
1 IMAGER_D0
2 IMAGER_D1
3 NC
4 NC
5 NC
6 NC
7 NC
8 NC
9 NC
10 IMAGER_GBL_SHUTTER
11 IMAGER_TRG
12 NC
13 Ground
Microphone In
Ground
Figure 3-13, Microphone Input Jack
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3-17
3.2.18 P2, Headphone Out
The P2 connector is a 3.5 mm. stereo headphone output from the TVL320AIC33 on theEVM. This connector is located on the top side of the board. A view of the connectorfrom the card edge is shown in the figure below. The signals present on this connectorare defined in the following table.
3.2.19 P3, Line Out
The audio line out connector P3, is a stereo output. The output connector is a 3.5 mmstereo jack. The signals on the mating plug are shown in the figure below.
Table 17: P2, Headphone Out Interface
Pin # AIC33 Signal
1 Ground
2 HPLOUT
3 HPROUT
4 NC
Table 18: P3, Audio Line Out Stereo Jack
Pin # AIC33 Signal
1 Ground
2 LEFT_LO+
3 RIGHT_LO+
4 NC
Figure 3-14, P2, Headphone Out Interface
Stereo Line Out
Left Line Out
Ground
Figure 3-15, Audio Line Out Stereo Jack
Right Line Out
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3-18 DM355 EVM Technical Reference
3.2.20 P4, RS-232 UART
The P4 connector is a 9 pin make D-connector which provides a UART interface to theEVM. This connector interfaces to the MAX 3221 RS-232 line driver (U34) and islocated on the top side of the board. A view of the connector from the card edge isshown in the figure below. The signals present on this connector are defined in thefollowing table.
The pin numbers and their corresponding signals are shown in the table below. Thiscorresponds to a standard dual row to DB-9 connector interface used on personalcomputers.
Table 19: P4, RS-232 Pinout
Pin # Signal Name
1 NC
2 DM355 UART0 Rx Data
3 DM355 UART0 Tx Data
4 NC
5 GND
6 NC
7 Pin 8
8 Pin 7
9 NC
Figure 3-16, P4, DB9 Male Connector
6789
12345
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3-19
3.3.21 P5, Ethernet Interface
The P5 connector is located on the top side of the board and is used to provide anEthernet interface. P5 integrates the magnetics and standard RJ-45 connector. Thetwo tables below shoe the signals present on the magnetics interface and theconnector side.
The ethernet connector incorporates 2 LEDs which give link and transmit status fromthe ethernet controller.
Table 20: P5, Magnetics/LEDs Interface Signals
Pin # Signal Pin # Signal
1 ENET_TXO+ 2 ENET_TXO-
3 ENET_RXI+ 4 ENET_2V5(RX Center Tap)
5 ENET_2V5(RX Center Tap) 6 ENET_RXI-
7 NC 8 GND
9 VCC_3V3(LED1+) 10 ENET_LED1(LED1-)
11 VCC_3V3(LED2+) 12 ENET_LED2(LED2-)
Table 21: P5, RJ-45 Connector
Pin # Signal Pin # Signal
1 TX_DATA+ 2 TX_DATA-
3 RX_DATA+ 4 NC
5 NC 6 RX_DATA-
7 NC 8 NC
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3-20 DM355 EVM Technical Reference
3.2.22 P6, Line In
Connector P6 is an stereo audio line input. The input connector is a 3.5 mm stereo jack.The signals on the mating plug are shown in the figure below.
Table 22: P6, Headphone Out Interface
Pin # AIC33 Signal
1 Ground
2 LINE2L+
3 LINE2R+
4 NC
Right Line In
Ground
Figure 3-17, P6, Audio Line In Stereo Jack
Left Line In
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3.2.23 DC3, I/O Daughter Card Expansion
The DC3 connector is an I/O expansion interface for a daughter card. This is a15 x 2 pinned female surface mount connector. The pinout for the DC3 connector isshown in the table below.
The manufacturer and part number of this connector is: SAMTEC SFM-115-02-S-D-LC
A possible mating connector is: SAMTEC TFM-115-32-S-D-LC. This height is.44 inches. Your actual height may vary.
Table 23: DC3, I/O Daughter Card Expansion
Pin # Signal Pin # Signal
1 SPI1_SDENA0 2 NC
3 SPI1_SDI 4 SPI_SDO
5 SPI1_CLK 6 DM355_TIMERIN3
7 Ground 8 Ground
9 McBSP_DR0 10 McBSP_DX0
11 McBSP_CLKR0 12 McBSP_CLKX0
13 McBSP_FSR0 14 McBSP_FSX0
15 Ground 16 Ground
17 SYS_RESETz 18 I2C_SCLK
19 UART1_TXD 20 I2C_DATA
21 UART1_RXD 22 Ground
23 Ground 24 GIO18
25 VCC_3V3 26 VCC_3V3
27 Ground 28 Ground
29 VCC_5V 30 VCC_5V
Spectrum Digital, Inc
3-22 DM355 EVM Technical Reference
3.2.24 DC5, TH8200 Daughter Card Interface
The DC5 connector is an expansion interface for the TH8200 daughter card. This is a25 x 2 pinned female surface mount connector. The pinout for the DC5 connector isshown in the table below.
The manufacturer and part number of this connector is: SAMTEC SFM-125-02-S-D-LC
A possible mating connector is: SAMTEC TFM-125-32-S-D-LC. This height is.44 inches. Your actual height may vary.
Table 24: DC5, TH8200 Daughter Card Interface
Pin # Signal Pin # Signal
1 VDOUT_LCD_OE 2 GIO16
3 VDOUT_FIELD 4 GIO17
5 DM355_GIO6 6 DM355_GIO7
7 Ground 8 Ground
9 VDOUT_C0 10 VDOUT_C1
11 VDOUT_C2 12 VDOUT_C3
13 VDOUT_C4 14 VDOUT_C5
15 VDOUT_C6 16 VDOUT_C7
17 Ground 18 Ground
19 VDOUT_EXTCLK 20 CDOUT_HSYNC
21 Ground 22 Ground
23 VDOUT_VCLK 24 CDOUT_VSYNC
25 Ground 26 Ground
27 VDOUT_Y0 28 VDOUT_Y1
29 VDOUT_Y2 30 VDOUT_Y3
31 VDOUT_Y4 32 VDOUT_Y5
33 VDOUT_Y6 34 VDOUT_Y7
35 Ground 36 Ground
37 I2C_SCLK 38 DC5_RESETn
39 I2C_DATA 40 Ground
41 VCC_1V8 42 VCC_1V8
43 Ground 44 Ground
45 VCC_3V3 46 VCC_3V3
47 Ground 48 Ground
49 VCC_5V 50 VCC_5V
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3.2.25 DC6, Expansion Connector
The DC6 connector is an expansion connector used to provide compatibility with theTHS8200 video daughter card. This is a 5 x 2 pinned female surface mount connector.The pinout for the DC6 connector is shown in the table below.
The manufacturer and part number of this connector is: SAMTEC SFM-105-02-S-D-LC
A possible mating connector is: SAMTEC TFM-105-32-S-D-LC. This height is.44 inches. Your actual height may vary.
3.2.26 DC7, Expansion Connector
Extra EMIF signals are available as general purpose I/O in some configurations.Connector DC7 provides access to these pins. This is a 10 x 2 pinned female surfacemount connector. The pinout for the DC7 connector is shown in the table below.
Table 25: DC6, Video Output Connector
Pin # Signal Pin # Signal
1 NC 2 NC
3 VCC_3V3 4 Ground
5 NC 6 NC
7 NC 8 NC
9 Ground 10 Ground
Table 26: DC7, Expansion Connector
Pin # Signal Pin # Signal
1 GIO54 2 GIO67
3 GIO65 4 GIO31
5 GIO63 6 GIO64
7 Ground 8 Ground
9 GIO62 10 GIO61
11 GIO60 12 GIO59
13 GIO58 14 GIO57
15 GIO56 16 GIO032
17 Ground 18 Ground
19 VCC_3V3 20 VCC_3V3
Spectrum Digital, Inc
3-24 DM355 EVM Technical Reference
3.2.27 U10, Infrared Interface
U10 is an infrared receiver mounted on the edge of the board. This device interfaces tothe MSP430 mircrocontroller. The view of U10 is shown from a board edge view in thefigure below.
The receiver supports interaction with an Infrared remote control included with yourEVM
3.3 LEDs
The EVM has ten (10) LEDs which are located on the top side of the board. Information regarding the LEDs are shown in the table below.
Table 27: LEDs
LED # Use Color
DS5 +5 Volts present Green
DS14 User control via MSP430 I2C Green
DS15 User control via MSP430 I2C Green
DS16 User control via MSP430 I2C Green
DS17 User control via MSP430 I2C Green
DS18 User control via MSP430 I2C Green
DS19 User control via MSP430 I2C Green
DS20 User control via MSP430 I2C Green
DS21 User control via MSP430 I2C Green
DS22 Boot Mode Status Green
Figure 3-18, U10, IR Interface, Card Edge View
U10
PC Card
Spectrum Digital, Inc
3-25
3.4 Switches
The EVM has nine (9) switches. The function of these switches are shown in the tablebelow.
3.4.1 SW1, EMU0/1 Select Switch
SW1 is a 2 position DIP switch providing 4 options in selecting the state of the EMU0and EMU1 pins on the TMS320DM355 processor. A view of the switch is shown in thefigure below. The selection options with this switch are in the table below.
* is the factory shipped configuration
Table 28: Switches
Switch Function Type
SW1 EMU0/EMU1 Control 4 Position DIP
SW5 Reset Push Button/Momentary
SW6 User Readable 4 Position DIP
SW7 ARM Boot Mode Select 2 Position DIP
SW10 User Readable Push Button/Momentary
SW11 User Readable Push Button/Momentary
SW12 User Readable Push Button/Momentary
SW13 User Readable Push Button/Momentary
SW14 User Readable Push Button/Momentary
Table 29: SW1, EMU0/1 Select
State at ResetEMU1 EMU0
Function
L(0) L(0) Emulation Debug ARM JTAG Enabled
L(0) H(1) Not Defined
H(1) L(0) Not Defined
H(1) H(1) ICE PICK Mode *Both ARM & DSP JTAG Enabled
Figure 3-19, SW1, EMU0/1 Select Switch EMU0
EMU1
H L
S1
Raised NIB
Spectrum Digital, Inc
3-26 DM355 EVM Technical Reference
3.4.2 SW5, Reset Switch
Switch SW5 is a push button reset switch that will RESET the board. The MSP430controls all reset and power monitoring logic on the EVM.
3.4.3 SW6, User Readable 4 Position DIP Switch
Switch SW6 is a 4 position DIP switch with each position being an input to the
MSP430 microcontroller and accessible to the DM355 via the I2C control registers.The table below shows what signal each position appears on.
.
Table 30: SW6, User Readable 4 Position DIP Switch
Position Signal
1 SW_DIP0
2 SW_DIP1
3 SW_DIP2
4 SW_DIP3
Figure 3-20, SW6, User Readable 4 Position DIP Switch SW6
4
Raised NIB
321
ON
Spectrum Digital, Inc
3-27
3.4.4 SW7, ARM Boot Mode Select
Switch SW7 is a 2 position DIP switch used to select the ARM Boot Mode. The figureand table below show these options.
* default setting
3.4.5 SW10 - SW14
Switches S10 through SW14 are push button momentary switches that are inputs in to
the MSP430 microcontroller and accessible to the DM355 via I2C control registers onthe MSP430. The table below shows what signal each switch appears on.
Table 31: SW7, ARM Boot Mode Select
Pos 2 Pos 1 HW Code Function
ON ON 0 0 NAND boot CE0 *
ON OFF 0 1 NOR direct execute
OFF ON 1 0 Boot from SD/MMC
OFF OFF 1 1 Boot from UART
Table 32: SW10 - SW14, Processor Configuration/Boot Load Options
Switch Signal
SW10 PB_SW10
SW11 PB_SW11
SW12 PB_SW12
SW13 PB_SW13
SW14 PB_SW14
Figure 3-21, SW7, ARM Boot Mode Select
BOOT MODE
SW71 2
Raised NIBON
Spectrum Digital, Inc
3-28 DM355 EVM Technical Reference
3.5 Test Points
The EVM has 35 test points. All test points appear on the top of the board. Thefollowing figure identifies the position of each test point. the next table list each testpoint and the signal appearing on that test point.
Figure 3-22, DM355 EVM, Test Points
TP1
TP5
TP8
TP13
TP27
TP21
TP25
TP39,TP40
TP31
TP30
TP32
TP36TP11
TP41
TP12
TP29
TP42
TP6
TP26
TP33,TP34
TP37,TP38
TP22,TP23
TP27
TP3,TP4
TP9
TP7
TP10,TP43
TP2,TP14
Spectrum Digital, Inc
3-29
There are 12 power test points on the EVM. These test points provide a convenientmechanism to check the EVM’s multiple power supplies. The table below shows thevoltages for each test point and what the supply is used for.
Table 33: DM355 EVM Test Points
Test Point #
SignalTest Point
#Signal
TP2 VCC_1V8 TP29 Ground
TP3 AIC33 MFP2 TP30 Ground
TP4 AIC33 MFP3 TP31 VCC_5V
TP10 EM_ADV/GIO032 TP32 3V3_PWR_OK
TP13 VDDA_DAC TP33 VCC_3V3
TP14 EM_CLK/GIO031 TP36 1V8_PWR_OK
TP21 CORE_PWR_OK TP37 VCC_1V8
TP23 VCC_1V3 TP39 TMS320DM355 MXI2
TP25 Ground TP40 TMS320DM355 MXO2
TP26 Ground TP41 TMS320DM355 MXI1
TP27 Ground TP42 TMS320DM355 MXO1
TP28 Ground TP43 EM_A7
Table 34: Power Test Points
AccessTest Point
Voltage Shunt Power Domain
TP1 +1.8V 0.02 ohms VDDAHV3V3
TP5 +1.3V 0.02 ohms CVDD
TP6 +1.8V 0.02 ohms VDDA1V8 HSSI
TP7 +1.3V 0.02 ohms USB1V3
TP8 +3.3V 0.02 ohms USB3V3
TP9 +1.3V 0.02 ohms VDDA.PLL1 & 2
TP11 +3.3V 0.02 ohms VDD
TP12 +1.8V 0.02 ohms VDDS
TP22 +1.3V 0.02 ohms Main 1.3V
TP34 +3.3V 0.025 ohms Main 3.3V
TP38 +1.8V 0.025 ohms Main 1.8V
TP12 +1.8V 0.025 ohms DDR2 Power
Spectrum Digital, Inc
A-2 DM355 EVM Technical Reference
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
Siz
e:
Da
te:
DW
G N
OR
evi
sio
n:
Sh
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of
Titl
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Pa
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Co
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:
D2
SP
EC
TR
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DIG
ITA
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OR
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5099
02-0
001
Wed
ne
sda
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ua
ry 3
0,
20
081
26
B
DM
35
5
Eva
lua
tion
Mod
ule
TIT
LE
SH
EE
T
33
34
AA
ENGR
2REVISION STATUS OF SHEETS
111
DATE
14
12
13
DATE
ENGR-MGR
MFG
7
DWN
DATE
8
DATE
10
DATE
CHK
RLSE
APPLICATION
35
NEXT ASSY
DATE
6
DATE
9
QA
USED ON
4
15
DD
DA
A
AA
D2
A
R.R.P.
T.W.K.
R.R.P.
R.R.P.
C.M.D.
R.R.P.
R.R.P.
04/01/2007
04/01/2007
16
17
18
19
20
21
22
23
24
25
04/01/2007
04/01/2007
04/01/2007
04/01/2007
04/01/2007
AC
AA
AA
A
AA
26
27
28
29
30
AA
31
32
A
D2
AA A
DD
D
AA
A
D2
AInitial schematic ready
for layout - Alpha Release
DESCRIPTION
REV
APPROVED
DATE
04/01/07
RRP
SCHEMATIC
CONTENTS
SHEET01 - TITLE
SHEET02 - DM355 SERIAL I/O
SHEET03 - DM355 DDR2 INTERFACE
SHEET04 - DM355 EMIF
SHEET05 - DM355 USB
SHEET06 - DM355 VIDEO
SHEET07 - DM355 JTAG,CLKS,RESET
SHEET08 - DM355 POWER/GND-pins
SHEET09 - DM355 DECOUPLING CAPS
SHEET10 - DDR2 MEMORY
SHEET11 - JTAG CONNECTORS
SHEET12 - NAND FLASH, SPI EEPROM, EMIF I/O DC
SHEET13 - RS232 INTERFACE
SHEET14 - SD/MMC IF - CE ATA IF
SHEET15 - VIDEO INPUT MULTIPLEXER
SHEET16 - IMAGER INTERFACE
SHEET17 - 5146 DECODER
SHEET18 - VIDEO DAUGHTER CARD IF
SHEET19 - AIC33
SHEET20 - DM9000A ENET CONTROLLER
SHEET21 - ETHERNET CONNECTOR
SHEET22 - MSP430
SHEET23 - LEDS/SWITCHED ETC
SHEET24 - I/O DAUGHTER CARD IF
SHEET26 - CORE PWR SUPPLY,MSP430 PWR SUPPLY
SHEET27 - 3V3 AND 1V8 POWER SUPPLY
00011011B
01011101B
AUDIO CODEC - 00110(MFP1)(MFP0)
AIC33
VIDEO DECODER - 101110(I2CA)
TVP5146
MSP430
ADDRESS BINARY
DEVICE
FUNCTION
HEX
0x25
0x1B
0x5D
I2C
Address Table
ADDRESS
FUNCTION
HEX
Memory Address Table
00100011B
RTC,IR CTL, IO CTL, POWER MONITOR
CHIP SELECT
NAND FLASH CS0 R/W
NAND FLASH CS1 R/W
CE0 - NAND CS0
CE0 - NAND CS1
0x0200 0000
0x0200 4000
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
11
11
11
11
11
11
XX
FF
F
BASE
WORD
1
ARM ADDRESSING
RRP
07/01/07
BPre-production release - Beta Release
CE1 - PHY/MAC CHIP
DM9000A READ WRITE
0x0401 4000
09/01/07
RRP
CProduction release for 0.50 mm
RRP
Pre-production release for 0.65 mm
D09/28/07
Spectrum Digital, Inc
A-3
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
I2C
_D
AT
A
I2C
_SC
LK
McB
SP
_DX
1M
cBS
P_C
LKX
1M
cBS
P_F
SX
1M
cBS
P_
DR
1M
cBS
P_
CL
KR
1M
cBS
P_
FS
R1
McB
SP
_C
LK
S1
SD
0_D
AT
A1
SD
0_D
AT
A2
SD
0_
CL
K
SD
0_D
AT
A0
SD
0_
CM
DS
D0_
DA
TA
3
SD
1_D
AT
A1
SD
1_D
AT
A2
SD
1_
CL
K
SD
1_D
AT
A0
SD
1_
CM
DS
D1_
DA
TA
3
McB
SP
_F
SR
0M
cBS
P_
CLK
R0
McB
SP
_D
R0
McB
SP
_FS
X0
McB
SP
_CLK
X0
McB
SP
_DX
0
CP
U_
GIO
25
CP
U_
GIO
26
CP
U_
GIO
27
CP
U_
GIO
28
CP
U_
GIO
29
CP
U_
GIO
30
VC
C_
3V
3
UA
RT
0_T
XD
13
UA
RT
0_R
XD
13
McB
SP
_FS
X1
19M
cBS
P_C
LKX
11
9M
cBS
P_D
X1
19 McB
SP
_C
LKR
119
McB
SP
_C
LKS
119
McB
SP
_F
SR
119
McB
SP
_DR
119
SD
1_C
MD
14
SD
1_D
AT
A2
14
SD
1_D
AT
A0
14
SD
1_
CLK
14
SD
1_D
AT
A3
14
SD
1_D
AT
A1
14
SD
0_C
MD
14
SD
0_D
AT
A2
14
SD
0_D
AT
A0
14
SD
0_
CLK
14
SD
0_D
AT
A3
14
SD
0_D
AT
A1
14
I2C
_D
AT
A1
5,1
8,1
9,2
2,2
4
I2C
_S
CL
K1
5,1
8,1
9,2
2,2
4
DE
EP
SL
P_
EN
22
McB
SP
_DX
024
McB
SP
_CLK
X0
24M
cBS
P_F
SX
024
McB
SP
_D
R0
24M
cBS
P_C
LKR
024
McB
SP
_F
SR
024
DM
350_
GIO
718
DM
350_
GIO
618
SP
I0_S
DO
12S
PI0
_S
DI
12S
PI0
_SC
LK12
SP
I0_S
DE
NA
012
SP
I1_
SD
O24
SP
I1_
SD
I24
SP
I1_
SC
LK24
SP
I1_
SD
EN
A0
24
AT
A_C
E_
IO14
DM
350
_T
IME
RIN
324
UA
RT
1_T
XD
24
UA
RT
1_R
XD
24
EN
ET
_IN
T2
0U
SB
_ID
_T
OG
GL
E5
MS
P43
0_IN
T22
Siz
e:
Da
te:
DW
G N
OR
evi
sio
n:
Sh
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of
Titl
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Pa
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Co
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nts
:
D
SP
EC
TR
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DIG
ITA
L IN
CO
RP
OR
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5099
02-0
001
Fri
da
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arc
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4,
20
08
22
6
B
DM
35
5
Eva
lua
tion
Mod
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DM
35
5 S
ER
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I/O
RN
22
RP
AC
K4
-33
1 2 3 45678
R1
35
2.2
KR
11
52
.2K
RN
9R
PA
CK
8-3
31 2 3 4 5 6 7 8
910111213141516
RN
21
RP
AC
K8
-33
1 2 3 4 5 6 7 8910111213141516
RN
23
RP
AC
K4
-33
1 2 3 45678
DM
355_
65M
M
U1
8-1
I2C
_SC
L / G
IO14
R14
I2C
_SD
A /
GIO
15R
13
GIO
0C
16
GIO
1E
14
GIO
2F
15
GIO
3G
15
GIO
4B
17
GIO
5D
15
GIO
6B
18
GIO
7C
17
AS
P0_
CLK
R/G
IO26
F17
AS
P0_
CLK
X/G
IO29
F18
AS
P0_
DR
/GIO
27E
18
AS
P0_
DX
/GIO
30H
15
AS
P0_
FS
R/G
IO25
F16
AS
P0_
FS
X/G
IO28
G17
AS
P1_
CLK
RD
18
AS
P1_
CLK
SD
17
AS
P1_
CLK
XD
19
AS
P1_
DR
C19
AS
P1_
DX
C18
AS
P1_
FS
RE
17
AS
P1_
FS
XE
16
MS
/SD
0_C
LKA
15
MS
_BS
/SD
0_C
MD
C14
MS
/SD
0_D
AT
0B
14M
S/S
D0_
DA
T1
D14
MS
/SD
0_D
AT
2B
13M
S/S
D0_
DA
T3
A14
SD
1_C
LK /
GIO
24C
15
SD
1_C
MD
/ G
IO23
A17
SD
1_D
0 / T
XD
2 / G
IO19
A18
SD
1_D
1 / R
XD
2 / G
IO20
B15
SD
1_D
2 / C
TS
2 / G
IO21
A16
SD
1_D
3 / R
TS
2 / G
IO22
B16
SP
I0_S
CLK
C12
SP
I0_S
DE
NA
0B
12
SP
I0_S
DI
A12
SP
I0_S
DO
B11
SP
I1_S
CLK
/ G
IO10
C13
SP
I1_S
DE
NA
/ G
IO11
E13
SP
I1_S
DI /
GIO
9A
13
SP
I1_S
DO
/ G
IO8
E12
UA
RT
0_R
XD
0U
18
UA
RT
0_T
XD
0T
18
UA
RT
1_R
XD
1/G
IO01
3R
15
UA
RT
1_T
XD
1/G
IO01
2R
17
Spectrum Digital, Inc
A-4 DM355 EVM Technical Reference
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
DD
R_
DQ
3
DD
R_
ST
RB
EN
_D
EL
DD
R_
DQ
0
DD
R_
DQ
1
DD
R_
DQ
2
DD
R_
DQ
4
DD
R_
DQ
8
DD
R_
DQ
9
DD
R_
DQ
7
DD
R_
DQ
5
DD
R_
DQ
6
DD
R_
DQ
14
DD
R_
DQ
10
DD
R_
DQ
13
DD
R_
DQ
12
DD
R_
DQ
11
DD
R_
DQ
15
DD
R_
DQ
S0
DD
R_
DQ
S1
DD
R_
DQ
M0
DD
R_
DQ
M1
DD
R_
A1
3
DD
R_
A1
DD
R_
A0
DD
R_
A2
DD
R_
A3
DD
R_
A4
DD
R_
A7
DD
R_
A6
DD
R_
A5
DD
R_
A9
DD
R_
A1
0D
DR
_A
11
DD
R_
A8
DD
R_
A1
2
DD
R_
BA
0D
DR
_B
A1
DD
R_
BA
2
DD
R_
CK
E
DD
R_
CL
KP
DD
R_
CL
KN
DD
R_
CA
S
DD
R_
RA
S
DD
R_
WE
DD
R_
CS
VR
EF
_ST
LD
DR
_S
TR
BE
N
VC
C_
3V3
DD
R_
DQ
01
0
DD
R_
DQ
11
0
DD
R_
DQ
21
0
DD
R_
DQ
31
0
DD
R_
DQ
41
0
DD
R_
DQ
51
0
DD
R_
DQ
61
0
DD
R_
DQ
71
0
DD
R_
DQ
81
0
DD
R_
DQ
91
0
DD
R_
DQ
10
10
DD
R_
DQ
11
10
DD
R_
DQ
12
10
DD
R_
DQ
14
10
DD
R_
DQ
13
10
DD
R_
DQ
15
10
DD
R_
BA
01
0D
DR
_B
A1
10
DD
R_
CA
S1
0
DD
R_
CL
KP
10
DD
R_
RA
S1
0
DD
R_
WE
10
DD
R_
CL
KN
10
DD
R_
BA
21
0
DD
R_
DQ
M0
10
DD
R_
DQ
M1
10
DD
R_A
13
10
DD
R_A
10
10
DD
R_
A8
10
DD
R_
A5
10
DD
R_
DQ
S1
10
DD
R_
DQ
S0
10
DD
R_A
12
10
DD
R_
A9
10
DD
R_A
11
10
DD
R_
A7
10
DD
R_
A4
10
DD
R_
A6
10
DD
R_
A3
10
DD
R_
A2
10
DD
R_
A1
10
DD
R_
A0
10
DD
R_
CK
E1
0
DD
R_
CS
10
VR
EF
_S
TL
10
Siz
e:
Da
te:
DW
G N
OR
evi
sio
n:
Sh
eet
of
Titl
e:
Pa
ge
Co
nte
nts
:
D
SP
EC
TR
UM
DIG
ITA
L IN
CO
RP
OR
AT
ED
5099
02-0
001
Fri
da
y, M
arc
h 1
4,
20
08
32
6
B
DM
35
5
Eva
lua
tion
Mod
ule
DM
35
5 D
DR
IN
TE
RF
AC
E
Trace to DDR memory
for delay compensation
This net is equal to the DDR_CLKP ( or DDR_CLKN )
plus
the length of DDR_DQXX Average Trace length
TP
1 12
DM
355_
65M
M
U18
-4
DD
R_A
0V
2D
DR
_A1
V3
DD
R_A
10V
6D
DR
_A11
W7
DD
R_A
12V
7D
DR
_A13
U6
DD
R_A
2W
2D
DR
_A3
W3
DD
R_A
4V
4D
DR
_A5
W4
DD
R_A
6U
5D
DR
_A7
V5
DD
R_A
8W
5D
DR
_A9
W6
DD
R_B
A0
U8
DD
R_B
A1
U7
DD
R_B
A2
V8
DD
R_C
AS
V9
DD
R_C
KE
V10
DD
R_C
LKN
W8
DD
R_C
LKP
W9
DD
R_C
ST
8
DD
R_D
Q0
V11
DD
R_D
Q1
W11
DD
R_D
Q10
W14
DD
R_D
Q11
W15
DD
R_D
Q12
U16
DD
R_D
Q13
W16
DD
R_D
Q14
V16
DD
R_D
Q15
W17
DD
R_D
Q2
U11
DD
R_D
Q3
T11
DD
R_D
Q4
U12
DD
R_D
Q5
W12
DD
R_D
Q6
V13
DD
R_D
Q7
W13
DD
R_D
Q8
U13
DD
R_D
Q9
V14
DD
R_D
QM
0T
12
DD
R_D
QM
1U
15
DD
R_D
QS
0V
12
DD
R_D
QS
1V
15
DD
R_R
AS
T6
DD
R_G
AT
E0
W18
DD
R_G
AT
E1
V17
DD
R_Z
NT
9
DD
R_W
EW
10
DD
R_V
RE
FU
10
VS
SA
_DLL
R11
VD
DA
33D
DR
_DLL
R10
E1
NF
M2
01
2P1
3C1
05F
13
2
C1
2.2
uF
R3
0
C2
0.0
1u
FC
30
.01
uF
R1
0.0
20
R2
50
OH
M 0
.5%
Spectrum Digital, Inc
A-5
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
EM
_D9
EM
_D
10E
M_
D11
EM
_D0
EM
_D
12E
M_
D13
EM
_D
14E
M_
D15
EM
_D1
EM
_D2
EM
_D3
EM
_D4
EM
_D5
EM
_D6
EM
_D7
EM
_D8
EM
_D
[15.
.0]
GIO
56
EM
_A1
EM
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D
5099
02-0
001
Fri
da
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14
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00
84
26
B
DM
355
E
valu
atio
n M
odul
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DM
35
5 E
MIF
SW7 Boot Select Setting for ARM Boot Mode:
POS 2 POS 1
OFF
OFF
OFF
OFF
ON
ON
ON
ON
BOOT ROM - NAND LOAD FROM CE0
NOT AVAILABLE
BOOT ROM - LOAD FROM UART
BOOT ROM - LOAD FROM SD/MMC
1 1 0 1 NAND CFG
0 0
HW CODE
1 1
0 1
1 0
Note:
ICE PICK Mode may have an issue booting from Reset
EMU0 = 1, EMU1 = 1
use ARM Mode
EMU0 = 0, EMU1 = 0
See page 11 for more information
NAND BOOT STATUS
TP
431
RN
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A-6 DM355 EVM Technical Reference
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ED
5099
02-0
001
Fri
da
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arc
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20
08
52
6
B
DM
35
5
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DM
35
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NO-POP FOR TEST SPECTRUM DIGITAL TEST ONLY
DIFFERENTIAL PAIR
90 OHM DIFFERENTIAL
IMPEDANCE
SHORT AND STRAIGHT AS
POSSIBLE,
MINIMUM NUMBER OF VIAS
USE INTERNAL CONTROL REGISTER
TO FLIP DM/DP POLARITIES
DIFFERENTIAL PAIRS
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SPARE JUMPERS
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RP
OR
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ED
5099
02-0
001
Fri
da
y, M
arc
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4,
20
08
62
6
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DM
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lua
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A-8 DM355 EVM Technical Reference
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5099
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A-10 DM355 EVM Technical Reference
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Spectrum Digital, Inc
A-12 DM355 EVM Technical Reference
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
ARM_TCK
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TI_
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5099
02-0
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20
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112
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Spectrum Digital, Inc
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ITA
L IN
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5099
02-0
001
Fri
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20
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122
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Spectrum Digital, Inc
A-14 DM355 EVM Technical Reference
5 5
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Spectrum Digital, Inc
A-16 DM355 EVM Technical Reference
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
TV
P5
146_
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P5
146_
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TV
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.614
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Spectrum Digital, Inc
A-17
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1 2 3 4 5 6 7 8 9 10 11 12 13
Spectrum Digital, Inc
A-18 DM355 EVM Technical Reference
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
TV
P5
146_
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P5
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Sh
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Pa
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le
TV
P5
146
VID
EO
DE
CO
DE
R
ISOLATE GROUNDS
AND CONNECT AT
SINGLE LOCATION
IN THE GROUND PLANE
C6
3
0.1
uF
R7
72
2
C8
9
33
pF
C2
21
33
0pF
C8
73
30
pF
C7
2
0.1
uF
C2
19
33
0pF
R7
2
4.7
K
C9
1
0.1
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R1
8675
C7
7
0.1
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L63
2.7
uH
C7
5
0.1
uF
R8
10
C2
206
80p
F
C6
2
0.1
uF
R8
0
75
R1
87
75
L10
BLM
41P
750
SP
T1
2
C8
8
33p
F
L66
2.7
uH
C2
25
68
0pF
Y1 14
.318
18m
hz
R8
6
NO
PO
P
C2
22
.1u
F
C6
1
0.1
uF
C8
2
0.1
uF
C6
0
0.1
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C7
6
0.1
uF
R7
3
2K
C6
7
0.1
uF
C8
53
30pF
U9
TV
P51
46
VI_
3_B
17
VI_
3_A
16
VI_
2_B
8
VI_
2_C
9
Y8
44Y
943
Y7
45
TH
ER
MA
L81
CH3_A18GND 15
CH4_A18GND 24
CH1_A18GND 79
DGND4 56
CH1_A33GND 3
CH3_A33GND 19CH2_A33GND 6
VI_
3_C
18
VI_
4_A
23
Y2
52Y
351
Y6
46
CH4_A33GND 22
DGND2 32
DGND3 42
IOGND1 39
IOGND2 49
IOGND3 62
PLL_A18GND 77
DGND1 27
DGND5 68
A18GND_REF 13AGND 26
CH2_A18VDD11
CH3_A18VDD14
CH4_A18VDD25
CH1_A18VDD78
CH1_A33VDD4
CH2_A33VDD5
CH3_A33VDD20
CH4_A33VDD21
A18VDD_REF12
DVDD131
DVDD241
DVDD355
DVDD467
IOVDD138
IOVDD248
IOVDD361
PLL_A18VDD76
VI_
2_A
7
VI_
1_C
2
VI_
1_B
1
VI_
1_A
80
SC
L28
SD
A29
Y5
47
Y4
50
Y1
53
Y0
54
C9
57
C8
58
C7
59
C6
60
C5
63
C4
64
C3
65
C2
66
C1
69
C0
70
XT
AL1
74
XT
AL2
75
DA
TA
CLK
40
RE
SE
TB
34
PW
RD
WN
33
INT
RE
Q30
FS
S/G
PIO
35
GLC
O/1
2CA
37
HS
/CS
/GP
IO72
VS
/VB
LK/G
PIO
73
FID
/GP
IO71
AV
ID/G
PIO
36
CH2_A18GND 10
C8
66
80
pF
C7
0
0.1
uF
R79 100
K
R7
1
4.7
K
R7
8
2.2
K
C8
1
0.1
uF
C6
6
.1u
F
R7
0
2K
R7
522
C6
8
0.1
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L65
2.7
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C7
8
0.1
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RN
20
RP
AC
K8-
33
1 2 3 4 5 6 7 8910111213141516
C2
23
33
0pF
J2 RC
A J
AC
K
1
2
C7
3
0.1
uF
C7
1
0.1
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C84
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L13
BLM
41P
750S
PT
12
R6
9
NO
PO
P
R7
622
C6
4
0.1
uF
C2
24
33
0pF
R7
4
NO
PO
PL
92
.7u
H
C6
9
0.1
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RN
5R
PA
CK
8-3
31 2 3 4 5 6 7 8
910111213141516
L82
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H
L64
2.7
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J11
7491
81-1
34 2
1
56
C7
4
0.1
uF
L11
BLM
41P
750S
PT
12
C2
18
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F
C8
3
.1u
F
C6
5
0.1
uF
C9
00
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F
L12
BLM
41P
750
SP
T1
2
Spectrum Digital, Inc
A-19
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
VC
C_
5VV
CC
_5V
VC
C_
1V
8V
CC
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V8
VC
C_
3V
3V
CC
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V3
VC
C_
3V
3
DM
350
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IO6
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OU
T_
LCD
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VD
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T_
FIE
LD
6G
IO17
7D
M35
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2
DC
5_
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SE
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22
VD
OU
T_C
06
VD
OU
T_C
16
VD
OU
T_C
26
VD
OU
T_C
36
VD
OU
T_C
46
VD
OU
T_C
56
VD
OU
T_C
66
VD
OU
T_C
76
VD
OU
T_
Y0
6V
DO
UT
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26
VD
OU
T_
Y4
6V
DO
UT
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66
VD
OU
T_
Y1
6V
DO
UT
_Y
36
VD
OU
T_
Y5
6V
DO
UT
_Y
76
VD
OU
T_E
XT
CLK
6V
DO
UT
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SY
NC
6
VD
OU
T_
VS
YN
C6
VD
OU
T_
VC
LK6
I2C
_D
AT
A2
,15
,19
,22
,24
I2C
_S
CLK
2,1
5,1
9,2
2,2
4
GIO
167 S
ize:
Da
te:
DW
G N
OR
evi
sio
n:
Sh
eet
of
Titl
e:
Pa
ge
Co
nte
nts
:
A
SP
EC
TR
UM
DIG
ITA
L IN
CO
RP
OR
AT
ED
5099
02-0
001
Fri
da
y, M
arc
h 1
4,
20
08
182
6
B
DM
35
5
Eva
lua
tion
Mod
ule
TH
S8
20
0 D
AU
GH
TE
R C
AR
D I
NT
ER
FA
CE
VIDEO OUTPUT CONNECTOR
R1
74
0
R8
810
K
R1
76
0
R1
1210
K
R1
75
0
R1
77
0
DC
6
SM
T R
EC
EP
TA
CLE
5X
2
2 4 6 8 10
1 3 5 7 9
DC
5
SM
T R
EC
EP
TA
CLE
25X
2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49
Spectrum Digital, Inc
A-20 DM355 EVM Technical Reference
VC
C_3
V3
VC
C_1
V8
VC
C_
3V
3
VC
C_3
V3
VC
C_
3V3
GN
D_A
ICG
ND
_AIC
GN
D_A
IC
GN
D_A
ICG
ND
_AIC
GN
D_A
IC
GN
D_A
IC
GN
D_A
IC
GN
D_A
IC
GN
D_A
IC
GN
D_A
ICG
ND
_AIC
GN
D_A
IC
GN
D_A
IC
GN
D_A
ICG
ND
_AIC
GN
D_A
IC
GN
D_A
ICA
IC33
_R
ES
ET
n22
McB
SP
_FS
X1
2McB
SP
_CLK
X1
2
McB
SP
_D
X1
2McB
SP
_CL
KR
12
McB
SP
_C
LK
S1
2
McB
SP
_F
SR
12
McB
SP
_D
R1
2
I2C
_D
AT
A2
,15
,18
,22
,24
I2C
_SC
LK
2,1
5,1
8,2
2,2
4S
ize:
Da
te:
DW
G N
OR
ev
isio
n:
Sh
eet
of
Titl
e:
Pa
ge
Co
nte
nts:
A
SP
EC
TR
UM
DIG
ITA
L IN
CO
RP
OR
AT
ED
509
902
-000
1
Fri
day
, M
arch
14
, 2
008
1926
B
DM
35
5
Eva
luat
ion
Mo
dul
e
AIC
33
AU
DIO
IN
TE
RF
AC
E
ISOLATE GROUNDS
AND CONNECT AT
SINGLE LOCATION
IN THE GROUND PLANE
R5
210
K
C5
1.1
uF
R4
60
P1
Mic
In
3 4 2 1
R5
720
KR5
12
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C5
2
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F
C3
67
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F
P3
Lin
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3421
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7.1
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C4
822
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U6
6 27M
hz
VC
C4
OU
T3
GN
D2
EN
1
R4
747
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C38
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TP
31
U8
TV
L3
20A
IC33
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HP
LOU
TD
1
HP
LCO
ME
1
LIN
E1R
+B
7
LIN
E1R
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6
LIN
E2L
+A
4
LIN
E2L
-B
5
MIC
BIA
SA
2
WC
LKF
9
DO
UT
F8
MP
F2
A8
MC
LKG
8
SE
LEC
TE
8
SD
AD
8
RIG
HT
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DR
VS
S.1
E2
DR
VS
S.2
F2
GP
IO2
J8
LEF
T_L
O+
J4
LEF
T_L
O-
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MO
NO
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MIC
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1
LIN
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4
LIN
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3
HP
RC
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F1
HP
RO
UT
G1
MIC
3LB
3
DR
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D.2
H1
AV
DD
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CB
1
AV
SS
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C.1
C2
AV
DD
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CJ1
AV
SS
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C.1
G2
RE
SE
TH
8
MF
P0
B8
MF
P1
B9
DV
DD
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DV
SS
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MIC
DE
TB
2
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LC
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MO
NO
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LIN
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A6
BC
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MF
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TP
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0
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45
0
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R5
81
0
R5
4N
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40
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R6
01
0
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LM2
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433
0
C41
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R5
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L1
BLM
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C3
5.1
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C4
3.1
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+
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71
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R6
310
K
R5
61
0
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V
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Lin
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n 3 4 2 1
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91
0
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C4
422
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2
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60
22
+
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91
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0.1
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C4
5
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R4
35
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52
20p
F
C46
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F
R5
510
K
R6
410
R6
620
K
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PG
221S
N1D
L6B
LM2
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221S
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83
30
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L4B
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R4
15
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R5
02
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R4
25
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C5
3.1
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R62
10
Spectrum Digital, Inc
A-21
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
EN
ET
_D8
EN
ET
_D7
EN
ET
_D6
EN
ET
_D5
EN
ET
_D4
EN
ET
_D3
EN
ET
_D1
EN
ET
_D0
EN
ET
_D
15E
NE
T_
D14
EN
ET
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EN
ET
_D9
EN
ET
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10
EN
ET
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12E
NE
T_
D13
EN
ET
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11
EM
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EM
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10E
M_
D11
EM
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EM
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12E
M_
D13
EM
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14E
M_
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EM
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EM
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EM
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EM
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EM
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EM
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EM
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EM
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EM
_D
[15
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]
EM
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1
ENET-AGND
ENET-AGND
ENET-AGND
EN
ET
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5
VC
C_
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3
VC
C_
3V
3
VC
C_
3V
3
VC
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3V
3
EM
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[15
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EN
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21E
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LED
221
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XI+
21
EN
ET
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T_T
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EM
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14
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4
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4,1
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ET
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ET
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2
Siz
e:
Da
te:
DW
G N
OR
evi
sio
n:
Sh
eet
of
Titl
e:
Pa
ge
Co
nte
nts
:
A
SP
EC
TR
UM
DIG
ITA
L I
NC
OR
PO
RA
TE
D
5099
02-0
001
Fri
da
y, M
arch
14
, 2
00
820
26
B
DM
355
E
valu
atio
n M
odul
e
Eth
ern
et
Inte
rfa
ceENET_2V5 IS DM9000A
INTERNALLY GENERATED
POWER SUPPLY
DIFFERENTIAL PAIRS
C2
4.1
uF
Y4
25M
Hz
RN
25
RP
AC
K8-
33
1 2 3 4 5 6 7 8910111213141516
R1
974
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C2
28.1
uF
C2
5.1
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R2
01
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C2
302
2 p
F
R2
0310
K
R1
99
NO
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P
C2
27
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FR1
95
NO
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P
U2
2D
M90
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P48
IOR
#35
IOW
#36
CSn 37
SD
512
DVDD 42
SD 46
TEST 41
DGND15
X2 43
X1 44
SD
710
BGGND 48
BG
RE
S1
RX
I+3
RX
I-4
RX_GND 47
RX
GN
D5
TX
O+
7T
XO
-8
TX
_VD
D_2
V5
9
RX
VD
D_2
V5
2LED1 39
SD018
DGND 45
SD413SD314
VDD23
EEDI019EECK20EECS21
DV
DD
30
DG
ND
33
SD117
LED2 38
SD216
PW_RST# 40
TX
GN
D6
SD1522
SD1424
SD
1325
SD
1226
SD
1127
SD
1028
SD
929
SD
831
SD
611
CM
D32
INT
34
C2
332
2 p
F
R1
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C2
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026
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229
10
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C2
32
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1
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2
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3
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ND
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1L
RN
24
RP
AC
K8-
33
1 2 3 4 5 6 7 8910111213141516
Spectrum Digital, Inc
A-22 DM355 EVM Technical Reference
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
EP
HY
_L
ED
2
EP
HY
_L
ED
1
GN
D_E
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ET
ENET-AGND
EN
ET
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5
ENET-AGND
ENET-AGND
ENET-AGND
ENET-AGND
VC
C_
3V
3
GN
D_E
_EN
ET
EN
ET
_RX
I-20
EN
ET
_R
XI+
20
EN
ET
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D1
20
EN
ET
_LE
D2
20
EN
ET
_TX
O-
20
EN
ET
_TX
O+
20
Siz
e:
Da
te:
DW
G N
OR
evi
sio
n:
Sh
eet
of
Titl
e:
Pa
ge
Co
nte
nts
:
A
SP
EC
TR
UM
DIG
ITA
L IN
CO
RP
OR
AT
ED
5099
02-0
001
Fri
da
y, M
arc
h 1
4,
20
08
212
6
B
DM
35
5
Eva
lua
tion
Mod
ule
ET
HE
RN
ET
OU
TP
UT
C2
14
0.1
uF
R1
834
9.9
R1
8136
0
P5
RJ4
5 H
AL
O H
FJ1
1-2
450
E-L
21
TX
D-C
T4
NC
17
GN
D8
TX
D+
1
TX
D-
2
RX
D+
3
RX
D-
6R
XD
-CT
5
S0 14S1 13
LED
2-12
LED
2+11
LED
1-10
LED
1+9
C2
13
0.1
uF
R1
80
360
R1
854
9.9
R1
824
9.9
C2
17
0.1
uF
C2
15
10
00
pF
2kV
R1
844
9.9
C2
16
0.1
uF
Spectrum Digital, Inc
A-23
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
430
_TM
S
MS
P43
0_3V
3
430_
TD
O43
0_T
DI
430_
TC
K4
30_T
DI
430_
TD
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430_
TM
S43
0_T
CK
MS
P43
0_3V
3
MS
P43
0_R
ES
ET
z
MS
P43
0_R
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ET
z
ALT
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3
VC
C_
3V
3
MS
P43
0_3V
3
MS
P43
0_3V
3
MS
P43
0_3
V3
VC
C_
3V3
VC
C_
1V8
VC
C_
1V3
MSP_AGND
MSP_AGND
MSP_AGND
MSP_AGND
MSP_AGND
MS
P4
30_
3V3
MS
P4
30_A
VC
C
MS
P43
0_A
VC
C
MSP_AGND
MSP_AGND
MSP_AGND
ALT
_3V
3
I2C
_D
AT
A2
,15
,18
,19,
24I2
C_S
CL
K2
,15
,18
,19,
24
LE
D0
23L
ED
123
LE
D2
23L
ED
323
LE
D4
23L
ED
523
LE
D6
23L
ED
723
ALT
_MS
P43
0_R
ES
ET
z25
EN
ET
_R
ES
ET
z20
MS
P4
30_
1V3
_EN
AB
LE25
MS
P4
30_
1V8
_EN
AB
LE26
MS
P4
30_
3V3
_EN
AB
LE26
DE
EP
SLP
_E
N2
SW
_D
IP0
23S
W_
DIP
123
SW
_D
IP2
23S
W_
DIP
323
SY
S_
RE
SE
Tz
24
PB
_RE
SE
Tn
23
SD
/MM
C1
.IN
S1
4S
D/M
MC
1.W
P1
4S
D/M
MC
0.I
NS
14
SD
/MM
C0
.WP
14
MS
P4
30_
INT
2
TV
P51
46_R
ES
ET
n17
DC
5_R
ES
ET
n1
8A
IC3
3_R
ES
ET
n19
NT
SC
_P
AL
23
PB
_S
W12
23P
B_
SW
1123
PB
_S
W10
23
PB
_S
W13
23P
B_
SW
1423
DE
CO
DE
R_I
MA
GE
R15
IMA
GE
R_
RE
SE
T16
CP
U_R
ES
ET
z7
DM
350
_RE
SE
Tn
7
Siz
e:
Da
te:
DW
G N
OR
evi
sio
n:
Sh
eet
of
Titl
e:
Pa
ge
Co
nte
nts
:
C
SP
EC
TR
UM
DIG
ITA
L IN
CO
RP
OR
AT
ED
5099
02-0
001
Fri
da
y, M
arc
h 1
4,
20
08
222
6
B
DM
35
5
Eva
lua
tion
Mod
ule
MS
P4
30
& I
R I
NT
ER
FA
CE
RN
29
RP
AC
K8
-10
K
123456789 10 11 12 13 14 15 16
R2
091K
C9
7
0.1
uF
D2
BA
T1
7
+C
94
10
uF
6.3
V
D1
BA
T17
R2
0810
0
U1
5
MS
P43
0F1
55IP
W
DV
CC
.11
P2.0/ACLK 20
P2.1/TAINCLK 21X
IN8
XO
UT
9
DVSS63
P1.
0/T
AC
LK12
P2.2/CAOUT/TA0 22
RST/NMI58
P1.
1/T
A0
13
P1.
2/T
A1
14
P1.
3/T
A2
15
TCK57
TDI/TCLK55
TDO/TDI54
P2.3/CA0/TA1 23
P2.4/CA1/TA2 24
P2.5/ROSC 25
P3.0/STE0 28
P3.1/SIMO0/SDA 29
P3.2/SOMI0 30
P3.3/UCLK0/SCL 31
P3.4/UTXD0 32
P3.
5/U
RX
D0
33P
3.6
34P
3.7
35
P6.
3/A
32
P6.
4/A
43
P6.
5/A
54
P6.
6/A
6/D
AC
05
P6.
7/A
7/D
AC
1/S
VS
IN6
P6.2/A261V
RE
F+
7
AVCC64
AVSS62
P6.1/A160
P6.0/A059
TMS56
P1.
4/S
MC
LK16
VE
RE
F+
10
VR
EF
-/V
ER
EF
-11
XT2IN53
XT2OUT52
P5.5/SMCLK49
P5.7/TBOUTH.SVSOUT51
P5.6/ACLK50
P1.5/TA0 17
P1.6/TA1 18
P1.7/TA2 19
P5.
4/M
CLK
48
P2.6/ADC12C/DMAE0 26
P2.7/TA0 27
P5.
044
P5.
145
P5.
246
P5.
347
P4.
339
P4.
440
P4.
541
P4.
642
P4.
7/T
BC
LK43
P4.
0/T
B0
36P
4.1/
TB
137
P4.
2/T
B2
38
R8
9N
O-P
OP
R2
0710
0
L14
BLM
41P
750S
PT
Y6
8MH
z
14
R2
111K
C1
9N
O-P
OP
C92
.1u
F
C95
.1u
F
U1
0
TS
OP
3484
0
23 1
+C
981
0uF
6.3
V
C9
6
0.1
uF
L71
BLM
41P
750S
PT
R8
310
0
C2
2N
O-P
OP
C23
18
pF
Y5
32.7
68K
Hz 1
2
+C
104
10
uF 6
.3V
C9
9
0.1
uF
L70
BLM
41P
750
SP
T
R1
10N
O-P
OP
R22
810
KR
206
1K
J3
HE
AD
ER
7X
2
TD
O/T
DI
1N
C2
2T
DI/V
PP
3V
CC
_MS
P4
TM
S5
XO
UT
6T
CK
7T
ES
T/V
PP
8G
ND
9A
CLK
10R
ST
/NM
I11
AC
LKE
N12
NC
113
TC
LKE
N14
+C
93
10
uF 6
.3V
R8
510
0K
R2
101K
R8
210
K
R84
47K
BH
T1
BA
203
2SM
2 1
C26
18
pF
Spectrum Digital, Inc
A-24 DM355 EVM Technical Reference
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
ALT
_3V
3
ALT
_3V
3
ALT
_3V
3
AL
T_3
V3
AL
T_3
V3
AL
T_3
V3
AL
T_3
V3
ALT
_3V
3
AL
T_3
V3
LE
D2
22
LE
D5
22
LE
D6
22
LE
D7
22
LE
D1
22
LE
D3
22
LE
D4
22
LE
D0
22
PB
_R
ES
ET
n22
SW
_DIP
022
SW
_DIP
122
SW
_DIP
222
PB
_SW
102
2
PB
_SW
112
2
PB
_SW
122
2
PB
_SW
132
2
NT
SC
_PA
L22
PB
_SW
142
2
SW
_DIP
322
Siz
e:
Da
te:
DW
G N
OR
evi
sio
n:
Sh
eet
of
Titl
e:
Pa
ge
Co
nte
nts
:
A
SP
EC
TR
UM
DIG
ITA
L IN
CO
RP
OR
AT
ED
5099
02-0
001
Fri
da
y, M
arc
h 1
4,
20
08
232
6
B
DM
35
5
Eva
lua
tion
Mod
ule
SW
ITC
HE
S,
LE
DS
ET
C
NTSC
PAL
R16
633
0
R3
14
0
SW
10
PU
SH
BU
TT
ON
SW
AA
AB
BB
DS
21
LE
D
DS
19
LE
D
R1
70
330
R1
6733
0
DS
14
LE
D
R2
2210
K
R1
7333
0
R3
45
10K
DS
17
LE
D
SW
13
PU
SH
BU
TT
ON
SW
AA
AB
BB
R2
2110
K
R2
2310
K
R2
2010
KS
W11
PU
SH
BU
TT
ON
SW
AA
AB
BB
R3
4633
C2
42
1u
FD
S2
0
LE
D
R1
69
330
RN
26
RP
AC
K4-
1K
1 2 3 45678
C2
43
1u
F
R1
6833
0
DS
18
LE
D
DS
16
LE
D
C3
68
1u
F
R17
233
0
1 2 3 4
ON
SW
6
DIP
_S
WIT
CH
-4
1 2 3 45678
SW
5
PU
SH
BU
TT
ON
SW
AA
AB
BB
R2
1910
K
RN
27
RP
AC
K4
-10K
12345
678
C2
44
1u
F
J1 HE
AD
ER
31 2 3
C2
45
1u
F
DS
15
LE
D
SW
14
PU
SH
BU
TT
ON
SW
AA
AB
BB
R1
7133
0
SW
12
PU
SH
BU
TT
ON
SW
AA
AB
BB
C2
46
1u
F
Spectrum Digital, Inc
A-25
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
McB
SP
_C
LK
R0
McB
SP
_CLK
X0
McB
SP
_FS
X0
McB
SP
_F
SR
0
McB
SP
_D
R0
McB
SP
_DX
0
VC
C_
5V
VC
C_
3V
3V
CC
_3
V3
VC
C_
1V
8
SP
I1_
SD
O2
SP
I1_
SD
I2
SP
I1_
SC
LK2S
PI1
_S
DE
NA
02
I2C
_D
AT
A2
,15,
18,1
9,2
2S
YS
_R
ES
ET
z2
2
McB
SP
_DX
02
McB
SP
_CLK
X0
2M
cBS
P_F
SX
02
McB
SP
_DR
02
McB
SP
_CLK
R0
2M
cBS
P_F
SR
02
I2C
_S
CL
K2
,15
,18,
19
,22
DM
350
_TIM
ER
IN3
2
UA
RT
1_T
XD
2U
AR
T1
_R
XD
2G
IO1
87
Siz
e:
Da
te:
DW
G N
OR
evi
sio
n:
Sh
eet
of
Titl
e:
Pa
ge
Co
nte
nts
:
A
SP
EC
TR
UM
DIG
ITA
L I
NC
OR
PO
RA
TE
D
5099
02-0
001
Fri
da
y, M
arch
14
, 2
00
824
26
B
DM
355
E
valu
atio
n M
odul
e
I/O
DA
UG
HT
ER
CA
RD
IN
TE
RF
AC
E
DC
3
SM
T R
EC
PT
AC
LE
15X
2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29
Spectrum Digital, Inc
A-26 DM355 EVM Technical Reference
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
CO
RE
_P
WR
_O
K
MS
P43
0_
1V3_
EN
AB
LE
VC
C_
5V
VC
C_
5V
AG
ND
VC
C_
5V
VC
C_
1V3
ALT
_3V
3
MS
P4
30_
1V
3_E
NA
BLE
22
ALT
_M
SP
430_
RE
SE
Tz
22
Siz
e:
Da
te:
DW
G N
OR
evi
sio
n:
Sh
eet
of
Titl
e:
Pa
ge
Co
nte
nts
:
A
SP
EC
TR
UM
DIG
ITA
L I
NC
OR
PO
RA
TE
D
5099
02-0
001
Fri
da
y, M
arch
14
, 2
00
825
26
B
DM
355
E
valu
atio
n M
odul
e
PO
WE
R S
UP
PL
Y M
SP
43
0_3
V3
, D
SP
CO
RE
( 1V
3)
3.3 sq in AGND,
min
thermal pad
Connect
at pin
1
EMI SUPPRESION. LOCATE NEAR EACH REGULATOR. 6
VIAS FROM PAD TO PLANE OR DIRECT TIE.
GND
Test Points
Vout = Vref * ( 1 + R1503/R1504)
Vref = 1.182 Volts
Vout = 3.6 volts
R1503 = 346K
1.4V -> 17.4K 1%
1.2V -> 28.0K 1%
1.1V -> 42.2K 1%
1.3V -> 22.1K 1%
TP
26T
P-6
0
R27
42
2.1
K 1
%
C3
22
0.1
uF
TP
21T
P-3
0C
317
330
0pF
TP
27T
P-6
0
U5
5
TP
S54
310
PW
P1
013
38-0
001
AG
ND
1
VS
EN
SE
2
CO
MP
3
PW
RG
D4
BO
OT
5
PH
16
PH
27
PH
38
PH
49
PH
510
PG
ND
111
PG
ND
212
PG
ND
313
VIN
114
VIN
215
VIN
316
VB
IAS
17S
S/E
NA
18S
YN
C19
RT
20P
OW
ER
PA
D21
C31
30
.01
uF
L49
BLM
41P
750
SP
T
L62
BL
M4
1P75
0SP
T
C3
24
100
0pF
R9
51
0K
C3
19
NO
-PO
P
R1
783
48
K 1
%
C3
14
0.1
uF
TP
25T
P-6
0T
P29
TP
-60
R2
77
10
7 1
%
TP
30T
P-6
0
R27
91
0K
1%
R27
61
.65
K 1
%
C3
18
0.0
47
uF
+C
20
91
0u
F
1 2
+C
210
10
uF
1 2
C3
165
60p
F
R2
75
71
.5K
1%
C2
12
0.1
uF
1 2
C3
15
0.0
39u
F
R2
800
.02
5
+C
321
10
uF
LE
SR
L50
2.7
uH
C2
11
0.1
uF
R1
791
69
K 1
%
+C
323
10
0u
F 4
V
+C
32
5
100
uF
U2
0
TP
S7
301Q
DR
G4
IN3
OU
T5
SE
NS
E7
EN
2
IN4
GN
D1
RE
SE
T8
OU
T6
C3
20
0.1
uF
R27
8
10K
TP
23T
P-6
0
R3
49 0
TP
28T
P-6
0
TP
22T
P-6
0
Spectrum Digital, Inc
A-27
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
3V
3_
PW
R_O
K
1V8
_PW
R_
OK
AG
ND
VC
C_
3V3
VC
C_
5V
VC
C_
5V
VC
C_
5V
AG
ND
VC
C_1
V8
VC
C_5
V
MS
P4
30_
1V8
_EN
AB
LE
22
MS
P4
30_3
V3_
EN
AB
LE2
2
Siz
e:
Da
te:
DW
G N
OR
evi
sio
n:
Sh
eet
of
Titl
e:
Pa
ge
Co
nte
nts
:
A
SP
EC
TR
UM
DIG
ITA
L IN
CO
RP
OR
AT
ED
5099
02-0
001
Fri
da
y, M
arc
h 1
4,
20
08
262
6
B
DM
35
5
Eva
luat
ion
Mo
dul
e
PO
WE
R S
UP
PL
Y 3
V3
, 1
V8
3.3 sq in AGND,
minthermal pad
Connect
at pin
1
Sets
Voltage
EMI SUPPRESION. LOCATE NEAR EACH REGULATOR. 6
VIAS FROM PAD TO PLANE OR DIRECT TIE.
3.3V @1.5Amp Max
2.5
MM
JA
CK
3.3 sq in AGND,
min
thermal pad
Connect
at pin
1
Sets
Voltage
EMI SUPPRESION. LOCATE NEAR EACH REGULATOR. 6
VIAS FROM PAD TO PLANE OR DIRECT TIE.
SILKSCREEN:
5V IN
U5
9
TP
S54
310P
WP
1013
38-0
001
AG
ND
1
VS
EN
SE
2
CO
MP
3
PW
RG
D4
BO
OT
5
PH
16
PH
27
PH
38
PH
49
PH
510
PG
ND
111
PG
ND
212
PG
ND
313
VIN
114
VIN
215
VIN
316
VB
IAS
17S
S/E
NA
18S
YN
C19
RT
20P
OW
ER
PA
D21
TP
32T
P-3
0
+C
34
3
100
uF
4V
R3
02
2K
1%
L52
3.3
uH
C3
44
1000
pF
R3
01
71
.5K
1%
C3
49
0.0
39
uF
R3
16
NO
-PO
P
C3
54
0.1
uF
+C
357
10
0u
F 4
V
R3
031
07 1
%
R8
71
0K
R2
961
07 1
%
D3
SM
CJ6
A
TP
37T
P-6
0
1
+C
34
2
10
uF
LE
SR
R2
99
220
C3
410
.1u
F+
C3
45
100
uF
4V
C3
38
NO
-PO
P
C3
53
NO
-PO
P
C3
34
0.0
39
uF
+C
34
047
uF
R3
93
0
TP
33T
P-6
0
R2
94
71
.5K
1%
C33
54
70p
F
R3
06
0.0
25
U6
0
TP
S54
310P
WP
1013
38-0
001
AG
ND
1
VS
EN
SE
2
CO
MP
3
PW
RG
D4
BO
OT
5
PH
16
PH
27
PH
38
PH
49
PH
510
PG
ND
111
PG
ND
212
PG
ND
313
VIN
114
VIN
215
VIN
316
VB
IAS
17S
S/E
NA
18S
YN
C19
RT
20P
OW
ER
PA
D21
C3
504
70p
F
J16
RA
SM
712
SLE
EV
ES
HU
NT
CE
NT
ER
C3
478
200
pF
R29
32
K 1
%
R4
39
0
R2
98
0.0
25
TP
31T
P-3
0
L53
BLM
41P
750S
PT
L51
BL
M4
1P75
0SP
T
C3
56
0.1
uF
TP
38T
P-6
0
DS
5
GR
EE
N
C3
32
820
0pF
C3
39
0.1
uF
R3
00
10
.2K
1%
R3
05
10
K 1
%
R3
04
10K
R2
95
10K
R2
971
0K
1%
L54
2.7
uH
C3
58
10
00p
F
R29
13
.74
K 1
%
TP34
TP-6
0
TP
36TP
-30
+C
35
51
0u
F L
ES
R
+C
346
10
0 u
F
C3
37
0.0
47
uF
+C
35
9
10
0 u
F
C3
52
0.0
47
uF
C3
33
0.1
uF
C3
48
0.1
uF
C3
36
330
0pF
R9
410
K
F1
F_
4.0
A
12
C3
51
3300
pF
B-1
Appendix B
Mechanical Information
This appendix contains the mechanical information about the DM355EVM produced by Spectrum Digital.