TLM based software control of UVCs

for Vertical Verification Reuse

Sandeep Jana (ST),

Sonik Sachdeva (ST),

Krishna Kumar (ST),

Swami Venkatesan (Cadence),

Debajyoti Mukherjee (Cadence)

Typical TLM Based Verification Environment

TLM Based Vertical Verification Reuse

Challenges for VVR

Summary of Challenges

Solution : VAL/VRI to control UVCs

Use Model: IP Verification

Use Model: SoC Verification

Test case using CDN-VRI-API

Solution – Software Layers

• Flexible Software Approach for reusable tests

Final Environment

Benefits

Conclusion

Agenda

Time

Speaker

Presentation

2

Typical TLM Based Verification

environment3

LMI EMI PROC

Test Code (in C)

ICN

IP1 IP2

TLM RTL User Code Transactor (Sc or SCEMI)

BFM

IO

Injector

Receiver

Simulation Emulation

SOC

Memory

Virtual Register

SLM

RTL IP3

BFM BFM

UVC/

VIP

4

TLM based Vertical Verification Reuse

RTL IP3

PROC

IP TESTS

ICN

IO

Injector

Receiver

TLM RTL User Code Transactor (Sc or SCEMI) Simulation Emulation

TLM IP

Memory

Virtual Register

SLM

BFM

PCIe

VIPBFM

RTL IP3

ICNTLM TAC Channel

EMI

SOC Verif Kit

Transactor

IP1 IP2

BFMIO

Injector

Receiver

SOC

LMI

SLM

USB

PCIe

PROC

BFM

VIP

uVC

IP -

>SOC

Challenges for VVR

With the emergence of (UVM) the hardware verification interface has beenstandardized, however this is still out of bounds of test developers who primarilydevelop their tests in embedded C. Most of the embedded test infrastructuretoday use “trick-boxes” for controlling simple Bus functional models (BFM) froman embedded software.

• These “trick-boxes” are not scalable to complex protocols like USB,PCIe, Ethernet etc.

• Do not provide advance stimulation generation or exhaustive coverageand data checks that a UVM based verification component (UVC)provides.

RTL IP3

ICNTLM TAC Channel

EMI

Test Code (in C)

Transactor

IP1 IP2

BFM

IO

Injector

Receiver

SOC

LMI

USB

Ethernet

PROC

BFM

VIP

uVCNo C control

for VIPS

Re - Usable C

Test with minimal

effort

6

Summary of Challenges

• A Interface to configure and control VIPs from C

• Ease of integration in verif environment

• Ease of reusability from IP to SOC.

• Provides VIP sequence library that can be used for developing C test

suites

• A test case infrastructure providing a well defined test layers

facilitation easy re-use of IP Tests to SOC.

Solution – VAL/VRI to control UVCs

CDN VAL C-APIs

User Test Code

VIP (eVC, PureSpec)

Registers

CDN VAL Layer

Platform

TL

M

2.0

• What is Virtual Abstraction Layer/Virtual

Register Interface?

• An interface layer over VIP (PS/eVC) to

make it controllable through C-interface.

• Verification Abstraction Layer is a high level

API that hides the low level Register

interface to UVC which is VRI.

• Provides a TLM 2.0 target socket to

connect to a TLM environment.

• Hides VIP intrinsic details irrespective of

VIP type (eVC/PureSpec).

• This controllability of VIPs are exposed to

user through predefined C-APIs.

• APIs are provided by the VIP provider.

• No physical layer to take care at VIP level

TLM Environment

Use Model: IP Verification

TLM

Memory TLM Processor

Test Code (in C)Using VRI/VAL APIs

TLM ICN

IP1 IP2

RTL Testbench

RTL DUT

BFM BFM

SATA eVC/Denali

RTL Wrapper

PCIe eVC/Denali

RTL Wrapper

Ethernet eVC/Denali

RTL Wrapper

USB eVC/Denali

RTL Wrapper

PCIe TLM 2

Wrapper USB TLM2

Wrapper

SATA TLM2

Wrapper

Ethernet TLM2

Wrapper

AMBA/ ST

bus protocol

TLM RTL User Code Transactor (SystemC)

Non physical link

CDN

Connected

on TLM

RTL IP3

Use Model: SoC Verification

ICNTLM TAC Channel

EMI

Test Code (in C)

Transactor

IP1 IP2

TLM RTL User Code Transactor (Sc or SCEMI)

BFM

IO

Injector

Receiver

Simulation Emulation

SOC

LMI

SLM

USB

Ethernet

PROC

BFM

VIP

uVC

Test Code (in C)Using VRI/VAL C APIs

Test case using CDN-VRI-API

void sata_main_test()

{

struct sata_register_htod_t reg_htod_info;

reg_htod_info.c_bit = 1;

reg_htod_info.features = 0x21;

reg_htod_info.secnum = 0x22;

reg_htod_info.cyllow = 0x23;

reg_htod_info.cylhigh = 0x24;

reg_htod_info.drvhead = 0xFF;

reg_htod_info.secnum_exp = 0x25;

reg_htod_info.cyllow_exp = 0x26;

reg_htod_info.cylhigh_exp = 0x27;

reg_htod_info.features_exp = 0x28;

reg_htod_info.seccnt = 0x29;

reg_htod_info.seccnt_exp = 0x2A;

reg_htod_info.hob = 0;

reg_htod_info.srst = 1;

reg_htod_info.ien = 0;

//call SATA VAL API

vri_sata_register_htod(0, &reg_htod_info,

1);

}

static int error_count = 0;

// main()

int esw_main(int argc, char * argv[])

{

// COB-init, boot, lmi-init,

error_count = pre_test_config();

// sata specific test

error_count = sata_main_test();

// test post checking

error_count =

test_post_processing();

return error_count;

}

void vri_sata_register_htod(

unsigned long instance_num,

struct sata_register_htod_t *reg_htod_info,

unsigned long frame_count)

{

// implementation

}

Main test SATA Main test (using

CDN-API)

CDN-VRI-API

Challenges for VVR revisited

RTL IP3

ICNTLM TAC Channel

EMI

Test Code (in C)

Transactor

IP1 IP2

BFM

IO

Injector

Receiver

SOC

LMI

USB

Ethernet

PROC

BFM

VIP

uVCVIPs can now

be controlled

through C

ReUsable C Test with

minimal effort

Solution – Software Layers 12

Global_hal

<Team>_hal

<IP>_hal

SW virtual TOP

Reusable Test code

from IP to SoC

S

O

F

T

W

A

R

EGlobal API Services

Team API Services

IP API (I/O & env) Services(Driver)

Platform Specific

tst tst tst tst tst tst tst tst tst tst

Flexible Software Approach for reusable tests

• Generic functions like Read/Write, print messages etc goes into Global

API’s

• IP Testbench specific tasks goes into IP API layer. For example

interrupt handling,VC configuration etc

• Configuration of IP (driver layer) goes into service layer

• Api’s implementation will differ from env to env. Services will remain

unchanged.

• Testcases will be written by using global and IP API’s/services.

13

VIPs

controlled

through C

RTL IP3

Final Environment

ICNTLM TAC Channel

EMI

Test Code (in C)Using VRI/VAL C APIs

Transactor

IP1 IP2

BFM

IO

Injector

Receiver

SOC

LMI

SLM

USB

Ethernet

PROC

BFM

VIP

uVC

ReUsable IP TESTs

Global Test Layer

Team Test Layer

ReUsable

C Test

15

Benefits

• Reuse of existing IP verification platforms and strategy

• Development of SOC verification environment in short time

• Reuse of existing test suites across the platform

• Develop complex system-level test case

16

Conclusion

• A complex IP/SOC Verification effort and time can be significantly

reduced using the VIP with TLM infrastructure

• This verification environment architecture is reusable and scalable

from IP to SOC level

• Exposing the complete VIP sequence library to TLM interface is

required to allow development of platform independent test suites

17

Thank You