tiq based analog to digital converters and power reduction principles · 2011-06-16 · tiq based...
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![Page 1: TIQ Based Analog to Digital Converters and Power Reduction Principles · 2011-06-16 · TIQ Based Analog to Digital Converters and Power Reduction Principles Vahe Arakelyan 2nd year](https://reader030.vdocuments.us/reader030/viewer/2022040522/5e7d23c786a64d1d1317d540/html5/thumbnails/1.jpg)
TIQ Based Analog to Digital Converters
and Power Reduction Principles
Vahe Arakelyan
2nd year Master Student
Synopsys Armenia Educational Department,
State Engineering University of Armenia
Moscow
March 21-24, 2011
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Outline
• Trade of Between Resolutions and Sampling Rates
• Block Diagram of a Flash ADC
• TIQ Flash ADC
• CMOS Inverter as a Comparator
• Advantages and Disadvantages
• Quantum Voltage Comparator
• Power Management Method
• The Power and Resolution Adaptive ADC
• Conclusion
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The Power and Resolution Adaptive
Flash ADC
22
18
10
6
2
14
100 10K1K 100K 10M1M 1G100M
Resolution(Bit)
Sampling rate (Hz)
Sigma-Delta
Pipelined
Flash
SAR
Portable instrumentation
Industrial process control
Smart transmitters
Remote data acquisition
Weigh scales
Direct RF Downconversion & RF / IF processing
High speed data acquisition
Digital Oscilloscopes & Radar / ECM sistems
Wideband Satellite receivers
Data / signal acquisition
Pen digitizers & industrial controls
Portable / battery-powered devices
Video, HDTV
Medical & CCD imaging
xDSL, Cable modem, fast
Ethernet
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Applications: Digital Oscilloscopes
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Applications: Satellite Receivers
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Applications: Radar Sistems
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Block Diagram of a Flash ADC
DN-1
DN-2
D2
D1
D0
Dig
ital o
utp
ut
Vref
2N-1
: N
En
co
der
R
R
R
R
R
R
Vin
R
Thermometer code
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TIQ Flash ADC
TIQ
Threshold Inverter
Quantization
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CMOS Inverter as a Comparator
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Simulation Results for 4bit ADC
Wp=0.15u Wp=7u
Vth
t
Vin
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Comparator Sensitivity
Sensitivity to Temperature and Power Supply Voltage
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Simulation Results for Comparator
Sensitivity
Variations Min Vth (V) Max Vth (V)
-40 C 0.42 0.65
25 C 0.43 0.67
125 C 0.44 0.68
1V (-5%) 0.4 0.6
1V (+5%) 0.47 0.66
Max deviation 3.1 % 6.5%
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Integral and Differential Nonlinearity
The internal voltage reference varies due to the
process parameter variation during manufacturing.
Such variations create limits on the linearity variation
of the ADC
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Systematic Size Variation Method
0.15
2.15
4.15
6.150
1
2
3
4
5
6
0.15 1.15 2.15 3.15 4.15 5.15 6.15 7.15 WpWn
Vth
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Quantum Voltage Comparator
M3 M4
M1 M2
Vb
Vin
Va
Vout
Vin
Vout
Vin = Vout
Vin
Vout
Vout1
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Advantages
• Adaptable to future CMOS technology
development, going to smaller feature size and
lower supply voltage
• No need for a resistor ladder circuit as the
reference voltage source
• No need for switches, clock signals, or coupling
capacitors for the voltage comparison
• Suitable for the standard CMOS technology -
ideal for the complete SoC implementation
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Disadvantages
• The ADC input range varies due to
process parameter changes from one
fabrication to another fabrication
• The inverter input is single ended, not
differential, causing the ADC to
become more susceptible to noise
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Simulation results for 3 bit TIQ ADC
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Simulation results for 4 bit TIQ ADC
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Simulation results for 6 bit TIQ ADC
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Relative currents used by each
component
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Power Management Method (1)
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Power Management Method (2)
Sampling Rate
(sps)
Power
(mW)
1.7G 203.7
161.3M 69.38
32.3M 14.1
6.5M 3.37
1.3M 0.18
When the sampling interval was increased by 5 times, the power
dissipation was proportionally reduced
Power dissipation is linearly proportional to the frequency scaling
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The Power and Resolution Adaptive ADC
(1)
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The Power and Resolution Adaptive ADC
(2)
• The power dissipation is
reduced by almost 50% for
each resolution bit reduction
• ADC speed increase as the number
of resolution bits is decreased
Resolution
(bits)
Power
(mW)
Speed
(GSPS)
6 434.63 1.25
5 223.15 1.61
4 120.29 2.22
3 68.63 3.03
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Conclusion
• Small overhead for switching
• Unused comparators go to standby mode
• Prolong the battery-powered operation
• Linear power reduction with linear frequency scaling
• Exponential power reduction with linear
resolution reduction
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Thank you