MEDICAPS INSTITIUE OF TECHNOLOGY AND MANAGEMENTE

LIST OF EXPERIMENTSSUBJECT: SOFTWARE LAB-1(TINA/PROTEUS)

CLASS: II Year/III Sem SUBJECT CODE: EC– 306

S.No. TITLE OF EXPERIMENT

1. INTRODUCTION TO TINA SOFTWARE.

2TO STUDY NODAL AND MESH ANALYSIS ON TINA SOFTWARE.

3TO STUDY HALF-WAVE AND FULL-WAVE RECTIFIRES ON TINA SOFTWARE.

4TO STUDY CLIPPER CIRCUITS ON TINA SOFTWARE.

5TO STUDY CLAMPER CIRCUITS ON TINA SOFTWARE.

6TO STUDY PN JUNCTION DIODE CHARACTERISTICS ON TINA SOFTWARE.

7TO STUDY MAXIMUM TRANSFER THEOREM ON TINA SOFTWARE.

8

TO STUDY TRANSIENT RESPONSE OF SERIES RLC CIRCUIT ON TINA

SOFTWARE.

9TO STUDY BASIC LOGIC GATES ON TINA SOFTWARE.

10 TO STUDY THE PROCEDURE TO DESIGN PCB LAYOUT IN TINA/PROTEUS.

MEDICAPS INSTITUTE OF TECHNOLOGY AND MANAGEMENT

BRANCH: ECSUBJECT: SOFTWARE LAB 1(EC-306)

EXPERIMENT NO. 1

INTRODUCTION:What is TINA?TINA is a powerful yet affordable software package for designing, simulating and analyzing electronic circuits. It works equally well with linear and nonlinear analog circuits, digital and mixed circuits. Analysis results can be displayed as sophisticated diagrams or on a range of virtual instruments. The standard library contains over 20000 components and can be extended by the user. Electronics engineers will find TINA an invaluable, easy to use and high performance tool. TINA can also be used in the training environment. It includes unique tools for testing students knowledge, monitoring progress and introducing troubleshooting techniques. With optional hardware it can be used to test real Circuits for comparison with the results obtained from simulation. Circuit diagrams are entered using an easy to use schematic editor. Component Symbols chosen from the Component bar are positioned, moved, rotated and/or mirrored on the screen by the mouse. TINA's semiconductor Catalog allows the user to select components from a user-extendible library. TINA gives you tools to enhance your schematic by adding graphics. Electrical Rules Check (ERC) will examine the circuit for questionable Connections between components and display the results in the Electrical Rules Check window. ERC is invoked automatically, so missing connections will be brought to your attention before analysis begins. TINA has large libraries containing Spice- and S-parameter models provided by semiconductor manufacturers such as Analog Devices, Texas Instruments, National Semiconductor and others. You can add more models to these libraries or create your own Spice- and S-parameter Library library usingTINA's Library Manager (LM). The circuit diagrams and the calculated or measured results can be printed or saved to files in standard Windows WMF format. These output files can be processed by a number of well known software packages (Microsoft Word, Corel Draw etc.). DC analysis calculates the DC operating point and the transfer characteristic of analog circuits. The user can display the calculated and/or measured nodal voltages at any node by selecting the node with the cursor. For digital circuits, the program solves the logic state equation and displays the results at each node step-by-step.In analog and mixed-mode Transient analysis, the input waveform can be selected from several options (pulse, unit step, sinusoidal, triangular wave, square wave, general trapezoidal waveform, and user-defined excitation) and parametricized as required. For digital circuits, programmable clocks and digital signal generators are available.

In addition to the calculation and display of the response, the coefficients of the Fourier series, the harmonic distortion for periodic signals, and the Fourier spectrum of non-periodic signals can also be calculated.Digital Simulation. TINA also includes a powerful simulator for digital Circuits. You can trace circuit operation step-by-step, forward and backward, or view the complete time diagram in a special logic analyzer window. In Addition to logic gates, ICs and other digital parts from TINA's large component Library.The optional integrated VHDL simulator verifies VHDL designs both in Digital and mixed-signal analog-digital environments. The VHDL simulator Includes Waveform Display, Project Management and Hierarchy Browser, And 64-bit time. Circuits containing VHDL components are translated into the C++ language and then compiled to a binary executable file. This allows extremely fast and efficient simulation and testing of large circuits.In AC analysis, complex voltage, current, impedance, and power can be calculated. In addition, Nyquist and Bode diagrams of the amplitude, phase and group delay characteristics of analog circuits can be plotted. You can also draw the complex phasor diagram. For non-linear networks, the operating point linearization is done automatically.Network analysis determines the two-port parameters of networks (S, Z, Y, H). This is especially useful if you work with RF circuits. Results can be displayed in Smith, Polar, or other diagrams. The network analysis is carried out with the help of TINA’s network analyzer. Noise analysis determines the noise spectrum with respect to either the input or the output. The noise power and the signal- to-noise ratio (SNR) can also be calculated.Symbolic analysis produces the transfer function and the closed form expression of the response of analog linear networks in DC, AC, and transient modes. With TINA you can make quality documents incorporating Bode plots, Nyquist, Phasor, Polar and Smith diagrams, transient responses, digital waveforms and other data using linear or logarithmic scales. TINA’S powerful tools can make real-time measurements on real circuits and display the results on its virtual instruments. TINA has special operating modes for training and for examination.

MEDICAPS INSTITUTE OF TECHNOLOGY AND MANAGEMENT

BRANCH: ECSUBJECT: SOFTWARE LAB 1(EC-306)

EXPERIMENT NO. 2

AIM: TO STUDY NODAL AND MESH ANALYSIS ON TINA SOFTWARE.

COMPONENTS & TOOLS REQUIRED: Computer System installed with TINA software.

THEORY: The complete set of Kirchhoff’s equations can be significantly simplified by the node potential method. Using this method, Kirchhoff’s voltage law is satisfied automatically, and we need only write node equations to satisfy Kirchhoff’s current law, too. Satisfying Kirchhoff’s voltage law is achieved by using node potentials (also called node or nodal voltages) with respect to a particular node called the reference node. In other words, all the voltages in the circuit are relative to the reference node, which is normally considered to have 0 potential. It is easy to see that with these voltage definitions Kirchhoff’s voltage law is satisfied automatically, since writing loop equations with these potentials leads to identity. Note that for a circuit having N nodes you should write only N - 1 equation. Normally, the node equation for the reference node is left out.The sum of all currents in the circuit is zero since each current is flowing in and out of a node. Therefore, the Nth node equation is not independent from the previous N-1 equations. If we included all the N equations, we would have an unsolvable system of equations.The node potential method (also called nodal analysis) is the method best suited to computer applications. Most circuit analysis programs--including TINA--are based on this method.

The steps of the nodal analysis:

1. Pick a reference node with 0 node potential and label each remaining node with V1, V2

or j1, j2and so on.2. Apply Kirchhoff’s current law at each node except the reference node. Use Ohm’s law

to express unknown currents from node potentials and voltage source voltages when necessary. For all unknown currents, assume the same reference direction (e.g. pointing out of the node) for each application of Kirchhoff’s current law.

3. Solve the resulting node equations for the node voltages.4. Determine any requested current or voltage in the circuit using the node voltages. Let us illustrate step 2 by writing the node equation for node V1 of the following circuit fragment:

First, find the current from node V1 to node V2. We will use Ohm’s Law at R1. The voltage across R1 is V1 - V2 - VS1 And the current through R1 (and from node V1 to node V2) is

Note that this current has a reference direction pointing out of the V1 node. Using the convention for currents pointing out of a node, it should be taken into account in the node equation with a positive sign. The current expression of the branch between V1 and V3 will be similar, but since VS2 is in the opposite direction from VS1 (which means the potential of the node between VS2 and R2 is V3-VS2), the current is

Finally, because of the indicated reference direction, IS2 should have a positive sign and IS1 a negative sign in the node equation. The node equation:

MESH ANALYSIS: Another way of simplifying the complete set of Kirchhoff’s equations is the mesh or loop current method. Using this method, Kirchhoff’s current law is satisfied automatically, and the loop equations that we write also satisfy Kirchhoff’s voltage law. Satisfying Kirchhoff’s current law is achieved by assigning closed current loops called mesh or loop currents to each independent loop of the circuit and using these currents to express all the other quantities of the circuit. Since the loop currents are closed, the current that flows into a node must also flow out of the node; so writing node equations with these currents leads to identity. Let us first consider the method of mesh currents.

We first note that the mesh current method is only applicable for “planar” circuits. Planar circuits have no crossing wires when drawn on a plane. Often, by redrawing a circuit which appears to be non-planar, you can determine that it is, in fact, planar. For non-planar circuits, use the loop current method described later in this chapter.

To explain the idea of mesh currents, imagine the branches of the circuit as “fishing net” and assign a mesh current to each mesh of the net. (Sometimes it is also said that a closed current loop is assigned in each “window” of the circuit.)

Fig: The schematic diagram

Fig: The “fishing net” or the graph of the circuit

The technique of representing the circuit by a simple drawing, called a graph, is quite powerful. Since Kirchhoff’s laws do not depend on the nature of the components, you can disregard the concrete components and substitute for them simple line segments, called the branches of the graph. Representing circuits by graphs allows us to use the techniques of mathematical graph theory. This helps us explore the topological nature of a circuit and determine the independent loops.

The steps of mesh current analysis:

1. Assign a mesh current to each mesh. Although the direction is arbitrary, it is customary to use the clockwise direction.

2. Apply Kirchhoff’s voltage law (KVL) around each mesh, in the same direction as the mesh currents. If a resistor has two or more mesh currents through it, the total current through the resistor is calculated as the algebraic sum of the mesh currents. In other words, if a current flowing through the resistor has the same direction as the mesh current of the loop; it has a positive sign, otherwise a negative sign in the sum. Voltage sources are taken into account as usual, if their direction is the same as the mesh current, their voltage is taken to be positive, otherwise negative, in the KVL equations. Usually, for current sources, only one mesh current flows through the source, and that current has the same direction as the current of the source. If this is not the case, use the more general loop current method, described later in this paragraph. There is no need to write KVL equations for loops containing mesh currents assigned to current sources.

3. Solve the resulting loop equations for the mesh currents.

4. Determine any requested current or voltage in the circuit using the mesh currents.

CIRCUIT DIAGRAME:

NODE ANALYSIS:

MESH ANALYSIS:

CALCULATIONS:

RESULT: -

REPORT QUESTIONS:

(1) What is KVL?(2) What is KCL?(3)What is difference between Mesh and loop?

Exp -3

1. AIM:

2. COMPONENTS & TOOLS REQUIRED:

Computer System installed with TINA software

3. THEORY:

Half wave rectifier: The half wave rectifier circuit can be used in a number of different

applications. The half wave rectifier circuit normally utilizes a single diode. This passes

one half of the cycle, and blocks the other. In this way only half of the cycle is used, but

current is only allowed to flow in one direction.

Basic diode half wave rectifier circuit

The half wave rectifier circuit can often be used with a transformer if it is to be used for

powering equipment in any way. Normally in this application the input alternating

waveform is provided via a transformer. This is used to provide the required input

voltage.

Diode half wave rectifier circuit with transformer

HALF WAVE RECTIFIER DIODE REQUIREMENTS:

When designing a half wave rectifier circuit, it is necessary to ensure that the diode

is capable of providing the required performance. While there are very many

parameters that define individual diodes, and these may need to be taken into

account for a given design, some of the major parameters are detailed below:

Forward current:   It is necessary that the diode is able to handle the levels of

average current and peak current flowing through it in a half wave rectifier circuit.

The current will peak as a result of the capacitor smoothing circuit. As the current

only flows as the capacitor charges up, the current is in short bursts which are

much higher than the average current.

Peak inverse voltage:   The diode must be able to reliably withstand the peak

reverse or inverse voltages that appear across it. The peak voltages are not just the

output voltage, but higher. The peak inverse voltage rating of the diode should be

at least 2 x √2 times the RMS voltage of the input. This is because the output is

normally smoothed by a capacitor, and this will take a value that is the peak of the

input waveform. This will be √2 times the RMS voltage. With this voltage on the

output, the input waveform on the "blocked" half of the cycle will fall and reach a

peak value at the bottom of the crest of √2 times the RMS value. The maximum

reverse value seen across the rectifier diode is the sum of these two voltages.

The full wave rectifier circuit is one that is widely used for power supplies and

many other areas where a full wave rectification is required. The full wave

rectifier circuit is used in most rectifier applications because of the advantages

it offers. While it is a little more complicated, this normally outweighs the

disadvantages. However sometimes it may not be optimum or necessary to use

a full wave rectifier circuit.

Full wave rectifier: The concept of the full wave rectifier is that it utilizes both halves of the waveform to provide an output and this greatly improves its efficiency.

Comparison of full and half wave rectifier circuits

Bridge rectifier: a full-wave rectifier using 4 diodes.

A further advantage when used in a power supply is that the resulting output is much

easier to smooth. When using a smoothing capacitor, the time between the peaks is

much greater for a half wave rectifier than for a full wave rectifier.

Smoothed waveform from diode rectifier circuit

It can be seen from the circuit diagram, that the fundamental frequency within the

rectified waveform is twice that of the source waveform - there are twice as many

peaks in the rectified waveform. This can often be heard when there is a small

amount of background hum on an audio circuit.

5. CIRCUIT DIAGRAME:

6. CALCULATIONS:

7. RESULT: - Waveform of full wave and half wave circuit has been observed

successfully on TINA Software.

8. REPORT QUESTIONS:

(a) What is rectifier? Explain Full wave rectifier?(a) Explain the types of full wave rectifier circuit?(b) Compare half wave and Full wave Rectifier.

Exp4

1. AIM: TO STUDY CLIPPER CIRCUITS ON TINA SOFTWARE

2. COMPONENTS & TOOLS REQUIRED:

Computer System installed with TINA software

3. THEORY:

Clippers clip off a portion of the input signal without distorting the remaining

part of the waveform. In the positive clipper shown above the input waveform above Vref

is clipped off. If Vref = 0V, the entire positive half of the input waveform is clipped off.

Plot of input Vi (along X-axis) versus output Vo (along Y-axis) called transfer

characteristics of the circuit can also be used to study the working of the clippers. For stiff

clipper: 100RB < RS< 0.01RL, Where RB is bulk resistance of the diode. For diode

IN914, value of RB is 30.Series resistor RS must be 100times greater than bulk

resistance RB and 100 times smaller than load resistance RL.

If RB=30, select RS=1k and RL=100k.

WAVE FORMS

Fig. Input and output waveform for positive Clipper

5. CIRCUIT DIAGRAMES AND OUTPUT WAVEFORM:

6. RESULT: Characteristics for Clipper circuits were observed successfully.

7. VIVA -VOCE QUESTIONS:

(b) What is Clipper? Explain Positive clipper?

(c) What is need of using Clipper Circuit?

Exp-51. AIM: TO STUDY CLAMPER CIRCUITS ON TINA SOFTWARE

2. COMPONENTS & TOOLS REQUIRED:

Computer System installed with TINA software

3. THEORY:A clamper is an electronic circuit that fixes either the positive or the negative peak excursions of a signal to a defined value by shifting its DC value. The clamper does not restrict the peak-to-peak excursion of the signal, it moves the whole signal up or down so as to place the peaks at the reference level. A diode clamp (a simple, common type) consists of a diode, which conducts electric current in only one direction and prevents the signal exceeding the reference value; and a capacitor which provides a DC offset from the stored charge. The capacitor forms a time constant with the resistor load which determines the range of frequencies over which the clamper will be effective.

Positive unbiased voltage clamping shifts the amplitude of the input waveform so that all parts of it are greater than 0 V.

Types

Clamp circuits are categorized by their operation; negative or positive, and biased or unbiased. A positive clamp circuit outputs a purely positive waveform from an input signal; it offsets the input signal so that all of the waveform is greater than 0 V. A negative clamp is the opposite of this - this clamp outputs a purely negative waveform from an input signal.

A bias voltage between the diode and ground offsets the output voltage by that amount.

For example, an input signal of peak value 5 V (VIN = 5 V) is applied to a positive clamp with a bias of 3 V (VBIAS = 3 V), the peak output voltage will be

VOUT = 2VIN + VBIAS VOUT = 2 * 5 V + 3 V VOUT = 13 V

Positive unbiased

A positive unbiased clamp

In the negative cycle of the input AC signal, the diode is forward biased and conducts, charging the capacitor to the peak positive value of VIN. During the positive cycle, the diode is reverse biased and thus does not conduct. The output voltage is therefore equal to the voltage stored in the capacitor plus the input voltage gain, so VOUT = 2VIN

Negative unbiased

A negative unbiased clamp

A negative unbiased clamp is the opposite of the equivalent positive clamp. In the positive cycle of the input AC signal, the diode is forward biased and conducts, charging the capacitor to the peak value of VIN. During the negative cycle, the diode is reverse biased and thus does not conduct. The output voltage is therefore equal to the voltage stored in the capacitor plus the input voltage again, so VOUT = -2VIN

Positive biased

A positive biased clamp

A positive biased voltage clamp is identical to an equivalent unbiased clamp but with the output voltage offset by the bias amount VBIAS. Thus, VOUT = 2VIN + VBIAS

Negative biased

A negative biased clamp

A negative biased voltage clamp is likewise identical to an equivalent unbiased clamp but with the output voltage offset in the negative direction by the bias amount VBIAS. Thus, VOUT = -2VIN - VBIAS

5. CIRCUIT DIAGRAMES AND OUTPUT WAVEFORMS :

7. RESULT: Characteristics for Clamper circuits were observed successfully.

8. VIVA -VOCE QUESTIONS:

(b) What is Clamper? Explain different types of clampers?

(c) What are the applications of Clamper Circuit?

EXP 6:

1. AIM: To observe and draw the Forward and Reverse bias V-I Characteristics of a P-N

Junction diode.

2. COMPONENTS & TOOLS REQUIRED: Computer System installed with TINA software

3. THEORY:

A p-n junction diode conducts only in one direction. The V-I characteristics of

the diode are curve between voltage across the diode and current through the diode. When

external voltage is zero, circuit is open and the potential barrier does not allow the current

to flow. Therefore, the circuit current is zero. When P-type (Anode is connected to +ve

terminal and n- type (cathode) is connected to –ve terminal of the supply voltage, is

known as forward bias. The potential barrier is reduced when diode is in the forward

biased condition. At some forward voltage, the potential barrier altogether eliminated

and current starts flowing through the diode and also in the circuit. The diode is said to be

in ON state. The current increases with increasing forward voltage.

When N-type (cathode) is connected to +ve terminal and P-type (Anode) is

connected –ve terminal of the supply voltage is known as reverse bias and the potential

barrier across the junction increases. Therefore, the junction resistance becomes very high

and a very small current (reverse saturation current) flows in the circuit. The diode is said

to be in OFF state. The reverse bias current due to minority charge carriers.

Fig: VI Characteristics of PN Diode

4. CIRCUIT DIAGRAM:-

FORWARD BIAS:-

REVERSE BIAS:-

5. OBSERATION TABLE:

For Forward Bias:

S.N. Voltage(in V) Current(in mA)

For reverse Bias:

S.N. Voltage(in V) Current(in µA)

6. RESULT: - Forward and Reverse Bias characteristics for a p-n diode is verified

6. VIVA QESTIONS:-

EXP 7

1. AIM: To study maximum power transfer theorem on TINA software.

2. COMPONENTS & TOOLS REQUIRED: Computer System installed with TINA software

3. THEORY:

This theorem is used to determine the value of load, for which source transfer the

maximum power .According to the maximum power transfer theorem, a load will receive

maximum power from a source when its resistance (RL) is equal to the internal resistance

(RI) of the source. If the source circuit is already in the form of a Thevenin or Norton

equivalent circuit (a voltage or current source with an internal resistance), then the

solution is simple. If the circuit is not in the form of a Thevenin or Norton equivalent

circuit, we must first use Thevenin’s or Norton’s theorem to obtain the equivalent circuit.

This theorem states that:

“The maximum power is transferred to load impedance being connected to DC or AC

network, when the load impedance is equal to the complex conjugate of equivalent

internal impedance of network as seen from the load terminals”

Maximum power transfer in case of D.C. network:-

Fig. 6.1 shows the network for maximum power transfer. The load current is given by:

IL = VTH/RTH+RL

Power delivered to load: PL= I2

L x RL =VTH / (RTH + RL) 2 x RL

Condition for maximum power:

dPL /dRL = 0

RL = RTH

So load resistance should be equal to the internal resistance of circuit for receiving the

maximum power.

The maximum power from equation:

Pmax = V2TH /4RTH

Maximum power transfer theorem is useful in communication network and electronics

circuits where demand of maximum power is important rather than the efficiency. The

overall efficiency of a network supplying maximum power to any branch is only 50%.

According to the maximum power transfer theorem, a load will receive maximum power

from a source when its resistance (RL) is equal to the internal resistance (RI) of the source.

 5. CIRCUIT DIAGRAME:

6. RESULT: - Characteristics for maximum power transfer theorem is observed

7. VIVA -VOCE QUESTIONS:

(a) Explain Maximum power transfer theorem?

(b) What is the significance of this theorem?

EXP-8

1. AIM: To study the transient response of series RLC circuit.

2. COMPONENTS & TOOLS REQUIRED: Computer System installed with TINA software

3. THEORY:

Series RLC circuit:

Figure 1: RLC series circuitV - the voltage of the power sourceI - the current in the circuitR - the resistance of the resistorL - the inductance of the inductorC - the capacitance of the capacitor

In this circuit, the three components are all in series with the voltage source. The governing differential equation can be found by substituting into Kirchhoff's voltage law (KVL) the constitutive equation for each of the three elements. From KVL,

where are the voltages across R, L and C respectively and is the time varying voltage from the source. Substituting in the constitutive equations,

For the case where the source is an unchanging voltage, differentiating and dividing by L leads to the second order differential equation:

This can usefully be expressed in a more generally applicable form:

and are both in units of angular frequency. is called the neper frequency, or attenuation, and is a measure of how fast the transient response of the circuit will die away after the stimulus has been removed. Neper occurs in the name because the units can also be considered to be nepers per second, neper being a unit of attenuation. is the angular resonance frequency.[2]

For the case of the series RLC circuit these two parameters are given by:[3]

And

A useful parameter is the damping factor, which is defined as the ratio of these two,

In the case of the series RLC circuit, the damping factor is given by,

The value of the damping factor determines the type of transient that the circuit will exhibit. Some authors do not use and call the damping factor.

5. CIRCUIT DIAGRAME:

6. OUTPUT WAVEFORM:

7. RESULT: - Study of transient response of series RLC circuit have been done successfully.

7. VIVA -VOCE QUESTIONS:

EXP 9

1. AIM:

TO STUDY BASIC LOGIC GATES ON TINA SOFTWARE.

2. COMPONENTS & TOOLS REQUIRED: Computer System installed with TINA software

3. THEORY: The three basic logic gates are AND, OR, and NOT. These logic gates

are the building blocks of all digital circuits. Other logic gates such as NAND, NOR,

XOR, XNOR are derived from the three basic logic gates. The graphic symbol,

timing diagrams, and truth table for each logic gate is given below:

OBSERVATION TABLE:

RESULT: - Study of transient response of series RLC circuit have been done successfully.

VIVA -VOCE QUESTIONS:

EXP 10

A printed circuit board, or PCB, is used to mechanically support and electrically

connect electronic components using conductive pathways, tracks or signal traces etched

from copper sheets laminated onto a non-conductive substrate. It is also referred to as

printed wiring board (PWB) or etched wiring board. Printed circuit boards are used in

virtually all but the simplest commercially produced electronic devices.

A PCB populated with electronic components is called a printed circuit assembly

(PCA), printed circuit board assembly or PCB Assembly (PCBA). In informal use the

term "PCB" is used both for bare and assembled boards, the context clarifying the

meaning.

Alternatives to PCBs include wire wrap and point-to-point construction. PCBs must

initially be designed and laid out, but become cheaper, faster to make, and potentially

more reliable for high-volume production since production and soldering of PCBs can be

automated. Much of the electronics industry's PCB design, assembly, and quality control

needs are set by standards published by the IPC organization.

Manufacturing

Materials

onducting layers are typically made of thin copper foil. Insulating layers dielectric are

typically laminated together with epoxy resin prepreg. The board is typically coated with

a solder mask that is green in color. Other colors that are normally available are blue,

black, white and red. There are quite a few different dielectrics that can be chosen to

provide different insulating values depending on the requirements of the circuit. Some of

these dielectrics are polytetrafluoroethylene (Teflon), FR-4, FR-1, CEM-1 or CEM-3.

Well known prepreg materials used in the PCB industry are FR-2 (Phenolic cotton paper),

FR-3 (Cotton paper and epoxy), FR-4 (Woven glass and epoxy), FR-5 (Woven glass and

epoxy), FR-6 (Matte glass and polyester), G-10 (Woven glass and epoxy), CEM-1

(Cotton paper and epoxy), CEM-2 (Cotton paper and epoxy), CEM-3 (Non-woven glass

and epoxy), CEM-4 (Woven glass and epoxy), CEM-5 (Woven glass and polyester).

Thermal expansion is an important consideration especially with ball grid array (BGA)

and naked die technologies, and glass fiber offers the best dimensional stability.

FR-4 is by far the most common material used today. The board with copper on it is

called "copper-clad laminate".

Copper foil thickness can be specified in ounces per square foot or micrometres. One

ounce per square foot is 1.344 mils or 34 micrometres.

Patterning (etching)

The vast majority of printed circuit boards are made by bonding a layer of copper

over the entire substrate, sometimes on both sides, (creating a "blank PCB") then

removing unwanted copper after applying a temporary mask (e.g., by etching),

leaving only the desired copper traces. A few PCBs are made by adding traces to the

bare substrate (or a substrate with a very thin layer of copper) usually by a complex

process of multiple electroplating steps. The PCB manufacturing method primarily

depends on whether it is for production volume or sample/prototype quantities.

Double-sided boards or multi-layer boards use plated-through holes, called vias, to

connect traces on opposite sides of the substrate.

Large volume

Silk screen printing –the main commercial method.

Photographic methods–used when fine linewidths are required.

Small volume

Print onto transparent film and usje as photomask along with photo-sensitized

boards. (i.e., pre-sensitized boards), then etch. (Alternatively, use a film

photoplotter).

Laser resist ablation: Spray black paint onto copper clad laminate, place into CNC

laser plotter. The laser raster-scans the PCB and ablates (vaporizes) the paint

where no resist is wanted. Etch. (Note: laser copper ablation is rarely used and is

considered experimental.[clarification needed])

Use a CNC-mill with a spade-shaped (i.e., a flat-ended cone) cutter or miniature

end-mill to rout away the undesired copper, leaving only the traces.

Hobbyist

Laser-printed resist: Laser-print onto transparency film, heat-transfer with an iron

or modified laminator onto bare laminate, touch up with a marker, then etch.

Vinyl film and resist, non-washable marker, some other methods. Labor-intensive,

only suitable for single boards.

Subtractive processes

Subtractive methods, that remove copper from an entirely copper-coated board,

used for the production of printed circuit boards:

1. Silk screen printing uses etch-resistant inks to protect the copper foil.

Subsequent etching removes the unwanted copper. Alternatively, the ink may be

conductive, printed on a blank (non-conductive) board. The latter technique is also

used in the manufacture of hybrid circuits.

2. Photoengraving uses a photomask and developer to selectively remove a

photoresist coating. The remaining photoresist protects the copper foil.

Subsequent etching removes the unwanted copper. The photomask is usually

prepared with a photoplotter from data produced by a technician using CAM, or

computer-aided manufacturing software. Laser-printed transparencies are

typically employed for phototools; however, direct laser imaging techniques are

being employed to replace phototools for high-resolution requirements.

3. PCB milling uses a two or three-axis mechanical milling system to mill away the

copper foil from the substrate. A PCB milling machine (referred to as a 'PCB

Prototyper') operates in a similar way to a plotter, receiving commands from the

host software that control the position of the milling head in the x, y, and (if

relevant) z axis. Data to drive the Prototyper is extracted from files generated in

PCB design software and stored in HPGL or Gerber file format.

Additive processes

Additive processes add desired copper traces to an insulating substrate. The most

common is the "semi-additive" process: the unpatterned board has a thin layer of

copper already on it. A reverse mask is then applied. (Unlike a subtractive process

mask, this mask exposes those parts of the substrate that will eventually become the

traces.) Additional copper is then plated onto the board in the unmasked areas;

copper may be plated to any desired weight. Tin-lead or other surface platings are

then applied. The mask is stripped away and a brief etching step removes the now-

exposed bare original copper laminate from the board, isolating the individual traces.

Some single-sided boards which have plated-through holes are made in this way.

General Electric made consumer radio sets in the late 1960s using additive boards.

The additive process is commonly used for multi-layer boards as it facilitates the

plating-through of the holes to produce conductive vias in the circuit board.

Circuit properties of the PCB

Each trace consists of a flat, narrow part of the copper foil that remains after

etching. The resistance, determined by width and thickness, of the traces must be

sufficiently low for the current the conductor will carry. Power and ground traces

may need to be wider than signal traces. In a multi-layer board one entire layer may

be mostly solid copper to act as a ground plane for shielding and power return. For

microwave circuits, transmission lines can be laid out in the form of stripline and

microstrip with carefully controlled dimensions to assure a consistent impedance. In

radio-frequency and fast switching circuits the inductance and capacitance of the

printed circuit board conductors become significant circuit elements, usually

undesired; but they can be used as a deliberate part of the circuit design, obviating

the need for additional discrete components.

Chemical etching

Chemical etching is done with ferric chloride, ammonium persulfate, or

sometimes hydrochloric acid. For PTH (plated-through holes), additional steps of

electroless deposition are done after the holes are drilled, then copper is electroplated

to build up the thickness, the boards are screened, and plated with tin/lead. The

tin/lead becomes the resist leaving the bare copper to be etched away.

The simplest method, used for small-scale production and often by hobbyists, is

immersion etching, in which the board is submerged in etching solution such as

ferric chloride. Compared with methods used for mass production, the etching time

is long. Heat and agitation can be applied to the bath to speed the etching rate. In

bubble etching, air is passed through the etchant bath to agitate the solution and

speed up etching. Splash etching uses a motor-driven paddle to splash boards with

etchant; the process has become commercially obsolete since it is not as fast as spray

etching. In spray etching, the etchant solution is distributed over the boards by

nozzles, and recirculated by pumps. Adjustment of the nozzle pattern, flow rate,

temperature, and etchant composition gives predictable control of etching rates and

high production rates.[5]

As more copper is consumed from the boards, the etchant becomes saturated and

less effective; different etchants have different capacities for copper, with some as

high as 150 grams of copper per litre of solution. In commercial use, etchants can be

regenerated to restore their activity, and the dissolved copper recovered and sold.

Small-scale etching requires attention to disposal of used etchant, which is corrosive

and toxic due to its metal content.

The etchant removes copper on all surfaces exposed by the resist. "Undercut"

occurs when etchant attacks the thin edge of copper under the resist; this can reduce

conductor widths and cause open-circuits. Careful control of etch time is required to

prevent undercut. Where metallic plating is used as a resist, it can "overhang" which

can cause short-circuits between adjacent traces when closely spaced. Overhang can

be removed by wire-brushing the board after etching.[5]

Lamination

Most PCBs in commerical electronics have trace layers inside the PCB and are

called multi-layer PCBs. These are laminated together from core and prepreg

dielectrics. eg to make a 4-layer PCB with a thickness of 1.546mm a core with

dielectric thickness of 1.08mm and 35um of copper on both sides is taken, etched

and bonded with prepreg dielectric with thickness of 0.18mm on both sides. Plated

with 18um of copper and then whole stack is etched again to get traces on top and

bottom layers. Finally PCB is covered with soldermask, drilled, vias are plated

again, and surface finish is applied(best ROHS compatible surface finish is Au/Ni).

Multi-layer PCB-s allow for much higher component density and in many cases

components in Ball Grid Array(BGA) packages can't be placed on double sided

PCB-s because there simply is not enough space in between SMD pads to route

traces to all contacts. As contacts on BGA packages are tightly spaced its generally

possible to route only one trace between any two SMD pads, therefore with any one

copper layer only two rows of contacts can be traced out. So,assuming all contacts

are to be used, 16x16 BGA package would need minimum 4-layer PCB (16 /

2(traces can be routed to both sides) / 2(2 rows of contacts can be routed out per

layer) = 4)

Drilling

Holes through a PCB are typically drilled with small-diameter drill bits made of

solid coated tungsten carbide. Coated tungsten carbide is recommended since many

board materials are very abrasive and drilling must be high RPM and high feed to be

cost effective. Drill bits must also remain sharp so as not to mar or tear the traces.

Drilling with high-speed-steel is simply not feasible since the drill bits will dull

quickly and thus tear the copper and ruin the boards. The drilling is performed by

automated drilling machines with placement controlled by a drill tape or drill file.

These computer-generated files are also called numerically controlled drill (NCD)

files or "Excellon files". The drill file describes the location and size of each drilled

hole. These holes are often filled with annular rings (hollow rivets) to create vias.

Vias allow the electrical and thermal connection of conductors on opposite sides of

the PCB.

When very small vias are required, drilling with mechanical bits is costly because

of high rates of wear and breakage. In this case, the vias may be evaporated by

lasers. Laser-drilled vias typically have an inferior surface finish inside the hole.

These holes are called micro vias.

It is also possible with controlled-depth drilling, laser drilling, or by pre-drilling

the individual sheets of the PCB before lamination, to produce holes that connect

only some of the copper layers, rather than passing through the entire board. These

holes are called blind vias when they connect an internal copper layer to an outer

layer, or buried vias when they connect two or more internal copper layers and no

outer layers.

The walls of the holes, for boards with 2 or more layers, are made conductive

then plated with copper to form plated-through holes that electrically connect the

conducting layers of the PCB. For multilayer boards, those with 4 layers or more,

drilling typically produces a smear of the high temperature decomposition products

of bonding agent in the laminate system. Before the holes can be plated through, this

smear must be removed by a chemical de-smear process, or by plasma-etch.

Removing (etching back) the smear also reveals the interior conductors as well.

Exposed conductor plating and coating

PCBs[ are plated with solder, tin, or gold over nickel as a resist for etching away

the unneeded underlying copper.

After PCBs are etched and then rinsed with water, the soldermask is applied, and

then any exposed copper is coated with solder, nickel/gold, or some other anti-

corrosion coating.

Matte solder is usually fused to provide a better bonding surface or stripped to

bare copper. Treatments, such as benzimidazolethiol, prevent surface oxidation of

bare copper. The places to which components will be mounted are typically plated,

because untreated bare copper oxidizes quickly, and therefore is not readily

solderable. Traditionally, any exposed copper was coated with solder by hot air

solder levelling (HASL). The HASL finish prevents oxidation from the underlying

copper, thereby guaranteeing a solderable surface.[10] This solder was a tin-lead alloy,

however new solder compounds are now used to achieve compliance with the RoHS

directive in the EU and US, which restricts the use of lead. One of these lead-free

compounds is SN100CL, made up of 99.3% tin, 0.7% copper, 0.05% nickel, and a

nominal of 60ppm germanium.

It is important to use solder compatible with both the PCB and the parts used. An

example is Ball Grid Array (BGA) using tin-lead solder balls for connections losing

their balls on bare copper traces or using lead-free solder paste.

Other platings used are OSP (organic surface protectant), immersion silver (IAg),

immersion tin, electroless nickel with immersion gold coating (ENIG), and direct

gold plating (over nickel). Edge connectors, placed along one edge of some boards,

are often nickel plated then gold plated. Another coating consideration is rapid

diffusion of coating metal into Tin solder. Tin forms intermetallics such as Cu5Sn6

and Ag3Cu that dissolve into the Tin liquidus or solidus(@50C), stripping surface

coating or leaving voids.

Electrochemical migration (ECM) is the growth of conductive metal filaments on

or in a printed circuit board (PCB) under the influence of a DC voltage bias.[11][12]

Silver, zinc, and aluminum are known to grow whiskers under the influence of an

electric field. Silver also grows conducting surface paths in the presence of halide

and other ions, making it a poor choice for electronics use. Tin will grow "whiskers"

due to tension in the plated surface. Tin-Lead or Solder plating also grows whiskers,

only reduced by the percentage Tin replaced. Reflow to melt solder or tin plate to

relieve surface stress lowers whisker incidence. Another coating issue is tin pest, the

transformation of tin to a powdery allotrope at low temperature.[13]

Solder resist

Areas that should not be soldered may be covered with a polymer solder resist

(solder mask) coating typically 20–30 micrometres thick. The solder resist helps to

prevent solder from bridging between conductors and creating short circuits. Solder

resist also provides some protection from the environment.

Screen printing

Line art and text may be printed onto the outer surfaces of a PCB by screen

printing. When space permits, the screen print text can indicate component

designators, switch setting requirements, test points, and other features helpful in

assembling, testing, and servicing the circuit board. Codes identifying the board and

the current version number can be etched.

Screen print is also known as the silk screen, or, in one sided PCBs, the red print.

Some digital printing solutions are used instead of screen printing. This

technology allows printing variable data onto the PCB, including individual serial

numbers as text and bar code.

Test

Unpopulated boards may be subjected to a bare-board test where each circuit

connection (as defined in a netlist) is verified as correct on the finished board. For

high-volume production, a bed of nails tester, a fixture or a rigid needle adapter is

used to make contact with copper lands or holes on one or both sides of the board to

facilitate testing. A computer will instruct the electrical test unit to apply a small

voltage to each contact point on the bed-of-nails as required, and verify that such

voltage appears at other appropriate contact points. A "short" on a board would be a

connection where there should not be one; an "open" is between two points that

should be connected but are not. For small- or medium-volume boards, flying probe

and flying-grid testers use moving test heads to make contact with the

copper/silver/gold/solder lands or holes to verify the electrical connectivity of the

board under test. Another method for testing is industrial CT scanning, which can

generate a 3D rendering of the board along with 2D image slices and can show

details such a soldered paths and connections.

Printed circuit assembly

PCB with test connection pads

After the printed circuit board (PCB) is completed, electronic components must

be attached to form a functional printed circuit assembly, or PCA (sometimes called

a "printed circuit board assembly" PCBA). In through-hole construction, component

leads are inserted in holes. In surface-mount construction, the components are placed

on pads or lands on the outer surfaces of the PCB. In both kinds of construction,

component leads are electrically and mechanically fixed to the board with a molten

metal solder.

There are a variety of soldering techniques used to attach components to a PCB.

High volume production is usually done with SMT placement machine and bulk

wave soldering or reflow ovens, but skilled technicians are able to solder very tiny

parts (for instance 0201 packages which are 0.02 in. by 0.01 in.)[16] by hand under a

microscope, using tweezers and a fine tip soldering iron for small volume

prototypes. Some parts may be extremely difficult to solder by hand, such as BGA

packages.

Often, through-hole and surface-mount construction must be combined in a single

assembly because some required components are available only in surface-mount

packages, while others are available only in through-hole packages. Another reason

to use both methods is that through-hole mounting can provide needed strength for

components likely to endure physical stress, while components that are expected to

go untouched will take up less space using surface-mount techniques.

After the board has been populated it may be tested in a variety of ways:

While the power is off, visual inspection, automated optical inspection. JEDEC

guidelines for PCB component placement, soldering, and inspection are

commonly used to maintain quality control in this stage of PCB manufacturing.

While the power is off, analog signature analysis, power-off testing.

While the power is on, in-circuit test, where physical measurements (i.e. voltage,

frequency) can be done.

While the power is on, functional test, just checking if the PCB does what it had

been designed to do.

To facilitate these tests, PCBs may be designed with extra pads to make

temporary connections. Sometimes these pads must be isolated with resistors. The

in-circuit test may also exercise boundary scan test features of some components. In-

circuit test systems may also be used to program nonvolatile memory components on

the board.

In boundary scan testing, test circuits integrated into various ICs on the board

form temporary connections between the PCB traces to test that the ICs are mounted

correctly. Boundary scan testing requires that all the ICs to be tested use a standard

test configuration procedure, the most common one being the Joint Test Action

Group (JTAG) standard. The JTAG test architecture provides a means to test

interconnects between integrated circuits on a board without using physical test

probes. JTAG tool vendors provide various types of stimulus and sophisticated

algorithms, not only to detect the failing nets, but also to isolate the faults to specific

nets, devices, and pins.[17]

When boards fail the test, technicians may desolder and replace failed

components, a task known as rework.

Protection and packaging

PCBs intended for extreme environments often have a conformal coating, which

is applied by dipping or spraying after the components have been soldered. The coat

prevents corrosion and leakage currents or shorting due to condensation. The earliest

conformal coats were wax; modern conformal coats are usually dips of dilute

solutions of silicone rubber, polyurethane, acrylic, or epoxy. Another technique for

applying a conformal coating is for plastic to be sputtered onto the PCB in a vacuum

chamber. The chief disadvantage of conformal coatings is that servicing of the board

is rendered extremely difficult.[18]

Many assembled PCBs are static sensitive, and therefore must be placed in

antistatic bags during transport. When handling these boards, the user must be

grounded (earthed). Improper handling techniques might transmit an accumulated

static charge through the board, damaging or destroying components. Even bare

boards are sometimes static sensitive. Traces have become so fine that it's quite

possible to blow an etch off the board (or change its characteristics) with a static

charge. This is especially true on non-traditional PCBs such as MCMs and

microwave PCBs.

Design

Printed circuit board design was initially a fully manual process, where an initial

schematic diagram was converted into a layout of parts, then traces were routed

between package terminals to provide the required interconnections. Pre-printed

non-reproducing mylar grids assisted in layout, and rub-on dry transfers of common

arrangements of circuit elements (pads, contact fingers, integrated circuit profiles,

and so on) helped standardize the layout. Traces between devices were made with

self-adhesive tape. The finished layout "artwork" was then photographically

reproduced on the resist layers of the blank coated copper-clad boards.

Modern practice is less labor intensive since computers can automatically

perform many of the layout steps. The general progression for a commercial printed

circuit board design would include:

1. Schematic capture through an Electronic design automation tool.

2. Card dimensions and template are decided based on required circuitry and case of

the PCB. Determine the fixed components and heat sinks if required.

3. Deciding stack layers of the PCB. 4 to 12 layers or more depending on design

complexity. Ground plane and power plane are decided. Signal planes where

signals are routed are in top layer as well as internal layers.[19]

4. Line impedance determination using dielectric layer thickness, routing copper

thickness and trace-width. Trace separation also taken into account in case of

differential signals. Microstrip, stripline or dual stripline can be used to route

signals.

5. Placement of the components. Thermal considerations and geometry are taken

into account. Vias and lands are marked.

6. Routing the signal trace. For optimal EMI performance high frequency signals are

routed in internal layers between power or ground planes as power plane behaves

as ground for AC.

7. Gerber file generation for manufacturing.

In layout of the board, a power plane is the counterpart to the ground plane and

behaves as an AC signal ground, whilst providing DC voltage for powering circuits

mounted on the PCB. Where possible it is good to have a power plane for each

ground plane on a board (known as a "plane pair"), as this reduces power supply

impedance to the components on the board. In electronic design automation (EDA)

design tools, power planes (and ground planes) are usually drawn automatically as a

negative layer. Adding primitive layout shapes (for example, a donut pad) on such a

layer automatically produces a negative of those primitives, placing copper wherever

there is no track or via.

Copper thickness

Copper thickness of PCBs can be specified in units of length, but is often

specified as weight of copper per square foot, in ounces, which is easier to measure.

Each ounce of copper is approximately 1.4 mils (0.0014 inch) or 35 μm of thickness.

The printed circuit board industry defines heavy copper as layers exceeding 3

ounces of copper, or approximately 0.0042 inches (4.2 mils, 105 μm) thick. PCB

designers and fabricators often use heavy copper when design and manufacturing

circuit boards in order to increase current-carrying capacity as well as resistance to

thermal strains. Heavy copper plated vias transfer heat to external heat sinks. IPC

2152 is a standard for determining current-carrying capacity of printed circuit board

traces.