timing definition language tdl · 2011-03-07 · based on a virtual machine, called tdl:machine...
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Timing Definition Language TDL
Wolfgang Pree chrona.com
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© 2011, chrona.com 2 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Overview Timing Definition Language (TDL) in a nut shell TDL development process TDL tools
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© 2011, chrona.com 3 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL in a nut shell
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© 2011, chrona.com 4 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
benefits of timed model
synchronous languages: value determinism
timed model (LET abstraction) time and value determinism well suited for distributed platforms
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© 2011, chrona.com 5 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
What is TDL? A high-level textual notation for defining the timing behavior of
a real-time application.
TDL covers all aspects that are required to model safety-critical software as found, for example, in cars, airplanes, Unmanned Aerial Vehicles (UAVs), automation systems
seamless integration of time-triggered (synchronous) and event-triggered (asynchronous) activities
TDL’s specification is public; could form the basis of an open standard
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© 2011, chrona.com 6 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL is conceptually based on Giotto
Giotto project: 2000 – 2003, University of California, Berkeley
TDL = Giotto concepts
+ Syntax
+ Component Architecture
+ Tool Chain
+ Extensions
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© 2011, chrona.com 7 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL tools
Chrona TDL-Compiler Chrona VisualCreator Chrona VisualDistributor Chrona VisualAnalyzer
requires Java 1.5 or later optional integration with MATLAB/Simulink from
The MathWorks
Chrona TDL-Machine (alias E-Machine) platform-specific, typically in C
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© 2011, chrona.com 8 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL tool chain
.tdl TDL:Compiler TDL:Machine* .ecode
functionality code
* Simulink, OSEK, dSpace, ARM, AES, INtime, RTLinux, ...
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© 2011, chrona.com 9 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL tool chain
.tdl TDL:Compiler TDL:Machine* .ecode
functionality code
* Simulink, OSEK, dSpace, ARM, AES, INtime, RTLinux, ...
platform specific
AST
platform specific
Platform plugin*
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© 2011, chrona.com 10 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Chrona VisualCreator
TDL tool chain
.tdl TDL:Compiler TDL:Machine .ecode
functionality code
platform specific
AST
platform specific
Platform plugin*
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© 2011, chrona.com 11 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Chrona VisualDistributor
Chrona VisualCreator
TDL tool chain
.tdl TDL:Compiler TDL:Machine .ecode
functionality code
platform specific
AST
platform specific
Platform plugin*
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© 2011, chrona.com 12 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Chrona VisualAnalyzer
TDL tool chain
TDL:Machine node1
TDL:Machine node2
TDL:Machine node3
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© 2011, chrona.com 13 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL programming model: multi-rate, multi-mode systems (I)
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© 2011, chrona.com 14 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL programming model: multi-rate, multi-mode systems (II)
LET-semantics
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© 2011, chrona.com 15 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Logical Execution Time (LET) abstraction
ET <= WCET <= LET
results are internally available at ‘stop (ET)’
results are externally visible at ‘terminate’
spare time between ‘stop’ and ‘terminate’
time task invocation
Logical Execution Time (LET)
Logical
Physical
start stop (ET)
suspend resume
release terminate
stop (WCET)
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© 2011, chrona.com 16 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
LET advantages
observable (logical) timing is identical on all platforms
allows for simulation allows for composition allows for distribution
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© 2011, chrona.com 17 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Periodic execution in TDL modes
Every mode has a fixed period. A task t has a frequency f within a mode. The mode period is filled with f task invocations. The LET of a task invocation is modePeriod / f.
time task t invocation 1 Logical
task t invocation 2
Mode Period Mode Start Mode End
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© 2011, chrona.com 18 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL module: modes, sensors and actuators form a unit
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Example: Receiver imports from Sender module
module Sender module Receiver
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module Sender module Receiver
Example: Receiver imports from Sender module
public
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© 2011, chrona.com 21 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
module Sender module Receiver
Example: Receiver imports from Sender module
public
private
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© 2011, chrona.com 22 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL syntax by example module Sender {
sensor boolean s1 uses getS1; actuator int a1 uses setA1;
public task inc { output int o := 10; uses incImpl(o); }
start mode main [period=5ms] { task [freq=1] inc(); // LET = 5ms / 1 = 5ms actuator [freq=1] a1 := inc.o; // update every 5ms mode [freq=1] if exitMain(s1) then freeze; }
mode freeze [period=1000ms] {} }
s1 inc [5ms] a1 Sender (mode main)
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© 2011, chrona.com 23 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Module import module Receiver {
import Sender; … task clientTask { input int i1; … } mode main [period=10ms] { task [freq=1] clientTask(Sender.inc.o); // LET = 10ms / 1 = 10ms … } }
s1 a1 Sender
clientTask [10ms] a1
Receiver inc [5ms]
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© 2011, chrona.com 24 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
LET-behavior (independent of component deployment)
t Sender inc inc
Receiver clientTask
inc inc
10 ms
5 ms
communication of inc’s output to clientTask
clientTask
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© 2011, chrona.com 25 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL execution
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© 2011, chrona.com 26 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL run-time environment
based on a virtual machine, called TDL:Machine executes virtual instruction set, called E-code
(embedded code) E-code is executed at logical time instants synchronized logical time for all components E-code generated by TDL compiler from TDL
source covers one mode period contains one E-code block per logical time instant
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© 2011, chrona.com 27 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
one TDL:Machine per node
TDL:Machine single node
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© 2011, chrona.com 28 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
one TDL:Machine per node
TDL:Machine node1
TDL:Machine node2
TDL:Machine node3
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© 2011, chrona.com 29 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL extensions
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© 2011, chrona.com 30 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL slot selection
f = 6
time Logical
Mode Period Mode Start Mode End
slot 1 slot 2 slot 3 slot 4 slot 5 slot 6
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f = 6 task invocation 1 covers slots 1 – 2 task invocation 2 covers slots 4 – 5
time Logical
Mode Period Mode Start Mode End
task invoc. 1 task invoc. 2
slot 1 slot 2 slot 3 slot 4 slot 5 slot 6
TDL slot selection
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© 2011, chrona.com 32 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL slot selection allows the specification of ... an arbitrary repetition pattern the LET more explicitly gaps task invocation sequences optional task invocations
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Physical layer / E-code blocks
time Logical
Mode Period Mode Start Mode End
task invoc. 1 task invoc. 2
slot 1 slot 2 slot 3 slot 4 slot 5 slot 6
E-Code block follows fixed pattern: 1. task terminations 2. actuator updates 3. mode switches 4. task releases
E-code block
E-code block
E-code block
E-code block
Physical
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© 2011, chrona.com 34 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
E-code compression
E-code blocks may be identical compression feature would be welcome new instruction:
REPEAT <targetPC>, <N> jumps N times to targetPC, then to PC + 1. uses a counter per module counter is reset upon mode switch
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Adding asynchronous activities
time Logical
Mode Period Mode Start Mode End
task invoc. 1 task invoc. 2
slot 1 slot 2 slot 3 slot 4 slot 5 slot 6
Priority levels black: highest priority (E-code)
E-code block
E-code block
E-code block
E-code block
Physical
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time Logical
Mode Period Mode Start Mode End
task invoc. 1 task invoc. 2
slot 1 slot 2 slot 3 slot 4 slot 5 slot 6
Priority levels black: highest priority (E-code) red: lower priority (synchronous tasks)
E-code block
E-code block
E-code block
E-code block
Physical
Adding asynchronous activities
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© 2011, chrona.com 37 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
time Logical
Mode Period Mode Start Mode End
task invoc. 1 task invoc. 2
slot 1 slot 2 slot 3 slot 4 slot 5 slot 6
Priority levels black: highest priority (E-code) red: lower priority (synchronous tasks) blue: lowest priority (asynchronous activities)
E-code block
E-code block
E-code block
E-code block
Physical
Adding asynchronous activities
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© 2011, chrona.com 38 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Asynchronous activities rationale
event-driven background tasks may be long running not time critical could be implemented at platform level, but: platform-specific unsynchronized data-flow to/from E-machine
support added toTDL Goal: avoid complex synchronization constructs
and the danger of deadlocks and priority inversions
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© 2011, chrona.com 39 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Kinds of asynchronous activities
task invocation similar to synchronous task invocations except
for timing input ports are read just before physical
execution output ports are visible just after physical
execution data flow is synchronized with E-machine
actuator updates similar to synchronous actuator updates except
for timing data flow is synchronized with E-machine
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Trigger Events
hardware and software interrupts periodic asynchronous timers port updates
Use a registry for later execution of the async activities.
Parameter passing occurs at execution time.
Registry functions as a priority queue.
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© 2011, chrona.com 41 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Threads and critical regions hardware interrupts, timer: highest priority
synchronous activities (E-machine): high priority
asynchronous activities: lowest priority
registered events enqueue()
dequeue()
on interrupt, on timer
on port update
on port update
ports
critical region thread
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© 2011, chrona.com 42 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Synchronization requirements
Async activities don‘t preempt anything. E-machine may preempt async activities. Hardware interrupts (incl. timers) may preempt
everything incl. other hardware interrupts. We need a very robust thread safe registry. We need a very efficient enqueue operation for serving hardware interrupts quickly for efficient synchronous port update triggers
dequeue is done asynchronously and may be slower.
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Transparent distribution
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TDL module-to-node-assignment (example)
Sender ECU1
ECU2 Receiver
FlexRay bus
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Transparent distribution of TDL components:
Firstly, at runtime a set of TDL components behaves exactly the same, no matter if all components are executed on a single node or if they are distributed across multiple nodes. The logical timing is always preserved, only the physical timing, which is not observable from the outside, may be changed.
Secondly, for the developer of a TDL component, it does not matter where the component itself and any imported component are executed.
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© 2011, chrona.com 46 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
sample physical execution times on ECU1/ECU2
t Sender inc inc
Receiver clientTask
inc inc
10 ms
5 ms
clientTask
ECU1
ECU2
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© 2011, chrona.com 47 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Constraints for automatic schedule generation
Sender inc inc
Receiver clientTask
inc inc
10 ms
5 ms
clientTask
ECU1
ECU2
communication window
communication window
t
stop (WCET)
stop (WCET)
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© 2011, chrona.com 48 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Bus schedule generation
Sender inc inc
Receiver clientTask
inc inc
10 ms
5 ms
clientTask
ECU1
ECU2
communication window
communication window
local buffer
local buffer
t
FlexRay bus
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© 2011, chrona.com 49 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Chrona’s VisualDistributor maps TDL modules to nodes
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© 2011, chrona.com 50 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL-based development process
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© 2011, chrona.com 51 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Chrona tools in the V model
requirements
functional model
application code test
verification + timing
Chrona VisualCreator in Matlab®/Simulink®
Chrona VisualDistributor generiert for platform 2
generated for platform 1
. . .
C
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© 2011, chrona.com 52 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL tools: demo
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© 2011, chrona.com 53 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Status quo ready
TDL:VisualCreator (stand-alone or in Matlab®/Simulink®) TDL:VisualDistributor (extensible via plugins; currently a plugin for
FlexRay is available as product, together with plug-ins for various cluster nodes such as the MicroAutoBox, and Renesas–AES) The TDL:VisualDistributor is available as stand-alone tool or in Matlab®/Simulink® and provides the following features: Communication Schedule Generator TDL:CommViewer automatic generation of all node-, OS- and cluster-specific files
TDL:Compiler TDL:Machine for Simulink, mabx, AES, ARM, INtime, OSEK seamless integration of asynchronous events with TDL multiple slot selection (decoupling of LET and period; eg, for event
modeling) harnessing existing FlexRay communication schedules (via FIBEX) for
their incremental extension TDL:VisualAnalyzer (recording and debugging tool)
work in progress ‘intelligent’ FlexRay parameter configuration editor TDL:Machine for further platforms (ARM, etc.)
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© 2011, chrona.com 54 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL advantages
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© 2011, chrona.com 55 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
The TDL way:
develop once
3 dSpace mabx
TT Ethernet
deploy on any platform
Component C
. . . ARM
FlexRay-based communication
(TT) CAN ...
single node
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© 2011, chrona.com 56 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
State-of-the-art:
3 dSpace mabx
C-a 2 DeComSys
Renesas
C-b
. . .
C-c
. . .
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© 2011, chrona.com 57 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL advantages
transparent distribution: developers do not have to consider the target platform (processor, OS, communication bus, etc.), which could be a single node or a distributed system
time and value determinism: same inputs imply corresponding same outputs significantly improved reliability simulation = behavior on execution platform
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© 2011, chrona.com 58 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
developers have to deal with 3 dimensions
functionality
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© 2011, chrona.com 59 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
developers have to deal with 3 dimensions
functionality
timing
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© 2011, chrona.com 60 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
developers have to deal with 3 dimensions
functionality
timing
platform
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© 2011, chrona.com 61 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL reduces this to 2 dimensions
functionality
timing
platform
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© 2011, chrona.com 62 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL reduces this to 2 dimensions
functionality
timing
platform
significantly simplified
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© 2011, chrona.com 63 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL allows your developers to focus on the functionality
functionality
timing
platform
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© 2011, chrona.com 64 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL allows your developers to focus on the functionality
functionality
timing
platform
3D → 1,5D
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© 2011, chrona.com 65 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
TDL leads to enormous gains in efficiency and quality
eg, FlexRay development reduced by a factor of 20 1 person year => 2 person weeks
deterministic system: simulation and executable on platform always
exhibit equivalent (observable) behavior time and value determinism guaranteed
flexibility to change topology, even platform automatic code generators take care of the details
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© 2011, chrona.com 66 Modeling with TDL, School of Automotive Software Engineering, Nagoya, Japan
Thank you for your attention!