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56 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 1, JANUARY 2013

Three-Phase Three-Level DC/DC Converter for HighInput Voltage and High-Power ApplicationsAdopting Symmetrical Duty Cycle Control

Fuxin Liu, Member, IEEE, Gaoping Hu, and Xinbo Ruan, Senior Member, IEEE

Abstract—Three-phase dc/dc converters have the superior char-acteristics including lower current rating of switches, the reducedoutput filter requirement, and effective utilization of transformers.To further reduce the voltage stress on switches, three-phase three-level (TPTL) dc/dc converters have been investigated recently;however, numerous active power switches result in a complicatedconfiguration in the available topologies. Therefore, a novel TPTLdc/dc converter adopting a symmetrical duty cycle control is pro-posed in this paper. Compared with the available TPTL converters,the proposed converter has fewer switches and simpler configura-tion. The voltage stress on all switches can be reduced to the halfof the input voltage. Meanwhile, the ripple frequency of outputcurrent can be increased significantly, resulting in a reduced filterrequirement. Experimental results from a 540–660-V input and48-V/20-A output are presented to verify the theoretical analysisand the performance of the proposed converter.

Index Terms—DC/DC converter, symmetrical duty cycle control,three-level (TL), three-phase.

I. INTRODUCTION

FULL-BRIDGE dc/dc converters have been used widely inthe medium-to-high power applications for the pulse width

modulation (PWM) control, soft-switching characteristics, andlower power rating on switches [1], [2]. To further reduce thepower rating on switches, a prominent three-phase full-bridgetopology was first put forward by Ziogas et al. for medium volt-age level applications [3], as shown in Fig. 1, in which three-phase bridges consisting of six switches and a three-phase trans-former are adopted. The configuration of a three-phase trans-former can be classified into four types: Δ–Δ connection, Y–Yconnection, Δ–Y connection, and Y–Δ connection. With thethree-phase architecture, the converters have the superior fea-

Manuscript received September 21, 2012; revised December 4, 2012 andFebruary 12, 2013; accepted February 22, 2013. Date of current version July18, 2013. This work was supported by grants from the Power Electronics Scienceand Education Development Program of Delta Environmental & EducationalFoundation, and the Fundamental Research Funds for the Central Universities,China. Recommended for publication by Associate R. Burgos.

F. Liu and G. Hu are with the College of Automation Engineering, NanjingUniversity of Aeronautics and Astronautics, Nanjing 210016, China (e-mail:[email protected]; [email protected]).

X. Ruan is with the College of Automation Engineering, Nanjing University ofAeronautics and Astronautics, Nanjing 210016, China, and also with the Collegeof Electrical and Electronic Engineering, Huazhong University of Science andTechnology, Wuhan 430074, China (e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2013.2252432

Fig. 1. Circuit configuration of a three-phase full-bridge dc/dc converter.

tures including lower current rating of switches, reduced inputand output current ripple allowing small-size filter requirement,and better utilization of transformer core [4]–[6].

Although predominant characteristics are presented in three-phase full-bridge converters, soft switching has not beenachieved which limits the switching frequency and the powerdensity. Some solutions use three-phase resonant convert-ers where soft-switching can be achieved, including theLCC-type resonant converter [7]–[9] and LCL-type resonantconverter [10], [11]. The improved resonant converter featuresnarrow variation in switching frequency for power control, zero-voltage-switching (ZVS) realization under wide load range, andhigher conversion efficiency. However, the number of powercomponents and also the overall volume of converter are in-creased due to the addition of numerous passive power elements.Other alternative solutions are the nonresonant soft-switchingthree-phase converters. The use of asymmetrical duty cycle inthe three-phase dc/dc converter was proposed in [12], in order toobtain ZVS commutation for all switches in a wide load range.Nevertheless, the resulting topology suffers conduction losses inthe rectifier stage for two series diodes conduct the load currentat any time. Therefore, a three-phase version of hybridge recti-fier was introduced instead of conventional three-phase rectifier;although the output inductors’ volume increases, the efficiencyimprovement provides an overall reduction of the converter vol-ume [13]. All the converters mentioned previously are usuallyrecommended for uses in the medium voltage level occasions,

0885-8993/$31.00 © 2013 IEEE

LIU et al.: THREE-PHASE THREE-LEVEL DC/DC CONVERTER FOR HIGH INPUT VOLTAGE 57

for the switches still sustain the whole input voltage and willexperience high voltage stress in high input voltage fields.

Half-bridge three-level (TL) converter is a potential topologyin high input voltage applications [14]–[17]. It is essentiallyderived from the neutral point clamped (NPC) inverter [18],which can reduce the voltage stress of the power switches toonly a half of the input voltage, when compared with traditionaltopologies. It can also achieve ZVS easily via using the leakageinductance of the transformer and the intrinsic capacitors of theswitches without additional components.

To incorporate the advantages of half-bridge TL converterand three-phase full-bridge converter, three-phase three-level(TPTL) PWM dc/dc converters were proposed in [19]–[21]. Theproposed converters are composed of an NPC inverter connectedto the primary side of a three-phase high-frequency transformer.The secondary side of the transformer feeds a three-phase rec-tifier, and the output stage of the converter is composed of theoutput filter and the load. The symmetrical duty cycle controlwas adopted in the converter proposed in [19], and the converterhas the features including lower voltage stress on switches, soft-switching capabilities, and voltage source characteristic for out-put stage. A phase-shifted PWM control strategy was introducedinto the converter proposed in [20] and [21]; as a result, theswitches can achieve ZVS and Zero-current-switching withoutadditional auxiliary components. The common features of TPTLdc/dc converters mentioned previously are the employment ofan NPC inverter configuration and a three-phase transformer;although the voltage stress on switches can be reduced, the nu-merous power switches result in the higher overall cost andincreased control circuit complexity.

To simplify the circuit configuration, a novel TPTL converteris proposed in this paper, which keeps the advantages of theavailable TPTL converters including the lower voltage stress,efficient utilization for transformer, and reduced output filterrequirement; meanwhile, the number of switches is reducedsignificantly, along with the gate drivers and PWM channels, re-sulting in a simpler architecture and lower cost. In this paper, thederivation of the proposed converter is illustrated; the operationprinciple and the theoretical analysis are presented. To obtainbehavioral and performance characteristics of the converter, theexperimental verification from a prototype about 1 kW is carriedout.

II. DERIVATION OF THE PROPOSED TPTL CONVERTER

Fig. 2 shows the circuit configuration of half-bridge TLconverter and conventional full-bridge converter, respectively.For simplicity, only the primary stages are presented. As wellknown, the two converters can both adopt phase-shifted control,and the switches are classified into the leading switches andthe lagging switches. The waveforms of vAB and the primarycurrent in two converters are basically the same; therefore, inthis sense, the half-bridge TL converter is essentially equivalentto the full-bridge converter.

Fig. 3 shows the topology of three-phase full-bridge converterand the corresponding control strategy, in which a three-phasetransformer with Δ-Y connection is employed for the smaller

Fig. 2. Comparison of the primary configuration between half-bridge TLconverter and full-bridge converter. (a) Half-bridge TL converter. (b) Full-bridgeconverter.

Fig. 3. Topology and control strategy of three-phase full-bridge converter.(a) Main circuit. (b) Control strategy.

turns ratios and transformer VA rating [22]. Q1 , Q3 , and Q5 areswitched ON in turn according to the rising edge of the clocksignals with interval of one-third switching period; the dutycycles of Q1 , Q3 , and Q5 are modulated by the comparisonbetween three same carrier signals and the error signal. Thegate signals of Q4 , Q6 , and Q2 are interleaved with Q1 , Q3 , andQ5 by a half switching period, respectively. For the duty cycles


Fig. 4. Proposed TPTL dc/dc converter.

of all the switches are equal, the control strategy in Fig. 3(b) isnamed as symmetrical duty cycle control. As shown, the three-phase full-bridge converter can be viewed as a combinationof two full-bridge sections sharing a common bridge leg. Inthe full-bridge section composed of Q1 , Q3 , Q4 , and Q6 , Q6is turned ON leading to Q1 , and Q3 is turned ON leading toQ4 , as depicted in Fig. 3(b). According to the correspondencebetween two converters shown in Fig. 2, the full-bridge sectioncomposed of Q1 , Q3 , Q4 , and Q6 can be replaced by a half-bridge TL section directly, and the transformer and secondarystages remain unchanged. Therefore, a novel TPTL convertercan be derived, as shown in Fig. 4. The proposed convertershares the same control strategy shown in Fig. 3(b).

As shown in Fig. 4, Cd1 and Cd2 are large enough andthey share evenly the input voltage, i.e., VC d1 = VC d2 = Vin /2.Llka , Llkb , and Llkc are the equivalent primary leakage induc-tances of each phase. Df 1 and Df 2 are freewheeling diodes.Css is the flying capacitor, which is in favor of decoupling theswitching transition of Q1 , Q3 , Q4 , and Q6 . DR1−DR6 are rec-tifier diodes. The output filter is composed of Lf and Cf , andRLd is the load.

III. OPERATION PRINCIPLE

This section will analyze the operation principles of the pro-posed converter. The following assumptions are made for thesimplicity before the analysis: 1) all power devices and diodesare ideal; 2) all capacitors and inductances are ideal; 3) the out-put filter inductance is large enough to be treated as a constantcurrent source during a switching period, and its value equalsoutput current Io ; and 4) Llka , Llkb , and Llkc are identical, andLlka = Llkb = Llkc = Llk . Fig. 5 shows the key waveformsof the proposed converter; as seen, the converter adopts sym-metrical duty cycle control, and each switch has a maximumconduction period of 120◦. Evidently, if the duty cycle is lessthan 0.167, only one switch will turn ON at any moment, andthe output voltage will be zero; furthermore, if the duty cycleis beyond 0.33, the output voltage will be uncontrolled, so therequired range for the duty cycle of any switch is from 0.167 to0.33.

Fig. 5. Key waveforms of the proposed TPTL converter.

There are disparities between several operation principles dueto different steady-state operation points and devices parametersof the converter. In this paper, only one specific example willbe described due to publication space limitations. Fig. 6 showseight operation stages of the converter under rated conditions.The other operation stages during the rest of a switching periodare not depicted but they are symmetrically equivalent, expectfor the fact that they are phase-shifted.

The basic equations of the voltages and currents of the trans-former are listed as follows:


Fig. 6. Equivalent circuits under different operation stages. (a) prior to t0 . (b) [t0 , t1 ]. (c) [t1 , t2 ]. (d) [t2 , t3 ]. (e) [t3 , t4 ]. (f) [t4 , t5 ]. (g) [t5 , t6 ]. (h) [t6 , t7 ].

vAB + vBC + vC A = 0 (1)

isa + isb + isc = 0 (2)

dipa

dt= k

disa

dt=

vLlka

Llk(3)

dipb

dt= k

disb

dt=

vLlkb

Llk(4)

dipc

dt= k

disc

dt=

vLlkc

Llk(5)

where k represents the secondary-to-primary turns ratios of thetransformer. The voltage of leakage inductance of the trans-

former can be derived from (2)–(5) and is given in the followingequation:

vLlka + vLlkb + vLlkc = 0. (6)

1) Stage 1 [prior to t0] [see Fig. 6(a)]: Prior to t0 , Q1 ,Df 1 ,and D5 are conducting in the primary side; the voltages ofthe transformer windings are zero, so the rectified voltagevrect is zero too.

2) Stage 2 [t0 , t1] [see Fig. 6(b)]: At t0 , Q2 is turned ONwith hard-switching condition and the current transfersfrom D5 to Q2 . vBC rises to Vin /2 while vC A decays to


−Vin /2. In the primary section of the converter, the sumof vLlka and vpa is zero, and the sum of vLlkc and vpc

is −Vin /2. Meanwhile, in the secondary section of theconverter, vsb is equal to vsc , and vrect is the differencebetween vsa and vsc . The secondary current of Tra , isa , isequal to Io , so the primary current of Tra , ipa , is constantas kIo ; then, vLlka is equal to zero.From (1), (2), (6), and the conditions mentioned above, thethree-phase line currents iA , iB , and iC can be obtained

iA (t) = iA (t0) +Vin

2Llk(t − t0) (7)

iB (t) = iB (t0) +Vin

2Llk(t − t0) (8)

iC (t) = iC (t0) −Vin

Llk(t − t0) . (9)

From (7)–(9), iC decays while iA and iB rise linearly.The primary current of transformer-B, ipb , increases withiB ; when ipb rises to zero, DR4 turns OFF and DR3 turnsON naturally, in which a commutation process in the sec-ondary stage is completed.

3) Stage 3 [t1 , t2] [see Fig. 6(c)]: During this stage,Q1 , Q2 ,Df 1 ,DR1 ,DR3 , and DR6 are conducting. Sim-ilarly, from (1), (2), (6), and other constraints betweenvoltages and currents of transformers, the expression forthe rectified voltage can be obtained

vrect =34kVin . (10)

The expressions of iA , iB , and iC in this stage are givenby

iA (t) = 2kIo −Vin

4Llk(t − t1) (11)

iB (t) = −kIo +Vin

2Llk(t − t1) (12)

iC (t) = −kIo −Vin

4Llk(t − t1) . (13)

When iB reaches to zero, this stage ends.4) Stage 4 [t2 , t3] [see Fig. 6(d)]: iB rises to zero and remains

a positive increase. Thus, iB charges C3 and discharges C6during this resonant period which involves C3 , C6 , Llka ,and Llkb . During this stage, vrect remains at 3 kVin /4.

5) Stage 5 [t3 , t4] [see Fig. 6(e)]: At t3 , Q1 turns OFF, whileiA charges C1 and discharges C4 . The voltages of C1and C4 vary approximately linearly since iA is relativelylarge enough. As C1 and C4 limit the rising rate of thevoltage of C1 , Q1 is zero-voltage turn-off. The chargingand discharging of C1 and C4 cause a voltage drop of Tra

(suppose the polarity of dotted terminal of transformer ispositive). The voltage of Trb equals to that of Tra , whichforces ipb to rise. As a result, at the end of this stage, iBmaintains the direction shown in Fig. 5(e) and chargesC3 and discharges C6 . The rectifier voltage vrect decaysapproximately linearly for the synchronous charging anddischarging of C1 , C3 , C4 , and C6 .

6) Stage 6 [t4 , t5] [see Fig. 6(f)]: The termination of thecharging and discharging of C1 , C3 , C4 , and C6 variesfrom different parameters of the converter and operationconditions. Assuming that C3 and C6 finish the resonancefirst, iB transfers to Df 2 , while iA continues to charge C1and discharge C4 . vrect keeps on decaying.

7) Stage 7 [t5 , t6] [see Fig. 6(g)]: At t5 , vC 1 rises to Vin /2and vC 4 decays to zero; D4 conducts naturally and vrectdrops to zero. vAB = vBC = vC A = 0, and iA , iB , andiC remain unchanged.

8) Stage 8 [t6 , t7] [see Fig. 6(h)]: At t6 , Q3 turns ON andthe current in Df 2 transfers to Q3 . DR1 turns OFF andDR2 turns ON when ipa decays to zero.

IV. THEORETICAL ANALYSIS

From the analysis of each operation stage, one can obtainthe independent expressions that completely describe the staticbehaviors of the proposed converter.

A. Steady-State Transfer Characteristics

In the continuous current mode (CCM), the average value ofthe rectified voltage is the output voltage. From Fig. 5, one canderive the expression of the output voltage as

Vo = 0.75k · Vin · (6D − 1) (14)

where D is the duty cycle of switches. So the turns ratio ofthe transformer can be determined under the minimum inputvoltage and the maximum duty cycle from (14).

The current ripple of output filter inductance is given by

ΔiLf =(0.75k · Vin − Vo) ·

(D − 1

6

)· Ts

Lf. (15)

IG represents the average value of output current in the criticalconduction mode and is given by

IG =3k · Vin (1 − 3D) ·

(D − 1

6

)· Ts

4Lf. (16)

IG will reach the maximum value when D is 0.25 and themaximum IG max is

IGmax =k · Vin · Ts

64Lf. (17)

Substituting (17) into (16) yields

IG = 48IGmax · (1 − 3D) ·(

D − 16

). (18)

Fig. 7 shows the relationship between IG and IG max at differentduty cycles. As shown, when D is 0.25, IG reaches IG max . Fur-thermore, if the output current Io is greater than IG , the converterwill operate under CCM and the output voltage only dependson D referring to (14), whereas the converter will operate underthe discontinuous current mode (DCM) if Io is lower than IG ,and the corresponding waveforms are illustrated in Fig. 8.


Fig. 7. Ratio of IG and IG m ax versus duty cycle.

Fig. 8. Waveforms of the rectified voltage and output filter inductance currentunder DCM.

From Fig. 8, the expression of output current can be obtained

Io =3Ts

[ΔiLf · (6D − 1) Ts

6+

0.75kVin − Vo

Vo

· ΔiLf · (6D − 1) Ts

6

]=ΔiLf · 3kVin · (6D − 1)

8Vo. (19)

Substituting (15) and (17) into (19) and rearranging yields

Vo

Vin=

0.75k

1 + Io/[4IGmax · (6D − 1)2](20)

which indicates that the output voltage will be decided by Dand Io under DCM.

Fig. 9 illustrates the voltage transfer curves under differentoperation modes. As depicted, the dotted and bold line repre-sents the boundary between CCM and DCM. On the left of theboundary line, the converter operates under DCM, and the out-put voltage is determined by D and Io , while on the right of theboundary line, the converter will operate under CCM.

B. Output Filter Inductance

Fig. 10(a) shows the waveforms of the rectified voltage vrectand the output filter inductance current iLf in the proposedconverter, and the current ripple frequency of output filter in-ductance is six times as much as the switching frequency. The

Fig. 9. Voltage transfer curves under different operation modes.

Fig. 10. Waveforms of the rectified voltage and output filter inductance cur-rent. (a) TPTL converter. (b) Half-bridge TL converter.

output filter inductance can be derived by (15)

Lf TP =Vo ·

(1 − 4Vo

3k ·V in

)

6ΔiLf · fs. (21)

where k = 4Vo /[3Vin min ·(6Dmax− 1)], and Dmax is the maxi-mum duty cycle that is set at 0.3.

To illustrate the good performance of the proposed converter,the half-bridge TL converter is adopted to make the comparison.Fig. 10(b) gives the rectified voltage and output filter inductancecurrent of half-bridge TL converter; from Fig. 10(b), the outputfilter inductance is

Lf HB =Vo ·

(1 − 2Vo

kH B ·V in

)

2ΔiLf · fs. (22)


Fig. 11. Ratio of Lf TP and Lf HB versus the input voltage.

where kHB is the turns ratio of the transformer in the half-bridgeTL converter, kHB = 4Vo /(Vin min · DHB max), and DHB maxis the maximum duty cycle that is set at 0.45.

Fig. 11 shows quantitatively the savings in the inductancerequirement as a function of the range of input variation, andthe Y -coordinate is the ratio of Lf TP to the maximum Lf HB ,where input voltage Vin = 540–660 V, output voltage Vo =48 V, output current Io = 20 A, switching frequency fs =50 kHz, ΔiLf = 4 A, Dmax = 0.3, and DHB max = 0.45.As shown, the proposed converter can save the output filterinductance significantly, which is reduced by a factor of about25.6% compared with the half-bridge TL converter.

C. Current Stress and Voltage Stress on Switches

Switch ratings will be selected such that the rms current flow-ing through the switch will be equal to the switch rms currentrating Irms . During a switching cycle, the high-frequency linkline current is shared between two switches in a phase leg. Forexample, in phase A,Q1 carries the load current during the pos-itive half cycle and Q4 during the negative half cycle. FromFig. 6(a), it can be known that the line current iA is divided intotwo parts: ipa and ipc , where ipa is the primary current reflectedfrom the load. Meanwhile, ipb and ipc share the load together;however, ipb and ipc are usually unequal and their numericalvalues depend on the operation condition. In practical applica-tion, it can be approximately assumed that ipb and ipc share theload current equally for convenience; therefore, the rms currentthrough the switches IQrms under rated load is given by

IQrms =3k · Io ·

√D

2. (23)

Likewise, the half-bridge TL converter could be used for com-parison. If the duty cycle control is adopted in the half-bridgeTL converter, the rms current through the switches is given by

IQrms HB = kHB · Io ·√

DHB . (24)

Fig. 12. Ratio of IQ rm s and IQ rm s HB versus the input voltage.

Fig. 13. Photo of the experimental TPTL dc/dc converter.

While if the phase-shifted control is employed, the rms currentthrough the switches will be given by

IQrms HB = kHB · Io ·√

12. (25)

Using the specifications given previously, Fig. 12 illustratesquantitatively the savings in the rms current through switchesas a function of input variation range, and the Y -coordinate isthe ratio of IQrms to the IQrms HB . As shown, the rms currentthrough power switches can be reduced in both cases, whichmeans that the switches can sustain higher power in the proposedconverter.

As for the voltage ratings on switches, thanking for the TLconfiguration, specially, the flying capacitor and the freewheel-ing diodes, the voltage stress on power switches in the proposedconverter will be limited at half of the input voltage, so theconverter is suitable for high input voltage applications.

V. EXPERIMENTAL VERIFICATIONS

In order to verify the theoretical analysis, a prototype about1 kW was built in the laboratory, as shown in Fig. 13. The specifi-cations of the converter are given as follows: input voltage: Vin =540–660 VDC; output voltage: Vo = 48 VDC; output current:


Fig. 14. Experimental waveforms at full load and nominal input voltage.(a) vA B , vB C and vC A . (b) iA , iB , and iC . (c) vA B , iA , and vrect .

Io = 20 A; switching frequency: fs = 50 kHz; turns ratios oftransformers Tra , Trb , and Trc : k = 0.132; primary magnetiz-ing inductances: Lm = 4.2 mH; primary leakage inductances:Llk = 10 μH; output filter inductance: Lf = 20 μH; outputfilter capacitor: Cf = 3000 μF; Q1(D1&C1)−Q6(D6&C6):APT4012BVR (21 A/400 V); Df 1 and Df 2 : DSEI30-06 A(30 A/600 V); and rectifier diodes: DSEP30-03 A (30 A/300 V).The symmetrical duty cycle control is implemented with thedigital signal processor TMS320F2812.

Fig. 14 shows the experimental waveforms of the voltage be-tween the midpoint of three-phase bridges, the line currents ofthree phases, and the rectified voltage at full load and Vin =600 V. As shown, the voltages and currents of three phases aresymmetrical, which are well in agreement with the theoreticalanalysis. Meanwhile, several resonant oscillations occur duringa switching cycle, and the oscillations attenuate gradually due

Fig. 15. vPW M , vDS , and iD of (a) Q1 , (b) Q5 , and (c) Q6 at full load andVin = 600 V.

to the impendence in the circuit. Furthermore, the rectified volt-age pulsates at six times the switching frequency, which willlead to a reduced filter inductance. As illustrated in Fig. 14(c),different voltage levels appear in the rectified voltage during ahalf switching cycle, which has minor difference with the idealwaveforms. The reason for the variation in the rectified voltageis due to the reverse recovery of the body diodes of switches.

Fig. 15 shows the gate drive signal vPWM , the voltage acrossthe drain and source vDS , and the drain current iD of Q1 , Q5 ,and Q6 , respectively, at full load and Vin = 600 V, which il-lustrate that all the switches are zero-voltage turn-off due totheir intrinsic capacitors. However, before each switch turnsON, no current flows through their body diodes, so they areall turned ON under hard switching. The ringing in vDS andiD corresponds to the resonant interval such as stage 4–6 as


Fig. 16. Conversion efficiency. (a) Efficiency in different output currents underthe nominal input voltages. (b) Efficiency at full load under different inputvoltages.

mentioned in Section III, during which the leakage inductancesresonate with junction capacitors of switches. Furthermore, allthe switches sustain only half of the input voltage.

Fig. 16(a) shows the overall efficiency of the proposed TPTLconverter at different load currents under the nominal inputvoltage of 600 V, and Fig. 16(b) shows the overall efficiencyat full load under different input voltages. As shown, adoptingthe symmetrical duty cycle control, the converter presents alow efficiency under a relatively high switching frequency of50 kHz.

Fig. 17 depicts the calculated distribution of the power lossesunder the nominal operation case. It can be observed that thedominant part of the power losses is distributed in the turn-on loss of switches, considering the turn-on of switches withnonzero voltage under available control scheme, which willincrease significantly along with the switching frequency. Asan alternative solution in the future work, other possible con-trol schemes such as asymmetrical duty cycle control may beadopted to realize the ZVS for switches and increase the conver-sion efficiency. Meanwhile, the converter presents a low con-

Fig. 17. Calculated power loss distribution for nominal operation (Vin =600 V, Vo = 48 V, Io = 20 A).

duction loss on switches thanks for the low rms current throughpower switches. The efficiency data and the loss breakdownshow that the proposed converter should be recommended tobe employed in high-power applications under low-to-mediumfrequency range, such as the induction heating power supplyand battery charger for electric vehicle.

VI. CONCLUSION

This paper proposed a novel TPTL dc/dc converter, whichhas the following characteristics. 1) Compared with the avail-able TPTL dc/dc converters, the proposed converter can reducethe number of switches, the gate drivers, and PWM channels sig-nificantly, which greatly simplifies the circuit structure. 2) Allpower switches sustain only half of the input voltage. 3) The out-put filter inductance is significantly reduced due to the dramaticincrease of output current ripple frequency. 4) The current stressof the switches is reduced due to the three-phase configuration.5) The switches are hard-switching, which may cause consid-erable switching loss and low efficiency, and the converter isrecommended to be employed in low- and medium-frequencyapplications. 6) The proposed converter has a voltage-fed char-acteristic at the input side, which will lead to a high input currentripple. The theoretical analysis has been validated by the exper-imental results obtained from a prototype of 1 kW and operatingat 50 kHz. For the higher switching loss will degrade the perfor-mance of the proposed converter, it is necessary to investigatethe improved control schemes in the next step to realize thesoft-switching for switches.

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[13] D. S. Oliveira, Jr. and I. Barbi, “A three-phase ZVS PWM DC/DC con-verter with asymmetrical duty cycle associated with a three-phase versionof the hybridge rectifier,” IEEE Trans. Power Electron., vol. 20, no. 2,pp. 354–360, Mar. 2005.

[14] J. R. Pinheiro and I. Barbi, “The three-level ZVS-PWM DC-to-DC con-verter,” IEEE Trans. Power Electron., vol. 8, no. 4, pp. 486–492, Oct.1993.

[15] X. Ruan, L. Zhou, and Y. Yan, “Soft-switching PWM three-level con-verters,” IEEE Trans. Power Electron., vol. 16, no. 5, pp. 612–622, Sep.2001.

[16] T. Song, N. Huang, and A. Ioinovici, “Zero-voltage and zero-currentswitching three-level DC–DC converter with reduced rectifier voltagestress and soft-switching-oriented optimized design,” IEEE Trans. PowerElectron., vol. 21, no. 5, pp. 1204–1212, Sep. 2006.

[17] J. A. Carr, B. Rowden, and J. C. Balda, “A three-level full-bridge zero-voltage zero-current switching converter with a simplified switchingscheme,” IEEE Trans. Power Electron., vol. 24, no. 2, pp. 329–338, Feb.2009.

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Fuxin Liu (S’04–M’09) was born in HeilongjiangProvince, China, in 1979. He received the B.S., M.S.,and Ph.D. degrees in electrical engineering from theNanjing University of Aeronautics and Astronautics(NUAA), Nanjing, China, in 2001, 2004, and 2007,respectively.

In 2007, he joined the Faculty of the College of Au-tomation Engineering, NUAA, where he is currentlyan Associate Professor. His main research interestsinclude soft-switching dc/dc converters, electric ve-hicle power systems, and renewable energy genera-

tion systems.

Gaoping Hu was born in Anhui Province, China, in1989. He received the B.S. degree in electrical engi-neering and automation from the Nanjing Universityof Aeronautics and Astronautics, Nanjing, China, in2011, where he is currently working toward the M.S.degree in electrical engineering.

His main research interests include electric vehi-cles and three-phase three-level converter.

Xinbo Ruan (M’97–SM’02) was born in HubeiProvince, China, in 1970. He received the B.S. andPh.D. degrees in electrical engineering from theNanjing University of Aeronautics and Astronau-tics (NUAA), Nanjing, China, in 1991 and 1996,respectively.

In 1996, he joined the Faculty of Electrical En-gineering Teaching and Research Division, NUAA,where he became a Professor in the College of Au-tomation Engineering in 2002 and has been involvedin teaching and research in the field of power electron-

ics. From August to October 2007, he was a Research Fellow in the Departmentof Electronic and Information Engineering, Hong Kong Polytechnic University,Hong Kong. Since March 2008, he has also been with the College of Electricaland Electronic Engineering, Huazhong University of Science and Technology,Wuhan, China. He is a Guest Professor with Beijing Jiaotong University, Beijing,China, Hefei University of Technology, Hefei, China, and Wuhan University,Wuhan. He is the author or coauthor of four books and more than 100 techni-cal papers published in journals and conferences. His main research interestsinclude soft-switching dc–dc converters, soft-switching inverters, power factorcorrection converters, modeling the converters, power electronics system inte-gration, and renewable energy generation system.

Dr. Ruan was a recipient of the Delta Scholarship by the Delta Environ-ment and Education Fund in 2003 and was a recipient of the Special AppointedProfessor of the Chang Jiang Scholars Program by the Ministry of Education,China, in 2007. Since 2005, he has been serving as Vice President of the ChinaPower Supply Society, and since 2008, he has been a member of the Tech-nical Committee on Renewable Energy Systems within the IEEE IndustrialElectronics Society. Since 2011, he has been an Associate Editor for the IEEETRANSACTIONS ON INDUSTRIAL ELECTRONICS. He is a Senior Member of theIEEE Power Electronics Society and the IEEE Industrial Electronics Society.

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