three instructions. four registers. — 16-bit instructions...

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Really Simple RS0 Processor — Three instructions. Four registers. — 16-bit instructions, 8-bit bus. — Built in Logisim. — For demonstration purposes only — This is wasteful in terms of transistors. Designed to keep things straightforward and easy to understand.

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Page 1: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

Really Simple RS0 Processor

— Three instructions. Four registers.— 16-bit instructions, 8-bit bus.— Built in Logisim.— For demonstration purposes only

— This is wasteful in terms of transistors. Designed to keep things straightforward and easy to understand.

Page 2: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

RS0 Processor

Page 3: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

Instruction Format

— First 8 bits are— 2 bits opcode— 2 bits destination register— 2 bits source register 0— 2 bits source register 1

— Opcodes are— 00 for load immediate— 10 for addition— 11 for subtraction

Page 4: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

RS Instruction Cycle

— Fetch, wait, store result, then back to the top.— This is implemented in a finite state machine (three

states, two bits)

Page 5: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

The Control Unit

Page 6: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

RS Fetch

— The current program counter is used to index into memory. An instruction is fetched, and stored in the Instruction Register. At the same time, the next instruction address (current program counter plus one) is stored into the PC.

Page 7: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

RS Execute

— Next step. We wait. In a real circuit, it would take some time for the decoder to extract the bits from an instruction, and for an ALU to do a computation.

Page 8: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

RS Store

— Finally, we enable write for the register file, storing either an immediate value, or the result computed by the ALU.

— And then? Do the next instruction.

Page 9: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

The ALU

Page 10: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

The Decoder

Simple instruction processing. The first bit will determine if the instruction is a load, or if we're doing an ALU operation. That bit will go to a mux, where we select between bits from the instruction, or from the ALU.

Second bit goes to the ALU (selecting ADD or SUBTRACT), and the remaining bits go to the register file.

Page 11: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

The Decoder

Page 12: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

Register File

Four 8-bit registers, with inputs for DR, R0, R1. We can read from any of the four registers at any time. Write enable will store an incoming result in the register indicated by DR.

Page 13: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

Register File

Page 14: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

Example

Load register 1 with value 15

00 01 00 00: (Opcode, R1, source registers ignored)

00001111 : (15 in binary)

Convert to hex: 100F

Page 15: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

Example

Add R2 to R3, result to R1

10 01 10 11: (Opcode, R1, R2, R3)

00000000: (Immediate is ignored)

Convert to hex: 9B00

Page 16: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

Example

Subtract R0 from R3, result to R2

11 10 11 00: (Opcode, R2, R3, R0)

00000000: (Immediate is ignored)

Convert to hex: EC00

Page 17: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

Coding Exercise

r0 = 4;r1 = 10;r2 = r0 + r1;r3 = r1 - r0;

Page 18: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

r0 = 4

Opcode: 00 00 00 00Immediate: 00000100Instruction in hex: 0x0004

Page 19: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

r1 = 10

Opcode: 00 01 00 00Immediate: 00001010Instruction in hex: 0x100a

Page 20: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

r2 = r0 + r1

Opcode: 10 10 00 01Immediate: 00000000Instruction in hex: 0xA100

Page 21: Three instructions. Four registers. — 16-bit instructions ...pmadden/courses/cs120/Logisim/rs0.pdf · — 2 bits opcode — 2 bits destination register — 2 bits source register

r3 = r1 - r0

Opcode: 11 11 01 00Immediate: 00000000Instruction in hex: F400