three-dimensional electro-thermal circuit model of power...
TRANSCRIPT
![Page 1: Three-Dimensional Electro-Thermal Circuit Model of Power ...mos-ak.org/bucharest/presetnations/Chvala_MOS-AK_Bucharest.pdf · Three-dimensional electro-thermal circuit model of power](https://reader033.vdocuments.us/reader033/viewer/2022041500/5e21772b432eba15cb5eb13d/html5/thumbnails/1.jpg)
Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Three-Dimensional Electro-Thermal Circuit Model of Power Super-Junction
MOSFET
Sep. 20, 2013 Bucharest MOS Modeling and Parameter Extraction Working Group11th MOS-AK/GSA ESSDERC ESSCIRC Workshop
Aleš Chvála
Slovak University of Technology in Bratislava
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Motivation
Development and calibration of electro-thermal MOSFET model for power technology
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Outline
• Introduction
• Electrical compact model of Super Junction MOSFET
• Electrical equivalent of three-dimensional thermal system
• Experiment and model verification (UIS test)
• Conclusions
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
• Circuit simulators are standard tools in the development and optimization of electronic systems
• SPICE-like models provide faster results but in general do not take into account nonlinear thermal dependences of certain parameters
• Properties of power semiconductor devices are very strongly temperature-dependent
• Self-heating and dynamic interdependence between electrical and thermal components of corresponding model need to be implement
INTRODUCTION
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Super Junction MOSFET – high voltage technology (BV ~ 600V)
For analysis novel locally charge balancedtrench based super-junction n-channelpower MOSFET was used. Samples exceedV(BR)DSS ~ 600 V, VGSTH = 4 V,RON = 23mΩ/cm2 and single pulse drain-to-source avalanche energy EAS = 800 mJ forL = 10mH
ELECTRICAL COMPACT MODEL
T. Fujihira, “Theory of Semiconductor SuperJunction Devices,” Jpn J. Appl. Phys, 36(10), pp. 6254-6262, 1997.
P. Moens, et al., “UltiMOS: A Local Charge-Balanced Trench-Based 600V Super-Junction Device,” proc. of the 23rd International Symposium on PowerSemiconductor Devices & ICs, ISPSD, pp. 304-307, 2011.
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Die
Lead framePackage
S D
G
ELECTRICAL COMPACT MODELSuper Junction MOSFET
2D doping concentration DPAK2 package
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Thermal systemElectrical circuit
PowerPower
Temperature
Circuit electro-thermal model
INTRODUCTION
Interaction between electrical and thermal parts
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Gate
CGD RD
RSCGS
DB
VBRRL
VT0 - threshold voltageRD - drain resistivityDB - body diodeVBR - breakdown voltageRL - leakage resistanceSBURN - thermal burning
CDSVT0
RBR
RDB
=f(Temperature)
SBURN
PowerPower
Temperature
Thermal system
Simple model + Real device effects
ELECTRICAL COMPACT MODEL
SPICE Level...BSIM...
Drain
Source
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Breakdown characteristicsof SJ MOSFET
Transfer characteristicsof SJ MOSFET
ELECTRICAL COMPACT MODEL
T (K)
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
CV characteristics of SJ MOSFET
ELECTRICAL COMPACT MODEL
Measurement setup for CGS, CGD
and CDS measurements
H.Suto et.al, 'Methodology for Accurate C-V Measurements of GateInsulators below 1.5nm EOT', Extended Abstracts of the 2002 Int'l Conf. on Solid State Devices and Materials, Nagoya, pp. 748-749
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Thermal destruction (SBURN)
ELECTRICAL COMPACT MODEL
BLACKBURN, D. L. Power MOSFET failure revisited, In Power Electronics Specialists Conference PESC '88, Kyoto, Japan, 1988, pp. 681-688.
Donoval, D., Vrbicky, A., Marek, J., Chvala, A., Beno, P., "Evaluation of the ruggedness of power DMOS transistor from electro-thermal simulation of UIS behaviour", Solid-State Electronics, 52, pp. 892-898, 2008.
Destructive energy3/4 vs. starting temperature and respective extrapolation of maximum device temperature
Estimate of device temperature from VDS(Breakdown) = f(temperature)
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Source
Drain
Gate
CGD RD
RSCGS
DB
VBRRL
VT0 - threshold voltageRD - drain resistivityDB - body diodeVBR - breakdown voltageRL - leakage resistanceSBURN - thermal burning
CDSVT0
RBR
RDB
=f(Temperature)
SBURN
PowerPower
Temperature
Thermal system
Simple model + Real device effects
SPICE Level...BSIM...
EQUIVALENT THERMAL CIRCUIT
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Thermal system
d1
d2
d3
P(t) A
Cth1
Cth2
Cth3
Rth1
Rth2
Rth3
Tj
Heat sink T(0,t)
- Power
- Junction temperature
- Thermal capacity
- Thermal resistivity
Electrical equivalent
P(t) [W] ~ I(t) [A]Tj [K] ~ VTj [V]Cth [Ws/K] ~ C [F]Rth [K/W] ~ R [Ω]
A
dRR i
ithi
AdcCC iithi
VTj
EQUIVALENT THERMAL CIRCUIT
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Thermal coefficients RC network with constant element
RC network with temperaturedependent resistances
2cTbTa
- constant
A
dRR i
ithi
Si – strong temperature dependent
T(K) 300 400 500
c(J/(K cm-3) (W/cmK)
Si 1.63 1.55 1.09 0.82
Cu 3.42 4.01 4.00 3.98
takes into account temperature dependence of thermal conductivity
EQUIVALENT THERMAL CIRCUIT
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
ii
ithxi
zy
xRR
xi
iiithi zyxcCCi
| xi |
__
yi
__ __zi
__
| xi | | xi |
__
yi
__
iR
2
iC
2
xiR
4
iC
8
iC4
xiR
1-D 2-D 3-D
Multi-dimensional thermal flow
EQUIVALENT THERMAL CIRCUIT
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
EQUIVALENT THERMAL CIRCUIT
8 x 8 MOSFETs are connected taking intoaccount parasitic resistances of thepoly-Si gate electrode and metal sourceelectrode
Heat distribution at avalanche conditions
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Thermal equivalent network
VT0 - threshold voltageRD - drain resistivityDB - body diodeRL - leakage resistanceVBR - breakdown voltageSBURN - thermal burning
Electrical circuit
CDS
CGD =f(VDS)CGS
=f(VTj)
COMPACT MODEL OF POWER MOSFET
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
EXPERIMENT AND MODEL VERIFICATION
Simplified UIS test circuit and current and voltage waveforms of the tested device under UIS test conditions
dti(t)VEAVt
(BR)effAS 0
0 , 2
1 2 S ASAS RLIE
Unclamped Inductive Switching (UIS) test
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Model with temperature-dependent RC network bettercorresponds the measurement
UIS test characteristics of the SJ MOSFET
EXPERIMENT AND MODEL VERIFICATION
Measurement
Temperature-dependent RC network
Standard RC network
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Comparison of destructive currents for different values of inductances
EXPERIMENT AND MODEL VERIFICATION
UIS test characteristics of the SJ MOSFET
Suitable thermal properties andanalysis provide realistic results
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
EXPERIMENT AND MODEL VERIFICATION
Multipulse UIS test characteristics of the SJ MOSFET
Temperature distribution at thebeginning of the tenth UIS pulseinside the structure
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
EXPERIMENT AND MODEL VERIFICATION
Multipulse UIS test characteristics of the SJ MOSFET
Current density distribution at thebeginning of the tenth UIS pulseinside the structure
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Conclusions
Three-dimensional electro-thermal circuit model of power Super-Junction MOSFET was introduced.
Implementation of real device effects and appropriate thermal properties are important for correct simulations results.
The simulations with implemented three-dimensional thermal flow and distributed properties of the power MOSFET provide more accurate results.
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Slovak University of TechnologyInstitute of Electronics and Photonics
MOS-AK WorkshopBucharest 2013
Thank you for your attention
Acknowledgements This work has been done with support of 7FP project SMAC, no. 288827
and grant VEGA 1/0866/11.