The Novel Stress Simulation Method for Contemporary DRAM Capacitor Arrays

Kyu-Baik Chang*a,b, Yun Young Kima, Jiwoong Suea, Hojoon Leea, Won-Young Chunga,

Keun-Ho Leea, Young-Kwan Parka, EunSeung Junga and Ilsub Chungb

aCAE Team, Semiconductor R&D Center, Samsung Electronics Co., LTD. San #16 Banwol-dong, Hwasung, Gyeonggi, 445-701, Korea (E-mail:kb.chang@samsung.com)

bSchool of Information and Communications Engineering, Sungkyunkwan University, Suwon, Gyeonggi, 440-746, Korea

Abstract— The increasing of aspect ratio in DRAM

capacitors causes structural instabilities and device failures as the generation evolves. Conventionally, two-dimensional and three-dimensional models are used to solve these problems by optimizing thin film thickness, material properties and structure parameters; however, it is not enough to analyze the latest failures associated with large-scale DRAM capacitor arrays. Therefore, beam-shell model based on classical beam and shell theories is developed in this study to simulate diverse failures. It enables us to solve multiple failure modes concurrently such as supporter crack, capacitor bending, and storage-poly fracture.

Keywords—capacitor stress; large-scale simulation; beam-shell model

I. INTRODUCTION

The demands for high-performance DRAM (Dynamic Random Access Memory) with low power consumption lead the continuous development of HAR (High Aspect Ratio) structure capacitor. This HAR structure, however, is the primary source of structural instability and process failure, e.g. top-bridge and capacitor leaning. To prevent these problems, a MESH-type (Mechanically Enhanced Storage node for virtually unlimited Height) capacitor having supporter structure is required and developed [1-4] (Fig. 1).

Figure 1: SEM image of MESH type capacitor with supporter.

Recently, multilayered thin film supporter to prevent capacitor leaning becomes the reason of process failures such as storage-poly fractures, supporter crack and capacitor bending. Capacitors can be modeled with simple two-dimensional structure or partial three-dimensional structure until now. However, these methods cannot deal with various failures associated with each other. Moreover, new model should be developed on each occasion. This paper reviews the models and results of simple two-dimensional and localized three-dimensional analysis with conventional method and introduces the novel method of integrated stress simulation that enables to simulate approximately 60 thousand capacitors in maximum based on beam and shell theory.

II. SIMPLE 2D MODEL

Two-dimensional stress analysis using simple composite model focuses on the determination and improvement of process failure. This analysis predicts single capacitor behavior depending on vertical movement of supporter or lateral movement of capacitor i.e. bending and adherent due to capillary force during cleaning process. Fig. 2 shows fragmentary failure analysis of unit block shrinkage after SiGe passivation process and it has enough predictability with very high correlation between simulation data and experiment data.

Figure 2: SEM images and simulation results of unit block shrinkage after SiGe passivation process. The Simulation result is magnified by original scale.

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Somewhat, such analyses have a understanding and improvement of the procunit block shrinkage, in case of same genersimulated and verified that the unit bloproportional with the number of capacitor, iblock (Fig. 3). It can be easily observed on cblock.

Figure 3: Shrinkage along with various numis verified by fabrication data.

Contrastively, the shrinkage of two 2capacitor blocks in DRAM devices are preand it makes useful guide for chip size desigshows us fabrication difficulty is going high4).

Figure 4: Shrinkage along with two kinds shows fabrication condition is getting wgeneration development.

III. LOCALIZED 3D MODE

Reasonably, simulation with full

structure about whole area is ideal; howe

major role in cess failures. As to ration device, it is ock shrinkage is .e. the size of unit cell and peripheral

mbers of capacitors

2x nm generation edicted differently

gn. Also, this result her than ever (Fig.

of design rule. It

worse along with

EL

three-dimensional ver, localized i.e.

partially discretized three-dimeby 3 to 8 by 8 unit size is simcomputational resources like simulation time. The major faidimensional model are storageand capacitor bending. Since tbe simulated with large-scastructure should be simplified unit. Storage-poly fracture andwith intrinsic stress value andsupporter materials. These kinoptimization of stress value and

Furthermore, the idea of sdeveloped to optimize capacitoand crack. The size of discretogether to avoid capacitor leanon this simulation, the fabrstructure is obtained successfull

Figure 5: Discrete supportecapacitor leaning and bendingits fabrication.

As mentioned earlier, abovlocalized three-dimensional understand mechanical failure engineering and optimization othey have a limitation that thphenomenon of capacitor with Also, these methods cannot anaSo we propose the novel melarge-scale capacitor as below.

IV. LARGE-SCALE IN

In DRAM capacitor, the stability is getting complicatedimensional model has abovemand prediction of stress fsimulation should be introducestress simulation is develop

nsional model composed from 3 mulated due to the limitation of the limitation of memory and lure analyses of localized three-e-poly fracture, supporter crack three-dimensional model cannot le capacitor unit, the failure or partially modeled with small

d capacitor bending are analyzed d Young’s modulus of various nds of failure are improved by d thickness of supporter.

small size discrete supporter is or modulus and prevent bending ete supporter is well optimized ning and bending (Fig. 5). Based rication of discrete supporter ly without any failures.

er size optimization between

g. And top-view SEM image of

ve simple two-dimensional and model are very useful to in a point of view local stress-

of thin film intrinsic stress. But, hey cannot simulate complicate full three-dimensional structure. alyze various correlated failures. ethod of stress simulation with

NTEGRATED MODEL stress analysis for structural

ed. Since the localized three-mentioned limitations in analysis failure, integrated large-scale d. Therefore, a novel method of

ped for contemporary DRAM

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capacitor arrays based on the beam theory oand Timoshenko and shell theory of KiMindlin-Ressner [5-8]. The essential methodcapacitors are described as beam elementstheory point of view and supporters are selements (Fig. 6).

Figure 6: Beam and shell elements are mscale capacitor simulation.

Three-dimensional capacitor shapes canbeam element as below. After modeling of shapes surrounded dielectric film on top andmeasure the displacement and deformation apaxial and lateral direction. And calculate eqmodulus from capacitor with single matedisplacement and deformation. In other woYoung’s modulus for the beam elemenhomogenizing the material property of full model, and validated by comparing its deflect7). In our study, error between three-dimenbeam element is less than single figure percen

Figure 7: An equivalent Young’s modulhomogenizing the material property of full 3D

In the same way, the shell element mobehavior of multiple composite layers [9].

Through this one-step integrated method,array capacitors can be simulated and vario

of Euler-Bernoulli irchhoff-Love and d of this model is s from the elastic simplified as shell

modeled for large

n be substituted to f detailed capacitor d bottom electrode, pplying force with quivalent Young’s erial to get same rds, an equivalent

nt is derived by three-dimensional

tion behavior (Fig. nsional shape and ntage.

lus is derived by D model.

odel considers the

, up to 120 by 120 ous stress induced

failure modes can be detectecapacitors with symmetry cond

Figure 8: Large-scale simulativarious stress failure like crack

This means the relationshipand quantitative simulation basalso simulated. In additionconvergence of simulation iincrease of simulation domain. enough to represent full size of

Figure 9: Solution convergenumber of capacitors.

Lately, we predict the cramaterials using the beam-shellimprove capacitance of DRAMmore vulnerable supporter thickness, material property andoptimized.

ed at a time, i.e. 60 thousand dition (Fig. 8).

ion is able to analyze integrated

k, fracture and bending at a time.

p between these various failures sed on material properties can be n, the reliability error and is enhanced according to the And it shows our domain size is

f capacitor (Fig. 9).

nce result in accordance with

ack stress with new supporter l model. Thinner supporter can M, but this makes the structure

crack. Therefore, supporter d pattern of open area should be

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Fig. 10 shows crack stress change with sand two kinds of supporter material. It showslead to less crack stress and material 2 is moFig. 11 shows crack stress change with supporter material. Normally intrinsic stress controlled by process temperature and deposstress is measured at the point of crack occurWith this result, we can choose supporter matthickness and intrinsic stress.

Figure 10: Crack stress change along with suand material.

Figure 11: Crack stress change along with stress.

With this method, we can solve vassociated with HAR structure capacitor anstress-induced failures with structurally stablWe can also enhance capacitance with mthickness to maximize area of surface.

V. CONCLUSIONS

A various failure in capacitor with HAincrease upon DRAM scaling causes delayperiod and rising of development cost. Toinduced failures we have optimized procesvarious failures through two-dimensiodimensional simulation model. Due to

upporter thickness s thicker supporter ore stable to crack. intrinsic stress of of material can be

sition rate. Critical rred in fabrication. terial and optimize

upporter thickness

supporter intrinsic

various problems nd prevent various le capacitor block. minimal supporter

AR structure that y of development

o minimize stress-sses and analyzed

onal and three-the increase of

complexity in capacitor structscale simulation is needed. integrated analysis model withbased on the beam and shell thand capacitance are enhanced afabrication.

REFER

[1] Kinam Kim, “Future memopportunities,” VLSI Techno

[2] Kinam Kim and Gitae Jung40nm Node,” Technology Dig

[3] Kinam Kim, “Technology fFlash Manufacturing,” Tech323-326

[4] D.H.Kim, H.Y. Kim and M. Storage node for virtually unAiming ar sub 70nm DRAMspp. 69-72

[5] S.P.Timoshenko, Philosophic[6] A.E.H.Love, Philosophical T

Serie A, N 17, 1888, pp. 491-[7] R.D.Mindlin, ASME Journal

31-38 [8] O.Kuwazuru, Med Eng. Phys[9] Abaqus 6.10-EF1 Theory M

elements, pp. 561-658

ture and stress analysis, large-Therefore, we developed an

h up to 60 thousand capacitors heory. As a result, process yield and verified successfully through

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