the future of graphical system design throughout system life cycle
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8/14/2019 The future of Graphical System Design throughout System Life Cycle
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28 May 2009
Peter ZogasSVP Marketing, Sales, and SupportNational Instruments
8/14/2019 The future of Graphical System Design throughout System Life Cycle
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Engineering Grand Challenges
Source: www.engineeringchallenges.or
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Digital Radio & TelemetryHigh DensityData Storage &Imagery
Databusses
GPS Navigation
Nav/Comms
Satellite Link
Multifunction
Display
UMS
Field ServiceTools
System Diagnostics& documentation
Mil/Aero Test Challenges
8/14/2019 The future of Graphical System Design throughout System Life Cycle
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Empowering Users Through Software
LEGO Mindstorms NXT“the smartest, coolest
toy of the year”
CERN Large HadronCollider
“the most powerful instrument on earth”
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Trends in WirelessTest
Ubiquitouswireless
connectivity
Proliferation of wireless
standards
Decreasing costof production test
Trends inSemiconductor
ATE
Test costs notscaling with chip
costs
“Protocol Aware” ATE
Trends inMilitary/Aerospace
Move to software-defined test
systems
Investment insignal intelligence
8/14/2019 The future of Graphical System Design throughout System Life Cycle
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• 37 International Offices
• R & D Centers in 5 Countries
• Global Sales and Support
• Over 600 Alliance Members
Distributors
Direct Sales Offices
National Instruments Worldwide
2008 Revenue: $821M
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Our Vision for Instrumentation Systems
“To do for test and measurementwhat the spreadsheet did for financial analysis.”
Virtual Instrumentation“The software is the instrument .”
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“A single synthetic instrument canreplace numerous single function instrumentsthereby reducing the logistics footprint and solving obsolescence problems.”
– Report to Congress on the activities of the DoD Office of Technology Transition,February 2002
US Department of Defense Defines Synthetic Instruments
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Digitizers Investment Direction
• Time-Domain8-bit, multi-GS/s, multi-GHz16-bit, 150MS/s
• Lower Cost8/12-bit, 100 MS/s USBPCIe digitizer
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NEW 6.6 GHz RF Instruments
PXIe-5663 VSA• Single stage heterodyne
downconverter• 10 MHz to 6.6 GHz
• 50 MHz Instantaneous BW (3 dB)• -112 dBc phase noise (10 kHz) at 1
GHz
PXIe-5673 VSG• Direct (homodyne) RF upconversion• 85 MHz to 6.6 GHz• >100 MHz Instantaneous BW
• -112 dBc phase noise (10 kHz) at 1 GHz
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PXI 26.5GHz Vector Signal AnalyzerPhase Matrix/BAE/NI Cooperation
• Funded by the DOD to prove the concepts of SI in PXI• PXI Down Converter for use in a SI Context over the 100KHz-26.5 GHz
frequency range• <1ms LO tuning speed• Front end pre-select• PXIe digitizers for high-speed streaming
20MHz 16bit and 300MHz 8 bit signal paths
• Family of five PXI modules :• RF Input/Signal Conditioning module• Microwave Band Input Module
• Low Band Input Module• IF Output Conditioner Module• Local Oscillator Module
• Full system consists of:-PXI/PXIe Chassis, Digitizer, Controller, LabVIEW Signal Processing SW
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Software Defined Radio
IF-RIO with:2.7G Up and Downconvertor PXIe-5641R IF-RIO
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Product Development Life Cycle
Target Setting Subsystem Validation End-of-LineHardware in the LoopSystem ID Calibration
Measurements in the Design Flow
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Protocol-Aware ATE
Test Vectors
Standard ATEModel
System Emulationor ProtocolIntelligence
Protocol-AwareCommunication
Output
Intelligence embedded intoFPGA hardware
Routine pre-defined in testsoftware
D U T I n
- c y c l e
r e s p o n s e
Image courtesy of Verigy
Input
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NI FlexRIO – Speed and Flexibility
FlexRIO FPGA Module
• Up to 132 channels• Up to 1 Gb/s per pair• Up to 128 MB of DDR2 DRAM
FlexRIO Adapter Module
• Interchangeable I/O• Customizable by users• Module Development Kit
• 1394b• MIL-STD-1553• ARINC-429• Digitizers• ARB’s
• ….
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800-100MHZ UHF Module
•4 Channels•I/Q (De) Modulation•Low-Cost ATE
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Stimulus
Dynamic Test Applications
Response
OnboardSystems
Emulation
Missile
Temp, flow,pressure,
1553…
PWM,analog ,digital
EngineEmulation FADEC
Missile TestEngine Control
Module Test (HIL)
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Graphical System Design
National Instruments Vision
Real-time MeasurementsEmbedded MonitoringHardware-in-the-loop
Test and MeasurementAutomated Test
Data AcquisitionReconfigurable
Instruments
Industrial and EmbeddedIndustrial Control (PAC)
Machine ControlElectronic Devices
Code Generation
“To do for embedded what thePC
did for the desktop.”
“To do for test and measurementwhat the spreadsheet did
for financial analysis.”
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CompactRIO and Single Board RIOReal-Time Processor 400 MHz processor for floating-point control,
analysis, and logging
Reconfigurable FPGACustomized timing and processing of I/O
Networking/Comm10/100 Ethernet portRS232 Serial port
Expansion I/OConnect up to three C Series modules
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Simplify your Embedded Prototyping
Traditional Tools Application Specific
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Evolution of Software Abstraction
A b s t r a c t i o n
System complexity
Machine code
Assembly language
CC++
C#
System design platform
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LabVIEW FPGA Code AbstractionCounter Analog I/O I/O with DMA
LabVIEW FPGA VHDL~4000 lines
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User-Definable FPGA-based I/O
Custom timing andsynchronization
Clocks
Custom Counters
Multi-rate
Custom TriggeringAnalog IO
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Configuration Textual Math StatechartSimulation
High-Level Design Tools
Embedded PlatformDesktop Platform
Real-Time FPGA MPU
LabVIEWGraphical Programming
Linux® Macintosh Windows
Tux penguin is courtesy of Larry Ewing. Linux® is the registered trademark of Linus Torvalds in the U.S. and other countries.
C CodeData Flow
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Inspiring and Educating Tomorrow’s Engineers
Challenge:40,000 High School Students6 week build of a complex robotics system
Solution:Graphical System Design with NI CompactRIO