the ever-changing face of integrated microprocessors-an evolutionary story

MICROPROCESSORS

The ever-changing face of integrated microprocessors- an evolwtionary story

by Kevin Godfrey

Since the invention of the microprocessor, computer-based systems that control and help us in our daily lives have proliferated. This trend is set to continue in an ever increasing way, This article looks at the architectural development of these control systems and introduces some of the latest integrated microprocessor products.

ack in the 1970s, the first 8-bit general purpose computers appeared on the scene. These were slow and cumbersome by today’s standards B but showed us where the future lay. They were

generally too expensive to dedicate to a specific system control task and found applications in offices and laboratories as computers dedicated to specific computational functions. For example, in large test and measurement systems, they were used for their statistical and data storage powers. Users would usually leave the system running for several hours to make measurements and calculate the data that they needed. The computer typically would not control the system but would monitor and record. After recording, the computer was taken offline and used to analyse the data.

These early computer systems were too expensive, large and slow for most real-time control systems-these used custom electronic or mechanical controllers. One of the early applications to use computers to actually control a system and react to changes was traffic light control. Large towns and cities had their traffic light systems controlled from a central computer room using a dedicated computer system. The traffic control software was written specifically for each road system knowing the town layout and likely traffic patterns.

During the late 1970s, equipment manufacturers started to use general purpose 8-bit microprocessors in what we now call embedded systems. The microprocessor in these systems ran dedicated software on a

purpose-built hardware platform and performed very few tasks. This application category included printers, large test and measurement equipment, early centralised telecommunication switches and small (by today’s standards) PABX systems.

At this point we can see two approaches to embedded system control starting to emerge: use of a standard computer or use of a dedicated microprocessor circuit. These two methods of working still continue today but are now being joined by a third route: use of dedicated microprocessor systems that run standard operating system software originally designed for the desktop market. This new method gives system designers a middle road and finds applications where the overhead of standard computer software does not affect cost or performance.

Evolution of microprocessor controlled embedded systems

The first devices to be embedded in equipment were general-purpose 8-bit microprocessors. These required additional memory and peripheral chips and meant that the equipment was fairly large but fast. To minimise size and power consumption, microcontrollers and integrated processors evolved to the point where general-purpose 8 and 16 bit microprocessors without integrated peripherals are rarely used today in new designs even though they are still being sold in huge numbers for construction of older equipment.

COMPUTING & CONTROL ENGINEERING JOURNAL JUNE 1996 153

OPROCESSORS

Profibus

connection address bus network

links

MC68302

scc3 (transparent)

Fig. 1 MC68302 weighing machine

At the top end of the market, general-purpose microprocessors are still being designed into equipment such as printers and scanners and for controlling high- performance communications equipment. In these applications, 32-bit microprocessors are coupled n-ith large arrays of memory to create high-speed single function machines. There is often a second or third processor with integrated peripherals to handle communications and machine control (for example, MC68040 systems with an MC68360 operating in companion mode). Motorola M680x0 family microprocessors, epitomised by the flagship MC68040 and MC68060 devices, have become synonymous with high- performance embedded control systems. These CPUs are often used in conjunction with Motorola M683xx integrated processors which provide a variety of on-chip peripherals and system integration modules.

Digital signal processors (DSPs) are another good example of high-performance processors that are used in many applications for their number crunching capabilities. Plain DSPs without peripherals are available but more and more DSP chips are being produced with integrated peripherals. Their development is mirroring development of general-purpose processors.

8 avzd 16 bit microcontrollers Microcontrollers (MCUs) were the first specific

function integrated processors to evolve. They include a microprocessor, a number of peripherals (sometimes of

custom design) and program and data memory. The processor may be an 8 or 16-bit machine. The distinction between an integrated processor and a microcontroller is that the latter is capable of operating as a standalone device using only on-chip program and data memory.

The largest portion of the MCU market is for 8-bit machines. These chips are very small and low power and control many of the devices that we use daily: the washing machine, TV remote control handset, PC keyboard, car brakes etc. Now they are even finding their way onto our credit cards in the form of bare chip die used in smartcards. For higher performance machines such as engine management systems, 16-bit MCUs are used.

16 bit integmted pyocessors To bridge the gap between the performance of 16-bit

processors and the ease of use of 8-bit MCUs, the 16-bit integrated processor was developed and it has now evolved to include full 32-bit processor cores. This class of device includes a standard 16 or 32-bit microprocessor on the same chip as a number of standard peripherals and system integration features. The first Motorola device in this category was the MC68302 (see Panel I), a 16132-bit processor with three communications channels and system integration peripherals, was initially designed for the communications market but now finds widespread use in other application areas. Fig. 1 shows an MC68302 application outside of the communication arena where the device is used as the central processor in supermarket

COMPUTING & CONTROL ENGINEERING JOURNAL JUNE 1996

MICROPROCESSORS

Panel 1: The MC68302 The MC68302 uses a microprocessor architecture that has serial channels connected to the system bus through a dual- port memory (see Fig. 2). Various parameters, counters and all memory buffer descriptor tables reside in the dual-port RAM. The receive and transmit buffers may be located in this on-chip RAM or in external memory. If a serial communications channel's (SCC) data is programmed to be located in external memory, the microcoded communications controller (a small RlSC processor) automatically programs the corresponding DMA channel to perform the required accesses. Six DMA channels are dedicated to the six serial ports (receive and transmit for each of the three SCCs). If the data resides in the on-chip dual-port RAM then the microcoded communications controller accesses the RAM directly with a one clock cycle and no arbitration delays.

The buffer memory structure of the MC68302 can be configured by software to closely match 1/0 channel requirements. The interrupt structure is also programmable to relieve the on-chip MC68000 core of bit manipulation functions for peripherals, allowing the processor more time to perform application software and protocol processing. In some cases, the interface to equipment or proprietary networks uses the standard serial data 1/0 and modem control handshake lines in a non-multiplexed mode for one, two or all three SCC ports. Alternatively, any number of the SCCs may be programmed to operate over a multiplexed interface for connection to ISDN or TDM equipment. Each SCC can be independently programmed to handle HDLC, UART, DDCMP, BISYNC, Profibus and SS7 data frames or transparent data without framing.

The microcoded communications controller is a RlSC processor that services all the serial channels. The RlSC processor transfers data between the serial channels and internal/external RAM, executes host commands and generates interrupts to the interrupt controller. This all

happens transparently to the main MC68000 core and without the user having to write any code for the RlSC processor. The main MC68000 core operates in either full MC68000 mode with a 16-bit data bus or MC68008 mode with an 8-bit data bus.

The MC68302 has system integration modules that simplify hardware and software design. The IDMA controller, with burst modes and driven by software or hardware requests, eliminates the need for an external DMA controller. There is an interrupt controller that can be used in a dedicated mode to generate interrupt acknowledge signals and respond to interrupt cycles without external logic. Similarly, the chip select signals and wait state logic eliminates the need to generate these signals externally. The system integration modules also include three hardware timers, parallel 1/0 ports, clock generation, bus arbitrator and system control modules.

The MC68302 includes bus arbitration logic to ensure that the SDMA and IDMA units can gain access to the system bus while the MC68000 core is using the bus. The SDMA operates in a 'cycle stealing' mode where it accesses the bus for just one bus cycle before relinquishing bus ownership. When the IDMA becomes bus master, it can retain bus ownership for many cycles while the SDMA continues to steal single bus cycles. The bus arbiter will also handle external requests for access to the bus from peripherals containing DMA logic. The on-chip bus arbiter priorities are programmable to allow the system designer to tune its characteristics for his system.

The MC68302 can also operate as a multi-function peripheral chip for an external CPU by disabling the MC68000 core. This mode of operation is called slave mode and allows the system designer to build equipment containing multiple MC68302s and/or higher performance microtxocessors.

interrupt controller additional

channel features

f 68000 f system bus

68000

~ 6DMA 1 ~ !fi channels dual-port

peripheral bus

communications controller

MC68302 other channels

I h

3 serial channels

RAMIROM

other peripherals

I

Fig. 2 MC68302 block diagram


OPROCESSORS

Panel 2: The 8L6382 The MC68LC302 is a low-cost variant of the MC68302 containing a subset of the peripherals, consuming less power and with an improved memory interface. Only two SCCs are provided on the MC68LC302 and the autobaud modem protocol has been added to these two SCCs. The MC68LC302 is software compatible with the MC68302, requiringjust a few minor changes to the initialisation code depending on the exact configuration. A new periodic interrupt timer (PIT) has been added to generate periodic interrupts for use with real- time operating systems or applications and to provide low- power mode wake up signals. The PIT interrupt time period can vary from 122 us to 1 2 8 s.

To simplify memory interface design, three control signals from the conventional M68000 family bus interface used on the MC68302 have been replaced with write enable and output enable signals. These signals can connect direct to SRAM, EPROM, flash EPROM and EEPROM devices as shown in Fig. 3. The MC68LC302 contains an option to boot from an 8-bit ROM and then switch over to 16-bit operation once initialisation is complete and the operational software has been copied to faster 16-bit RAM.

The MC68LC302 can operate from a variety of clock sources with frequencies of 3 2 kHz up to 25 MHz because it is equipped with an on-chip PLL and oscillator circuit. When using a very low frequency clock, the PLL multiplies the frequency by a programmable factor to run the CPU at up to 25 MHz. A t times when the CPU is idle, the clock frequency can be reduced to lessen power consumption. By using a low- frequency clock and disabling or reducing the strength of the MC68LC302's clock output signal, EMC emissions from the system can be dramatically reduced.

Power consumption has been reduced compared to the MC68302 by using a static core, smaller geometry features,

data D15-DO

address AI 9-A1

MC68LC302

BUSW

and adding low-power modes with wake-up from two pins or the PIT:

In stop mode, all parts of the MC68LC302 are inactive and the current consumption is less than 0.1 mA. Both the crystal oscillator and the clock PLL are shut down. Because the internal clocks and PLL are stopped, the wake up time is 70 000 clocks. In doze mode, the clock oscillator is active but the PLL is shut down. The current consumption is in the order of a few milliamperes and depends on the frequency of the external clock crystal. Wake up time is 2500 clocks. In standby mode, the clock oscillator is active and the PLL, if enabled, is active. The wake up time is just a few clocks and power consumption is less than 10 mA. This mode is useful in applications that have periods of inactivity and require fast wake up times. In slow-go mode, the clock oscillator and PLL are active but the PLL divider is programmed to reduce the clock frequency and therefore reduce Power consumption accordingly. No functionality is lost in slow-go mode

Typical applications for the MC68LC302 include.

low-cost digital line cards for large ISDN broadband switching networks low-cost modem controllers, e g. for V 3 2 modems low-cost and portable wireless LANs internetworking applications industrial control applications cable interface units iow-cost ISDN terminal adapters and signalisation controllers credit card and bar code readers.

1315-D

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D7-DO c 29FO10

Vcc ~~~ CE*

OE' WEL*

WE'

1 1 I

D7-DO ~

A17-A1 I I D7-D0 I D15-DE

L A17-Al

F Fig. 3 MC68LC302 16-bit memory interface

A1 6-A0

D7-DO

MCM6226

E'

w G*

D7-DO ___


MICROPROCESSORS

weighing scales. Through its use in a wide variety of applications, such as modems, industrial control, medical equipment, music keyboards and bar code readers, the MC68302 has become an industry standard since introduction in 1989.

Where the MC68302 ventured, others have followed and there are now many 16 and 32-bit integrated processors on the market. Motorola alone has designed general-purpose integrated processors for the consumer, communication, printer and imaging, automotive, mass storage and set-top box markets. Other processor vendors have introduced integrated versions of their standard processors, such as the i386EX from Intel and NEC’s RISC cores.

All these integrated processors have their dedicated followers and target markets. Due to their evolution path, there is a huge knowledge base of experienced hardware and software engineers who can easily design with these devices. These engineers have built up vast libraries of hardware and software designs from which pieces are re- used in new designs. The test and development equipment vendors provide in-circuit emulators, software models etc. for most integrated processors.

The way ahead-embedded PowerPC? The future for the integrated processor market looks

very strong-more applications require increased processor power, new specific function devices are being designed and now custom integrated processors can be built for anyone with sufficient demand. Motorola has recently launched three new market driven derivatives of the MC68302 that include more peripherals and enhanced integration features:

The MC68LC302 is a lower power version of the MC68302 with a subset of the peripherals. The MC68LC302 is designed for very cost sensitive and low power applications (see Panel 2 for further details).

0 Designed for use on PCMCIA (Personal Computer Memory Card International Association) plug-in cards, the MC68PM302 is an extended MC68302 with a slave PCMCIA interface and comes in a thin quad flat pack package (see Panel 3 for further details). To serve the Ethernet market, the MC68EN302 is a superset of the MC68302 with full Ethernet and DRAM controllers on-chip (see Panel 4 for further details).

These new MC68302 derivatives join two other integrated processors aimed primarily at communications equipment: the MC68360 quad integrated communications controller is a high-performance integrated processor with four serial channels and an 8 MIPS CPU32+ and the MC68356 is an MC68302 on the same chip as a 24-bit DSP. The MC68360, its Ethernet variant (the MC68EN360) and 32-channel version (the MC68MH360) all find applications in communications, computer and industrial control equipment requiring one

or more Ethernet channels, several fast communications links and a high-performance CPU. The MC68356 is primarily targeted at V.34 and ISDN modems, although it is increasingly finding applications, such as motor control and wireless communications, where DSP functionality must be coupled with communications links.

The future development of these products is only limited by semiconductor technology. PowerPC microprocessors are being integrated with peripherals for use in communications equipment and in the automotive arena. Ford’s new powertrain transmission control system is based on an integrated PowerPC processor. New packaging technology, such as thin quad flat packs and ball grid arrays, decrease the footprint of the chips while yielding more pins. This is especially useful where there are size, height and weight restrictions such as in hard disc drives and mobile telephones.

PC-based embedded systems The desktop PC revolutionised computing in the early

1980s and is a major driving force for bigger and better microprocessors today. The PC proved to be the ideal platform for some computerised systems where its size and real-time performance limitations were not a problem. In such applications as large air-conditioning and environmental control and car park payment systems, the size of the PC is not an issue and its speed is more than adequate. The PC entered these applications in the 1980s and today remains the platform of choice for many. The PC industry soon realised the potential of its product for embedded systems and started selling standard motherboards. These can be bought in any of the standard PC configurations, with smaller form factors and engineered for commercial, industrial or military environments.

These motherboards are ideal for construction of payment systems for multi-storey car parks. A network of payment stations is set up around the car park to dispense tickets. Each payment station is based on a PC motherboard with a printer and coin collection unit attached. The payment stations are networked together using either a LAN or radio links and there is another PC for central control. At the exit to the car park, there is an automatic barrier, again controlled by a PC motherboard. The PC is well suited to this application because it is a standard, the software is more than fast enough to respond to human inputs and the outlying payment stations can be networked together. All the car park control computers in a town may also be linked to a single central control office. Similarly, networks of remote ticket dispensing machines for ‘pay and display’ parking systems are often PC motherboard based.

Software-legacy or opportunity? While the PC is ideal for some applications, it is not

well suited to low-power, fail-safe portable or high-speed


The MC68PM302 is a superset of the MC68302: the main addition is a slave PCMCIA interface. By disabling the PCMCIA interface, the MC68PM302 operates as an enhanced MC68302 and the user benefits from the MC68PM302's lower power consumption, simplified memory interface, clock PLL circuit, periodic interface timer and low-power modes. These are all the same as the MC68LC302 described in Panel 2.

The PCMCIA controller fully supports PCMCIA Standard 2.1 (now renamed the PC Card Standard). Viewed from the PC side, the MC68PM302 appears as a standard 16550 UART software interface to allow standard PC software to communicate with the MC68PM302. The PCMCIA controller interfaces between the PCMCIA bus and both the M68000 system bus and the UART 1 6 5 5 0 registers. Depending on the memory access mode, the controller handles the transfer of data from or to the appropriate source or destination. Attribute memory accesses are supported for both the card configuration registration and the card information structure (CIS) memory. The CIS is located in external memory and 1/0 accesses are relayed directly to the 1 6 550 UART registers. Common memory accesses are mapped into external memory.

The PCMCIA controller also supports low power modes. The PC can place the MC68PM302 into one of three supported stop modes using a power down control bit. The

Panel 3: The MC68PM302 PCMCIA controller can wake up the MC68PM302 from the standby stop mode when any access is made on the PCMCIA bus

Fig 4 shows a PCMCIA basic rate ISDN card where the MC68PM302 is the central controller chip running all of the ISDN communications software and handling the transfer of data to the PCMCIA host The adapter card provides a handset connection and voice communication is over the B1-channel Data transfer occurs over the B2-channel using an SCC and another SCC drives the D-channei for call control If a voice channel is not required, the third SCC on the MC68PM302 could handle a second data channel To decrease power consumption and help reduce EMC emissions, the processor is clocked from a kHz watch crystal and the internal PLL multiplies th frequency to one suitable for operation. After res MC68PM302 boots up in %bit mode from the EPROM, copies the operational software from ROM to SRAM, switches to 16- bit mode and thereafter runs as a 16-bit processor from code stored in RAM.

Typical applications for the MC68PM302 include:

data and GSM modems ISDN wireless LANs CDPD cards low-power portable applications.

32 kHz I crystal 0

T

PCMCIA pori

MC68PM302

data address SCCl bus bus scc3

1 2701 0 EPROM

~

MCM6226 SRAM

B2+D

GCI bus

7 MC145574 ISDN

transceiver ' 2B+D line connection

Fig. 4 PCMCIA ISDN adapter card based on the MC68PM302

embedded control applications. Can you imagine trying to squeeze a PC motherboard inside your video recorder? Or the queue of frustrated users waiting for printouts from their new PC based high-performance colour printer? In these applications and many others, dedicated microprocessor hardware and software systems are required.

Early embedded control systems used bespoke

software because that was all that was available. Software is now the major cost component in many new designs and, as equipment has been updated, the software has evolved dramatically. For several years, most systems using 16 and 32-bit processors have been controlled by some form of real-time embedded operating system (RTOS) such as OS-9 and VRTX. These are normally standard products optimised to handle the real-


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printer

Panel 4: The MC68EN302

scanner

The MC68EN302 extends the MC68302 family into Ethernet applications by integrating a full Ethernet controller, a DRAM controller and a JTAG test port onto an MC68302. The JTAG port and Ethernet and DRAM controllers are additions to the MC68302 so all existing software and hardware designs can be easily upgraded to use the MC68EN302. The MC68EN302 is the first MC68302 family device to provide dynamic bus sizing allowing it to support both 8 and 16-bit memory devices in the same system.

As with the MC68LC302 and MC68PM302, the MC68EN302 can connect direct to SRAM, EPROM, flash EPROM and EEPROM devices. The DRAM controller gives direct connection to DRAM devices: support is provided for two 16-bit wide banks from 128 kbytes to 8 Mbytes. The banks are selected externally by two RAS signals and individual bytes are selected by two CAS signals. Bus cycle timing is programmable in the range of four to seven clocks

line transceiver faxmodem -

FlFOs allow the Ethernet protocol core to automatically handle collisions and collision fragments. Separate DMA channels are used for transmit and receive data paths, and the large FlFOs provide a safeguard against data underruns and overflows when the bus latency is encountered. An additional on-chip dual port RAM on the MC68EN302 is used for buffer descriptor storage while all parameters, status indicators and control bits are located in registers. The Ethernet controller also includes a 64-entry CAM for address matching of received frames.

Fig. 5 shows the MC68EN302 in a combined network standalone fax machine. The Ethernet port and one SCC are used for Ethernet and AppleTalk* network connections with the appropriate transceiver chips. The MC68EN302's DRAM controller multiplexes the address bus and ensures that the external DRAM is refreshed periodically.

Typical applications for the MC68EN302 include:

Hd line connection

- . - and refresh rates may be programmed from 1 6 to 4096 clocks or may be disabled altogether. Two pins support parity checking of DRAMS. If enabled, parity is generated on write cycles and checked on read cycles, and a bus error is generated when read cycle parity errors occur.

The Ethernet controller consists of an IEEE 802.3 Ethernet protocol core, transmit and receive FIFOs, and a 16-bit data interface to the system bus. The large transmit and receive

low-end bridges and routers SDH/SoNET backplane subsystem connection racks remote dial-in hubs industrial control systems lSDN to Ethernet routers multi-protocol printer interface

*AppleTalk is a registered trademark of Apple Computer Inc.

MC68160 -1 ethernet 1 , transceiver

nerworK links

L , , lc l SCC and timers I

MC68EN302

I

converter v I I I ' R I I l l

0.5 Mbytes 1 speaker 1 DRAM rl

handset

P

keypad

Fig. 5 Combined network and standalone fax machine using the MC68EN302


the ever-changing face of integrated microprocessors-an evolutionary story

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