test pattern generator is bist scan chains testgenerator compacompaccttoorrcompacompaccttoorrctor...
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Test pattern generator is BISTTest pattern generator is BIST
scan chainsscan chains
TTEESSTT
GGEENNEERRAATTOORR
CCOOMMPPAACCTTOORR
ControlControl
Generators Generators
Capable of generating “good” pseudorandom test patterns• Long aperiodic sequences• No structural dependencies• Low linear dependencies
Capable of driving large number of scan chains Very simple hardware, small area Fast operational speed Easy to synthesize and analyze
Linear feedback shift registersLinear feedback shift registers A series connection of delay elements (D flip-flops)A series connection of delay elements (D flip-flops) All feedback provided by means of XOR gatesAll feedback provided by means of XOR gates The characteristic polynomial: The characteristic polynomial: xx1616 + + xx1010 + + xx77 + + xx44 + 1 + 1 Two implementationsTwo implementations
Larger fanout but smaller delayLarger fanout but smaller delay
1515 1414 1313 1212 1111 1010 99 88 77 66 55 44 33 22 11 00
00 11 22 33 44 55 66 77 88 99 1010 1111 1212 1313 1414 1515
CheckingCheckingCheckingChecking
Primitive polynomialPrimitive polynomial
11 00 00 00
An n-bit LFSR with nonzero seed generates An n-bit LFSR with nonzero seed generates m-sequencem-sequence (maximum length sequence) with period 2(maximum length sequence) with period 2nn-1-1
1 3 7 15 14 13 10 5 11 6 12 9 2 4 81 3 7 15 14 13 10 5 11 6 12 9 2 4 8
1 1 1 1 0 1 0 1 1 0 0 1 0 0 01 1 1 1 0 1 0 1 1 0 0 1 0 0 0
AbsoluteAbsoluteAbsoluteAbsolute
PrimesPrimesPrimesPrimes
Properties of m-sequenceProperties of m-sequence It consists of 2It consists of 2n-1 n-1 1s and (21s and (2n-1n-1 - 1) 0s - 1) 0s There is one pattern of n consecutive 1s and one pattern of n - 1 There is one pattern of n consecutive 1s and one pattern of n - 1
consecutive 0sconsecutive 0s Any pair comprising an m-sequence and its circularly shifted version Any pair comprising an m-sequence and its circularly shifted version
isis identical identical in 2 in 2n-1n-1 - 1 positions and - 1 positions and differdiffer in 2 in 2n-1n-1 positions positions A sum of an m-sequence and its circularly shifted version is another A sum of an m-sequence and its circularly shifted version is another
shifted version of that m-sequenceshifted version of that m-sequence
000000110000111100110011111111
00001111001100111111110000 0011
00111111110000001100001111 0011
Shifted by 8 bitsShifted by 8 bits
Shifted by 2 bitsShifted by 2 bits
Linear dependenciesLinear dependencies
a a d d
a a c c d d
a a b b c c d d
b b c c d d
a a b b c c
b b d d
a a c c
a a b b d d
c c d d
b b c c
a a b b
dd
cc
bb
aa
Cannot generatetest 111 !
1111
00
1100
11
0011
11
0000
00Only these 4Only these 4combinationscombinationsare possibleare possible
dd cc bb aa
!
Probability of linear dependencyProbability of linear dependency
Gaussian elimination can be used to determine Gaussian elimination can be used to determine linear dependencieslinear dependencies
Probability of k-bit linear dependency in m-Probability of k-bit linear dependency in m-sequence generated by an n-bit LFSR with sequence generated by an n-bit LFSR with primitive polynomialprimitive polynomial
For smaller sequences the probability may be For smaller sequences the probability may be much highermuch higher
Trinomials are particularly sensitiveTrinomials are particularly sensitive
11
00 1122222211)),,((
kk
iinn
iinn
iikknnpp
Probability of linear dependencyProbability of linear dependency
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 k
n = 30n = 30
......
22nn - 1 - 1nn
LFSRLFSR
Selection of polynomialSelection of polynomial
Degree: Degree: • Large enough so the states will not repeat Large enough so the states will not repeat • Large enough to reduce linear dependenciesLarge enough to reduce linear dependencies
TypeType• PrimitivePrimitive• Avoid trinomials (increased linear dependencies)Avoid trinomials (increased linear dependencies)• Use at least pentanomials or septanomialsUse at least pentanomials or septanomials
Seed valueSeed value• Selected through fault simulationSelected through fault simulation• Selected intelligently through reseedingSelected intelligently through reseeding
Two-dimensional generatorsTwo-dimensional generators
StructuralStructural
dependenciesdependencies
0011
2233
4455
6677
8899
1010
1111
......
Two-dimensional generatorsTwo-dimensional generators
PPHHAASSEE
SSHHIIFFTTEERR
PPHHAASSEE
SSHHIIFFTTEERR
0011
2233
4455
6677
8899
1010
1111
Find XOR network Find XOR network which guarantees which guarantees minimum channel minimum channel separationseparation
XOR taps selectionXOR taps selection
Determine a dual LFSRDetermine a dual LFSR Initialize it to Initialize it to 10 ... 010 ... 0 pattern pattern Run it for 2Run it for 2nn - 1 - k cycles - 1 - k cycles Read the resulting content of the dual LFSRRead the resulting content of the dual LFSR
Locations of 1s point out positions that should be included in a phase shifter to obtain a sequence shifted by k bits
!
Application of LFSR dualityApplication of LFSR duality
11 00 00 0011 00 00 00
1 0 0 11 0 0 11 1 0 11 1 0 11 1 1 11 1 1 11 1 1 01 1 1 00 1 1 10 1 1 11 0 1 01 0 1 00 1 0 10 1 0 11 0 1 11 0 1 11 1 0 01 1 0 0
ShiftShift 55 66 77 8 8 991010111112121313
11DualDualDualDual
PRPG with phase shifterPRPG with phase shifter
0011
2233
4455
6677
8899
1010
1111
............
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
0 20 40 60 80 100
theoretical limit
scan size
Impact on linear dependencyImpact on linear dependency
16-bit type I LFRS 16-bit type I LFRS 13 polynomials 13 polynomials 15 specified bits15 specified bits
No PSNo PS
scan: 16 50
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1 10 100 1000 10000
separation
theoretical limit
With PSWith PS
Extra fault coverageExtra fault coverage
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
s923
4
s923
4.1
s537
8
s385
84.1
s384
17
s359
32
s158
50.1
s142
3
s132
07
s132
07.1
s385
84
s158
50
No phase shifterNo phase shifter
With phaseWith phaseshiftersshifters
54 polynomials, 16-, 24- and 32-bit type I LFRSs54 polynomials, 16-, 24- and 32-bit type I LFRSs0 0 the lowest fault coverage recorded the lowest fault coverage recorded
maxmax
avg.avg.
minmin
Cellular automataCellular automata
11 11 00 11 00 11 00 11
00
00
Capable of generating m-sequences with primitive polynomials
Improved modularity (compared to LFSRs) Reduced need for phase shifters May exhibit some structural dependencies
LFSRsLFSRs
External feedback External feedback LFSLFSRRExternal feedback External feedback LFSLFSRR
Internal feedback Internal feedback LFLFSRSRInternal feedback Internal feedback LFLFSRSR
- - many levels of many levels of logiclogic - - many levels of many levels of logiclogic
- big - big fan-outfan-out - big - big fan-outfan-out
- - large gate large gate countcount - - large gate large gate countcount
Hybrid LFSR and cellular automatonHybrid LFSR and cellular automaton
Hybrid LFHybrid LFSRSRHybrid LFHybrid LFSRSR
Cellular Cellular automatonautomatonCellular Cellular automatonautomaton
- - delay and fan-outdelay and fan-out- - delay and fan-outdelay and fan-out
Ring architectureRing architecture
One sources per one destination Fast
11 + + xx44 + + xx88 + + xx1212 + + xx1717 + + xx2020 + + xx2323 + + xx2288 ++ x x3232
282828282323232320202020171717171212121288884444
Modular PRPG
SynthesisSynthesis
1 + 1 + xx1212 + + xx1414 + + xx2727 + + x x3232
1515 1414 1313 1212 1111 66991010 88 55 44 3377 22 11 00
1616 1717 1818 1919 2020 2121 2222 2323 2424 2525 2626 2727 2828 2929 3030 3131
1010
2222
1010 +12+12 == 2222 (32-12)/2(32-12)/2 ==
1010
99
2323
99 +14+14 == 2323 99 +14+14 == 2323 (32-14)/2(32-14)/2 = = 99 (32-14)/2(32-14)/2 = = 99
22
2929
22 +27+27 == 2929 22 +27+27 == 2929 (32-27)/2(32-27)/2 = = 22 (32-27)/2(32-27)/2 = = 22
Comparison summaryComparison summary
H LFSRH LFSRIF LFSRIF LFSREF LFSREF LFSR CACA RingRing
2 k + 1k + 1 (2, k +1)(2, k +1)22 33 22
loglog22kk 11 (1, log(1, log22k)k) 22 11
k k 2n - 22n - 2(k +1) / 2kk kk kk(k +1) / 2(k +1) / 2
h(x) = x n + x i + ... + x j + 1k
only for some polynomials
Fan-outFan-out
Levels of logicLevels of logic
XOR gatesXOR gates
ModularityModularity k k ****(k +1) / 2** ** ********
Reseeding of LFSRsReseeding of LFSRs
LFSRLFSRLFSRLFSR Scan chainScan chainScan chainScan chain
SeedSeedSeedSeed Test cubeTest cubeTest cubeTest cube
Identification of random Identification of random pattern resistant faults by pattern resistant faults by fault simulation of pseudo-fault simulation of pseudo-random patternsrandom patterns
Final fault grading of the test Final fault grading of the test vectors obtained from the vectors obtained from the seeds by fault simulation of seeds by fault simulation of decompressed patternsdecompressed patterns
Generation of test cubes for Generation of test cubes for random pattern resistant faults random pattern resistant faults using ATPG with dynamic using ATPG with dynamic compression, targeting several compression, targeting several faults and leaving many “don’t faults and leaving many “don’t care” inputscare” inputs
Computation of seeds by Computation of seeds by solving systems of linear solving systems of linear equations through equations through Gaussian eliminationGaussian elimination
Weighted random patternsWeighted random patterns
00 11 22 33 44 55 66 77 88 99 1010 1111
The average number of patterns The average number of patterns to detect s-a-0:to detect s-a-0:
Pseudo-random: Pseudo-random: 1/0.51/0.5-9-9 = 512 = 512
Weighted PS: 1/(1 - 2Weighted PS: 1/(1 - 2-7-7))-9-9 1.07 1.07
Placement of compactorPlacement of compactor
scan chainsscan chains
TTEESSTT
GGEENNEERRAATTOORR
CCOOMMPPAACCTTOORR
Requirements for Logic BISTRequirements for Logic BIST
ObjectiveObjective: reduce the volume of test data and still be able to : reduce the volume of test data and still be able to determine if the response was correctdetermine if the response was correct
simple hardware and small area tested as part of the embedded test circuitry simple software compute the signature at the speed of the test perform logarithmic compaction of data no aliasing
No scheme meets all criteria, but some come close!
Properties of ideal compactors:Properties of ideal compactors:
Requirements for deterministic testRequirements for deterministic test
Dramatically reduce volume of output test data Maintain high test quality Minimize impact on design and flow Provide in-production diagnosis
MotivationMotivation
DDeeccoommpprreessssoorr
99.99%99.99%99.99%99.99%99.99%99.99%
XXXX
XXXX
> 1> 1> 1> 1----
DiagnosisDiagnosis
>100x>100xQualityQuality
X toleranceX tolerance
QualityQuality
DDeeccoommpprreessssoorr
99.99%99.99%99.99%99.99%99.99%99.99%
QualityQuality
CompactionCompaction
DDeeccoommpprreessssoorr
> 1> 1> 1> 1----
>100x>100x
X toleranceX tolerance
DDeeccoommpprreessssoorr
XXXX
XXXX
X toleranceX tolerance
MotivationMotivation
DDeeccoommpprreessssoorr
DiagnosisDiagnosis
Compaction schemesCompaction schemes
Time compactors• polynomial division - signature analysis• arithmetic accumulation• various forms of counting
Space compactors• XOR trees
Finite memory compactors• Convolutional compactors• Block-based compactors
Error models and aliasingError models and aliasing
Single-bit and burst errorsSingle-bit and burst errors Equally likely errorsEqually likely errors Stationary and non-stationary independent errorsStationary and non-stationary independent errors Asymmetric errorsAsymmetric errors
Aliasing or error maskingAliasing or error masking - signature obtained from a - signature obtained from a faulty circuit is the same as that of the fault-free circuitfaulty circuit is the same as that of the fault-free circuit
00 11 22 33 44 55 66 77 88 99 1010 1111OK 0OK 0
Fault detected 1Fault detected 1
LFSR and Markov modelLFSR and Markov model
010010
011011
110110
101101
001001
100100
111111
111111 00 00 00
000000
1111
000000
100100
110110
011011
001001
100100
010010
001001
000000
00 00 0011 00 0011 11 0000 11 1100 00 1111 00 0000 11 0000 00 1100 00 00
TransientTransient
0
0.5
10 20 30 40 50
Number of patterns
Alia
sin
g p
roba
bilit
y
(primitive polynomial)p = 0.9
p = 0.8
p = 0.2
p = 0.1
h(x) = x3 + x2 + 10.4
0.3
0.2
0.1
Aliasing probabilityAliasing probability
How likely is it that a fault will generate a signature How likely is it that a fault will generate a signature identical to a fault-free signature? identical to a fault-free signature?
The Markov chain representing the compaction The Markov chain representing the compaction performed by n-bit LFSR is performed by n-bit LFSR is irreducible, aperiodicirreducible, aperiodic, and , and its transition matrix is its transition matrix is doubly stochasticdoubly stochastic. Thus the . Thus the probability that it enters any state is probability that it enters any state is
provided that a steady state has been reached.provided that a steady state has been reached.
For n = 20, p For n = 20, p 10 10-6-6 and n = 30, p and n = 30, p 10 10-9-9
2-n
Multiple Input Signature RegisterMultiple Input Signature Register
Parallel data acquisition from multiple scan chains Multiple error injections High compaction speed Simple hardware
Parallel data acquisition from multiple scan chains Multiple error injections High compaction speed Simple hardware
1515 1414 1313 1212 1111 1010 99 88 77 66 55 44 33 22 11 00
Time compactorsTime compactors
MISR – infinite memory MISR – infinite memory compactorcompactorMISR – infinite memory MISR – infinite memory compactorcompactor
Compaction ratios 108 x Unable to handle unknown states Multiple-pass complicated fault diagnosis
Space compactorsSpace compactors
Smaller compaction than time compactors Handling of unknown states
XOR XOR treetreeXOR XOR treetree
Space compactorsSpace compactors
Certain minimum number of outputs required Improved diagnostic capabilities
Space compactorsSpace compactors
Balanced tree is preferable
scan chainsscan chains
Fault cancellationFault cancellation
scanscan
scanscan
Unknown statesUnknown states
scanscan
scanscan
XXXX
XXXX
Selective space compactorsSelective space compactors
Deterministic compaction control
...
...
decoderdecoder
control
scanscan
scanscan
scanscan
scanscan
Convolutional compactor 10:1Convolutional compactor 10:1
Polynomials 3/6Polynomials 3/6
Architecture of convolutional compactor Architecture of convolutional compactor ...
...
Injector networkInjector network
Observable scan chainsObservable scan chains
2020 171171 324324 580580 920920 11361136
1212 5555 100100 164164 216216
88 2121 3636 5252 5656
sizesize 11 22 44 88 1616
66 1010 1616 2020
1010 3636 6464 100100 120120
1616 105105 196196 340340 504504 560560
3232 465465 900900 16841684 29362936 44004400
2424 253253 484484 884884 14641464 19681968
2828 351351 676676 12521252 21362136 30563056
outputsoutputs
3/M3/Mpolynomials
polynomials
3/M3/Mpolynomials
polynomials
Error maskingError masking
Error maskingError masking
0.00.0 0.00.0 0.00.0 0.00.0 0.00.0
Error masking - no X statesError masking - no X states
0.00.0
44 33
0.0 + 0.0 + 11
0.0 + 0.0 + 22
……Error multiplicityError multiplicity
2i+12i+12i2i22 33 44 55 66 77 8811
……Error time spanError time span
00 11 22 33 44
……Compactor sizeCompactor size
1616 3232
Probability of 4-error maskingProbability of 4-error masking
1.00E-07
1.00E-06
1.00E-05
1.00E-04
1.00E-03
16 20 24 28 32 36 40 44 48
100x compaction100x compaction3/M polynomials3/M polynomialsError time span = 0Error time span = 0 1 output1 output 2 outputs2 outputs 4 outputs4 outputs 8 outputs8 outputs 16 outputs16 outputs 32 outputs32 outputs
Compactor sizeCompactor size
Unknown statesUnknown states
XX
Single error detected in the Single error detected in the
presence of a single X statepresence of a single X state
Diagnostic resolutionDiagnostic resolution
Errors identified by unique syndroms
Diagnostic resolution (%)Diagnostic resolution (%)
0
20
40
60
80
100
1 2 3 4 5 6
MM == 88
MM == 1212
MM == 1616
MM == 2020
MM == 2424
MM == 2828
MM == 3232MM == 4040
Error multiplicityError multiplicity
Same time injectionSame time injectionSame time injectionSame time injection
Convolutional MISRConvolutional MISR
………………
……………………
…………
Diagnostic modeDiagnostic modeDiagnostic modeDiagnostic mode0011
Go / No go testGo / No go testGo / No go testGo / No go test
ExampleExample
... Injector networkInjector network
474474
88
UnobservedUnobserved37.28%37.28%
UnobservedUnobserved37.28%37.28%
X X 0.39% 0.39%X X 0.39% 0.39%
2.5M gates2.5M gates
57K scan cells57K scan cells2.5M gates2.5M gates
57K scan cells57K scan cells......
......
......
......
Distribution of X statesDistribution of X states
...
112233445566778899
1010
474474
Majority of unknown values produced by small fraction of scan chains
5050 1001002525 7575
D.2 (2.1%)D.2 (2.1%)D.2 (2.1%)D.2 (2.1%)
95.595.5
Selective convolutional compactorSelective convolutional compactor
ConvolutionalConvolutional
compactorcompactor
...
Disabling of defective scan chains
Experimental resultsExperimental results
GatesGates
Scan cellsScan cells
Scan chainsScan chains
Unknown states (%)Unknown states (%)
No. outputsNo. outputs
DesignDesign
Compaction ratioCompaction ratio
Compactor sizeCompactor size
Unobserved cells (%) …Unobserved cells (%) …
… … with scan masking (%)with scan masking (%)
Maximum masked chainsMaximum masked chains
D.1D.1
1.6M1.6M
45K45K
9696
0.72 0.72
4 4
2424
3636
16.9616.96
4.324.32
22
2.5M2.5M
57K57K
474474
0.390.39
4 4
118.5118.5
3232
37.2837.28
1.761.76
99
D.2D.2
2.7M2.7M
138K138K
457457
0.090.09
44
114.3114.3
3232
8.518.51
5.125.12
66
D.3D.3
ConclusionsConclusions
New class of finite memory compaction schemes Dramatic compaction of test responses (100x) Flexible number of outputs (1) Good observability in presence of X states ( 95%) Direct diagnosis from compacted responses