technology trends
DESCRIPTION
Technology Trends. Pradondet Nilagupta Fall 2005 (original notes from Randy Katz, & Prof. Jan M. Rabaey , UC Berkeley). Original. Big Fishes Eating Little Fishes. 1988 Computer Food Chain. Mainframe. Work- station. PC. Mini- computer. Mini- supercomputer. Supercomputer. - PowerPoint PPT PresentationTRANSCRIPT
April 22, 2023204521 Digital System Architecture
Technology Trends
Pradondet NilaguptaFall 2005
(original notes from Randy Katz, & Prof. Jan M. Rabaey , UC Berkeley)
April 22, 2023204521 Digital System Architecture 2
Original
Big Fishes Eating Little Fishes
April 22, 2023204521 Digital System Architecture 3
1988 Computer Food Chain
PCWork-stationMini-
computer
Mainframe
Mini-supercomputer
Supercomputer
Massively Parallel Processors
April 22, 2023204521 Digital System Architecture 4
1998 Computer Food Chain
Mini-supercomputerMassively Parallel
Processors
Mini-computer
PCWork-station
Mainframe
Supercomputer Now who is eating whom?Server
April 22, 2023204521 Digital System Architecture 5
1985 Computer Food Chain Technologies
PCWork-stationMini-
computer
Mainframe
Mini-supercomputer
Supercomputer
ECL TTL MOS
April 22, 2023204521 Digital System Architecture 6
Why Such Change in 10 years? (1/2)
Function– Rise of networking/local interconnection techn
ology
Performance– Technology Advances
• CMOS VLSI dominates TTL, ECL in cost & performance
– Computer architecture advances improves low-end
• RISC, Superscalar, RAID, …
April 22, 2023204521 Digital System Architecture 7
Why Such Change in 10 years? (2/2)
Price: Lower costs due to …– Simpler development
• CMOS VLSI: smaller systems, fewer components
– Higher volumes• CMOS VLSI : same dev. cost 10,000 vs. 10,0
00,000 units – Lower margins by class of computer, due to
fewer services
April 22, 2023204521 Digital System Architecture 8
Technology Trends: Microprocessor Capacity
Year
Tran
sist
ors
1000
10000
100000
1000000
10000000
100000000
1970 1975 1980 1985 1990 1995 2000
i80386
i4004i8080
Pentium
i80486
i80286
i8086
Moore’s Law
CMOS improvements:• Die size: 2X every 3 yrs• Line width: halve / 7 yrs
“Graduation Window”Alpha 21264: 15 millionPentium Pro: 5.5 millionPowerPC 620: 6.9 millionAlpha 21164: 9.3 millionSparc Ultra: 5.2 million
April 22, 2023204521 Digital System Architecture 9
Memory Capacity (Single Chip DRAM)
size
Year
Bits
1000
10000
100000
1000000
10000000
100000000
1000000000
1970 1975 1980 1985 1990 1995 2000
year size(Mb) cyc time1980 0.0625 250 ns1983 0.25 220 ns1986 1 190 ns1989 4 165 ns1992 16 145 ns1996 64 120 ns2000 256 100 ns
April 22, 2023204521 Digital System Architecture 10
CMOS ImprovementsDie size 2X every 3 yrsLine widths halve every 7 yrs
0
5
10
15
20
25
1980 1983 1986 1989 1992
Die SizeLine Width Improvement
Die size increase plus transistor count increase
Transistor Count
April 22, 2023204521 Digital System Architecture 11
Memory Size of Various Systems Over Time
128K
128M
20008K
1M
8M
1G
8G
1970 1980 1990
1 chip
1Kbit
640K
4K 16K 64K 256K 1M 4M 16M 64M 256M
DOS limit
1/8 chip
8 chips-PC
64 chips workstation
512 chips
4K chipsBytes
Time
April 22, 2023204521 Digital System Architecture 12
Technology Trends (Summary)Capacity Speed (latency)
Logic 2x in 3 years 2x in 3 yearsDRAM 4x in 3 years 2x in 10 yearsDisk 4x in 3 years 2x in 10 years
April 22, 2023204521 Digital System Architecture 13
Processor Frequency Trend
Frequency doubles each generation Number of gates/clock reduce by 25%
386486
Pentium(R)
Pentium Pro(R)
Pentium(R) IIMPC750
604+604
601, 603
21264S
2126421164A
2116421064A
21066
10
100
1,000
10,000
1987
1989
1991
1993
1995
1997
1999
2001
2003
2005
Mhz
1
10
100
Gat
e D
elay
s/ C
lock
Intel
IBM Power PC
DEC
Gate delays/clock
Processor freq scales by 2X per
generation
April 22, 2023204521 Digital System Architecture 14
Processor Performance Trends
Microprocessors
Minicomputers
Mainframes
Supercomputers
0.1
1
10
100
1000
1965 1970 1975 1980 1985 1990 1995 2000
April 22, 2023204521 Digital System Architecture 15
Performance vs. Time
Mips25 MHz
0.1
1.0
10
100Pe
rfor
man
ce (V
AX
780s
)
1980 1985 1990
MV10K
68K
7805 MHz
RISC 60% / yr.
uVAX 6K(CMOS)
8600
TTL
ECL 15%/yr.
CMOS CISC
38%/yr.
o ||MIPS (8 MHz)
o9000
Mips(65 MHz)
uVAXCMOS Will RISC continue on a
60%, (x4 / 3 years)?
4K
April 22, 2023204521 Digital System Architecture 16
Processor Performance(1.35X before, 1.55X now)
0
200
400
600
800
1000
1200
87 88 89 90 91 92 93 94 95 96 97
DEC
Alph
a 211
64/6
00
DEC
Alph
a 5/
500
DEC
Alph
a 5/
300
DEC
Alph
a 4/
266
IBM
POW
ER 10
0
DEC
AXP/
500
HP 90
00/7
50
Sun-
4/260
IBM
RS/
6000
MIP
S M
/120
MIP
S M
/2000
1.54X/yr
April 22, 2023204521 Digital System Architecture 17
Summary: Performance Trends
Workstation performance (measured in Spec Marks) improves roughly 50% per year (2X every 18 months)
Improvement in cost performance estimated at 70% per year
April 22, 2023204521 Digital System Architecture 18
Processor Perspective
Putting performance growth in perspective: IBM POWER2 Cray YMP Workstation SupercomputerYear 1993 1988MIPS > 200 MIPS < 50 MIPSLinpack 140 MFLOPS 160 MFLOPSCost $120,000 $1M ($1.6M in 1994$)Clock 71.5 MHz 167 MHzCache 256 KB 0.25 KBMemory 512 MB256 MB
1988 supercomputer in 1993 server!
April 22, 2023204521 Digital System Architecture 19
Where Has This Performance Improvement Come From?
Technology?Organization?Instruction Set Architecture?Software?Some combination of all of the above?
April 22, 2023204521 Digital System Architecture 20
Performance Trends Revisited(Architectural Innovation)
Microprocessors
Minicomputers
Mainframes
Supercomputers
Year
0.1
1
10
100
1000
1965 1970 1975 1980 1985 1990 1995 2000
CISC/RISC
April 22, 2023204521 Digital System Architecture 21
Performance Trends Revisited (Microprocessor Organization)
Year
Transistors
1000
10000
100000
1000000
10000000
100000000
1970 1975 1980 1985 1990 1995 2000
r4400
r4000
r3010
i80386
i4004
i8080
i80286
i8086
• Bit Level Parallelism
• Pipelining
• Caches
• Instruction Level Parallelism
• Out-of-order Xeq
• Speculation
• . . .
April 22, 2023204521 Digital System Architecture 22
What is Ahead?Greater instruction level parallelism?Bigger caches?Multiple processors per chip?Complete systems on a chip? (Portable Systems)High performance LAN, Interface, and Interconnect
April 22, 2023204521 Digital System Architecture 23
Hardware Technology1980 1990 2000
Memory chips 64 K 4 M 256 M-1 GSpeed 1-2 20-40 400-10005-1/4 in. disks 40 M 1 G 20 GFloppies .256 M 1.5 M 500-2,000 MLAN (Switch) 2-10 Mbits 10 (100) 155-655
(ATM)Busses 2-20 Mbytes 40-400
April 22, 2023204521 Digital System Architecture 24
Software Technology 1980 1990 2000
Languages C, FORTRAN C++, HPF object stuff??Op. System proprietary +DUM* +DUM+NTUser I/F glass Teletype WIMP* stylus, voice,
audio,video, ??Comp. Styles T/S, PC Client/Server agents*mobileNew things PC & WS parallel proc. appliancesCapabilities WP, SS WP,SS, mail video, ??
DUM = DOS, n-UNIX's, MACWIMP = Windows, Icons, Mouse, Pull-down menusAgents = robots that work on information
April 22, 2023204521 Digital System Architecture 25
Computer Technology Trends: Evolutionary but Rapid Change
Processor:– 1.5-1.6 performance improvement every year; Over 100X
performance in last decade.Memory:– DRAM capacity: > 2x every 1.5 years; 1000X size in last decade.– Cost per bit: Improves about 25% per year.
Disk:– Capacity: > 2X in size every 1.5 years.– Cost per bit: Improves about 60% per year.– 200X size in last decade.– Only 10% performance improvement per year, due to mechanical
limitations.Expected State-of-the-art PC by end of year 2005 :– Processor clock speed: > 4000 MegaHertz (4 Giga Hertz)– Memory capacity: > 4000 MegaByte (4 Giga
Bytes)– Disk capacity: > 500 GigaBytes (0.5 Tera Bytes)
April 22, 2023204521 Digital System Architecture 26
Recent Architectural ImprovementsRecent Architectural Improvements
Increased optimization and utilization of cache systems.Memory-latency hiding techniques.Optimization of pipelined instruction execution.Dynamic hardware-based pipeline scheduling.Improved handling of pipeline hazards.Improved hardware branch prediction techniques.Exploiting Instruction-Level Parallelism (ILP) in terms of multiple-instruction issue and multiple hardware functional units.Inclusion of special instructions to handle multimedia applications (limited vector processing).High-speed bus designs to improve data transfer rates.
April 22, 2023204521 Digital System Architecture 27
Applications: Unlimited Opportunities (1/2)
Office agents: phone/FAX/comm; files/paper handlingUntethered computing: fully distributed offices ??Integration of video, communication, and computing: desktop video publishing, conferencing, & mail Large, commercial transaction processing systemsEncapsulate knowledge in a computer: scientific & engineering simulation (e.g.. planetarium, wind tunnel, ... )
April 22, 2023204521 Digital System Architecture 28
Applications: Unlimited Opportunities (2/2)
Visualization & virtual realityComputational chemistry e.g. biochemistry and materials Mechanical engineering without prototypesImage/signal processing: medicine, maps, surveillance.Personal computers in 2001 are today's supercomputersIntegration of the PC & TV => TC
April 22, 2023204521 Digital System Architecture 29
Challenges for 1990s Platforms (1/2)
64-bit computers video, voice, communication, any really new apps? Increasingly large, complex systems and environments Usability?Plethora of non-portable, distributed, incompatible, non-interoperable computers: Usability?Scalable parallel computers can provide “commodity supercomputing”: Markets and trained users?
April 22, 2023204521 Digital System Architecture 30
Challenges for 1990s Platforms (2/2)
Apps to fuel and support a chubby industry: communications, paper/office, and digital videoThe true portable, wireless communication computer Truly personal card, pencil, pocket, wallet computerNetworks continue to limit: WAN, ISDN, and ATM?